grufault.c 16 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * FAULT HANDLER FOR GRU DETECTED TLB MISSES
  5. *
  6. * This file contains code that handles TLB misses within the GRU.
  7. * These misses are reported either via interrupts or user polling of
  8. * the user CB.
  9. *
  10. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mm.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/device.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <asm/pgtable.h>
  35. #include "gru.h"
  36. #include "grutables.h"
  37. #include "grulib.h"
  38. #include "gru_instructions.h"
  39. #include <asm/uv/uv_hub.h>
  40. /*
  41. * Test if a physical address is a valid GRU GSEG address
  42. */
  43. static inline int is_gru_paddr(unsigned long paddr)
  44. {
  45. return paddr >= gru_start_paddr && paddr < gru_end_paddr;
  46. }
  47. /*
  48. * Find the vma of a GRU segment. Caller must hold mmap_sem.
  49. */
  50. struct vm_area_struct *gru_find_vma(unsigned long vaddr)
  51. {
  52. struct vm_area_struct *vma;
  53. vma = find_vma(current->mm, vaddr);
  54. if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
  55. return vma;
  56. return NULL;
  57. }
  58. /*
  59. * Find and lock the gts that contains the specified user vaddr.
  60. *
  61. * Returns:
  62. * - *gts with the mmap_sem locked for read and the GTS locked.
  63. * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
  64. */
  65. static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
  66. {
  67. struct mm_struct *mm = current->mm;
  68. struct vm_area_struct *vma;
  69. struct gru_thread_state *gts = NULL;
  70. down_read(&mm->mmap_sem);
  71. vma = gru_find_vma(vaddr);
  72. if (vma)
  73. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  74. if (gts)
  75. mutex_lock(&gts->ts_ctxlock);
  76. else
  77. up_read(&mm->mmap_sem);
  78. return gts;
  79. }
  80. static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
  81. {
  82. struct mm_struct *mm = current->mm;
  83. struct vm_area_struct *vma;
  84. struct gru_thread_state *gts = NULL;
  85. down_write(&mm->mmap_sem);
  86. vma = gru_find_vma(vaddr);
  87. if (vma)
  88. gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
  89. if (gts) {
  90. mutex_lock(&gts->ts_ctxlock);
  91. downgrade_write(&mm->mmap_sem);
  92. } else {
  93. up_write(&mm->mmap_sem);
  94. }
  95. return gts;
  96. }
  97. /*
  98. * Unlock a GTS that was previously locked with gru_find_lock_gts().
  99. */
  100. static void gru_unlock_gts(struct gru_thread_state *gts)
  101. {
  102. mutex_unlock(&gts->ts_ctxlock);
  103. up_read(&current->mm->mmap_sem);
  104. }
  105. /*
  106. * Set a CB.istatus to active using a user virtual address. This must be done
  107. * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
  108. * If the line is evicted, the status may be lost. The in-cache update
  109. * is necessary to prevent the user from seeing a stale cb.istatus that will
  110. * change as soon as the TFH restart is complete. Races may cause an
  111. * occasional failure to clear the cb.istatus, but that is ok.
  112. *
  113. * If the cb address is not valid (should not happen, but...), nothing
  114. * bad will happen.. The get_user()/put_user() will fail but there
  115. * are no bad side-effects.
  116. */
  117. static void gru_cb_set_istatus_active(unsigned long __user *cb)
  118. {
  119. union {
  120. struct gru_instruction_bits bits;
  121. unsigned long dw;
  122. } u;
  123. if (cb) {
  124. get_user(u.dw, cb);
  125. u.bits.istatus = CBS_ACTIVE;
  126. put_user(u.dw, cb);
  127. }
  128. }
  129. /*
  130. * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
  131. * interrupt. Interrupts are always sent to a cpu on the blade that contains the
  132. * GRU (except for headless blades which are not currently supported). A blade
  133. * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
  134. * number uniquely identifies the GRU chiplet on the local blade that caused the
  135. * interrupt. Always called in interrupt context.
  136. */
  137. static inline struct gru_state *irq_to_gru(int irq)
  138. {
  139. return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
  140. }
  141. /*
  142. * Read & clear a TFM
  143. *
  144. * The GRU has an array of fault maps. A map is private to a cpu
  145. * Only one cpu will be accessing a cpu's fault map.
  146. *
  147. * This function scans the cpu-private fault map & clears all bits that
  148. * are set. The function returns a bitmap that indicates the bits that
  149. * were cleared. Note that sense the maps may be updated asynchronously by
  150. * the GRU, atomic operations must be used to clear bits.
  151. */
  152. static void get_clear_fault_map(struct gru_state *gru,
  153. struct gru_tlb_fault_map *map)
  154. {
  155. unsigned long i, k;
  156. struct gru_tlb_fault_map *tfm;
  157. tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
  158. prefetchw(tfm); /* Helps on hardware, required for emulator */
  159. for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
  160. k = tfm->fault_bits[i];
  161. if (k)
  162. k = xchg(&tfm->fault_bits[i], 0UL);
  163. map->fault_bits[i] = k;
  164. }
  165. /*
  166. * Not functionally required but helps performance. (Required
  167. * on emulator)
  168. */
  169. gru_flush_cache(tfm);
  170. }
  171. /*
  172. * Atomic (interrupt context) & non-atomic (user context) functions to
  173. * convert a vaddr into a physical address. The size of the page
  174. * is returned in pageshift.
  175. * returns:
  176. * 0 - successful
  177. * < 0 - error code
  178. * 1 - (atomic only) try again in non-atomic context
  179. */
  180. static int non_atomic_pte_lookup(struct vm_area_struct *vma,
  181. unsigned long vaddr, int write,
  182. unsigned long *paddr, int *pageshift)
  183. {
  184. struct page *page;
  185. /* ZZZ Need to handle HUGE pages */
  186. if (is_vm_hugetlb_page(vma))
  187. return -EFAULT;
  188. *pageshift = PAGE_SHIFT;
  189. if (get_user_pages
  190. (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
  191. return -EFAULT;
  192. *paddr = page_to_phys(page);
  193. put_page(page);
  194. return 0;
  195. }
  196. /*
  197. * atomic_pte_lookup
  198. *
  199. * Convert a user virtual address to a physical address
  200. * Only supports Intel large pages (2MB only) on x86_64.
  201. * ZZZ - hugepage support is incomplete
  202. *
  203. * NOTE: mmap_sem is already held on entry to this function. This
  204. * guarantees existence of the page tables.
  205. */
  206. static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
  207. int write, unsigned long *paddr, int *pageshift)
  208. {
  209. pgd_t *pgdp;
  210. pmd_t *pmdp;
  211. pud_t *pudp;
  212. pte_t pte;
  213. pgdp = pgd_offset(vma->vm_mm, vaddr);
  214. if (unlikely(pgd_none(*pgdp)))
  215. goto err;
  216. pudp = pud_offset(pgdp, vaddr);
  217. if (unlikely(pud_none(*pudp)))
  218. goto err;
  219. pmdp = pmd_offset(pudp, vaddr);
  220. if (unlikely(pmd_none(*pmdp)))
  221. goto err;
  222. #ifdef CONFIG_X86_64
  223. if (unlikely(pmd_large(*pmdp)))
  224. pte = *(pte_t *) pmdp;
  225. else
  226. #endif
  227. pte = *pte_offset_kernel(pmdp, vaddr);
  228. if (unlikely(!pte_present(pte) ||
  229. (write && (!pte_write(pte) || !pte_dirty(pte)))))
  230. return 1;
  231. *paddr = pte_pfn(pte) << PAGE_SHIFT;
  232. #ifdef CONFIG_HUGETLB_PAGE
  233. *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
  234. #else
  235. *pageshift = PAGE_SHIFT;
  236. #endif
  237. return 0;
  238. err:
  239. local_irq_enable();
  240. return 1;
  241. }
  242. /*
  243. * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
  244. * Input:
  245. * cb Address of user CBR. Null if not running in user context
  246. * Return:
  247. * 0 = dropin, exception, or switch to UPM successful
  248. * 1 = range invalidate active
  249. * < 0 = error code
  250. *
  251. */
  252. static int gru_try_dropin(struct gru_thread_state *gts,
  253. struct gru_tlb_fault_handle *tfh,
  254. unsigned long __user *cb)
  255. {
  256. struct mm_struct *mm = gts->ts_mm;
  257. struct vm_area_struct *vma;
  258. int pageshift, asid, write, ret;
  259. unsigned long paddr, gpa, vaddr;
  260. /*
  261. * NOTE: The GRU contains magic hardware that eliminates races between
  262. * TLB invalidates and TLB dropins. If an invalidate occurs
  263. * in the window between reading the TFH and the subsequent TLB dropin,
  264. * the dropin is ignored. This eliminates the need for additional locks.
  265. */
  266. /*
  267. * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
  268. * Might be a hardware race OR a stupid user. Ignore FMM because FMM
  269. * is a transient state.
  270. */
  271. if (tfh->state == TFHSTATE_IDLE)
  272. goto failidle;
  273. if (tfh->state == TFHSTATE_MISS_FMM && cb)
  274. goto failfmm;
  275. write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
  276. vaddr = tfh->missvaddr;
  277. asid = tfh->missasid;
  278. if (asid == 0)
  279. goto failnoasid;
  280. rmb(); /* TFH must be cache resident before reading ms_range_active */
  281. /*
  282. * TFH is cache resident - at least briefly. Fail the dropin
  283. * if a range invalidate is active.
  284. */
  285. if (atomic_read(&gts->ts_gms->ms_range_active))
  286. goto failactive;
  287. vma = find_vma(mm, vaddr);
  288. if (!vma)
  289. goto failinval;
  290. /*
  291. * Atomic lookup is faster & usually works even if called in non-atomic
  292. * context.
  293. */
  294. rmb(); /* Must/check ms_range_active before loading PTEs */
  295. ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift);
  296. if (ret) {
  297. if (!cb)
  298. goto failupm;
  299. if (non_atomic_pte_lookup(vma, vaddr, write, &paddr,
  300. &pageshift))
  301. goto failinval;
  302. }
  303. if (is_gru_paddr(paddr))
  304. goto failinval;
  305. paddr = paddr & ~((1UL << pageshift) - 1);
  306. gpa = uv_soc_phys_ram_to_gpa(paddr);
  307. gru_cb_set_istatus_active(cb);
  308. tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
  309. GRU_PAGESIZE(pageshift));
  310. STAT(tlb_dropin);
  311. gru_dbg(grudev,
  312. "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
  313. ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
  314. pageshift, gpa);
  315. return 0;
  316. failnoasid:
  317. /* No asid (delayed unload). */
  318. STAT(tlb_dropin_fail_no_asid);
  319. gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  320. if (!cb)
  321. tfh_user_polling_mode(tfh);
  322. else
  323. gru_flush_cache(tfh);
  324. return -EAGAIN;
  325. failupm:
  326. /* Atomic failure switch CBR to UPM */
  327. tfh_user_polling_mode(tfh);
  328. STAT(tlb_dropin_fail_upm);
  329. gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  330. return 1;
  331. failfmm:
  332. /* FMM state on UPM call */
  333. STAT(tlb_dropin_fail_fmm);
  334. gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
  335. return 0;
  336. failidle:
  337. /* TFH was idle - no miss pending */
  338. gru_flush_cache(tfh);
  339. if (cb)
  340. gru_flush_cache(cb);
  341. STAT(tlb_dropin_fail_idle);
  342. gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
  343. return 0;
  344. failinval:
  345. /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
  346. tfh_exception(tfh);
  347. STAT(tlb_dropin_fail_invalid);
  348. gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  349. return -EFAULT;
  350. failactive:
  351. /* Range invalidate active. Switch to UPM iff atomic */
  352. if (!cb)
  353. tfh_user_polling_mode(tfh);
  354. else
  355. gru_flush_cache(tfh);
  356. STAT(tlb_dropin_fail_range_active);
  357. gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
  358. tfh, vaddr);
  359. return 1;
  360. }
  361. /*
  362. * Process an external interrupt from the GRU. This interrupt is
  363. * caused by a TLB miss.
  364. * Note that this is the interrupt handler that is registered with linux
  365. * interrupt handlers.
  366. */
  367. irqreturn_t gru_intr(int irq, void *dev_id)
  368. {
  369. struct gru_state *gru;
  370. struct gru_tlb_fault_map map;
  371. struct gru_thread_state *gts;
  372. struct gru_tlb_fault_handle *tfh = NULL;
  373. int cbrnum, ctxnum;
  374. STAT(intr);
  375. gru = irq_to_gru(irq);
  376. if (!gru) {
  377. dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
  378. raw_smp_processor_id(), irq);
  379. return IRQ_NONE;
  380. }
  381. get_clear_fault_map(gru, &map);
  382. gru_dbg(grudev, "irq %d, gru %x, map 0x%lx\n", irq, gru->gs_gid,
  383. map.fault_bits[0]);
  384. for_each_cbr_in_tfm(cbrnum, map.fault_bits) {
  385. tfh = get_tfh_by_index(gru, cbrnum);
  386. prefetchw(tfh); /* Helps on hdw, required for emulator */
  387. /*
  388. * When hardware sets a bit in the faultmap, it implicitly
  389. * locks the GRU context so that it cannot be unloaded.
  390. * The gts cannot change until a TFH start/writestart command
  391. * is issued.
  392. */
  393. ctxnum = tfh->ctxnum;
  394. gts = gru->gs_gts[ctxnum];
  395. /*
  396. * This is running in interrupt context. Trylock the mmap_sem.
  397. * If it fails, retry the fault in user context.
  398. */
  399. if (down_read_trylock(&gts->ts_mm->mmap_sem)) {
  400. gru_try_dropin(gts, tfh, NULL);
  401. up_read(&gts->ts_mm->mmap_sem);
  402. } else {
  403. tfh_user_polling_mode(tfh);
  404. }
  405. }
  406. return IRQ_HANDLED;
  407. }
  408. static int gru_user_dropin(struct gru_thread_state *gts,
  409. struct gru_tlb_fault_handle *tfh,
  410. unsigned long __user *cb)
  411. {
  412. struct gru_mm_struct *gms = gts->ts_gms;
  413. int ret;
  414. while (1) {
  415. wait_event(gms->ms_wait_queue,
  416. atomic_read(&gms->ms_range_active) == 0);
  417. prefetchw(tfh); /* Helps on hdw, required for emulator */
  418. ret = gru_try_dropin(gts, tfh, cb);
  419. if (ret <= 0)
  420. return ret;
  421. STAT(call_os_wait_queue);
  422. }
  423. }
  424. /*
  425. * This interface is called as a result of a user detecting a "call OS" bit
  426. * in a user CB. Normally means that a TLB fault has occurred.
  427. * cb - user virtual address of the CB
  428. */
  429. int gru_handle_user_call_os(unsigned long cb)
  430. {
  431. struct gru_tlb_fault_handle *tfh;
  432. struct gru_thread_state *gts;
  433. unsigned long __user *cbp;
  434. int ucbnum, cbrnum, ret = -EINVAL;
  435. STAT(call_os);
  436. gru_dbg(grudev, "address 0x%lx\n", cb);
  437. /* sanity check the cb pointer */
  438. ucbnum = get_cb_number((void *)cb);
  439. if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
  440. return -EINVAL;
  441. cbp = (unsigned long *)cb;
  442. gts = gru_find_lock_gts(cb);
  443. if (!gts)
  444. return -EINVAL;
  445. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
  446. ret = -EINVAL;
  447. goto exit;
  448. }
  449. /*
  450. * If force_unload is set, the UPM TLB fault is phony. The task
  451. * has migrated to another node and the GSEG must be moved. Just
  452. * unload the context. The task will page fault and assign a new
  453. * context.
  454. */
  455. ret = -EAGAIN;
  456. cbrnum = thread_cbr_number(gts, ucbnum);
  457. if (gts->ts_force_unload) {
  458. gru_unload_context(gts, 1);
  459. } else if (gts->ts_gru) {
  460. tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
  461. ret = gru_user_dropin(gts, tfh, cbp);
  462. }
  463. exit:
  464. gru_unlock_gts(gts);
  465. return ret;
  466. }
  467. /*
  468. * Fetch the exception detail information for a CB that terminated with
  469. * an exception.
  470. */
  471. int gru_get_exception_detail(unsigned long arg)
  472. {
  473. struct control_block_extended_exc_detail excdet;
  474. struct gru_control_block_extended *cbe;
  475. struct gru_thread_state *gts;
  476. int ucbnum, cbrnum, ret;
  477. STAT(user_exception);
  478. if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
  479. return -EFAULT;
  480. gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
  481. gts = gru_find_lock_gts(excdet.cb);
  482. if (!gts)
  483. return -EINVAL;
  484. if (gts->ts_gru) {
  485. ucbnum = get_cb_number((void *)excdet.cb);
  486. cbrnum = thread_cbr_number(gts, ucbnum);
  487. cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
  488. prefetchw(cbe); /* Harmless on hardware, required for emulator */
  489. excdet.opc = cbe->opccpy;
  490. excdet.exopc = cbe->exopccpy;
  491. excdet.ecause = cbe->ecause;
  492. excdet.exceptdet0 = cbe->idef1upd;
  493. excdet.exceptdet1 = cbe->idef3upd;
  494. ret = 0;
  495. } else {
  496. ret = -EAGAIN;
  497. }
  498. gru_unlock_gts(gts);
  499. gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
  500. excdet.ecause);
  501. if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
  502. ret = -EFAULT;
  503. return ret;
  504. }
  505. /*
  506. * User request to unload a context. Content is saved for possible reload.
  507. */
  508. int gru_user_unload_context(unsigned long arg)
  509. {
  510. struct gru_thread_state *gts;
  511. struct gru_unload_context_req req;
  512. STAT(user_unload_context);
  513. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  514. return -EFAULT;
  515. gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
  516. gts = gru_find_lock_gts(req.gseg);
  517. if (!gts)
  518. return -EINVAL;
  519. if (gts->ts_gru)
  520. gru_unload_context(gts, 1);
  521. gru_unlock_gts(gts);
  522. return 0;
  523. }
  524. /*
  525. * User request to flush a range of virtual addresses from the GRU TLB
  526. * (Mainly for testing).
  527. */
  528. int gru_user_flush_tlb(unsigned long arg)
  529. {
  530. struct gru_thread_state *gts;
  531. struct gru_flush_tlb_req req;
  532. STAT(user_flush_tlb);
  533. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  534. return -EFAULT;
  535. gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
  536. req.vaddr, req.len);
  537. gts = gru_find_lock_gts(req.gseg);
  538. if (!gts)
  539. return -EINVAL;
  540. gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.vaddr + req.len);
  541. gru_unlock_gts(gts);
  542. return 0;
  543. }
  544. /*
  545. * Register the current task as the user of the GSEG slice.
  546. * Needed for TLB fault interrupt targeting.
  547. */
  548. int gru_set_task_slice(long address)
  549. {
  550. struct gru_thread_state *gts;
  551. STAT(set_task_slice);
  552. gru_dbg(grudev, "address 0x%lx\n", address);
  553. gts = gru_alloc_locked_gts(address);
  554. if (!gts)
  555. return -EINVAL;
  556. gts->ts_tgid_owner = current->tgid;
  557. gru_unlock_gts(gts);
  558. return 0;
  559. }