wm8400-core.c 12 KB

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  1. /*
  2. * Core driver for WM8400.
  3. *
  4. * Copyright 2008 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of the
  11. * License, or (at your option) any later version.
  12. *
  13. */
  14. #include <linux/bug.h>
  15. #include <linux/i2c.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mfd/wm8400-private.h>
  18. #include <linux/mfd/wm8400-audio.h>
  19. static struct {
  20. u16 readable; /* Mask of readable bits */
  21. u16 writable; /* Mask of writable bits */
  22. u16 vol; /* Mask of volatile bits */
  23. int is_codec; /* Register controlled by codec reset */
  24. u16 default_val; /* Value on reset */
  25. } reg_data[] = {
  26. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
  27. { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
  28. { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
  29. { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
  30. { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
  31. { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
  32. { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
  33. { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
  34. { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
  35. { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
  36. { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
  37. { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
  38. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
  39. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
  40. { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
  41. { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
  42. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
  43. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
  44. { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
  45. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
  46. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
  47. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
  48. { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
  49. { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
  50. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
  51. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
  52. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
  53. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
  54. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
  55. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
  56. { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
  57. { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
  58. { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
  59. { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
  60. { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
  61. { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
  62. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
  63. { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
  64. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
  65. { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
  66. { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
  67. { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
  68. { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
  69. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
  70. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
  71. { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
  72. { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
  73. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
  74. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
  75. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
  76. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
  77. { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
  78. { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
  79. { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
  80. { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
  81. { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
  82. { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
  83. { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
  84. { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
  85. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
  86. { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
  87. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
  88. { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
  89. { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
  90. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
  91. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
  92. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
  93. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
  94. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
  95. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
  96. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
  97. { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
  98. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
  99. { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
  100. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
  101. { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
  102. { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
  103. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
  104. { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
  105. { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
  106. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
  107. { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
  108. { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
  109. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
  110. { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
  111. };
  112. static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
  113. {
  114. int i, ret = 0;
  115. BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
  116. /* If there are any volatile reads then read back the entire block */
  117. for (i = reg; i < reg + num_regs; i++)
  118. if (reg_data[i].vol) {
  119. ret = wm8400->read_dev(wm8400->io_data, reg,
  120. num_regs, dest);
  121. if (ret != 0)
  122. return ret;
  123. for (i = 0; i < num_regs; i++)
  124. dest[i] = be16_to_cpu(dest[i]);
  125. return 0;
  126. }
  127. /* Otherwise use the cache */
  128. memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
  129. return 0;
  130. }
  131. static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
  132. u16 *src)
  133. {
  134. int ret, i;
  135. BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
  136. for (i = 0; i < num_regs; i++) {
  137. BUG_ON(!reg_data[reg + i].writable);
  138. wm8400->reg_cache[reg + i] = src[i];
  139. src[i] = cpu_to_be16(src[i]);
  140. }
  141. /* Do the actual I/O */
  142. ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
  143. if (ret != 0)
  144. return -EIO;
  145. return 0;
  146. }
  147. /**
  148. * wm8400_reg_read - Single register read
  149. *
  150. * @wm8400: Pointer to wm8400 control structure
  151. * @reg: Register to read
  152. *
  153. * @return Read value
  154. */
  155. u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
  156. {
  157. u16 val;
  158. mutex_lock(&wm8400->io_lock);
  159. wm8400_read(wm8400, reg, 1, &val);
  160. mutex_unlock(&wm8400->io_lock);
  161. return val;
  162. }
  163. EXPORT_SYMBOL_GPL(wm8400_reg_read);
  164. int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
  165. {
  166. int ret;
  167. mutex_lock(&wm8400->io_lock);
  168. ret = wm8400_read(wm8400, reg, count, data);
  169. mutex_unlock(&wm8400->io_lock);
  170. return ret;
  171. }
  172. EXPORT_SYMBOL_GPL(wm8400_block_read);
  173. /**
  174. * wm8400_set_bits - Bitmask write
  175. *
  176. * @wm8400: Pointer to wm8400 control structure
  177. * @reg: Register to access
  178. * @mask: Mask of bits to change
  179. * @val: Value to set for masked bits
  180. */
  181. int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
  182. {
  183. u16 tmp;
  184. int ret;
  185. mutex_lock(&wm8400->io_lock);
  186. ret = wm8400_read(wm8400, reg, 1, &tmp);
  187. tmp = (tmp & ~mask) | val;
  188. if (ret == 0)
  189. ret = wm8400_write(wm8400, reg, 1, &tmp);
  190. mutex_unlock(&wm8400->io_lock);
  191. return ret;
  192. }
  193. EXPORT_SYMBOL_GPL(wm8400_set_bits);
  194. /**
  195. * wm8400_reset_codec_reg_cache - Reset cached codec registers to
  196. * their default values.
  197. */
  198. void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
  199. {
  200. int i;
  201. mutex_lock(&wm8400->io_lock);
  202. /* Reset all codec registers to their initial value */
  203. for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
  204. if (reg_data[i].is_codec)
  205. wm8400->reg_cache[i] = reg_data[i].default_val;
  206. mutex_unlock(&wm8400->io_lock);
  207. }
  208. EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
  209. /*
  210. * wm8400_init - Generic initialisation
  211. *
  212. * The WM8400 can be configured as either an I2C or SPI device. Probe
  213. * functions for each bus set up the accessors then call into this to
  214. * set up the device itself.
  215. */
  216. static int wm8400_init(struct wm8400 *wm8400,
  217. struct wm8400_platform_data *pdata)
  218. {
  219. u16 reg;
  220. int ret, i;
  221. mutex_init(&wm8400->io_lock);
  222. wm8400->dev->driver_data = wm8400;
  223. /* Check that this is actually a WM8400 */
  224. ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, &reg);
  225. if (ret != 0) {
  226. dev_err(wm8400->dev, "Chip ID register read failed\n");
  227. return -EIO;
  228. }
  229. if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
  230. dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
  231. be16_to_cpu(reg));
  232. return -ENODEV;
  233. }
  234. /* We don't know what state the hardware is in and since this
  235. * is a PMIC we can't reset it safely so initialise the register
  236. * cache from the hardware.
  237. */
  238. ret = wm8400->read_dev(wm8400->io_data, 0,
  239. ARRAY_SIZE(wm8400->reg_cache),
  240. wm8400->reg_cache);
  241. if (ret != 0) {
  242. dev_err(wm8400->dev, "Register cache read failed\n");
  243. return -EIO;
  244. }
  245. for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
  246. wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
  247. /* If the codec is in reset use hard coded values */
  248. if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
  249. for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
  250. if (reg_data[i].is_codec)
  251. wm8400->reg_cache[i] = reg_data[i].default_val;
  252. ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
  253. if (ret != 0) {
  254. dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
  255. return ret;
  256. }
  257. reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
  258. dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
  259. if (pdata && pdata->platform_init) {
  260. ret = pdata->platform_init(wm8400->dev);
  261. if (ret != 0)
  262. dev_err(wm8400->dev, "Platform init failed: %d\n",
  263. ret);
  264. } else
  265. dev_warn(wm8400->dev, "No platform initialisation supplied\n");
  266. return ret;
  267. }
  268. static void wm8400_release(struct wm8400 *wm8400)
  269. {
  270. int i;
  271. for (i = 0; i < ARRAY_SIZE(wm8400->regulators); i++)
  272. if (wm8400->regulators[i].name)
  273. platform_device_unregister(&wm8400->regulators[i]);
  274. }
  275. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  276. static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
  277. {
  278. struct i2c_client *i2c = io_data;
  279. struct i2c_msg xfer[2];
  280. int ret;
  281. /* Write register */
  282. xfer[0].addr = i2c->addr;
  283. xfer[0].flags = 0;
  284. xfer[0].len = 1;
  285. xfer[0].buf = &reg;
  286. /* Read data */
  287. xfer[1].addr = i2c->addr;
  288. xfer[1].flags = I2C_M_RD;
  289. xfer[1].len = count * sizeof(u16);
  290. xfer[1].buf = (u8 *)dest;
  291. ret = i2c_transfer(i2c->adapter, xfer, 2);
  292. if (ret == 2)
  293. ret = 0;
  294. else if (ret >= 0)
  295. ret = -EIO;
  296. return ret;
  297. }
  298. static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
  299. {
  300. struct i2c_client *i2c = io_data;
  301. u8 *msg;
  302. int ret;
  303. /* We add 1 byte for device register - ideally I2C would gather. */
  304. msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
  305. if (msg == NULL)
  306. return -ENOMEM;
  307. msg[0] = reg;
  308. memcpy(&msg[1], src, count * sizeof(u16));
  309. ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
  310. if (ret == (count * 2) + 1)
  311. ret = 0;
  312. else if (ret >= 0)
  313. ret = -EIO;
  314. kfree(msg);
  315. return ret;
  316. }
  317. static int wm8400_i2c_probe(struct i2c_client *i2c,
  318. const struct i2c_device_id *id)
  319. {
  320. struct wm8400 *wm8400;
  321. int ret;
  322. wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
  323. if (wm8400 == NULL) {
  324. ret = -ENOMEM;
  325. goto err;
  326. }
  327. wm8400->io_data = i2c;
  328. wm8400->read_dev = wm8400_i2c_read;
  329. wm8400->write_dev = wm8400_i2c_write;
  330. wm8400->dev = &i2c->dev;
  331. i2c_set_clientdata(i2c, wm8400);
  332. ret = wm8400_init(wm8400, i2c->dev.platform_data);
  333. if (ret != 0)
  334. goto struct_err;
  335. return 0;
  336. struct_err:
  337. i2c_set_clientdata(i2c, NULL);
  338. kfree(wm8400);
  339. err:
  340. return ret;
  341. }
  342. static int wm8400_i2c_remove(struct i2c_client *i2c)
  343. {
  344. struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
  345. wm8400_release(wm8400);
  346. i2c_set_clientdata(i2c, NULL);
  347. kfree(wm8400);
  348. return 0;
  349. }
  350. static const struct i2c_device_id wm8400_i2c_id[] = {
  351. { "wm8400", 0 },
  352. { }
  353. };
  354. MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
  355. static struct i2c_driver wm8400_i2c_driver = {
  356. .driver = {
  357. .name = "WM8400",
  358. .owner = THIS_MODULE,
  359. },
  360. .probe = wm8400_i2c_probe,
  361. .remove = wm8400_i2c_remove,
  362. .id_table = wm8400_i2c_id,
  363. };
  364. #endif
  365. static int __init wm8400_module_init(void)
  366. {
  367. int ret = -ENODEV;
  368. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  369. ret = i2c_add_driver(&wm8400_i2c_driver);
  370. if (ret != 0)
  371. pr_err("Failed to register I2C driver: %d\n", ret);
  372. #endif
  373. return ret;
  374. }
  375. module_init(wm8400_module_init);
  376. static void __exit wm8400_module_exit(void)
  377. {
  378. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  379. i2c_del_driver(&wm8400_i2c_driver);
  380. #endif
  381. }
  382. module_exit(wm8400_module_exit);
  383. MODULE_LICENSE("GPL");
  384. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");