ov7670.c 35 KB

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  1. /*
  2. * A V4L2 driver for OmniVision OV7670 cameras.
  3. *
  4. * Copyright 2006 One Laptop Per Child Association, Inc. Written
  5. * by Jonathan Corbet with substantial inspiration from Mark
  6. * McClelland's ovcamchip code.
  7. *
  8. * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
  9. *
  10. * This file may be distributed under the terms of the GNU General
  11. * Public License, version 2.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/slab.h>
  16. #include <linux/delay.h>
  17. #include <linux/videodev.h>
  18. #include <media/v4l2-common.h>
  19. #include <media/v4l2-chip-ident.h>
  20. #include <linux/i2c.h>
  21. MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
  22. MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");
  23. MODULE_LICENSE("GPL");
  24. /*
  25. * Basic window sizes. These probably belong somewhere more globally
  26. * useful.
  27. */
  28. #define VGA_WIDTH 640
  29. #define VGA_HEIGHT 480
  30. #define QVGA_WIDTH 320
  31. #define QVGA_HEIGHT 240
  32. #define CIF_WIDTH 352
  33. #define CIF_HEIGHT 288
  34. #define QCIF_WIDTH 176
  35. #define QCIF_HEIGHT 144
  36. /*
  37. * Our nominal (default) frame rate.
  38. */
  39. #define OV7670_FRAME_RATE 30
  40. /*
  41. * The 7670 sits on i2c with ID 0x42
  42. */
  43. #define OV7670_I2C_ADDR 0x42
  44. /* Registers */
  45. #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  46. #define REG_BLUE 0x01 /* blue gain */
  47. #define REG_RED 0x02 /* red gain */
  48. #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  49. #define REG_COM1 0x04 /* Control 1 */
  50. #define COM1_CCIR656 0x40 /* CCIR656 enable */
  51. #define REG_BAVE 0x05 /* U/B Average level */
  52. #define REG_GbAVE 0x06 /* Y/Gb Average level */
  53. #define REG_AECHH 0x07 /* AEC MS 5 bits */
  54. #define REG_RAVE 0x08 /* V/R Average level */
  55. #define REG_COM2 0x09 /* Control 2 */
  56. #define COM2_SSLEEP 0x10 /* Soft sleep mode */
  57. #define REG_PID 0x0a /* Product ID MSB */
  58. #define REG_VER 0x0b /* Product ID LSB */
  59. #define REG_COM3 0x0c /* Control 3 */
  60. #define COM3_SWAP 0x40 /* Byte swap */
  61. #define COM3_SCALEEN 0x08 /* Enable scaling */
  62. #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
  63. #define REG_COM4 0x0d /* Control 4 */
  64. #define REG_COM5 0x0e /* All "reserved" */
  65. #define REG_COM6 0x0f /* Control 6 */
  66. #define REG_AECH 0x10 /* More bits of AEC value */
  67. #define REG_CLKRC 0x11 /* Clocl control */
  68. #define CLK_EXT 0x40 /* Use external clock directly */
  69. #define CLK_SCALE 0x3f /* Mask for internal clock scale */
  70. #define REG_COM7 0x12 /* Control 7 */
  71. #define COM7_RESET 0x80 /* Register reset */
  72. #define COM7_FMT_MASK 0x38
  73. #define COM7_FMT_VGA 0x00
  74. #define COM7_FMT_CIF 0x20 /* CIF format */
  75. #define COM7_FMT_QVGA 0x10 /* QVGA format */
  76. #define COM7_FMT_QCIF 0x08 /* QCIF format */
  77. #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
  78. #define COM7_YUV 0x00 /* YUV */
  79. #define COM7_BAYER 0x01 /* Bayer format */
  80. #define COM7_PBAYER 0x05 /* "Processed bayer" */
  81. #define REG_COM8 0x13 /* Control 8 */
  82. #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  83. #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  84. #define COM8_BFILT 0x20 /* Band filter enable */
  85. #define COM8_AGC 0x04 /* Auto gain enable */
  86. #define COM8_AWB 0x02 /* White balance enable */
  87. #define COM8_AEC 0x01 /* Auto exposure enable */
  88. #define REG_COM9 0x14 /* Control 9 - gain ceiling */
  89. #define REG_COM10 0x15 /* Control 10 */
  90. #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
  91. #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
  92. #define COM10_HREF_REV 0x08 /* Reverse HREF */
  93. #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
  94. #define COM10_VS_NEG 0x02 /* VSYNC negative */
  95. #define COM10_HS_NEG 0x01 /* HSYNC negative */
  96. #define REG_HSTART 0x17 /* Horiz start high bits */
  97. #define REG_HSTOP 0x18 /* Horiz stop high bits */
  98. #define REG_VSTART 0x19 /* Vert start high bits */
  99. #define REG_VSTOP 0x1a /* Vert stop high bits */
  100. #define REG_PSHFT 0x1b /* Pixel delay after HREF */
  101. #define REG_MIDH 0x1c /* Manuf. ID high */
  102. #define REG_MIDL 0x1d /* Manuf. ID low */
  103. #define REG_MVFP 0x1e /* Mirror / vflip */
  104. #define MVFP_MIRROR 0x20 /* Mirror image */
  105. #define MVFP_FLIP 0x10 /* Vertical flip */
  106. #define REG_AEW 0x24 /* AGC upper limit */
  107. #define REG_AEB 0x25 /* AGC lower limit */
  108. #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
  109. #define REG_HSYST 0x30 /* HSYNC rising edge delay */
  110. #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
  111. #define REG_HREF 0x32 /* HREF pieces */
  112. #define REG_TSLB 0x3a /* lots of stuff */
  113. #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
  114. #define REG_COM11 0x3b /* Control 11 */
  115. #define COM11_NIGHT 0x80 /* NIght mode enable */
  116. #define COM11_NMFR 0x60 /* Two bit NM frame rate */
  117. #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  118. #define COM11_50HZ 0x08 /* Manual 50Hz select */
  119. #define COM11_EXP 0x02
  120. #define REG_COM12 0x3c /* Control 12 */
  121. #define COM12_HREF 0x80 /* HREF always */
  122. #define REG_COM13 0x3d /* Control 13 */
  123. #define COM13_GAMMA 0x80 /* Gamma enable */
  124. #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  125. #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
  126. #define REG_COM14 0x3e /* Control 14 */
  127. #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
  128. #define REG_EDGE 0x3f /* Edge enhancement factor */
  129. #define REG_COM15 0x40 /* Control 15 */
  130. #define COM15_R10F0 0x00 /* Data range 10 to F0 */
  131. #define COM15_R01FE 0x80 /* 01 to FE */
  132. #define COM15_R00FF 0xc0 /* 00 to FF */
  133. #define COM15_RGB565 0x10 /* RGB565 output */
  134. #define COM15_RGB555 0x30 /* RGB555 output */
  135. #define REG_COM16 0x41 /* Control 16 */
  136. #define COM16_AWBGAIN 0x08 /* AWB gain enable */
  137. #define REG_COM17 0x42 /* Control 17 */
  138. #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
  139. #define COM17_CBAR 0x08 /* DSP Color bar */
  140. /*
  141. * This matrix defines how the colors are generated, must be
  142. * tweaked to adjust hue and saturation.
  143. *
  144. * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
  145. *
  146. * They are nine-bit signed quantities, with the sign bit
  147. * stored in 0x58. Sign for v-red is bit 0, and up from there.
  148. */
  149. #define REG_CMATRIX_BASE 0x4f
  150. #define CMATRIX_LEN 6
  151. #define REG_CMATRIX_SIGN 0x58
  152. #define REG_BRIGHT 0x55 /* Brightness */
  153. #define REG_CONTRAS 0x56 /* Contrast control */
  154. #define REG_GFIX 0x69 /* Fix gain control */
  155. #define REG_REG76 0x76 /* OV's name */
  156. #define R76_BLKPCOR 0x80 /* Black pixel correction enable */
  157. #define R76_WHTPCOR 0x40 /* White pixel correction enable */
  158. #define REG_RGB444 0x8c /* RGB 444 control */
  159. #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
  160. #define R444_RGBX 0x01 /* Empty nibble at end */
  161. #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  162. #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  163. #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
  164. #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  165. #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  166. #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  167. #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  168. #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  169. #define REG_BD60MAX 0xab /* 60hz banding step limit */
  170. /*
  171. * Information we maintain about a known sensor.
  172. */
  173. struct ov7670_format_struct; /* coming later */
  174. struct ov7670_info {
  175. struct ov7670_format_struct *fmt; /* Current format */
  176. unsigned char sat; /* Saturation value */
  177. int hue; /* Hue value */
  178. };
  179. /*
  180. * The default register settings, as obtained from OmniVision. There
  181. * is really no making sense of most of these - lots of "reserved" values
  182. * and such.
  183. *
  184. * These settings give VGA YUYV.
  185. */
  186. struct regval_list {
  187. unsigned char reg_num;
  188. unsigned char value;
  189. };
  190. static struct regval_list ov7670_default_regs[] = {
  191. { REG_COM7, COM7_RESET },
  192. /*
  193. * Clock scale: 3 = 15fps
  194. * 2 = 20fps
  195. * 1 = 30fps
  196. */
  197. { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */
  198. { REG_TSLB, 0x04 }, /* OV */
  199. { REG_COM7, 0 }, /* VGA */
  200. /*
  201. * Set the hardware window. These values from OV don't entirely
  202. * make sense - hstop is less than hstart. But they work...
  203. */
  204. { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 },
  205. { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 },
  206. { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a },
  207. { REG_COM3, 0 }, { REG_COM14, 0 },
  208. /* Mystery scaling numbers */
  209. { 0x70, 0x3a }, { 0x71, 0x35 },
  210. { 0x72, 0x11 }, { 0x73, 0xf0 },
  211. { 0xa2, 0x02 }, { REG_COM10, 0x0 },
  212. /* Gamma curve values */
  213. { 0x7a, 0x20 }, { 0x7b, 0x10 },
  214. { 0x7c, 0x1e }, { 0x7d, 0x35 },
  215. { 0x7e, 0x5a }, { 0x7f, 0x69 },
  216. { 0x80, 0x76 }, { 0x81, 0x80 },
  217. { 0x82, 0x88 }, { 0x83, 0x8f },
  218. { 0x84, 0x96 }, { 0x85, 0xa3 },
  219. { 0x86, 0xaf }, { 0x87, 0xc4 },
  220. { 0x88, 0xd7 }, { 0x89, 0xe8 },
  221. /* AGC and AEC parameters. Note we start by disabling those features,
  222. then turn them only after tweaking the values. */
  223. { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
  224. { REG_GAIN, 0 }, { REG_AECH, 0 },
  225. { REG_COM4, 0x40 }, /* magic reserved bit */
  226. { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  227. { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
  228. { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
  229. { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
  230. { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
  231. { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
  232. { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
  233. { REG_HAECC7, 0x94 },
  234. { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
  235. /* Almost all of these are magic "reserved" values. */
  236. { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
  237. { 0x16, 0x02 }, { REG_MVFP, 0x07 },
  238. { 0x21, 0x02 }, { 0x22, 0x91 },
  239. { 0x29, 0x07 }, { 0x33, 0x0b },
  240. { 0x35, 0x0b }, { 0x37, 0x1d },
  241. { 0x38, 0x71 }, { 0x39, 0x2a },
  242. { REG_COM12, 0x78 }, { 0x4d, 0x40 },
  243. { 0x4e, 0x20 }, { REG_GFIX, 0 },
  244. { 0x6b, 0x4a }, { 0x74, 0x10 },
  245. { 0x8d, 0x4f }, { 0x8e, 0 },
  246. { 0x8f, 0 }, { 0x90, 0 },
  247. { 0x91, 0 }, { 0x96, 0 },
  248. { 0x9a, 0 }, { 0xb0, 0x84 },
  249. { 0xb1, 0x0c }, { 0xb2, 0x0e },
  250. { 0xb3, 0x82 }, { 0xb8, 0x0a },
  251. /* More reserved magic, some of which tweaks white balance */
  252. { 0x43, 0x0a }, { 0x44, 0xf0 },
  253. { 0x45, 0x34 }, { 0x46, 0x58 },
  254. { 0x47, 0x28 }, { 0x48, 0x3a },
  255. { 0x59, 0x88 }, { 0x5a, 0x88 },
  256. { 0x5b, 0x44 }, { 0x5c, 0x67 },
  257. { 0x5d, 0x49 }, { 0x5e, 0x0e },
  258. { 0x6c, 0x0a }, { 0x6d, 0x55 },
  259. { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
  260. { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
  261. { REG_RED, 0x60 },
  262. { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
  263. /* Matrix coefficients */
  264. { 0x4f, 0x80 }, { 0x50, 0x80 },
  265. { 0x51, 0 }, { 0x52, 0x22 },
  266. { 0x53, 0x5e }, { 0x54, 0x80 },
  267. { 0x58, 0x9e },
  268. { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
  269. { 0x75, 0x05 }, { 0x76, 0xe1 },
  270. { 0x4c, 0 }, { 0x77, 0x01 },
  271. { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
  272. { 0xc9, 0x60 }, { REG_COM16, 0x38 },
  273. { 0x56, 0x40 },
  274. { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
  275. { 0xa4, 0x88 }, { 0x96, 0 },
  276. { 0x97, 0x30 }, { 0x98, 0x20 },
  277. { 0x99, 0x30 }, { 0x9a, 0x84 },
  278. { 0x9b, 0x29 }, { 0x9c, 0x03 },
  279. { 0x9d, 0x4c }, { 0x9e, 0x3f },
  280. { 0x78, 0x04 },
  281. /* Extra-weird stuff. Some sort of multiplexor register */
  282. { 0x79, 0x01 }, { 0xc8, 0xf0 },
  283. { 0x79, 0x0f }, { 0xc8, 0x00 },
  284. { 0x79, 0x10 }, { 0xc8, 0x7e },
  285. { 0x79, 0x0a }, { 0xc8, 0x80 },
  286. { 0x79, 0x0b }, { 0xc8, 0x01 },
  287. { 0x79, 0x0c }, { 0xc8, 0x0f },
  288. { 0x79, 0x0d }, { 0xc8, 0x20 },
  289. { 0x79, 0x09 }, { 0xc8, 0x80 },
  290. { 0x79, 0x02 }, { 0xc8, 0xc0 },
  291. { 0x79, 0x03 }, { 0xc8, 0x40 },
  292. { 0x79, 0x05 }, { 0xc8, 0x30 },
  293. { 0x79, 0x26 },
  294. { 0xff, 0xff }, /* END MARKER */
  295. };
  296. /*
  297. * Here we'll try to encapsulate the changes for just the output
  298. * video format.
  299. *
  300. * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
  301. *
  302. * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why.
  303. */
  304. static struct regval_list ov7670_fmt_yuv422[] = {
  305. { REG_COM7, 0x0 }, /* Selects YUV mode */
  306. { REG_RGB444, 0 }, /* No RGB444 please */
  307. { REG_COM1, 0 },
  308. { REG_COM15, COM15_R00FF },
  309. { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
  310. { 0x4f, 0x80 }, /* "matrix coefficient 1" */
  311. { 0x50, 0x80 }, /* "matrix coefficient 2" */
  312. { 0x51, 0 }, /* vb */
  313. { 0x52, 0x22 }, /* "matrix coefficient 4" */
  314. { 0x53, 0x5e }, /* "matrix coefficient 5" */
  315. { 0x54, 0x80 }, /* "matrix coefficient 6" */
  316. { REG_COM13, COM13_GAMMA|COM13_UVSAT },
  317. { 0xff, 0xff },
  318. };
  319. static struct regval_list ov7670_fmt_rgb565[] = {
  320. { REG_COM7, COM7_RGB }, /* Selects RGB mode */
  321. { REG_RGB444, 0 }, /* No RGB444 please */
  322. { REG_COM1, 0x0 },
  323. { REG_COM15, COM15_RGB565 },
  324. { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
  325. { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
  326. { 0x50, 0xb3 }, /* "matrix coefficient 2" */
  327. { 0x51, 0 }, /* vb */
  328. { 0x52, 0x3d }, /* "matrix coefficient 4" */
  329. { 0x53, 0xa7 }, /* "matrix coefficient 5" */
  330. { 0x54, 0xe4 }, /* "matrix coefficient 6" */
  331. { REG_COM13, COM13_GAMMA|COM13_UVSAT },
  332. { 0xff, 0xff },
  333. };
  334. static struct regval_list ov7670_fmt_rgb444[] = {
  335. { REG_COM7, COM7_RGB }, /* Selects RGB mode */
  336. { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
  337. { REG_COM1, 0x40 }, /* Magic reserved bit */
  338. { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
  339. { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
  340. { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
  341. { 0x50, 0xb3 }, /* "matrix coefficient 2" */
  342. { 0x51, 0 }, /* vb */
  343. { 0x52, 0x3d }, /* "matrix coefficient 4" */
  344. { 0x53, 0xa7 }, /* "matrix coefficient 5" */
  345. { 0x54, 0xe4 }, /* "matrix coefficient 6" */
  346. { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
  347. { 0xff, 0xff },
  348. };
  349. static struct regval_list ov7670_fmt_raw[] = {
  350. { REG_COM7, COM7_BAYER },
  351. { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */
  352. { REG_COM16, 0x3d }, /* Edge enhancement, denoise */
  353. { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */
  354. { 0xff, 0xff },
  355. };
  356. /*
  357. * Low-level register I/O.
  358. */
  359. static int ov7670_read(struct i2c_client *c, unsigned char reg,
  360. unsigned char *value)
  361. {
  362. int ret;
  363. ret = i2c_smbus_read_byte_data(c, reg);
  364. if (ret >= 0) {
  365. *value = (unsigned char) ret;
  366. ret = 0;
  367. }
  368. return ret;
  369. }
  370. static int ov7670_write(struct i2c_client *c, unsigned char reg,
  371. unsigned char value)
  372. {
  373. int ret = i2c_smbus_write_byte_data(c, reg, value);
  374. if (reg == REG_COM7 && (value & COM7_RESET))
  375. msleep(2); /* Wait for reset to run */
  376. return ret;
  377. }
  378. /*
  379. * Write a list of register settings; ff/ff stops the process.
  380. */
  381. static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals)
  382. {
  383. while (vals->reg_num != 0xff || vals->value != 0xff) {
  384. int ret = ov7670_write(c, vals->reg_num, vals->value);
  385. if (ret < 0)
  386. return ret;
  387. vals++;
  388. }
  389. return 0;
  390. }
  391. /*
  392. * Stuff that knows about the sensor.
  393. */
  394. static void ov7670_reset(struct i2c_client *client)
  395. {
  396. ov7670_write(client, REG_COM7, COM7_RESET);
  397. msleep(1);
  398. }
  399. static int ov7670_init(struct i2c_client *client)
  400. {
  401. return ov7670_write_array(client, ov7670_default_regs);
  402. }
  403. static int ov7670_detect(struct i2c_client *client)
  404. {
  405. unsigned char v;
  406. int ret;
  407. ret = ov7670_init(client);
  408. if (ret < 0)
  409. return ret;
  410. ret = ov7670_read(client, REG_MIDH, &v);
  411. if (ret < 0)
  412. return ret;
  413. if (v != 0x7f) /* OV manuf. id. */
  414. return -ENODEV;
  415. ret = ov7670_read(client, REG_MIDL, &v);
  416. if (ret < 0)
  417. return ret;
  418. if (v != 0xa2)
  419. return -ENODEV;
  420. /*
  421. * OK, we know we have an OmniVision chip...but which one?
  422. */
  423. ret = ov7670_read(client, REG_PID, &v);
  424. if (ret < 0)
  425. return ret;
  426. if (v != 0x76) /* PID + VER = 0x76 / 0x73 */
  427. return -ENODEV;
  428. ret = ov7670_read(client, REG_VER, &v);
  429. if (ret < 0)
  430. return ret;
  431. if (v != 0x73) /* PID + VER = 0x76 / 0x73 */
  432. return -ENODEV;
  433. return 0;
  434. }
  435. /*
  436. * Store information about the video data format. The color matrix
  437. * is deeply tied into the format, so keep the relevant values here.
  438. * The magic matrix nubmers come from OmniVision.
  439. */
  440. static struct ov7670_format_struct {
  441. __u8 *desc;
  442. __u32 pixelformat;
  443. struct regval_list *regs;
  444. int cmatrix[CMATRIX_LEN];
  445. int bpp; /* Bytes per pixel */
  446. } ov7670_formats[] = {
  447. {
  448. .desc = "YUYV 4:2:2",
  449. .pixelformat = V4L2_PIX_FMT_YUYV,
  450. .regs = ov7670_fmt_yuv422,
  451. .cmatrix = { 128, -128, 0, -34, -94, 128 },
  452. .bpp = 2,
  453. },
  454. {
  455. .desc = "RGB 444",
  456. .pixelformat = V4L2_PIX_FMT_RGB444,
  457. .regs = ov7670_fmt_rgb444,
  458. .cmatrix = { 179, -179, 0, -61, -176, 228 },
  459. .bpp = 2,
  460. },
  461. {
  462. .desc = "RGB 565",
  463. .pixelformat = V4L2_PIX_FMT_RGB565,
  464. .regs = ov7670_fmt_rgb565,
  465. .cmatrix = { 179, -179, 0, -61, -176, 228 },
  466. .bpp = 2,
  467. },
  468. {
  469. .desc = "Raw RGB Bayer",
  470. .pixelformat = V4L2_PIX_FMT_SBGGR8,
  471. .regs = ov7670_fmt_raw,
  472. .cmatrix = { 0, 0, 0, 0, 0, 0 },
  473. .bpp = 1
  474. },
  475. };
  476. #define N_OV7670_FMTS ARRAY_SIZE(ov7670_formats)
  477. /*
  478. * Then there is the issue of window sizes. Try to capture the info here.
  479. */
  480. /*
  481. * QCIF mode is done (by OV) in a very strange way - it actually looks like
  482. * VGA with weird scaling options - they do *not* use the canned QCIF mode
  483. * which is allegedly provided by the sensor. So here's the weird register
  484. * settings.
  485. */
  486. static struct regval_list ov7670_qcif_regs[] = {
  487. { REG_COM3, COM3_SCALEEN|COM3_DCWEN },
  488. { REG_COM3, COM3_DCWEN },
  489. { REG_COM14, COM14_DCWEN | 0x01},
  490. { 0x73, 0xf1 },
  491. { 0xa2, 0x52 },
  492. { 0x7b, 0x1c },
  493. { 0x7c, 0x28 },
  494. { 0x7d, 0x3c },
  495. { 0x7f, 0x69 },
  496. { REG_COM9, 0x38 },
  497. { 0xa1, 0x0b },
  498. { 0x74, 0x19 },
  499. { 0x9a, 0x80 },
  500. { 0x43, 0x14 },
  501. { REG_COM13, 0xc0 },
  502. { 0xff, 0xff },
  503. };
  504. static struct ov7670_win_size {
  505. int width;
  506. int height;
  507. unsigned char com7_bit;
  508. int hstart; /* Start/stop values for the camera. Note */
  509. int hstop; /* that they do not always make complete */
  510. int vstart; /* sense to humans, but evidently the sensor */
  511. int vstop; /* will do the right thing... */
  512. struct regval_list *regs; /* Regs to tweak */
  513. /* h/vref stuff */
  514. } ov7670_win_sizes[] = {
  515. /* VGA */
  516. {
  517. .width = VGA_WIDTH,
  518. .height = VGA_HEIGHT,
  519. .com7_bit = COM7_FMT_VGA,
  520. .hstart = 158, /* These values from */
  521. .hstop = 14, /* Omnivision */
  522. .vstart = 10,
  523. .vstop = 490,
  524. .regs = NULL,
  525. },
  526. /* CIF */
  527. {
  528. .width = CIF_WIDTH,
  529. .height = CIF_HEIGHT,
  530. .com7_bit = COM7_FMT_CIF,
  531. .hstart = 170, /* Empirically determined */
  532. .hstop = 90,
  533. .vstart = 14,
  534. .vstop = 494,
  535. .regs = NULL,
  536. },
  537. /* QVGA */
  538. {
  539. .width = QVGA_WIDTH,
  540. .height = QVGA_HEIGHT,
  541. .com7_bit = COM7_FMT_QVGA,
  542. .hstart = 164, /* Empirically determined */
  543. .hstop = 20,
  544. .vstart = 14,
  545. .vstop = 494,
  546. .regs = NULL,
  547. },
  548. /* QCIF */
  549. {
  550. .width = QCIF_WIDTH,
  551. .height = QCIF_HEIGHT,
  552. .com7_bit = COM7_FMT_VGA, /* see comment above */
  553. .hstart = 456, /* Empirically determined */
  554. .hstop = 24,
  555. .vstart = 14,
  556. .vstop = 494,
  557. .regs = ov7670_qcif_regs,
  558. },
  559. };
  560. #define N_WIN_SIZES (ARRAY_SIZE(ov7670_win_sizes))
  561. /*
  562. * Store a set of start/stop values into the camera.
  563. */
  564. static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop,
  565. int vstart, int vstop)
  566. {
  567. int ret;
  568. unsigned char v;
  569. /*
  570. * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
  571. * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
  572. * a mystery "edge offset" value in the top two bits of href.
  573. */
  574. ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff);
  575. ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff);
  576. ret += ov7670_read(client, REG_HREF, &v);
  577. v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
  578. msleep(10);
  579. ret += ov7670_write(client, REG_HREF, v);
  580. /*
  581. * Vertical: similar arrangement, but only 10 bits.
  582. */
  583. ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff);
  584. ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff);
  585. ret += ov7670_read(client, REG_VREF, &v);
  586. v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3);
  587. msleep(10);
  588. ret += ov7670_write(client, REG_VREF, v);
  589. return ret;
  590. }
  591. static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt)
  592. {
  593. struct ov7670_format_struct *ofmt;
  594. if (fmt->index >= N_OV7670_FMTS)
  595. return -EINVAL;
  596. ofmt = ov7670_formats + fmt->index;
  597. fmt->flags = 0;
  598. strcpy(fmt->description, ofmt->desc);
  599. fmt->pixelformat = ofmt->pixelformat;
  600. return 0;
  601. }
  602. static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt,
  603. struct ov7670_format_struct **ret_fmt,
  604. struct ov7670_win_size **ret_wsize)
  605. {
  606. int index;
  607. struct ov7670_win_size *wsize;
  608. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  609. for (index = 0; index < N_OV7670_FMTS; index++)
  610. if (ov7670_formats[index].pixelformat == pix->pixelformat)
  611. break;
  612. if (index >= N_OV7670_FMTS) {
  613. /* default to first format */
  614. index = 0;
  615. pix->pixelformat = ov7670_formats[0].pixelformat;
  616. }
  617. if (ret_fmt != NULL)
  618. *ret_fmt = ov7670_formats + index;
  619. /*
  620. * Fields: the OV devices claim to be progressive.
  621. */
  622. pix->field = V4L2_FIELD_NONE;
  623. /*
  624. * Round requested image size down to the nearest
  625. * we support, but not below the smallest.
  626. */
  627. for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES;
  628. wsize++)
  629. if (pix->width >= wsize->width && pix->height >= wsize->height)
  630. break;
  631. if (wsize >= ov7670_win_sizes + N_WIN_SIZES)
  632. wsize--; /* Take the smallest one */
  633. if (ret_wsize != NULL)
  634. *ret_wsize = wsize;
  635. /*
  636. * Note the size we'll actually handle.
  637. */
  638. pix->width = wsize->width;
  639. pix->height = wsize->height;
  640. pix->bytesperline = pix->width*ov7670_formats[index].bpp;
  641. pix->sizeimage = pix->height*pix->bytesperline;
  642. return 0;
  643. }
  644. /*
  645. * Set a format.
  646. */
  647. static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt)
  648. {
  649. int ret;
  650. struct ov7670_format_struct *ovfmt;
  651. struct ov7670_win_size *wsize;
  652. struct ov7670_info *info = i2c_get_clientdata(c);
  653. unsigned char com7, clkrc;
  654. ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize);
  655. if (ret)
  656. return ret;
  657. /*
  658. * HACK: if we're running rgb565 we need to grab then rewrite
  659. * CLKRC. If we're *not*, however, then rewriting clkrc hoses
  660. * the colors.
  661. */
  662. if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) {
  663. ret = ov7670_read(c, REG_CLKRC, &clkrc);
  664. if (ret)
  665. return ret;
  666. }
  667. /*
  668. * COM7 is a pain in the ass, it doesn't like to be read then
  669. * quickly written afterward. But we have everything we need
  670. * to set it absolutely here, as long as the format-specific
  671. * register sets list it first.
  672. */
  673. com7 = ovfmt->regs[0].value;
  674. com7 |= wsize->com7_bit;
  675. ov7670_write(c, REG_COM7, com7);
  676. /*
  677. * Now write the rest of the array. Also store start/stops
  678. */
  679. ov7670_write_array(c, ovfmt->regs + 1);
  680. ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart,
  681. wsize->vstop);
  682. ret = 0;
  683. if (wsize->regs)
  684. ret = ov7670_write_array(c, wsize->regs);
  685. info->fmt = ovfmt;
  686. if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565 && ret == 0)
  687. ret = ov7670_write(c, REG_CLKRC, clkrc);
  688. return ret;
  689. }
  690. /*
  691. * Implement G/S_PARM. There is a "high quality" mode we could try
  692. * to do someday; for now, we just do the frame rate tweak.
  693. */
  694. static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
  695. {
  696. struct v4l2_captureparm *cp = &parms->parm.capture;
  697. unsigned char clkrc;
  698. int ret;
  699. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  700. return -EINVAL;
  701. ret = ov7670_read(c, REG_CLKRC, &clkrc);
  702. if (ret < 0)
  703. return ret;
  704. memset(cp, 0, sizeof(struct v4l2_captureparm));
  705. cp->capability = V4L2_CAP_TIMEPERFRAME;
  706. cp->timeperframe.numerator = 1;
  707. cp->timeperframe.denominator = OV7670_FRAME_RATE;
  708. if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1)
  709. cp->timeperframe.denominator /= (clkrc & CLK_SCALE);
  710. return 0;
  711. }
  712. static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
  713. {
  714. struct v4l2_captureparm *cp = &parms->parm.capture;
  715. struct v4l2_fract *tpf = &cp->timeperframe;
  716. unsigned char clkrc;
  717. int ret, div;
  718. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  719. return -EINVAL;
  720. if (cp->extendedmode != 0)
  721. return -EINVAL;
  722. /*
  723. * CLKRC has a reserved bit, so let's preserve it.
  724. */
  725. ret = ov7670_read(c, REG_CLKRC, &clkrc);
  726. if (ret < 0)
  727. return ret;
  728. if (tpf->numerator == 0 || tpf->denominator == 0)
  729. div = 1; /* Reset to full rate */
  730. else
  731. div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator;
  732. if (div == 0)
  733. div = 1;
  734. else if (div > CLK_SCALE)
  735. div = CLK_SCALE;
  736. clkrc = (clkrc & 0x80) | div;
  737. tpf->numerator = 1;
  738. tpf->denominator = OV7670_FRAME_RATE/div;
  739. return ov7670_write(c, REG_CLKRC, clkrc);
  740. }
  741. /*
  742. * Code for dealing with controls.
  743. */
  744. static int ov7670_store_cmatrix(struct i2c_client *client,
  745. int matrix[CMATRIX_LEN])
  746. {
  747. int i, ret;
  748. unsigned char signbits = 0;
  749. /*
  750. * Weird crap seems to exist in the upper part of
  751. * the sign bits register, so let's preserve it.
  752. */
  753. ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits);
  754. signbits &= 0xc0;
  755. for (i = 0; i < CMATRIX_LEN; i++) {
  756. unsigned char raw;
  757. if (matrix[i] < 0) {
  758. signbits |= (1 << i);
  759. if (matrix[i] < -255)
  760. raw = 0xff;
  761. else
  762. raw = (-1 * matrix[i]) & 0xff;
  763. }
  764. else {
  765. if (matrix[i] > 255)
  766. raw = 0xff;
  767. else
  768. raw = matrix[i] & 0xff;
  769. }
  770. ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw);
  771. }
  772. ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits);
  773. return ret;
  774. }
  775. /*
  776. * Hue also requires messing with the color matrix. It also requires
  777. * trig functions, which tend not to be well supported in the kernel.
  778. * So here is a simple table of sine values, 0-90 degrees, in steps
  779. * of five degrees. Values are multiplied by 1000.
  780. *
  781. * The following naive approximate trig functions require an argument
  782. * carefully limited to -180 <= theta <= 180.
  783. */
  784. #define SIN_STEP 5
  785. static const int ov7670_sin_table[] = {
  786. 0, 87, 173, 258, 342, 422,
  787. 499, 573, 642, 707, 766, 819,
  788. 866, 906, 939, 965, 984, 996,
  789. 1000
  790. };
  791. static int ov7670_sine(int theta)
  792. {
  793. int chs = 1;
  794. int sine;
  795. if (theta < 0) {
  796. theta = -theta;
  797. chs = -1;
  798. }
  799. if (theta <= 90)
  800. sine = ov7670_sin_table[theta/SIN_STEP];
  801. else {
  802. theta -= 90;
  803. sine = 1000 - ov7670_sin_table[theta/SIN_STEP];
  804. }
  805. return sine*chs;
  806. }
  807. static int ov7670_cosine(int theta)
  808. {
  809. theta = 90 - theta;
  810. if (theta > 180)
  811. theta -= 360;
  812. else if (theta < -180)
  813. theta += 360;
  814. return ov7670_sine(theta);
  815. }
  816. static void ov7670_calc_cmatrix(struct ov7670_info *info,
  817. int matrix[CMATRIX_LEN])
  818. {
  819. int i;
  820. /*
  821. * Apply the current saturation setting first.
  822. */
  823. for (i = 0; i < CMATRIX_LEN; i++)
  824. matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7;
  825. /*
  826. * Then, if need be, rotate the hue value.
  827. */
  828. if (info->hue != 0) {
  829. int sinth, costh, tmpmatrix[CMATRIX_LEN];
  830. memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int));
  831. sinth = ov7670_sine(info->hue);
  832. costh = ov7670_cosine(info->hue);
  833. matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000;
  834. matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000;
  835. matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000;
  836. matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000;
  837. matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000;
  838. matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000;
  839. }
  840. }
  841. static int ov7670_t_sat(struct i2c_client *client, int value)
  842. {
  843. struct ov7670_info *info = i2c_get_clientdata(client);
  844. int matrix[CMATRIX_LEN];
  845. int ret;
  846. info->sat = value;
  847. ov7670_calc_cmatrix(info, matrix);
  848. ret = ov7670_store_cmatrix(client, matrix);
  849. return ret;
  850. }
  851. static int ov7670_q_sat(struct i2c_client *client, __s32 *value)
  852. {
  853. struct ov7670_info *info = i2c_get_clientdata(client);
  854. *value = info->sat;
  855. return 0;
  856. }
  857. static int ov7670_t_hue(struct i2c_client *client, int value)
  858. {
  859. struct ov7670_info *info = i2c_get_clientdata(client);
  860. int matrix[CMATRIX_LEN];
  861. int ret;
  862. if (value < -180 || value > 180)
  863. return -EINVAL;
  864. info->hue = value;
  865. ov7670_calc_cmatrix(info, matrix);
  866. ret = ov7670_store_cmatrix(client, matrix);
  867. return ret;
  868. }
  869. static int ov7670_q_hue(struct i2c_client *client, __s32 *value)
  870. {
  871. struct ov7670_info *info = i2c_get_clientdata(client);
  872. *value = info->hue;
  873. return 0;
  874. }
  875. /*
  876. * Some weird registers seem to store values in a sign/magnitude format!
  877. */
  878. static unsigned char ov7670_sm_to_abs(unsigned char v)
  879. {
  880. if ((v & 0x80) == 0)
  881. return v + 128;
  882. else
  883. return 128 - (v & 0x7f);
  884. }
  885. static unsigned char ov7670_abs_to_sm(unsigned char v)
  886. {
  887. if (v > 127)
  888. return v & 0x7f;
  889. else
  890. return (128 - v) | 0x80;
  891. }
  892. static int ov7670_t_brightness(struct i2c_client *client, int value)
  893. {
  894. unsigned char com8 = 0, v;
  895. int ret;
  896. ov7670_read(client, REG_COM8, &com8);
  897. com8 &= ~COM8_AEC;
  898. ov7670_write(client, REG_COM8, com8);
  899. v = ov7670_abs_to_sm(value);
  900. ret = ov7670_write(client, REG_BRIGHT, v);
  901. return ret;
  902. }
  903. static int ov7670_q_brightness(struct i2c_client *client, __s32 *value)
  904. {
  905. unsigned char v = 0;
  906. int ret = ov7670_read(client, REG_BRIGHT, &v);
  907. *value = ov7670_sm_to_abs(v);
  908. return ret;
  909. }
  910. static int ov7670_t_contrast(struct i2c_client *client, int value)
  911. {
  912. return ov7670_write(client, REG_CONTRAS, (unsigned char) value);
  913. }
  914. static int ov7670_q_contrast(struct i2c_client *client, __s32 *value)
  915. {
  916. unsigned char v = 0;
  917. int ret = ov7670_read(client, REG_CONTRAS, &v);
  918. *value = v;
  919. return ret;
  920. }
  921. static int ov7670_q_hflip(struct i2c_client *client, __s32 *value)
  922. {
  923. int ret;
  924. unsigned char v = 0;
  925. ret = ov7670_read(client, REG_MVFP, &v);
  926. *value = (v & MVFP_MIRROR) == MVFP_MIRROR;
  927. return ret;
  928. }
  929. static int ov7670_t_hflip(struct i2c_client *client, int value)
  930. {
  931. unsigned char v = 0;
  932. int ret;
  933. ret = ov7670_read(client, REG_MVFP, &v);
  934. if (value)
  935. v |= MVFP_MIRROR;
  936. else
  937. v &= ~MVFP_MIRROR;
  938. msleep(10); /* FIXME */
  939. ret += ov7670_write(client, REG_MVFP, v);
  940. return ret;
  941. }
  942. static int ov7670_q_vflip(struct i2c_client *client, __s32 *value)
  943. {
  944. int ret;
  945. unsigned char v = 0;
  946. ret = ov7670_read(client, REG_MVFP, &v);
  947. *value = (v & MVFP_FLIP) == MVFP_FLIP;
  948. return ret;
  949. }
  950. static int ov7670_t_vflip(struct i2c_client *client, int value)
  951. {
  952. unsigned char v = 0;
  953. int ret;
  954. ret = ov7670_read(client, REG_MVFP, &v);
  955. if (value)
  956. v |= MVFP_FLIP;
  957. else
  958. v &= ~MVFP_FLIP;
  959. msleep(10); /* FIXME */
  960. ret += ov7670_write(client, REG_MVFP, v);
  961. return ret;
  962. }
  963. static struct ov7670_control {
  964. struct v4l2_queryctrl qc;
  965. int (*query)(struct i2c_client *c, __s32 *value);
  966. int (*tweak)(struct i2c_client *c, int value);
  967. } ov7670_controls[] =
  968. {
  969. {
  970. .qc = {
  971. .id = V4L2_CID_BRIGHTNESS,
  972. .type = V4L2_CTRL_TYPE_INTEGER,
  973. .name = "Brightness",
  974. .minimum = 0,
  975. .maximum = 255,
  976. .step = 1,
  977. .default_value = 0x80,
  978. .flags = V4L2_CTRL_FLAG_SLIDER
  979. },
  980. .tweak = ov7670_t_brightness,
  981. .query = ov7670_q_brightness,
  982. },
  983. {
  984. .qc = {
  985. .id = V4L2_CID_CONTRAST,
  986. .type = V4L2_CTRL_TYPE_INTEGER,
  987. .name = "Contrast",
  988. .minimum = 0,
  989. .maximum = 127,
  990. .step = 1,
  991. .default_value = 0x40, /* XXX ov7670 spec */
  992. .flags = V4L2_CTRL_FLAG_SLIDER
  993. },
  994. .tweak = ov7670_t_contrast,
  995. .query = ov7670_q_contrast,
  996. },
  997. {
  998. .qc = {
  999. .id = V4L2_CID_SATURATION,
  1000. .type = V4L2_CTRL_TYPE_INTEGER,
  1001. .name = "Saturation",
  1002. .minimum = 0,
  1003. .maximum = 256,
  1004. .step = 1,
  1005. .default_value = 0x80,
  1006. .flags = V4L2_CTRL_FLAG_SLIDER
  1007. },
  1008. .tweak = ov7670_t_sat,
  1009. .query = ov7670_q_sat,
  1010. },
  1011. {
  1012. .qc = {
  1013. .id = V4L2_CID_HUE,
  1014. .type = V4L2_CTRL_TYPE_INTEGER,
  1015. .name = "HUE",
  1016. .minimum = -180,
  1017. .maximum = 180,
  1018. .step = 5,
  1019. .default_value = 0,
  1020. .flags = V4L2_CTRL_FLAG_SLIDER
  1021. },
  1022. .tweak = ov7670_t_hue,
  1023. .query = ov7670_q_hue,
  1024. },
  1025. {
  1026. .qc = {
  1027. .id = V4L2_CID_VFLIP,
  1028. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1029. .name = "Vertical flip",
  1030. .minimum = 0,
  1031. .maximum = 1,
  1032. .step = 1,
  1033. .default_value = 0,
  1034. },
  1035. .tweak = ov7670_t_vflip,
  1036. .query = ov7670_q_vflip,
  1037. },
  1038. {
  1039. .qc = {
  1040. .id = V4L2_CID_HFLIP,
  1041. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1042. .name = "Horizontal mirror",
  1043. .minimum = 0,
  1044. .maximum = 1,
  1045. .step = 1,
  1046. .default_value = 0,
  1047. },
  1048. .tweak = ov7670_t_hflip,
  1049. .query = ov7670_q_hflip,
  1050. },
  1051. };
  1052. #define N_CONTROLS (ARRAY_SIZE(ov7670_controls))
  1053. static struct ov7670_control *ov7670_find_control(__u32 id)
  1054. {
  1055. int i;
  1056. for (i = 0; i < N_CONTROLS; i++)
  1057. if (ov7670_controls[i].qc.id == id)
  1058. return ov7670_controls + i;
  1059. return NULL;
  1060. }
  1061. static int ov7670_queryctrl(struct i2c_client *client,
  1062. struct v4l2_queryctrl *qc)
  1063. {
  1064. struct ov7670_control *ctrl = ov7670_find_control(qc->id);
  1065. if (ctrl == NULL)
  1066. return -EINVAL;
  1067. *qc = ctrl->qc;
  1068. return 0;
  1069. }
  1070. static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
  1071. {
  1072. struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
  1073. int ret;
  1074. if (octrl == NULL)
  1075. return -EINVAL;
  1076. ret = octrl->query(client, &ctrl->value);
  1077. if (ret >= 0)
  1078. return 0;
  1079. return ret;
  1080. }
  1081. static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
  1082. {
  1083. struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
  1084. int ret;
  1085. if (octrl == NULL)
  1086. return -EINVAL;
  1087. ret = octrl->tweak(client, ctrl->value);
  1088. if (ret >= 0)
  1089. return 0;
  1090. return ret;
  1091. }
  1092. /*
  1093. * Basic i2c stuff.
  1094. */
  1095. static struct i2c_driver ov7670_driver;
  1096. static int ov7670_attach(struct i2c_adapter *adapter)
  1097. {
  1098. int ret;
  1099. struct i2c_client *client;
  1100. struct ov7670_info *info;
  1101. /*
  1102. * For now: only deal with adapters we recognize.
  1103. */
  1104. if (adapter->id != I2C_HW_SMBUS_CAFE)
  1105. return -ENODEV;
  1106. client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL);
  1107. if (! client)
  1108. return -ENOMEM;
  1109. client->adapter = adapter;
  1110. client->addr = OV7670_I2C_ADDR;
  1111. client->driver = &ov7670_driver,
  1112. strcpy(client->name, "OV7670");
  1113. /*
  1114. * Set up our info structure.
  1115. */
  1116. info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL);
  1117. if (! info) {
  1118. ret = -ENOMEM;
  1119. goto out_free;
  1120. }
  1121. info->fmt = &ov7670_formats[0];
  1122. info->sat = 128; /* Review this */
  1123. i2c_set_clientdata(client, info);
  1124. /*
  1125. * Make sure it's an ov7670
  1126. */
  1127. ret = ov7670_detect(client);
  1128. if (ret)
  1129. goto out_free_info;
  1130. ret = i2c_attach_client(client);
  1131. if (ret)
  1132. goto out_free_info;
  1133. return 0;
  1134. out_free_info:
  1135. kfree(info);
  1136. out_free:
  1137. kfree(client);
  1138. return ret;
  1139. }
  1140. static int ov7670_detach(struct i2c_client *client)
  1141. {
  1142. i2c_detach_client(client);
  1143. kfree(i2c_get_clientdata(client));
  1144. kfree(client);
  1145. return 0;
  1146. }
  1147. static int ov7670_command(struct i2c_client *client, unsigned int cmd,
  1148. void *arg)
  1149. {
  1150. switch (cmd) {
  1151. case VIDIOC_DBG_G_CHIP_IDENT:
  1152. return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0);
  1153. case VIDIOC_INT_RESET:
  1154. ov7670_reset(client);
  1155. return 0;
  1156. case VIDIOC_INT_INIT:
  1157. return ov7670_init(client);
  1158. case VIDIOC_ENUM_FMT:
  1159. return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg);
  1160. case VIDIOC_TRY_FMT:
  1161. return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL);
  1162. case VIDIOC_S_FMT:
  1163. return ov7670_s_fmt(client, (struct v4l2_format *) arg);
  1164. case VIDIOC_QUERYCTRL:
  1165. return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg);
  1166. case VIDIOC_S_CTRL:
  1167. return ov7670_s_ctrl(client, (struct v4l2_control *) arg);
  1168. case VIDIOC_G_CTRL:
  1169. return ov7670_g_ctrl(client, (struct v4l2_control *) arg);
  1170. case VIDIOC_S_PARM:
  1171. return ov7670_s_parm(client, (struct v4l2_streamparm *) arg);
  1172. case VIDIOC_G_PARM:
  1173. return ov7670_g_parm(client, (struct v4l2_streamparm *) arg);
  1174. }
  1175. return -EINVAL;
  1176. }
  1177. static struct i2c_driver ov7670_driver = {
  1178. .driver = {
  1179. .name = "ov7670",
  1180. },
  1181. .id = I2C_DRIVERID_OV7670,
  1182. .class = I2C_CLASS_CAM_DIGITAL,
  1183. .attach_adapter = ov7670_attach,
  1184. .detach_client = ov7670_detach,
  1185. .command = ov7670_command,
  1186. };
  1187. /*
  1188. * Module initialization
  1189. */
  1190. static int __init ov7670_mod_init(void)
  1191. {
  1192. printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n");
  1193. return i2c_add_driver(&ov7670_driver);
  1194. }
  1195. static void __exit ov7670_mod_exit(void)
  1196. {
  1197. i2c_del_driver(&ov7670_driver);
  1198. }
  1199. module_init(ov7670_mod_init);
  1200. module_exit(ov7670_mod_exit);