ks0127.c 22 KB

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  1. /*
  2. * Video Capture Driver (Video for Linux 1/2)
  3. * for the Matrox Marvel G200,G400 and Rainbow Runner-G series
  4. *
  5. * This module is an interface to the KS0127 video decoder chip.
  6. *
  7. * Copyright (C) 1999 Ryan Drake <stiletto@mediaone.net>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. *****************************************************************************
  24. *
  25. * Modified and extended by
  26. * Mike Bernson <mike@mlb.org>
  27. * Gerard v.d. Horst
  28. * Leon van Stuivenberg <l.vanstuivenberg@chello.nl>
  29. * Gernot Ziegler <gz@lysator.liu.se>
  30. *
  31. * Version History:
  32. * V1.0 Ryan Drake Initial version by Ryan Drake
  33. * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard
  34. */
  35. #include <linux/init.h>
  36. #include <linux/module.h>
  37. #include <linux/delay.h>
  38. #include <linux/errno.h>
  39. #include <linux/kernel.h>
  40. #include <linux/i2c.h>
  41. #include <linux/video_decoder.h>
  42. #include <media/v4l2-common.h>
  43. #include <media/v4l2-i2c-drv-legacy.h>
  44. #include "ks0127.h"
  45. MODULE_DESCRIPTION("KS0127 video decoder driver");
  46. MODULE_AUTHOR("Ryan Drake");
  47. MODULE_LICENSE("GPL");
  48. #define KS_TYPE_UNKNOWN 0
  49. #define KS_TYPE_0122S 1
  50. #define KS_TYPE_0127 2
  51. #define KS_TYPE_0127B 3
  52. /* ks0127 control registers */
  53. #define KS_STAT 0x00
  54. #define KS_CMDA 0x01
  55. #define KS_CMDB 0x02
  56. #define KS_CMDC 0x03
  57. #define KS_CMDD 0x04
  58. #define KS_HAVB 0x05
  59. #define KS_HAVE 0x06
  60. #define KS_HS1B 0x07
  61. #define KS_HS1E 0x08
  62. #define KS_HS2B 0x09
  63. #define KS_HS2E 0x0a
  64. #define KS_AGC 0x0b
  65. #define KS_HXTRA 0x0c
  66. #define KS_CDEM 0x0d
  67. #define KS_PORTAB 0x0e
  68. #define KS_LUMA 0x0f
  69. #define KS_CON 0x10
  70. #define KS_BRT 0x11
  71. #define KS_CHROMA 0x12
  72. #define KS_CHROMB 0x13
  73. #define KS_DEMOD 0x14
  74. #define KS_SAT 0x15
  75. #define KS_HUE 0x16
  76. #define KS_VERTIA 0x17
  77. #define KS_VERTIB 0x18
  78. #define KS_VERTIC 0x19
  79. #define KS_HSCLL 0x1a
  80. #define KS_HSCLH 0x1b
  81. #define KS_VSCLL 0x1c
  82. #define KS_VSCLH 0x1d
  83. #define KS_OFMTA 0x1e
  84. #define KS_OFMTB 0x1f
  85. #define KS_VBICTL 0x20
  86. #define KS_CCDAT2 0x21
  87. #define KS_CCDAT1 0x22
  88. #define KS_VBIL30 0x23
  89. #define KS_VBIL74 0x24
  90. #define KS_VBIL118 0x25
  91. #define KS_VBIL1512 0x26
  92. #define KS_TTFRAM 0x27
  93. #define KS_TESTA 0x28
  94. #define KS_UVOFFH 0x29
  95. #define KS_UVOFFL 0x2a
  96. #define KS_UGAIN 0x2b
  97. #define KS_VGAIN 0x2c
  98. #define KS_VAVB 0x2d
  99. #define KS_VAVE 0x2e
  100. #define KS_CTRACK 0x2f
  101. #define KS_POLCTL 0x30
  102. #define KS_REFCOD 0x31
  103. #define KS_INVALY 0x32
  104. #define KS_INVALU 0x33
  105. #define KS_INVALV 0x34
  106. #define KS_UNUSEY 0x35
  107. #define KS_UNUSEU 0x36
  108. #define KS_UNUSEV 0x37
  109. #define KS_USRSAV 0x38
  110. #define KS_USREAV 0x39
  111. #define KS_SHS1A 0x3a
  112. #define KS_SHS1B 0x3b
  113. #define KS_SHS1C 0x3c
  114. #define KS_CMDE 0x3d
  115. #define KS_VSDEL 0x3e
  116. #define KS_CMDF 0x3f
  117. #define KS_GAMMA0 0x40
  118. #define KS_GAMMA1 0x41
  119. #define KS_GAMMA2 0x42
  120. #define KS_GAMMA3 0x43
  121. #define KS_GAMMA4 0x44
  122. #define KS_GAMMA5 0x45
  123. #define KS_GAMMA6 0x46
  124. #define KS_GAMMA7 0x47
  125. #define KS_GAMMA8 0x48
  126. #define KS_GAMMA9 0x49
  127. #define KS_GAMMA10 0x4a
  128. #define KS_GAMMA11 0x4b
  129. #define KS_GAMMA12 0x4c
  130. #define KS_GAMMA13 0x4d
  131. #define KS_GAMMA14 0x4e
  132. #define KS_GAMMA15 0x4f
  133. #define KS_GAMMA16 0x50
  134. #define KS_GAMMA17 0x51
  135. #define KS_GAMMA18 0x52
  136. #define KS_GAMMA19 0x53
  137. #define KS_GAMMA20 0x54
  138. #define KS_GAMMA21 0x55
  139. #define KS_GAMMA22 0x56
  140. #define KS_GAMMA23 0x57
  141. #define KS_GAMMA24 0x58
  142. #define KS_GAMMA25 0x59
  143. #define KS_GAMMA26 0x5a
  144. #define KS_GAMMA27 0x5b
  145. #define KS_GAMMA28 0x5c
  146. #define KS_GAMMA29 0x5d
  147. #define KS_GAMMA30 0x5e
  148. #define KS_GAMMA31 0x5f
  149. #define KS_GAMMAD0 0x60
  150. #define KS_GAMMAD1 0x61
  151. #define KS_GAMMAD2 0x62
  152. #define KS_GAMMAD3 0x63
  153. #define KS_GAMMAD4 0x64
  154. #define KS_GAMMAD5 0x65
  155. #define KS_GAMMAD6 0x66
  156. #define KS_GAMMAD7 0x67
  157. #define KS_GAMMAD8 0x68
  158. #define KS_GAMMAD9 0x69
  159. #define KS_GAMMAD10 0x6a
  160. #define KS_GAMMAD11 0x6b
  161. #define KS_GAMMAD12 0x6c
  162. #define KS_GAMMAD13 0x6d
  163. #define KS_GAMMAD14 0x6e
  164. #define KS_GAMMAD15 0x6f
  165. #define KS_GAMMAD16 0x70
  166. #define KS_GAMMAD17 0x71
  167. #define KS_GAMMAD18 0x72
  168. #define KS_GAMMAD19 0x73
  169. #define KS_GAMMAD20 0x74
  170. #define KS_GAMMAD21 0x75
  171. #define KS_GAMMAD22 0x76
  172. #define KS_GAMMAD23 0x77
  173. #define KS_GAMMAD24 0x78
  174. #define KS_GAMMAD25 0x79
  175. #define KS_GAMMAD26 0x7a
  176. #define KS_GAMMAD27 0x7b
  177. #define KS_GAMMAD28 0x7c
  178. #define KS_GAMMAD29 0x7d
  179. #define KS_GAMMAD30 0x7e
  180. #define KS_GAMMAD31 0x7f
  181. /****************************************************************************
  182. * mga_dev : represents one ks0127 chip.
  183. ****************************************************************************/
  184. struct adjust {
  185. int contrast;
  186. int bright;
  187. int hue;
  188. int ugain;
  189. int vgain;
  190. };
  191. struct ks0127 {
  192. int format_width;
  193. int format_height;
  194. int cap_width;
  195. int cap_height;
  196. int norm;
  197. int ks_type;
  198. u8 regs[256];
  199. };
  200. static int debug; /* insmod parameter */
  201. module_param(debug, int, 0);
  202. MODULE_PARM_DESC(debug, "Debug output");
  203. static u8 reg_defaults[64];
  204. static void init_reg_defaults(void)
  205. {
  206. static int initialized;
  207. u8 *table = reg_defaults;
  208. if (initialized)
  209. return;
  210. initialized = 1;
  211. table[KS_CMDA] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */
  212. table[KS_CMDB] = 0x12; /* VALIGN=0, AGC control and input */
  213. table[KS_CMDC] = 0x00; /* Test options */
  214. /* clock & input select, write 1 to PORTA */
  215. table[KS_CMDD] = 0x01;
  216. table[KS_HAVB] = 0x00; /* HAV Start Control */
  217. table[KS_HAVE] = 0x00; /* HAV End Control */
  218. table[KS_HS1B] = 0x10; /* HS1 Start Control */
  219. table[KS_HS1E] = 0x00; /* HS1 End Control */
  220. table[KS_HS2B] = 0x00; /* HS2 Start Control */
  221. table[KS_HS2E] = 0x00; /* HS2 End Control */
  222. table[KS_AGC] = 0x53; /* Manual setting for AGC */
  223. table[KS_HXTRA] = 0x00; /* Extra Bits for HAV and HS1/2 */
  224. table[KS_CDEM] = 0x00; /* Chroma Demodulation Control */
  225. table[KS_PORTAB] = 0x0f; /* port B is input, port A output GPPORT */
  226. table[KS_LUMA] = 0x01; /* Luma control */
  227. table[KS_CON] = 0x00; /* Contrast Control */
  228. table[KS_BRT] = 0x00; /* Brightness Control */
  229. table[KS_CHROMA] = 0x2a; /* Chroma control A */
  230. table[KS_CHROMB] = 0x90; /* Chroma control B */
  231. table[KS_DEMOD] = 0x00; /* Chroma Demodulation Control & Status */
  232. table[KS_SAT] = 0x00; /* Color Saturation Control*/
  233. table[KS_HUE] = 0x00; /* Hue Control */
  234. table[KS_VERTIA] = 0x00; /* Vertical Processing Control A */
  235. /* Vertical Processing Control B, luma 1 line delayed */
  236. table[KS_VERTIB] = 0x12;
  237. table[KS_VERTIC] = 0x0b; /* Vertical Processing Control C */
  238. table[KS_HSCLL] = 0x00; /* Horizontal Scaling Ratio Low */
  239. table[KS_HSCLH] = 0x00; /* Horizontal Scaling Ratio High */
  240. table[KS_VSCLL] = 0x00; /* Vertical Scaling Ratio Low */
  241. table[KS_VSCLH] = 0x00; /* Vertical Scaling Ratio High */
  242. /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */
  243. table[KS_OFMTA] = 0x30;
  244. table[KS_OFMTB] = 0x00; /* Output Control B */
  245. /* VBI Decoder Control; 4bit fmt: avoid Y overflow */
  246. table[KS_VBICTL] = 0x5d;
  247. table[KS_CCDAT2] = 0x00; /* Read Only register */
  248. table[KS_CCDAT1] = 0x00; /* Read Only register */
  249. table[KS_VBIL30] = 0xa8; /* VBI data decoding options */
  250. table[KS_VBIL74] = 0xaa; /* VBI data decoding options */
  251. table[KS_VBIL118] = 0x2a; /* VBI data decoding options */
  252. table[KS_VBIL1512] = 0x00; /* VBI data decoding options */
  253. table[KS_TTFRAM] = 0x00; /* Teletext frame alignment pattern */
  254. table[KS_TESTA] = 0x00; /* test register, shouldn't be written */
  255. table[KS_UVOFFH] = 0x00; /* UV Offset Adjustment High */
  256. table[KS_UVOFFL] = 0x00; /* UV Offset Adjustment Low */
  257. table[KS_UGAIN] = 0x00; /* U Component Gain Adjustment */
  258. table[KS_VGAIN] = 0x00; /* V Component Gain Adjustment */
  259. table[KS_VAVB] = 0x07; /* VAV Begin */
  260. table[KS_VAVE] = 0x00; /* VAV End */
  261. table[KS_CTRACK] = 0x00; /* Chroma Tracking Control */
  262. table[KS_POLCTL] = 0x41; /* Timing Signal Polarity Control */
  263. table[KS_REFCOD] = 0x80; /* Reference Code Insertion Control */
  264. table[KS_INVALY] = 0x10; /* Invalid Y Code */
  265. table[KS_INVALU] = 0x80; /* Invalid U Code */
  266. table[KS_INVALV] = 0x80; /* Invalid V Code */
  267. table[KS_UNUSEY] = 0x10; /* Unused Y Code */
  268. table[KS_UNUSEU] = 0x80; /* Unused U Code */
  269. table[KS_UNUSEV] = 0x80; /* Unused V Code */
  270. table[KS_USRSAV] = 0x00; /* reserved */
  271. table[KS_USREAV] = 0x00; /* reserved */
  272. table[KS_SHS1A] = 0x00; /* User Defined SHS1 A */
  273. /* User Defined SHS1 B, ALT656=1 on 0127B */
  274. table[KS_SHS1B] = 0x80;
  275. table[KS_SHS1C] = 0x00; /* User Defined SHS1 C */
  276. table[KS_CMDE] = 0x00; /* Command Register E */
  277. table[KS_VSDEL] = 0x00; /* VS Delay Control */
  278. /* Command Register F, update -immediately- */
  279. /* (there might come no vsync)*/
  280. table[KS_CMDF] = 0x02;
  281. }
  282. /* We need to manually read because of a bug in the KS0127 chip.
  283. *
  284. * An explanation from kayork@mail.utexas.edu:
  285. *
  286. * During I2C reads, the KS0127 only samples for a stop condition
  287. * during the place where the acknowledge bit should be. Any standard
  288. * I2C implementation (correctly) throws in another clock transition
  289. * at the 9th bit, and the KS0127 will not recognize the stop condition
  290. * and will continue to clock out data.
  291. *
  292. * So we have to do the read ourself. Big deal.
  293. * workaround in i2c-algo-bit
  294. */
  295. static u8 ks0127_read(struct i2c_client *c, u8 reg)
  296. {
  297. char val = 0;
  298. struct i2c_msg msgs[] = {
  299. { c->addr, 0, sizeof(reg), &reg },
  300. { c->addr, I2C_M_RD | I2C_M_NO_RD_ACK, sizeof(val), &val }
  301. };
  302. int ret;
  303. ret = i2c_transfer(c->adapter, msgs, ARRAY_SIZE(msgs));
  304. if (ret != ARRAY_SIZE(msgs))
  305. v4l_dbg(1, debug, c, "read error\n");
  306. return val;
  307. }
  308. static void ks0127_write(struct i2c_client *c, u8 reg, u8 val)
  309. {
  310. struct ks0127 *ks = i2c_get_clientdata(c);
  311. char msg[] = { reg, val };
  312. if (i2c_master_send(c, msg, sizeof(msg)) != sizeof(msg))
  313. v4l_dbg(1, debug, c, "write error\n");
  314. ks->regs[reg] = val;
  315. }
  316. /* generic bit-twiddling */
  317. static void ks0127_and_or(struct i2c_client *client, u8 reg, u8 and_v, u8 or_v)
  318. {
  319. struct ks0127 *ks = i2c_get_clientdata(client);
  320. u8 val = ks->regs[reg];
  321. val = (val & and_v) | or_v;
  322. ks0127_write(client, reg, val);
  323. }
  324. /****************************************************************************
  325. * ks0127 private api
  326. ****************************************************************************/
  327. static void ks0127_reset(struct i2c_client *c)
  328. {
  329. struct ks0127 *ks = i2c_get_clientdata(c);
  330. u8 *table = reg_defaults;
  331. int i;
  332. ks->ks_type = KS_TYPE_UNKNOWN;
  333. v4l_dbg(1, debug, c, "reset\n");
  334. msleep(1);
  335. /* initialize all registers to known values */
  336. /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */
  337. for (i = 1; i < 33; i++)
  338. ks0127_write(c, i, table[i]);
  339. for (i = 35; i < 40; i++)
  340. ks0127_write(c, i, table[i]);
  341. for (i = 41; i < 56; i++)
  342. ks0127_write(c, i, table[i]);
  343. for (i = 58; i < 64; i++)
  344. ks0127_write(c, i, table[i]);
  345. if ((ks0127_read(c, KS_STAT) & 0x80) == 0) {
  346. ks->ks_type = KS_TYPE_0122S;
  347. v4l_dbg(1, debug, c, "ks0122s found\n");
  348. return;
  349. }
  350. switch (ks0127_read(c, KS_CMDE) & 0x0f) {
  351. case 0:
  352. ks->ks_type = KS_TYPE_0127;
  353. v4l_dbg(1, debug, c, "ks0127 found\n");
  354. break;
  355. case 9:
  356. ks->ks_type = KS_TYPE_0127B;
  357. v4l_dbg(1, debug, c, "ks0127B Revision A found\n");
  358. break;
  359. default:
  360. v4l_dbg(1, debug, c, "unknown revision\n");
  361. break;
  362. }
  363. }
  364. static int ks0127_command(struct i2c_client *c, unsigned cmd, void *arg)
  365. {
  366. struct ks0127 *ks = i2c_get_clientdata(c);
  367. int *iarg = (int *)arg;
  368. int status;
  369. if (!ks)
  370. return -ENODEV;
  371. switch (cmd) {
  372. case DECODER_INIT:
  373. v4l_dbg(1, debug, c, "DECODER_INIT\n");
  374. ks0127_reset(c);
  375. break;
  376. case DECODER_SET_INPUT:
  377. switch(*iarg) {
  378. case KS_INPUT_COMPOSITE_1:
  379. case KS_INPUT_COMPOSITE_2:
  380. case KS_INPUT_COMPOSITE_3:
  381. case KS_INPUT_COMPOSITE_4:
  382. case KS_INPUT_COMPOSITE_5:
  383. case KS_INPUT_COMPOSITE_6:
  384. v4l_dbg(1, debug, c,
  385. "DECODER_SET_INPUT %d: Composite\n", *iarg);
  386. /* autodetect 50/60 Hz */
  387. ks0127_and_or(c, KS_CMDA, 0xfc, 0x00);
  388. /* VSE=0 */
  389. ks0127_and_or(c, KS_CMDA, ~0x40, 0x00);
  390. /* set input line */
  391. ks0127_and_or(c, KS_CMDB, 0xb0, *iarg);
  392. /* non-freerunning mode */
  393. ks0127_and_or(c, KS_CMDC, 0x70, 0x0a);
  394. /* analog input */
  395. ks0127_and_or(c, KS_CMDD, 0x03, 0x00);
  396. /* enable chroma demodulation */
  397. ks0127_and_or(c, KS_CTRACK, 0xcf, 0x00);
  398. /* chroma trap, HYBWR=1 */
  399. ks0127_and_or(c, KS_LUMA, 0x00,
  400. (reg_defaults[KS_LUMA])|0x0c);
  401. /* scaler fullbw, luma comb off */
  402. ks0127_and_or(c, KS_VERTIA, 0x08, 0x81);
  403. /* manual chroma comb .25 .5 .25 */
  404. ks0127_and_or(c, KS_VERTIC, 0x0f, 0x90);
  405. /* chroma path delay */
  406. ks0127_and_or(c, KS_CHROMB, 0x0f, 0x90);
  407. ks0127_write(c, KS_UGAIN, reg_defaults[KS_UGAIN]);
  408. ks0127_write(c, KS_VGAIN, reg_defaults[KS_VGAIN]);
  409. ks0127_write(c, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
  410. ks0127_write(c, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
  411. break;
  412. case KS_INPUT_SVIDEO_1:
  413. case KS_INPUT_SVIDEO_2:
  414. case KS_INPUT_SVIDEO_3:
  415. v4l_dbg(1, debug, c,
  416. "DECODER_SET_INPUT %d: S-Video\n", *iarg);
  417. /* autodetect 50/60 Hz */
  418. ks0127_and_or(c, KS_CMDA, 0xfc, 0x00);
  419. /* VSE=0 */
  420. ks0127_and_or(c, KS_CMDA, ~0x40, 0x00);
  421. /* set input line */
  422. ks0127_and_or(c, KS_CMDB, 0xb0, *iarg);
  423. /* non-freerunning mode */
  424. ks0127_and_or(c, KS_CMDC, 0x70, 0x0a);
  425. /* analog input */
  426. ks0127_and_or(c, KS_CMDD, 0x03, 0x00);
  427. /* enable chroma demodulation */
  428. ks0127_and_or(c, KS_CTRACK, 0xcf, 0x00);
  429. ks0127_and_or(c, KS_LUMA, 0x00,
  430. reg_defaults[KS_LUMA]);
  431. /* disable luma comb */
  432. ks0127_and_or(c, KS_VERTIA, 0x08,
  433. (reg_defaults[KS_VERTIA]&0xf0)|0x01);
  434. ks0127_and_or(c, KS_VERTIC, 0x0f,
  435. reg_defaults[KS_VERTIC]&0xf0);
  436. ks0127_and_or(c, KS_CHROMB, 0x0f,
  437. reg_defaults[KS_CHROMB]&0xf0);
  438. ks0127_write(c, KS_UGAIN, reg_defaults[KS_UGAIN]);
  439. ks0127_write(c, KS_VGAIN, reg_defaults[KS_VGAIN]);
  440. ks0127_write(c, KS_UVOFFH, reg_defaults[KS_UVOFFH]);
  441. ks0127_write(c, KS_UVOFFL, reg_defaults[KS_UVOFFL]);
  442. break;
  443. case KS_INPUT_YUV656:
  444. v4l_dbg(1, debug, c,
  445. "DECODER_SET_INPUT 15: YUV656\n");
  446. if (ks->norm == VIDEO_MODE_NTSC ||
  447. ks->norm == KS_STD_PAL_M)
  448. /* force 60 Hz */
  449. ks0127_and_or(c, KS_CMDA, 0xfc, 0x03);
  450. else
  451. /* force 50 Hz */
  452. ks0127_and_or(c, KS_CMDA, 0xfc, 0x02);
  453. ks0127_and_or(c, KS_CMDA, 0xff, 0x40); /* VSE=1 */
  454. /* set input line and VALIGN */
  455. ks0127_and_or(c, KS_CMDB, 0xb0, (*iarg | 0x40));
  456. /* freerunning mode, */
  457. /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/
  458. ks0127_and_or(c, KS_CMDC, 0x70, 0x87);
  459. /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */
  460. ks0127_and_or(c, KS_CMDD, 0x03, 0x08);
  461. /* disable chroma demodulation */
  462. ks0127_and_or(c, KS_CTRACK, 0xcf, 0x30);
  463. /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */
  464. ks0127_and_or(c, KS_LUMA, 0x00, 0x71);
  465. ks0127_and_or(c, KS_VERTIC, 0x0f,
  466. reg_defaults[KS_VERTIC]&0xf0);
  467. /* scaler fullbw, luma comb off */
  468. ks0127_and_or(c, KS_VERTIA, 0x08, 0x81);
  469. ks0127_and_or(c, KS_CHROMB, 0x0f,
  470. reg_defaults[KS_CHROMB]&0xf0);
  471. ks0127_and_or(c, KS_CON, 0x00, 0x00);
  472. ks0127_and_or(c, KS_BRT, 0x00, 32); /* spec: 34 */
  473. /* spec: 229 (e5) */
  474. ks0127_and_or(c, KS_SAT, 0x00, 0xe8);
  475. ks0127_and_or(c, KS_HUE, 0x00, 0);
  476. ks0127_and_or(c, KS_UGAIN, 0x00, 238);
  477. ks0127_and_or(c, KS_VGAIN, 0x00, 0x00);
  478. /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */
  479. ks0127_and_or(c, KS_UVOFFH, 0x00, 0x4f);
  480. ks0127_and_or(c, KS_UVOFFL, 0x00, 0x00);
  481. break;
  482. default:
  483. v4l_dbg(1, debug, c,
  484. "DECODER_SET_INPUT: Unknown input %d\n", *iarg);
  485. break;
  486. }
  487. /* hack: CDMLPF sometimes spontaneously switches on; */
  488. /* force back off */
  489. ks0127_write(c, KS_DEMOD, reg_defaults[KS_DEMOD]);
  490. break;
  491. case DECODER_SET_OUTPUT:
  492. switch(*iarg) {
  493. case KS_OUTPUT_YUV656E:
  494. v4l_dbg(1, debug, c,
  495. "DECODER_SET_OUTPUT: OUTPUT_YUV656E (Missing)\n");
  496. return -EINVAL;
  497. case KS_OUTPUT_EXV:
  498. v4l_dbg(1, debug, c,
  499. "DECODER_SET_OUTPUT: OUTPUT_EXV\n");
  500. ks0127_and_or(c, KS_OFMTA, 0xf0, 0x09);
  501. break;
  502. }
  503. break;
  504. case DECODER_SET_NORM: /* sam This block mixes old and new norm names... */
  505. /* Set to automatic SECAM/Fsc mode */
  506. ks0127_and_or(c, KS_DEMOD, 0xf0, 0x00);
  507. ks->norm = *iarg;
  508. switch (*iarg) {
  509. /* this is untested !! */
  510. /* It just detects PAL_N/NTSC_M (no special frequencies) */
  511. /* And you have to set the standard a second time afterwards */
  512. case VIDEO_MODE_AUTO:
  513. v4l_dbg(1, debug, c,
  514. "DECODER_SET_NORM: AUTO\n");
  515. /* The chip determines the format */
  516. /* based on the current field rate */
  517. ks0127_and_or(c, KS_CMDA, 0xfc, 0x00);
  518. ks0127_and_or(c, KS_CHROMA, 0x9f, 0x20);
  519. /* This is wrong for PAL ! As I said, */
  520. /* you need to set the standard once again !! */
  521. ks->format_height = 240;
  522. ks->format_width = 704;
  523. break;
  524. case VIDEO_MODE_NTSC:
  525. v4l_dbg(1, debug, c,
  526. "DECODER_SET_NORM: NTSC_M\n");
  527. ks0127_and_or(c, KS_CHROMA, 0x9f, 0x20);
  528. ks->format_height = 240;
  529. ks->format_width = 704;
  530. break;
  531. case KS_STD_NTSC_N:
  532. v4l_dbg(1, debug, c,
  533. "KS0127_SET_NORM: NTSC_N (fixme)\n");
  534. ks0127_and_or(c, KS_CHROMA, 0x9f, 0x40);
  535. ks->format_height = 240;
  536. ks->format_width = 704;
  537. break;
  538. case VIDEO_MODE_PAL:
  539. v4l_dbg(1, debug, c,
  540. "DECODER_SET_NORM: PAL_N\n");
  541. ks0127_and_or(c, KS_CHROMA, 0x9f, 0x20);
  542. ks->format_height = 290;
  543. ks->format_width = 704;
  544. break;
  545. case KS_STD_PAL_M:
  546. v4l_dbg(1, debug, c,
  547. "KS0127_SET_NORM: PAL_M (fixme)\n");
  548. ks0127_and_or(c, KS_CHROMA, 0x9f, 0x40);
  549. ks->format_height = 290;
  550. ks->format_width = 704;
  551. break;
  552. case VIDEO_MODE_SECAM:
  553. v4l_dbg(1, debug, c,
  554. "KS0127_SET_NORM: SECAM\n");
  555. ks->format_height = 290;
  556. ks->format_width = 704;
  557. /* set to secam autodetection */
  558. ks0127_and_or(c, KS_CHROMA, 0xdf, 0x20);
  559. ks0127_and_or(c, KS_DEMOD, 0xf0, 0x00);
  560. schedule_timeout_interruptible(HZ/10+1);
  561. /* did it autodetect? */
  562. if (ks0127_read(c, KS_DEMOD) & 0x40)
  563. break;
  564. /* force to secam mode */
  565. ks0127_and_or(c, KS_DEMOD, 0xf0, 0x0f);
  566. break;
  567. default:
  568. v4l_dbg(1, debug, c,
  569. "DECODER_SET_NORM: Unknown norm %d\n", *iarg);
  570. break;
  571. }
  572. break;
  573. case DECODER_SET_PICTURE:
  574. v4l_dbg(1, debug, c,
  575. "DECODER_SET_PICTURE: not yet supported\n");
  576. return -EINVAL;
  577. /* sam todo: KS0127_SET_BRIGHTNESS: Merge into DECODER_SET_PICTURE */
  578. /* sam todo: KS0127_SET_CONTRAST: Merge into DECODER_SET_PICTURE */
  579. /* sam todo: KS0127_SET_HUE: Merge into DECODER_SET_PICTURE? */
  580. /* sam todo: KS0127_SET_SATURATION: Merge into DECODER_SET_PICTURE */
  581. /* sam todo: KS0127_SET_AGC_MODE: */
  582. /* sam todo: KS0127_SET_AGC: */
  583. /* sam todo: KS0127_SET_CHROMA_MODE: */
  584. /* sam todo: KS0127_SET_PIXCLK_MODE: */
  585. /* sam todo: KS0127_SET_GAMMA_MODE: */
  586. /* sam todo: KS0127_SET_UGAIN: */
  587. /* sam todo: KS0127_SET_VGAIN: */
  588. /* sam todo: KS0127_SET_INVALY: */
  589. /* sam todo: KS0127_SET_INVALU: */
  590. /* sam todo: KS0127_SET_INVALV: */
  591. /* sam todo: KS0127_SET_UNUSEY: */
  592. /* sam todo: KS0127_SET_UNUSEU: */
  593. /* sam todo: KS0127_SET_UNUSEV: */
  594. /* sam todo: KS0127_SET_VSALIGN_MODE: */
  595. case DECODER_ENABLE_OUTPUT:
  596. {
  597. int enable;
  598. iarg = arg;
  599. enable = (*iarg != 0);
  600. if (enable) {
  601. v4l_dbg(1, debug, c,
  602. "DECODER_ENABLE_OUTPUT on\n");
  603. /* All output pins on */
  604. ks0127_and_or(c, KS_OFMTA, 0xcf, 0x30);
  605. /* Obey the OEN pin */
  606. ks0127_and_or(c, KS_CDEM, 0x7f, 0x00);
  607. } else {
  608. v4l_dbg(1, debug, c,
  609. "DECODER_ENABLE_OUTPUT off\n");
  610. /* Video output pins off */
  611. ks0127_and_or(c, KS_OFMTA, 0xcf, 0x00);
  612. /* Ignore the OEN pin */
  613. ks0127_and_or(c, KS_CDEM, 0x7f, 0x80);
  614. }
  615. break;
  616. }
  617. /* sam todo: KS0127_SET_OUTPUT_MODE: */
  618. /* sam todo: KS0127_SET_WIDTH: */
  619. /* sam todo: KS0127_SET_HEIGHT: */
  620. /* sam todo: KS0127_SET_HSCALE: */
  621. case DECODER_GET_STATUS:
  622. v4l_dbg(1, debug, c, "DECODER_GET_STATUS\n");
  623. *iarg = 0;
  624. status = ks0127_read(c, KS_STAT);
  625. if (!(status & 0x20)) /* NOVID not set */
  626. *iarg = (*iarg | DECODER_STATUS_GOOD);
  627. if ((status & 0x01)) /* CLOCK set */
  628. *iarg = (*iarg | DECODER_STATUS_COLOR);
  629. if ((status & 0x08)) /* PALDET set */
  630. *iarg = (*iarg | DECODER_STATUS_PAL);
  631. else
  632. *iarg = (*iarg | DECODER_STATUS_NTSC);
  633. break;
  634. /* Catch any unknown command */
  635. default:
  636. v4l_dbg(1, debug, c, "unknown: 0x%08x\n", cmd);
  637. return -EINVAL;
  638. }
  639. return 0;
  640. }
  641. /* Addresses to scan */
  642. #define I2C_KS0127_ADDON 0xD8
  643. #define I2C_KS0127_ONBOARD 0xDA
  644. static unsigned short normal_i2c[] = {
  645. I2C_KS0127_ADDON >> 1,
  646. I2C_KS0127_ONBOARD >> 1,
  647. I2C_CLIENT_END
  648. };
  649. I2C_CLIENT_INSMOD;
  650. static int ks0127_probe(struct i2c_client *c, const struct i2c_device_id *id)
  651. {
  652. struct ks0127 *ks;
  653. v4l_info(c, "%s chip found @ 0x%x (%s)\n",
  654. c->addr == (I2C_KS0127_ADDON >> 1) ? "addon" : "on-board",
  655. c->addr << 1, c->adapter->name);
  656. ks = kzalloc(sizeof(*ks), GFP_KERNEL);
  657. if (ks == NULL)
  658. return -ENOMEM;
  659. i2c_set_clientdata(c, ks);
  660. ks->ks_type = KS_TYPE_UNKNOWN;
  661. /* power up */
  662. init_reg_defaults();
  663. ks0127_write(c, KS_CMDA, 0x2c);
  664. mdelay(10);
  665. /* reset the device */
  666. ks0127_reset(c);
  667. return 0;
  668. }
  669. static int ks0127_remove(struct i2c_client *c)
  670. {
  671. struct ks0127 *ks = i2c_get_clientdata(c);
  672. ks0127_write(c, KS_OFMTA, 0x20); /* tristate */
  673. ks0127_write(c, KS_CMDA, 0x2c | 0x80); /* power down */
  674. kfree(ks);
  675. return 0;
  676. }
  677. static int ks0127_legacy_probe(struct i2c_adapter *adapter)
  678. {
  679. return adapter->id == I2C_HW_B_ZR36067;
  680. }
  681. static const struct i2c_device_id ks0127_id[] = {
  682. { "ks0127", 0 },
  683. { }
  684. };
  685. MODULE_DEVICE_TABLE(i2c, ks0127_id);
  686. static struct v4l2_i2c_driver_data v4l2_i2c_data = {
  687. .name = "ks0127",
  688. .driverid = I2C_DRIVERID_KS0127,
  689. .command = ks0127_command,
  690. .probe = ks0127_probe,
  691. .remove = ks0127_remove,
  692. .legacy_probe = ks0127_legacy_probe,
  693. .id_table = ks0127_id,
  694. };