cx18-streams.c 17 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-av-core.h"
  35. #include "cx18-dvb.h"
  36. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  37. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  38. .owner = THIS_MODULE,
  39. .read = cx18_v4l2_read,
  40. .open = cx18_v4l2_open,
  41. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  42. .ioctl = cx18_v4l2_ioctl,
  43. .release = cx18_v4l2_close,
  44. .poll = cx18_v4l2_enc_poll,
  45. };
  46. /* offset from 0 to register ts v4l2 minors on */
  47. #define CX18_V4L2_ENC_TS_OFFSET 16
  48. /* offset from 0 to register pcm v4l2 minors on */
  49. #define CX18_V4L2_ENC_PCM_OFFSET 24
  50. /* offset from 0 to register yuv v4l2 minors on */
  51. #define CX18_V4L2_ENC_YUV_OFFSET 32
  52. static struct {
  53. const char *name;
  54. int vfl_type;
  55. int num_offset;
  56. int dma;
  57. enum v4l2_buf_type buf_type;
  58. } cx18_stream_info[] = {
  59. { /* CX18_ENC_STREAM_TYPE_MPG */
  60. "encoder MPEG",
  61. VFL_TYPE_GRABBER, 0,
  62. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  63. },
  64. { /* CX18_ENC_STREAM_TYPE_TS */
  65. "TS",
  66. VFL_TYPE_GRABBER, -1,
  67. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  68. },
  69. { /* CX18_ENC_STREAM_TYPE_YUV */
  70. "encoder YUV",
  71. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  72. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  73. },
  74. { /* CX18_ENC_STREAM_TYPE_VBI */
  75. "encoder VBI",
  76. VFL_TYPE_VBI, 0,
  77. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  78. },
  79. { /* CX18_ENC_STREAM_TYPE_PCM */
  80. "encoder PCM audio",
  81. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  82. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  83. },
  84. { /* CX18_ENC_STREAM_TYPE_IDX */
  85. "encoder IDX",
  86. VFL_TYPE_GRABBER, -1,
  87. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  88. },
  89. { /* CX18_ENC_STREAM_TYPE_RAD */
  90. "encoder radio",
  91. VFL_TYPE_RADIO, 0,
  92. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  93. },
  94. };
  95. static void cx18_stream_init(struct cx18 *cx, int type)
  96. {
  97. struct cx18_stream *s = &cx->streams[type];
  98. struct video_device *dev = s->v4l2dev;
  99. /* we need to keep v4l2dev, so restore it afterwards */
  100. memset(s, 0, sizeof(*s));
  101. s->v4l2dev = dev;
  102. /* initialize cx18_stream fields */
  103. s->cx = cx;
  104. s->type = type;
  105. s->name = cx18_stream_info[type].name;
  106. s->handle = CX18_INVALID_TASK_HANDLE;
  107. s->dma = cx18_stream_info[type].dma;
  108. s->buffers = cx->stream_buffers[type];
  109. s->buf_size = cx->stream_buf_size[type];
  110. mutex_init(&s->qlock);
  111. init_waitqueue_head(&s->waitq);
  112. s->id = -1;
  113. cx18_queue_init(&s->q_free);
  114. cx18_queue_init(&s->q_busy);
  115. cx18_queue_init(&s->q_full);
  116. }
  117. static int cx18_prep_dev(struct cx18 *cx, int type)
  118. {
  119. struct cx18_stream *s = &cx->streams[type];
  120. u32 cap = cx->v4l2_cap;
  121. int num_offset = cx18_stream_info[type].num_offset;
  122. int num = cx->num + cx18_first_minor + num_offset;
  123. /* These four fields are always initialized. If v4l2dev == NULL, then
  124. this stream is not in use. In that case no other fields but these
  125. four can be used. */
  126. s->v4l2dev = NULL;
  127. s->cx = cx;
  128. s->type = type;
  129. s->name = cx18_stream_info[type].name;
  130. /* Check whether the radio is supported */
  131. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  132. return 0;
  133. /* Check whether VBI is supported */
  134. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  135. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  136. return 0;
  137. /* User explicitly selected 0 buffers for these streams, so don't
  138. create them. */
  139. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  140. cx->stream_buffers[type] == 0) {
  141. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  142. return 0;
  143. }
  144. cx18_stream_init(cx, type);
  145. if (num_offset == -1)
  146. return 0;
  147. /* allocate and initialize the v4l2 video device structure */
  148. s->v4l2dev = video_device_alloc();
  149. if (s->v4l2dev == NULL) {
  150. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  151. s->name);
  152. return -ENOMEM;
  153. }
  154. snprintf(s->v4l2dev->name, sizeof(s->v4l2dev->name), "cx18-%d",
  155. cx->num);
  156. s->v4l2dev->num = num;
  157. s->v4l2dev->parent = &cx->dev->dev;
  158. s->v4l2dev->fops = &cx18_v4l2_enc_fops;
  159. s->v4l2dev->release = video_device_release;
  160. s->v4l2dev->tvnorms = V4L2_STD_ALL;
  161. cx18_set_funcs(s->v4l2dev);
  162. return 0;
  163. }
  164. /* Initialize v4l2 variables and register v4l2 devices */
  165. int cx18_streams_setup(struct cx18 *cx)
  166. {
  167. int type, ret;
  168. /* Setup V4L2 Devices */
  169. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  170. /* Prepare device */
  171. ret = cx18_prep_dev(cx, type);
  172. if (ret < 0)
  173. break;
  174. /* Allocate Stream */
  175. ret = cx18_stream_alloc(&cx->streams[type]);
  176. if (ret < 0)
  177. break;
  178. }
  179. if (type == CX18_MAX_STREAMS)
  180. return 0;
  181. /* One or more streams could not be initialized. Clean 'em all up. */
  182. cx18_streams_cleanup(cx, 0);
  183. return ret;
  184. }
  185. static int cx18_reg_dev(struct cx18 *cx, int type)
  186. {
  187. struct cx18_stream *s = &cx->streams[type];
  188. int vfl_type = cx18_stream_info[type].vfl_type;
  189. int num, ret;
  190. /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
  191. * We need a VFL_TYPE_TS defined.
  192. */
  193. if (strcmp("TS", s->name) == 0) {
  194. /* just return if no DVB is supported */
  195. if ((cx->card->hw_all & CX18_HW_DVB) == 0)
  196. return 0;
  197. ret = cx18_dvb_register(s);
  198. if (ret < 0) {
  199. CX18_ERR("DVB failed to register\n");
  200. return ret;
  201. }
  202. }
  203. if (s->v4l2dev == NULL)
  204. return 0;
  205. num = s->v4l2dev->num;
  206. /* card number + user defined offset + device offset */
  207. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  208. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  209. if (s_mpg->v4l2dev)
  210. num = s_mpg->v4l2dev->num + cx18_stream_info[type].num_offset;
  211. }
  212. /* Register device. First try the desired minor, then any free one. */
  213. ret = video_register_device(s->v4l2dev, vfl_type, num);
  214. if (ret < 0) {
  215. CX18_ERR("Couldn't register v4l2 device for %s kernel number %d\n",
  216. s->name, num);
  217. video_device_release(s->v4l2dev);
  218. s->v4l2dev = NULL;
  219. return ret;
  220. }
  221. num = s->v4l2dev->num;
  222. switch (vfl_type) {
  223. case VFL_TYPE_GRABBER:
  224. CX18_INFO("Registered device video%d for %s (%d x %d kB)\n",
  225. num, s->name, cx->stream_buffers[type],
  226. cx->stream_buf_size[type]/1024);
  227. break;
  228. case VFL_TYPE_RADIO:
  229. CX18_INFO("Registered device radio%d for %s\n",
  230. num, s->name);
  231. break;
  232. case VFL_TYPE_VBI:
  233. if (cx->stream_buffers[type])
  234. CX18_INFO("Registered device vbi%d for %s "
  235. "(%d x %d bytes)\n",
  236. num, s->name, cx->stream_buffers[type],
  237. cx->stream_buf_size[type]);
  238. else
  239. CX18_INFO("Registered device vbi%d for %s\n",
  240. num, s->name);
  241. break;
  242. }
  243. return 0;
  244. }
  245. /* Register v4l2 devices */
  246. int cx18_streams_register(struct cx18 *cx)
  247. {
  248. int type;
  249. int err;
  250. int ret = 0;
  251. /* Register V4L2 devices */
  252. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  253. err = cx18_reg_dev(cx, type);
  254. if (err && ret == 0)
  255. ret = err;
  256. }
  257. if (ret == 0)
  258. return 0;
  259. /* One or more streams could not be initialized. Clean 'em all up. */
  260. cx18_streams_cleanup(cx, 1);
  261. return ret;
  262. }
  263. /* Unregister v4l2 devices */
  264. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  265. {
  266. struct video_device *vdev;
  267. int type;
  268. /* Teardown all streams */
  269. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  270. if (cx->streams[type].dvb.enabled) {
  271. cx18_dvb_unregister(&cx->streams[type]);
  272. cx->streams[type].dvb.enabled = false;
  273. }
  274. vdev = cx->streams[type].v4l2dev;
  275. cx->streams[type].v4l2dev = NULL;
  276. if (vdev == NULL)
  277. continue;
  278. cx18_stream_free(&cx->streams[type]);
  279. /* Unregister or release device */
  280. if (unregister)
  281. video_unregister_device(vdev);
  282. else
  283. video_device_release(vdev);
  284. }
  285. }
  286. static void cx18_vbi_setup(struct cx18_stream *s)
  287. {
  288. struct cx18 *cx = s->cx;
  289. int raw = cx18_raw_vbi(cx);
  290. u32 data[CX2341X_MBOX_MAX_DATA];
  291. int lines;
  292. if (cx->is_60hz) {
  293. cx->vbi.count = 12;
  294. cx->vbi.start[0] = 10;
  295. cx->vbi.start[1] = 273;
  296. } else { /* PAL/SECAM */
  297. cx->vbi.count = 18;
  298. cx->vbi.start[0] = 6;
  299. cx->vbi.start[1] = 318;
  300. }
  301. /* setup VBI registers */
  302. cx18_av_cmd(cx, VIDIOC_S_FMT, &cx->vbi.in);
  303. /* determine number of lines and total number of VBI bytes.
  304. A raw line takes 1444 bytes: 4 byte SAV code + 2 * 720
  305. A sliced line takes 51 bytes: 4 byte frame header, 4 byte internal
  306. header, 42 data bytes + checksum (to be confirmed) */
  307. if (raw) {
  308. lines = cx->vbi.count * 2;
  309. } else {
  310. lines = cx->is_60hz ? 24 : 38;
  311. if (cx->is_60hz)
  312. lines += 2;
  313. }
  314. cx->vbi.enc_size = lines *
  315. (raw ? cx->vbi.raw_size : cx->vbi.sliced_size);
  316. data[0] = s->handle;
  317. /* Lines per field */
  318. data[1] = (lines / 2) | ((lines / 2) << 16);
  319. /* bytes per line */
  320. data[2] = (raw ? cx->vbi.raw_decoder_line_size
  321. : cx->vbi.sliced_decoder_line_size);
  322. /* Every X number of frames a VBI interrupt arrives
  323. (frames as in 25 or 30 fps) */
  324. data[3] = 1;
  325. /* Setup VBI for the cx25840 digitizer */
  326. if (raw) {
  327. data[4] = 0x20602060;
  328. data[5] = 0x307090d0;
  329. } else {
  330. data[4] = 0xB0F0B0F0;
  331. data[5] = 0xA0E0A0E0;
  332. }
  333. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  334. data[0], data[1], data[2], data[3], data[4], data[5]);
  335. if (s->type == CX18_ENC_STREAM_TYPE_VBI)
  336. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  337. }
  338. struct cx18_queue *cx18_stream_put_buf_fw(struct cx18_stream *s,
  339. struct cx18_buffer *buf)
  340. {
  341. struct cx18 *cx = s->cx;
  342. struct cx18_queue *q;
  343. /* Don't give it to the firmware, if we're not running a capture */
  344. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  345. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  346. return cx18_enqueue(s, buf, &s->q_free);
  347. q = cx18_enqueue(s, buf, &s->q_busy);
  348. if (q != &s->q_busy)
  349. return q; /* The firmware has the max buffers it can handle */
  350. cx18_buf_sync_for_device(s, buf);
  351. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  352. (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
  353. 1, buf->id, s->buf_size);
  354. return q;
  355. }
  356. void cx18_stream_load_fw_queue(struct cx18_stream *s)
  357. {
  358. struct cx18_queue *q;
  359. struct cx18_buffer *buf;
  360. if (atomic_read(&s->q_free.buffers) == 0 ||
  361. atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM)
  362. return;
  363. /* Move from q_free to q_busy notifying the firmware, until the limit */
  364. do {
  365. buf = cx18_dequeue(s, &s->q_free);
  366. if (buf == NULL)
  367. break;
  368. q = cx18_stream_put_buf_fw(s, buf);
  369. } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM
  370. && q == &s->q_busy);
  371. }
  372. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  373. {
  374. u32 data[MAX_MB_ARGUMENTS];
  375. struct cx18 *cx = s->cx;
  376. struct cx18_buffer *buf;
  377. int ts = 0;
  378. int captype = 0;
  379. if (s->v4l2dev == NULL && s->dvb.enabled == 0)
  380. return -EINVAL;
  381. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  382. switch (s->type) {
  383. case CX18_ENC_STREAM_TYPE_MPG:
  384. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  385. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  386. cx->dualwatch_jiffies = jiffies;
  387. cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
  388. cx->search_pack_header = 0;
  389. break;
  390. case CX18_ENC_STREAM_TYPE_TS:
  391. captype = CAPTURE_CHANNEL_TYPE_TS;
  392. ts = 1;
  393. break;
  394. case CX18_ENC_STREAM_TYPE_YUV:
  395. captype = CAPTURE_CHANNEL_TYPE_YUV;
  396. break;
  397. case CX18_ENC_STREAM_TYPE_PCM:
  398. captype = CAPTURE_CHANNEL_TYPE_PCM;
  399. break;
  400. case CX18_ENC_STREAM_TYPE_VBI:
  401. captype = cx18_raw_vbi(cx) ?
  402. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  403. cx->vbi.frame = 0;
  404. cx->vbi.inserted_frame = 0;
  405. memset(cx->vbi.sliced_mpeg_size,
  406. 0, sizeof(cx->vbi.sliced_mpeg_size));
  407. break;
  408. default:
  409. return -EINVAL;
  410. }
  411. /* mute/unmute video */
  412. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
  413. s->handle, !!test_bit(CX18_F_I_RADIO_USER, &cx->i_flags));
  414. /* Clear Streamoff flags in case left from last capture */
  415. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  416. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  417. s->handle = data[0];
  418. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  419. if (atomic_read(&cx->ana_capturing) == 0 && !ts) {
  420. struct cx18_api_func_private priv;
  421. /* Stuff from Windows, we don't know what it is */
  422. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  423. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  424. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  425. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  426. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, s->handle, 12);
  427. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  428. s->handle, cx->digitizer, cx->digitizer);
  429. /* Setup VBI */
  430. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  431. cx18_vbi_setup(s);
  432. /* assign program index info.
  433. Mask 7: select I/P/B, Num_req: 400 max */
  434. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
  435. /* Setup API for Stream */
  436. priv.cx = cx;
  437. priv.s = s;
  438. cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
  439. }
  440. if (atomic_read(&cx->tot_capturing) == 0) {
  441. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  442. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  443. }
  444. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  445. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  446. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  447. /* Init all the cpu_mdls for this stream */
  448. cx18_flush_queues(s);
  449. mutex_lock(&s->qlock);
  450. list_for_each_entry(buf, &s->q_free.list, list) {
  451. cx18_writel(cx, buf->dma_handle,
  452. &cx->scb->cpu_mdl[buf->id].paddr);
  453. cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length);
  454. }
  455. mutex_unlock(&s->qlock);
  456. cx18_stream_load_fw_queue(s);
  457. /* begin_capture */
  458. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  459. CX18_DEBUG_WARN("Error starting capture!\n");
  460. /* Ensure we're really not capturing before releasing MDLs */
  461. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  462. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  463. else
  464. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  465. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  466. /* FIXME - CX18_F_S_STREAMOFF as well? */
  467. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  468. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  469. s->handle = CX18_INVALID_TASK_HANDLE;
  470. if (atomic_read(&cx->tot_capturing) == 0) {
  471. set_bit(CX18_F_I_EOS, &cx->i_flags);
  472. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  473. }
  474. return -EINVAL;
  475. }
  476. /* you're live! sit back and await interrupts :) */
  477. if (!ts)
  478. atomic_inc(&cx->ana_capturing);
  479. atomic_inc(&cx->tot_capturing);
  480. return 0;
  481. }
  482. void cx18_stop_all_captures(struct cx18 *cx)
  483. {
  484. int i;
  485. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  486. struct cx18_stream *s = &cx->streams[i];
  487. if (s->v4l2dev == NULL && s->dvb.enabled == 0)
  488. continue;
  489. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  490. cx18_stop_v4l2_encode_stream(s, 0);
  491. }
  492. }
  493. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  494. {
  495. struct cx18 *cx = s->cx;
  496. unsigned long then;
  497. if (s->v4l2dev == NULL && s->dvb.enabled == 0)
  498. return -EINVAL;
  499. /* This function assumes that you are allowed to stop the capture
  500. and that we are actually capturing */
  501. CX18_DEBUG_INFO("Stop Capture\n");
  502. if (atomic_read(&cx->tot_capturing) == 0)
  503. return 0;
  504. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  505. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  506. else
  507. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  508. then = jiffies;
  509. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  510. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  511. }
  512. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  513. atomic_dec(&cx->ana_capturing);
  514. atomic_dec(&cx->tot_capturing);
  515. /* Clear capture and no-read bits */
  516. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  517. /* Tell the CX23418 it can't use our buffers anymore */
  518. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  519. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  520. s->handle = CX18_INVALID_TASK_HANDLE;
  521. if (atomic_read(&cx->tot_capturing) > 0)
  522. return 0;
  523. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  524. wake_up(&s->waitq);
  525. return 0;
  526. }
  527. u32 cx18_find_handle(struct cx18 *cx)
  528. {
  529. int i;
  530. /* find first available handle to be used for global settings */
  531. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  532. struct cx18_stream *s = &cx->streams[i];
  533. if (s->v4l2dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  534. return s->handle;
  535. }
  536. return CX18_INVALID_TASK_HANDLE;
  537. }
  538. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  539. {
  540. int i;
  541. struct cx18_stream *s;
  542. if (handle == CX18_INVALID_TASK_HANDLE)
  543. return NULL;
  544. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  545. s = &cx->streams[i];
  546. if (s->handle != handle)
  547. continue;
  548. if (s->v4l2dev || s->dvb.enabled)
  549. return s;
  550. }
  551. return NULL;
  552. }