pluto2.c 20 KB

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  1. /*
  2. * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
  3. *
  4. * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
  5. *
  6. * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
  7. * by Dany Salman <salmandany@yahoo.fr>
  8. * Copyright (c) 2004 TDF
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. */
  25. #include <linux/i2c.h>
  26. #include <linux/i2c-algo-bit.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include "demux.h"
  33. #include "dmxdev.h"
  34. #include "dvb_demux.h"
  35. #include "dvb_frontend.h"
  36. #include "dvb_net.h"
  37. #include "dvbdev.h"
  38. #include "tda1004x.h"
  39. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  40. #define DRIVER_NAME "pluto2"
  41. #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
  42. #define REG_PCAR 0x0020 /* PC address register */
  43. #define REG_TSCR 0x0024 /* TS ctrl & status */
  44. #define REG_MISC 0x0028 /* miscellaneous */
  45. #define REG_MMAC 0x002c /* MSB MAC address */
  46. #define REG_IMAC 0x0030 /* ISB MAC address */
  47. #define REG_LMAC 0x0034 /* LSB MAC address */
  48. #define REG_SPID 0x0038 /* SPI data */
  49. #define REG_SLCS 0x003c /* serial links ctrl/status */
  50. #define PID0_NOFIL (0x0001 << 16)
  51. #define PIDn_ENP (0x0001 << 15)
  52. #define PID0_END (0x0001 << 14)
  53. #define PID0_AFIL (0x0001 << 13)
  54. #define PIDn_PID (0x1fff << 0)
  55. #define TSCR_NBPACKETS (0x00ff << 24)
  56. #define TSCR_DEM (0x0001 << 17)
  57. #define TSCR_DE (0x0001 << 16)
  58. #define TSCR_RSTN (0x0001 << 15)
  59. #define TSCR_MSKO (0x0001 << 14)
  60. #define TSCR_MSKA (0x0001 << 13)
  61. #define TSCR_MSKL (0x0001 << 12)
  62. #define TSCR_OVR (0x0001 << 11)
  63. #define TSCR_AFUL (0x0001 << 10)
  64. #define TSCR_LOCK (0x0001 << 9)
  65. #define TSCR_IACK (0x0001 << 8)
  66. #define TSCR_ADEF (0x007f << 0)
  67. #define MISC_DVR (0x0fff << 4)
  68. #define MISC_ALED (0x0001 << 3)
  69. #define MISC_FRST (0x0001 << 2)
  70. #define MISC_LED1 (0x0001 << 1)
  71. #define MISC_LED0 (0x0001 << 0)
  72. #define SPID_SPIDR (0x00ff << 0)
  73. #define SLCS_SCL (0x0001 << 7)
  74. #define SLCS_SDA (0x0001 << 6)
  75. #define SLCS_CSN (0x0001 << 2)
  76. #define SLCS_OVR (0x0001 << 1)
  77. #define SLCS_SWC (0x0001 << 0)
  78. #define TS_DMA_PACKETS (8)
  79. #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
  80. #define I2C_ADDR_TDA10046 0x10
  81. #define I2C_ADDR_TUA6034 0xc2
  82. #define NHWFILTERS 8
  83. struct pluto {
  84. /* pci */
  85. struct pci_dev *pdev;
  86. u8 __iomem *io_mem;
  87. /* dvb */
  88. struct dmx_frontend hw_frontend;
  89. struct dmx_frontend mem_frontend;
  90. struct dmxdev dmxdev;
  91. struct dvb_adapter dvb_adapter;
  92. struct dvb_demux demux;
  93. struct dvb_frontend *fe;
  94. struct dvb_net dvbnet;
  95. unsigned int full_ts_users;
  96. unsigned int users;
  97. /* i2c */
  98. struct i2c_algo_bit_data i2c_bit;
  99. struct i2c_adapter i2c_adap;
  100. unsigned int i2cbug;
  101. /* irq */
  102. unsigned int overflow;
  103. /* dma */
  104. dma_addr_t dma_addr;
  105. u8 dma_buf[TS_DMA_BYTES];
  106. u8 dummy[4096];
  107. };
  108. static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
  109. {
  110. return container_of(feed->demux, struct pluto, demux);
  111. }
  112. static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
  113. {
  114. return container_of(fe->dvb, struct pluto, dvb_adapter);
  115. }
  116. static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
  117. {
  118. return readl(&pluto->io_mem[reg]);
  119. }
  120. static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
  121. {
  122. writel(val, &pluto->io_mem[reg]);
  123. }
  124. static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
  125. {
  126. u32 val = readl(&pluto->io_mem[reg]);
  127. val &= ~mask;
  128. val |= bits;
  129. writel(val, &pluto->io_mem[reg]);
  130. }
  131. static void pluto_write_tscr(struct pluto *pluto, u32 val)
  132. {
  133. /* set the number of packets */
  134. val &= ~TSCR_ADEF;
  135. val |= TS_DMA_PACKETS / 2;
  136. pluto_writereg(pluto, REG_TSCR, val);
  137. }
  138. static void pluto_setsda(void *data, int state)
  139. {
  140. struct pluto *pluto = data;
  141. if (state)
  142. pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
  143. else
  144. pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
  145. }
  146. static void pluto_setscl(void *data, int state)
  147. {
  148. struct pluto *pluto = data;
  149. if (state)
  150. pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
  151. else
  152. pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
  153. /* try to detect i2c_inb() to workaround hardware bug:
  154. * reset SDA to high after SCL has been set to low */
  155. if ((state) && (pluto->i2cbug == 0)) {
  156. pluto->i2cbug = 1;
  157. } else {
  158. if ((!state) && (pluto->i2cbug == 1))
  159. pluto_setsda(pluto, 1);
  160. pluto->i2cbug = 0;
  161. }
  162. }
  163. static int pluto_getsda(void *data)
  164. {
  165. struct pluto *pluto = data;
  166. return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
  167. }
  168. static int pluto_getscl(void *data)
  169. {
  170. struct pluto *pluto = data;
  171. return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
  172. }
  173. static void pluto_reset_frontend(struct pluto *pluto, int reenable)
  174. {
  175. u32 val = pluto_readreg(pluto, REG_MISC);
  176. if (val & MISC_FRST) {
  177. val &= ~MISC_FRST;
  178. pluto_writereg(pluto, REG_MISC, val);
  179. }
  180. if (reenable) {
  181. val |= MISC_FRST;
  182. pluto_writereg(pluto, REG_MISC, val);
  183. }
  184. }
  185. static void pluto_reset_ts(struct pluto *pluto, int reenable)
  186. {
  187. u32 val = pluto_readreg(pluto, REG_TSCR);
  188. if (val & TSCR_RSTN) {
  189. val &= ~TSCR_RSTN;
  190. pluto_write_tscr(pluto, val);
  191. }
  192. if (reenable) {
  193. val |= TSCR_RSTN;
  194. pluto_write_tscr(pluto, val);
  195. }
  196. }
  197. static void pluto_set_dma_addr(struct pluto *pluto)
  198. {
  199. pluto_writereg(pluto, REG_PCAR, pluto->dma_addr);
  200. }
  201. static int __devinit pluto_dma_map(struct pluto *pluto)
  202. {
  203. pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
  204. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  205. return pci_dma_mapping_error(pluto->pdev, pluto->dma_addr);
  206. }
  207. static void pluto_dma_unmap(struct pluto *pluto)
  208. {
  209. pci_unmap_single(pluto->pdev, pluto->dma_addr,
  210. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  211. }
  212. static int pluto_start_feed(struct dvb_demux_feed *f)
  213. {
  214. struct pluto *pluto = feed_to_pluto(f);
  215. /* enable PID filtering */
  216. if (pluto->users++ == 0)
  217. pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
  218. if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
  219. pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
  220. else if (pluto->full_ts_users++ == 0)
  221. pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
  222. return 0;
  223. }
  224. static int pluto_stop_feed(struct dvb_demux_feed *f)
  225. {
  226. struct pluto *pluto = feed_to_pluto(f);
  227. /* disable PID filtering */
  228. if (--pluto->users == 0)
  229. pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
  230. if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
  231. pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
  232. else if (--pluto->full_ts_users == 0)
  233. pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
  234. return 0;
  235. }
  236. static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
  237. {
  238. /* synchronize the DMA transfer with the CPU
  239. * first so that we see updated contents. */
  240. pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
  241. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  242. /* Workaround for broken hardware:
  243. * [1] On startup NBPACKETS seems to contain an uninitialized value,
  244. * but no packets have been transfered.
  245. * [2] Sometimes (actually very often) NBPACKETS stays at zero
  246. * although one packet has been transfered.
  247. * [3] Sometimes (actually rarely), the card gets into an erroneous
  248. * mode where it continuously generates interrupts, claiming it
  249. * has recieved nbpackets>TS_DMA_PACKETS packets, but no packet
  250. * has been transfered. Only a reset seems to solve this
  251. */
  252. if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
  253. unsigned int i = 0;
  254. while (pluto->dma_buf[i] == 0x47)
  255. i += 188;
  256. nbpackets = i / 188;
  257. if (i == 0) {
  258. pluto_reset_ts(pluto, 1);
  259. dev_printk(KERN_DEBUG, &pluto->pdev->dev, "resetting TS because of invalid packet counter\n");
  260. }
  261. }
  262. dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
  263. /* clear the dma buffer. this is needed to be able to identify
  264. * new valid ts packets above */
  265. memset(pluto->dma_buf, 0, nbpackets * 188);
  266. /* reset the dma address */
  267. pluto_set_dma_addr(pluto);
  268. /* sync the buffer and give it back to the card */
  269. pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
  270. TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
  271. }
  272. static irqreturn_t pluto_irq(int irq, void *dev_id)
  273. {
  274. struct pluto *pluto = dev_id;
  275. u32 tscr;
  276. /* check whether an interrupt occured on this device */
  277. tscr = pluto_readreg(pluto, REG_TSCR);
  278. if (!(tscr & (TSCR_DE | TSCR_OVR)))
  279. return IRQ_NONE;
  280. if (tscr == 0xffffffff) {
  281. // FIXME: maybe recover somehow
  282. dev_err(&pluto->pdev->dev, "card hung up :(\n");
  283. return IRQ_HANDLED;
  284. }
  285. /* dma end interrupt */
  286. if (tscr & TSCR_DE) {
  287. pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
  288. /* overflow interrupt */
  289. if (tscr & TSCR_OVR)
  290. pluto->overflow++;
  291. if (pluto->overflow) {
  292. dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
  293. pluto->overflow);
  294. pluto_reset_ts(pluto, 1);
  295. pluto->overflow = 0;
  296. }
  297. } else if (tscr & TSCR_OVR) {
  298. pluto->overflow++;
  299. }
  300. /* ACK the interrupt */
  301. pluto_write_tscr(pluto, tscr | TSCR_IACK);
  302. return IRQ_HANDLED;
  303. }
  304. static void __devinit pluto_enable_irqs(struct pluto *pluto)
  305. {
  306. u32 val = pluto_readreg(pluto, REG_TSCR);
  307. /* disable AFUL and LOCK interrupts */
  308. val |= (TSCR_MSKA | TSCR_MSKL);
  309. /* enable DMA and OVERFLOW interrupts */
  310. val &= ~(TSCR_DEM | TSCR_MSKO);
  311. /* clear pending interrupts */
  312. val |= TSCR_IACK;
  313. pluto_write_tscr(pluto, val);
  314. }
  315. static void pluto_disable_irqs(struct pluto *pluto)
  316. {
  317. u32 val = pluto_readreg(pluto, REG_TSCR);
  318. /* disable all interrupts */
  319. val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
  320. /* clear pending interrupts */
  321. val |= TSCR_IACK;
  322. pluto_write_tscr(pluto, val);
  323. }
  324. static int __devinit pluto_hw_init(struct pluto *pluto)
  325. {
  326. pluto_reset_frontend(pluto, 1);
  327. /* set automatic LED control by FPGA */
  328. pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
  329. /* set data endianess */
  330. #ifdef __LITTLE_ENDIAN
  331. pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
  332. #else
  333. pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
  334. #endif
  335. /* map DMA and set address */
  336. pluto_dma_map(pluto);
  337. pluto_set_dma_addr(pluto);
  338. /* enable interrupts */
  339. pluto_enable_irqs(pluto);
  340. /* reset TS logic */
  341. pluto_reset_ts(pluto, 1);
  342. return 0;
  343. }
  344. static void pluto_hw_exit(struct pluto *pluto)
  345. {
  346. /* disable interrupts */
  347. pluto_disable_irqs(pluto);
  348. pluto_reset_ts(pluto, 0);
  349. /* LED: disable automatic control, enable yellow, disable green */
  350. pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
  351. /* unmap DMA */
  352. pluto_dma_unmap(pluto);
  353. pluto_reset_frontend(pluto, 0);
  354. }
  355. static inline u32 divide(u32 numerator, u32 denominator)
  356. {
  357. if (denominator == 0)
  358. return ~0;
  359. return (numerator + denominator / 2) / denominator;
  360. }
  361. /* LG Innotek TDTE-E001P (Infineon TUA6034) */
  362. static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe,
  363. struct dvb_frontend_parameters *p)
  364. {
  365. struct pluto *pluto = frontend_to_pluto(fe);
  366. struct i2c_msg msg;
  367. int ret;
  368. u8 buf[4];
  369. u32 div;
  370. // Fref = 166.667 Hz
  371. // Fref * 3 = 500.000 Hz
  372. // IF = 36166667
  373. // IF / Fref = 217
  374. //div = divide(p->frequency + 36166667, 166667);
  375. div = divide(p->frequency * 3, 500000) + 217;
  376. buf[0] = (div >> 8) & 0x7f;
  377. buf[1] = (div >> 0) & 0xff;
  378. if (p->frequency < 611000000)
  379. buf[2] = 0xb4;
  380. else if (p->frequency < 811000000)
  381. buf[2] = 0xbc;
  382. else
  383. buf[2] = 0xf4;
  384. // VHF: 174-230 MHz
  385. // center: 350 MHz
  386. // UHF: 470-862 MHz
  387. if (p->frequency < 350000000)
  388. buf[3] = 0x02;
  389. else
  390. buf[3] = 0x04;
  391. if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
  392. buf[3] |= 0x08;
  393. if (sizeof(buf) == 6) {
  394. buf[4] = buf[2];
  395. buf[4] &= ~0x1c;
  396. buf[4] |= 0x18;
  397. buf[5] = (0 << 7) | (2 << 4);
  398. }
  399. msg.addr = I2C_ADDR_TUA6034 >> 1;
  400. msg.flags = 0;
  401. msg.buf = buf;
  402. msg.len = sizeof(buf);
  403. if (fe->ops.i2c_gate_ctrl)
  404. fe->ops.i2c_gate_ctrl(fe, 1);
  405. ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
  406. if (ret < 0)
  407. return ret;
  408. else if (ret == 0)
  409. return -EREMOTEIO;
  410. return 0;
  411. }
  412. static int pluto2_request_firmware(struct dvb_frontend *fe,
  413. const struct firmware **fw, char *name)
  414. {
  415. struct pluto *pluto = frontend_to_pluto(fe);
  416. return request_firmware(fw, name, &pluto->pdev->dev);
  417. }
  418. static struct tda1004x_config pluto2_fe_config __devinitdata = {
  419. .demod_address = I2C_ADDR_TDA10046 >> 1,
  420. .invert = 1,
  421. .invert_oclk = 0,
  422. .xtal_freq = TDA10046_XTAL_16M,
  423. .agc_config = TDA10046_AGC_DEFAULT,
  424. .if_freq = TDA10046_FREQ_3617,
  425. .request_firmware = pluto2_request_firmware,
  426. };
  427. static int __devinit frontend_init(struct pluto *pluto)
  428. {
  429. int ret;
  430. pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
  431. if (!pluto->fe) {
  432. dev_err(&pluto->pdev->dev, "could not attach frontend\n");
  433. return -ENODEV;
  434. }
  435. pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params;
  436. ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
  437. if (ret < 0) {
  438. if (pluto->fe->ops.release)
  439. pluto->fe->ops.release(pluto->fe);
  440. return ret;
  441. }
  442. return 0;
  443. }
  444. static void __devinit pluto_read_rev(struct pluto *pluto)
  445. {
  446. u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
  447. dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
  448. (val >> 12) & 0x0f, (val >> 4) & 0xff);
  449. }
  450. static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
  451. {
  452. u32 val = pluto_readreg(pluto, REG_MMAC);
  453. mac[0] = (val >> 8) & 0xff;
  454. mac[1] = (val >> 0) & 0xff;
  455. val = pluto_readreg(pluto, REG_IMAC);
  456. mac[2] = (val >> 8) & 0xff;
  457. mac[3] = (val >> 0) & 0xff;
  458. val = pluto_readreg(pluto, REG_LMAC);
  459. mac[4] = (val >> 8) & 0xff;
  460. mac[5] = (val >> 0) & 0xff;
  461. dev_info(&pluto->pdev->dev, "MAC %pM\n", mac);
  462. }
  463. static int __devinit pluto_read_serial(struct pluto *pluto)
  464. {
  465. struct pci_dev *pdev = pluto->pdev;
  466. unsigned int i, j;
  467. u8 __iomem *cis;
  468. cis = pci_iomap(pdev, 1, 0);
  469. if (!cis)
  470. return -EIO;
  471. dev_info(&pdev->dev, "S/N ");
  472. for (i = 0xe0; i < 0x100; i += 4) {
  473. u32 val = readl(&cis[i]);
  474. for (j = 0; j < 32; j += 8) {
  475. if ((val & 0xff) == 0xff)
  476. goto out;
  477. printk("%c", val & 0xff);
  478. val >>= 8;
  479. }
  480. }
  481. out:
  482. printk("\n");
  483. pci_iounmap(pdev, cis);
  484. return 0;
  485. }
  486. static int __devinit pluto2_probe(struct pci_dev *pdev,
  487. const struct pci_device_id *ent)
  488. {
  489. struct pluto *pluto;
  490. struct dvb_adapter *dvb_adapter;
  491. struct dvb_demux *dvbdemux;
  492. struct dmx_demux *dmx;
  493. int ret = -ENOMEM;
  494. pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL);
  495. if (!pluto)
  496. goto out;
  497. pluto->pdev = pdev;
  498. ret = pci_enable_device(pdev);
  499. if (ret < 0)
  500. goto err_kfree;
  501. /* enable interrupts */
  502. pci_write_config_dword(pdev, 0x6c, 0x8000);
  503. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  504. if (ret < 0)
  505. goto err_pci_disable_device;
  506. pci_set_master(pdev);
  507. ret = pci_request_regions(pdev, DRIVER_NAME);
  508. if (ret < 0)
  509. goto err_pci_disable_device;
  510. pluto->io_mem = pci_iomap(pdev, 0, 0x40);
  511. if (!pluto->io_mem) {
  512. ret = -EIO;
  513. goto err_pci_release_regions;
  514. }
  515. pci_set_drvdata(pdev, pluto);
  516. ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto);
  517. if (ret < 0)
  518. goto err_pci_iounmap;
  519. ret = pluto_hw_init(pluto);
  520. if (ret < 0)
  521. goto err_free_irq;
  522. /* i2c */
  523. i2c_set_adapdata(&pluto->i2c_adap, pluto);
  524. strcpy(pluto->i2c_adap.name, DRIVER_NAME);
  525. pluto->i2c_adap.owner = THIS_MODULE;
  526. pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  527. pluto->i2c_adap.dev.parent = &pdev->dev;
  528. pluto->i2c_adap.algo_data = &pluto->i2c_bit;
  529. pluto->i2c_bit.data = pluto;
  530. pluto->i2c_bit.setsda = pluto_setsda;
  531. pluto->i2c_bit.setscl = pluto_setscl;
  532. pluto->i2c_bit.getsda = pluto_getsda;
  533. pluto->i2c_bit.getscl = pluto_getscl;
  534. pluto->i2c_bit.udelay = 10;
  535. pluto->i2c_bit.timeout = 10;
  536. /* Raise SCL and SDA */
  537. pluto_setsda(pluto, 1);
  538. pluto_setscl(pluto, 1);
  539. ret = i2c_bit_add_bus(&pluto->i2c_adap);
  540. if (ret < 0)
  541. goto err_pluto_hw_exit;
  542. /* dvb */
  543. ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME,
  544. THIS_MODULE, &pdev->dev, adapter_nr);
  545. if (ret < 0)
  546. goto err_i2c_del_adapter;
  547. dvb_adapter = &pluto->dvb_adapter;
  548. pluto_read_rev(pluto);
  549. pluto_read_serial(pluto);
  550. pluto_read_mac(pluto, dvb_adapter->proposed_mac);
  551. dvbdemux = &pluto->demux;
  552. dvbdemux->filternum = 256;
  553. dvbdemux->feednum = 256;
  554. dvbdemux->start_feed = pluto_start_feed;
  555. dvbdemux->stop_feed = pluto_stop_feed;
  556. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  557. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  558. ret = dvb_dmx_init(dvbdemux);
  559. if (ret < 0)
  560. goto err_dvb_unregister_adapter;
  561. dmx = &dvbdemux->dmx;
  562. pluto->hw_frontend.source = DMX_FRONTEND_0;
  563. pluto->mem_frontend.source = DMX_MEMORY_FE;
  564. pluto->dmxdev.filternum = NHWFILTERS;
  565. pluto->dmxdev.demux = dmx;
  566. ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
  567. if (ret < 0)
  568. goto err_dvb_dmx_release;
  569. ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
  570. if (ret < 0)
  571. goto err_dvb_dmxdev_release;
  572. ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
  573. if (ret < 0)
  574. goto err_remove_hw_frontend;
  575. ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
  576. if (ret < 0)
  577. goto err_remove_mem_frontend;
  578. ret = frontend_init(pluto);
  579. if (ret < 0)
  580. goto err_disconnect_frontend;
  581. dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
  582. out:
  583. return ret;
  584. err_disconnect_frontend:
  585. dmx->disconnect_frontend(dmx);
  586. err_remove_mem_frontend:
  587. dmx->remove_frontend(dmx, &pluto->mem_frontend);
  588. err_remove_hw_frontend:
  589. dmx->remove_frontend(dmx, &pluto->hw_frontend);
  590. err_dvb_dmxdev_release:
  591. dvb_dmxdev_release(&pluto->dmxdev);
  592. err_dvb_dmx_release:
  593. dvb_dmx_release(dvbdemux);
  594. err_dvb_unregister_adapter:
  595. dvb_unregister_adapter(dvb_adapter);
  596. err_i2c_del_adapter:
  597. i2c_del_adapter(&pluto->i2c_adap);
  598. err_pluto_hw_exit:
  599. pluto_hw_exit(pluto);
  600. err_free_irq:
  601. free_irq(pdev->irq, pluto);
  602. err_pci_iounmap:
  603. pci_iounmap(pdev, pluto->io_mem);
  604. err_pci_release_regions:
  605. pci_release_regions(pdev);
  606. err_pci_disable_device:
  607. pci_disable_device(pdev);
  608. err_kfree:
  609. pci_set_drvdata(pdev, NULL);
  610. kfree(pluto);
  611. goto out;
  612. }
  613. static void __devexit pluto2_remove(struct pci_dev *pdev)
  614. {
  615. struct pluto *pluto = pci_get_drvdata(pdev);
  616. struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
  617. struct dvb_demux *dvbdemux = &pluto->demux;
  618. struct dmx_demux *dmx = &dvbdemux->dmx;
  619. dmx->close(dmx);
  620. dvb_net_release(&pluto->dvbnet);
  621. if (pluto->fe)
  622. dvb_unregister_frontend(pluto->fe);
  623. dmx->disconnect_frontend(dmx);
  624. dmx->remove_frontend(dmx, &pluto->mem_frontend);
  625. dmx->remove_frontend(dmx, &pluto->hw_frontend);
  626. dvb_dmxdev_release(&pluto->dmxdev);
  627. dvb_dmx_release(dvbdemux);
  628. dvb_unregister_adapter(dvb_adapter);
  629. i2c_del_adapter(&pluto->i2c_adap);
  630. pluto_hw_exit(pluto);
  631. free_irq(pdev->irq, pluto);
  632. pci_iounmap(pdev, pluto->io_mem);
  633. pci_release_regions(pdev);
  634. pci_disable_device(pdev);
  635. pci_set_drvdata(pdev, NULL);
  636. kfree(pluto);
  637. }
  638. #ifndef PCI_VENDOR_ID_SCM
  639. #define PCI_VENDOR_ID_SCM 0x0432
  640. #endif
  641. #ifndef PCI_DEVICE_ID_PLUTO2
  642. #define PCI_DEVICE_ID_PLUTO2 0x0001
  643. #endif
  644. static struct pci_device_id pluto2_id_table[] __devinitdata = {
  645. {
  646. .vendor = PCI_VENDOR_ID_SCM,
  647. .device = PCI_DEVICE_ID_PLUTO2,
  648. .subvendor = PCI_ANY_ID,
  649. .subdevice = PCI_ANY_ID,
  650. }, {
  651. /* empty */
  652. },
  653. };
  654. MODULE_DEVICE_TABLE(pci, pluto2_id_table);
  655. static struct pci_driver pluto2_driver = {
  656. .name = DRIVER_NAME,
  657. .id_table = pluto2_id_table,
  658. .probe = pluto2_probe,
  659. .remove = __devexit_p(pluto2_remove),
  660. };
  661. static int __init pluto2_init(void)
  662. {
  663. return pci_register_driver(&pluto2_driver);
  664. }
  665. static void __exit pluto2_exit(void)
  666. {
  667. pci_unregister_driver(&pluto2_driver);
  668. }
  669. module_init(pluto2_init);
  670. module_exit(pluto2_exit);
  671. MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
  672. MODULE_DESCRIPTION("Pluto2 driver");
  673. MODULE_LICENSE("GPL");