cx22702.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641
  1. /*
  2. Conexant 22702 DVB OFDM demodulator driver
  3. based on:
  4. Alps TDMB7 DVB OFDM demodulator driver
  5. Copyright (C) 2001-2002 Convergence Integrated Media GmbH
  6. Holger Waechtler <holger@convergence.de>
  7. Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/string.h>
  24. #include <linux/slab.h>
  25. #include <linux/delay.h>
  26. #include "dvb_frontend.h"
  27. #include "cx22702.h"
  28. struct cx22702_state {
  29. struct i2c_adapter *i2c;
  30. /* configuration settings */
  31. const struct cx22702_config *config;
  32. struct dvb_frontend frontend;
  33. /* previous uncorrected block counter */
  34. u8 prevUCBlocks;
  35. };
  36. static int debug;
  37. module_param(debug, int, 0644);
  38. MODULE_PARM_DESC(debug, "Enable verbose debug messages");
  39. #define dprintk if (debug) printk
  40. /* Register values to initialise the demod */
  41. static u8 init_tab[] = {
  42. 0x00, 0x00, /* Stop aquisition */
  43. 0x0B, 0x06,
  44. 0x09, 0x01,
  45. 0x0D, 0x41,
  46. 0x16, 0x32,
  47. 0x20, 0x0A,
  48. 0x21, 0x17,
  49. 0x24, 0x3e,
  50. 0x26, 0xff,
  51. 0x27, 0x10,
  52. 0x28, 0x00,
  53. 0x29, 0x00,
  54. 0x2a, 0x10,
  55. 0x2b, 0x00,
  56. 0x2c, 0x10,
  57. 0x2d, 0x00,
  58. 0x48, 0xd4,
  59. 0x49, 0x56,
  60. 0x6b, 0x1e,
  61. 0xc8, 0x02,
  62. 0xf9, 0x00,
  63. 0xfa, 0x00,
  64. 0xfb, 0x00,
  65. 0xfc, 0x00,
  66. 0xfd, 0x00,
  67. };
  68. static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
  69. {
  70. int ret;
  71. u8 buf[] = { reg, data };
  72. struct i2c_msg msg = {
  73. .addr = state->config->demod_address, .flags = 0,
  74. .buf = buf, .len = 2 };
  75. ret = i2c_transfer(state->i2c, &msg, 1);
  76. if (ret != 1)
  77. printk(KERN_ERR
  78. "%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  79. __func__, reg, data, ret);
  80. return (ret != 1) ? -1 : 0;
  81. }
  82. static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
  83. {
  84. int ret;
  85. u8 b0[] = { reg };
  86. u8 b1[] = { 0 };
  87. struct i2c_msg msg[] = {
  88. { .addr = state->config->demod_address, .flags = 0,
  89. .buf = b0, .len = 1 },
  90. { .addr = state->config->demod_address, .flags = I2C_M_RD,
  91. .buf = b1, .len = 1 } };
  92. ret = i2c_transfer(state->i2c, msg, 2);
  93. if (ret != 2)
  94. printk(KERN_ERR "%s: readreg error (ret == %i)\n",
  95. __func__, ret);
  96. return b1[0];
  97. }
  98. static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
  99. {
  100. u8 val;
  101. switch (inversion) {
  102. case INVERSION_AUTO:
  103. return -EOPNOTSUPP;
  104. case INVERSION_ON:
  105. val = cx22702_readreg(state, 0x0C);
  106. return cx22702_writereg(state, 0x0C, val | 0x01);
  107. case INVERSION_OFF:
  108. val = cx22702_readreg(state, 0x0C);
  109. return cx22702_writereg(state, 0x0C, val & 0xfe);
  110. default:
  111. return -EINVAL;
  112. }
  113. }
  114. /* Retrieve the demod settings */
  115. static int cx22702_get_tps(struct cx22702_state *state,
  116. struct dvb_ofdm_parameters *p)
  117. {
  118. u8 val;
  119. /* Make sure the TPS regs are valid */
  120. if (!(cx22702_readreg(state, 0x0A) & 0x20))
  121. return -EAGAIN;
  122. val = cx22702_readreg(state, 0x01);
  123. switch ((val & 0x18) >> 3) {
  124. case 0:
  125. p->constellation = QPSK;
  126. break;
  127. case 1:
  128. p->constellation = QAM_16;
  129. break;
  130. case 2:
  131. p->constellation = QAM_64;
  132. break;
  133. }
  134. switch (val & 0x07) {
  135. case 0:
  136. p->hierarchy_information = HIERARCHY_NONE;
  137. break;
  138. case 1:
  139. p->hierarchy_information = HIERARCHY_1;
  140. break;
  141. case 2:
  142. p->hierarchy_information = HIERARCHY_2;
  143. break;
  144. case 3:
  145. p->hierarchy_information = HIERARCHY_4;
  146. break;
  147. }
  148. val = cx22702_readreg(state, 0x02);
  149. switch ((val & 0x38) >> 3) {
  150. case 0:
  151. p->code_rate_HP = FEC_1_2;
  152. break;
  153. case 1:
  154. p->code_rate_HP = FEC_2_3;
  155. break;
  156. case 2:
  157. p->code_rate_HP = FEC_3_4;
  158. break;
  159. case 3:
  160. p->code_rate_HP = FEC_5_6;
  161. break;
  162. case 4:
  163. p->code_rate_HP = FEC_7_8;
  164. break;
  165. }
  166. switch (val & 0x07) {
  167. case 0:
  168. p->code_rate_LP = FEC_1_2;
  169. break;
  170. case 1:
  171. p->code_rate_LP = FEC_2_3;
  172. break;
  173. case 2:
  174. p->code_rate_LP = FEC_3_4;
  175. break;
  176. case 3:
  177. p->code_rate_LP = FEC_5_6;
  178. break;
  179. case 4:
  180. p->code_rate_LP = FEC_7_8;
  181. break;
  182. }
  183. val = cx22702_readreg(state, 0x03);
  184. switch ((val & 0x0c) >> 2) {
  185. case 0:
  186. p->guard_interval = GUARD_INTERVAL_1_32;
  187. break;
  188. case 1:
  189. p->guard_interval = GUARD_INTERVAL_1_16;
  190. break;
  191. case 2:
  192. p->guard_interval = GUARD_INTERVAL_1_8;
  193. break;
  194. case 3:
  195. p->guard_interval = GUARD_INTERVAL_1_4;
  196. break;
  197. }
  198. switch (val & 0x03) {
  199. case 0:
  200. p->transmission_mode = TRANSMISSION_MODE_2K;
  201. break;
  202. case 1:
  203. p->transmission_mode = TRANSMISSION_MODE_8K;
  204. break;
  205. }
  206. return 0;
  207. }
  208. static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  209. {
  210. struct cx22702_state *state = fe->demodulator_priv;
  211. dprintk("%s(%d)\n", __func__, enable);
  212. if (enable)
  213. return cx22702_writereg(state, 0x0D,
  214. cx22702_readreg(state, 0x0D) & 0xfe);
  215. else
  216. return cx22702_writereg(state, 0x0D,
  217. cx22702_readreg(state, 0x0D) | 1);
  218. }
  219. /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
  220. static int cx22702_set_tps(struct dvb_frontend *fe,
  221. struct dvb_frontend_parameters *p)
  222. {
  223. u8 val;
  224. struct cx22702_state *state = fe->demodulator_priv;
  225. if (fe->ops.tuner_ops.set_params) {
  226. fe->ops.tuner_ops.set_params(fe, p);
  227. if (fe->ops.i2c_gate_ctrl)
  228. fe->ops.i2c_gate_ctrl(fe, 0);
  229. }
  230. /* set inversion */
  231. cx22702_set_inversion(state, p->inversion);
  232. /* set bandwidth */
  233. switch (p->u.ofdm.bandwidth) {
  234. case BANDWIDTH_6_MHZ:
  235. cx22702_writereg(state, 0x0C,
  236. (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20);
  237. break;
  238. case BANDWIDTH_7_MHZ:
  239. cx22702_writereg(state, 0x0C,
  240. (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10);
  241. break;
  242. case BANDWIDTH_8_MHZ:
  243. cx22702_writereg(state, 0x0C,
  244. cx22702_readreg(state, 0x0C) & 0xcf);
  245. break;
  246. default:
  247. dprintk("%s: invalid bandwidth\n", __func__);
  248. return -EINVAL;
  249. }
  250. p->u.ofdm.code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
  251. /* use auto configuration? */
  252. if ((p->u.ofdm.hierarchy_information == HIERARCHY_AUTO) ||
  253. (p->u.ofdm.constellation == QAM_AUTO) ||
  254. (p->u.ofdm.code_rate_HP == FEC_AUTO) ||
  255. (p->u.ofdm.code_rate_LP == FEC_AUTO) ||
  256. (p->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO) ||
  257. (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO)) {
  258. /* TPS Source - use hardware driven values */
  259. cx22702_writereg(state, 0x06, 0x10);
  260. cx22702_writereg(state, 0x07, 0x9);
  261. cx22702_writereg(state, 0x08, 0xC1);
  262. cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B)
  263. & 0xfc);
  264. cx22702_writereg(state, 0x0C,
  265. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  266. cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
  267. dprintk("%s: Autodetecting\n", __func__);
  268. return 0;
  269. }
  270. /* manually programmed values */
  271. val = 0;
  272. switch (p->u.ofdm.constellation) {
  273. case QPSK:
  274. val = (val & 0xe7);
  275. break;
  276. case QAM_16:
  277. val = (val & 0xe7) | 0x08;
  278. break;
  279. case QAM_64:
  280. val = (val & 0xe7) | 0x10;
  281. break;
  282. default:
  283. dprintk("%s: invalid constellation\n", __func__);
  284. return -EINVAL;
  285. }
  286. switch (p->u.ofdm.hierarchy_information) {
  287. case HIERARCHY_NONE:
  288. val = (val & 0xf8);
  289. break;
  290. case HIERARCHY_1:
  291. val = (val & 0xf8) | 1;
  292. break;
  293. case HIERARCHY_2:
  294. val = (val & 0xf8) | 2;
  295. break;
  296. case HIERARCHY_4:
  297. val = (val & 0xf8) | 3;
  298. break;
  299. default:
  300. dprintk("%s: invalid hierarchy\n", __func__);
  301. return -EINVAL;
  302. }
  303. cx22702_writereg(state, 0x06, val);
  304. val = 0;
  305. switch (p->u.ofdm.code_rate_HP) {
  306. case FEC_NONE:
  307. case FEC_1_2:
  308. val = (val & 0xc7);
  309. break;
  310. case FEC_2_3:
  311. val = (val & 0xc7) | 0x08;
  312. break;
  313. case FEC_3_4:
  314. val = (val & 0xc7) | 0x10;
  315. break;
  316. case FEC_5_6:
  317. val = (val & 0xc7) | 0x18;
  318. break;
  319. case FEC_7_8:
  320. val = (val & 0xc7) | 0x20;
  321. break;
  322. default:
  323. dprintk("%s: invalid code_rate_HP\n", __func__);
  324. return -EINVAL;
  325. }
  326. switch (p->u.ofdm.code_rate_LP) {
  327. case FEC_NONE:
  328. case FEC_1_2:
  329. val = (val & 0xf8);
  330. break;
  331. case FEC_2_3:
  332. val = (val & 0xf8) | 1;
  333. break;
  334. case FEC_3_4:
  335. val = (val & 0xf8) | 2;
  336. break;
  337. case FEC_5_6:
  338. val = (val & 0xf8) | 3;
  339. break;
  340. case FEC_7_8:
  341. val = (val & 0xf8) | 4;
  342. break;
  343. default:
  344. dprintk("%s: invalid code_rate_LP\n", __func__);
  345. return -EINVAL;
  346. }
  347. cx22702_writereg(state, 0x07, val);
  348. val = 0;
  349. switch (p->u.ofdm.guard_interval) {
  350. case GUARD_INTERVAL_1_32:
  351. val = (val & 0xf3);
  352. break;
  353. case GUARD_INTERVAL_1_16:
  354. val = (val & 0xf3) | 0x04;
  355. break;
  356. case GUARD_INTERVAL_1_8:
  357. val = (val & 0xf3) | 0x08;
  358. break;
  359. case GUARD_INTERVAL_1_4:
  360. val = (val & 0xf3) | 0x0c;
  361. break;
  362. default:
  363. dprintk("%s: invalid guard_interval\n", __func__);
  364. return -EINVAL;
  365. }
  366. switch (p->u.ofdm.transmission_mode) {
  367. case TRANSMISSION_MODE_2K:
  368. val = (val & 0xfc);
  369. break;
  370. case TRANSMISSION_MODE_8K:
  371. val = (val & 0xfc) | 1;
  372. break;
  373. default:
  374. dprintk("%s: invalid transmission_mode\n", __func__);
  375. return -EINVAL;
  376. }
  377. cx22702_writereg(state, 0x08, val);
  378. cx22702_writereg(state, 0x0B,
  379. (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02);
  380. cx22702_writereg(state, 0x0C,
  381. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  382. /* Begin channel aquisition */
  383. cx22702_writereg(state, 0x00, 0x01);
  384. return 0;
  385. }
  386. /* Reset the demod hardware and reset all of the configuration registers
  387. to a default state. */
  388. static int cx22702_init(struct dvb_frontend *fe)
  389. {
  390. int i;
  391. struct cx22702_state *state = fe->demodulator_priv;
  392. cx22702_writereg(state, 0x00, 0x02);
  393. msleep(10);
  394. for (i = 0; i < ARRAY_SIZE(init_tab); i += 2)
  395. cx22702_writereg(state, init_tab[i], init_tab[i + 1]);
  396. cx22702_writereg(state, 0xf8, (state->config->output_mode << 1)
  397. & 0x02);
  398. cx22702_i2c_gate_ctrl(fe, 0);
  399. return 0;
  400. }
  401. static int cx22702_read_status(struct dvb_frontend *fe, fe_status_t *status)
  402. {
  403. struct cx22702_state *state = fe->demodulator_priv;
  404. u8 reg0A;
  405. u8 reg23;
  406. *status = 0;
  407. reg0A = cx22702_readreg(state, 0x0A);
  408. reg23 = cx22702_readreg(state, 0x23);
  409. dprintk("%s: status demod=0x%02x agc=0x%02x\n"
  410. , __func__, reg0A, reg23);
  411. if (reg0A & 0x10) {
  412. *status |= FE_HAS_LOCK;
  413. *status |= FE_HAS_VITERBI;
  414. *status |= FE_HAS_SYNC;
  415. }
  416. if (reg0A & 0x20)
  417. *status |= FE_HAS_CARRIER;
  418. if (reg23 < 0xf0)
  419. *status |= FE_HAS_SIGNAL;
  420. return 0;
  421. }
  422. static int cx22702_read_ber(struct dvb_frontend *fe, u32 *ber)
  423. {
  424. struct cx22702_state *state = fe->demodulator_priv;
  425. if (cx22702_readreg(state, 0xE4) & 0x02) {
  426. /* Realtime statistics */
  427. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  428. | (cx22702_readreg(state, 0xDF) & 0x7F);
  429. } else {
  430. /* Averagtine statistics */
  431. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  432. | cx22702_readreg(state, 0xDF);
  433. }
  434. return 0;
  435. }
  436. static int cx22702_read_signal_strength(struct dvb_frontend *fe,
  437. u16 *signal_strength)
  438. {
  439. struct cx22702_state *state = fe->demodulator_priv;
  440. u16 rs_ber = 0;
  441. rs_ber = cx22702_readreg(state, 0x23);
  442. *signal_strength = (rs_ber << 8) | rs_ber;
  443. return 0;
  444. }
  445. static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr)
  446. {
  447. struct cx22702_state *state = fe->demodulator_priv;
  448. u16 rs_ber = 0;
  449. if (cx22702_readreg(state, 0xE4) & 0x02) {
  450. /* Realtime statistics */
  451. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  452. | (cx22702_readreg(state, 0xDF) & 0x7F);
  453. } else {
  454. /* Averagine statistics */
  455. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8
  456. | cx22702_readreg(state, 0xDF);
  457. }
  458. *snr = ~rs_ber;
  459. return 0;
  460. }
  461. static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  462. {
  463. struct cx22702_state *state = fe->demodulator_priv;
  464. u8 _ucblocks;
  465. /* RS Uncorrectable Packet Count then reset */
  466. _ucblocks = cx22702_readreg(state, 0xE3);
  467. if (state->prevUCBlocks < _ucblocks)
  468. *ucblocks = (_ucblocks - state->prevUCBlocks);
  469. else
  470. *ucblocks = state->prevUCBlocks - _ucblocks;
  471. state->prevUCBlocks = _ucblocks;
  472. return 0;
  473. }
  474. static int cx22702_get_frontend(struct dvb_frontend *fe,
  475. struct dvb_frontend_parameters *p)
  476. {
  477. struct cx22702_state *state = fe->demodulator_priv;
  478. u8 reg0C = cx22702_readreg(state, 0x0C);
  479. p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
  480. return cx22702_get_tps(state, &p->u.ofdm);
  481. }
  482. static int cx22702_get_tune_settings(struct dvb_frontend *fe,
  483. struct dvb_frontend_tune_settings *tune)
  484. {
  485. tune->min_delay_ms = 1000;
  486. return 0;
  487. }
  488. static void cx22702_release(struct dvb_frontend *fe)
  489. {
  490. struct cx22702_state *state = fe->demodulator_priv;
  491. kfree(state);
  492. }
  493. static struct dvb_frontend_ops cx22702_ops;
  494. struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
  495. struct i2c_adapter *i2c)
  496. {
  497. struct cx22702_state *state = NULL;
  498. /* allocate memory for the internal state */
  499. state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
  500. if (state == NULL)
  501. goto error;
  502. /* setup the state */
  503. state->config = config;
  504. state->i2c = i2c;
  505. state->prevUCBlocks = 0;
  506. /* check if the demod is there */
  507. if (cx22702_readreg(state, 0x1f) != 0x3)
  508. goto error;
  509. /* create dvb_frontend */
  510. memcpy(&state->frontend.ops, &cx22702_ops,
  511. sizeof(struct dvb_frontend_ops));
  512. state->frontend.demodulator_priv = state;
  513. return &state->frontend;
  514. error:
  515. kfree(state);
  516. return NULL;
  517. }
  518. EXPORT_SYMBOL(cx22702_attach);
  519. static struct dvb_frontend_ops cx22702_ops = {
  520. .info = {
  521. .name = "Conexant CX22702 DVB-T",
  522. .type = FE_OFDM,
  523. .frequency_min = 177000000,
  524. .frequency_max = 858000000,
  525. .frequency_stepsize = 166666,
  526. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  527. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  528. FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
  529. FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
  530. FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
  531. },
  532. .release = cx22702_release,
  533. .init = cx22702_init,
  534. .i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
  535. .set_frontend = cx22702_set_tps,
  536. .get_frontend = cx22702_get_frontend,
  537. .get_tune_settings = cx22702_get_tune_settings,
  538. .read_status = cx22702_read_status,
  539. .read_ber = cx22702_read_ber,
  540. .read_signal_strength = cx22702_read_signal_strength,
  541. .read_snr = cx22702_read_snr,
  542. .read_ucblocks = cx22702_read_ucblocks,
  543. };
  544. MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
  545. MODULE_AUTHOR("Steven Toth");
  546. MODULE_LICENSE("GPL");