af9013.c 37 KB

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  1. /*
  2. * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver
  3. *
  4. * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
  5. *
  6. * Thanks to Afatech who kindly provided information.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/string.h>
  29. #include <linux/slab.h>
  30. #include <linux/firmware.h>
  31. #include "dvb_frontend.h"
  32. #include "af9013_priv.h"
  33. #include "af9013.h"
  34. int af9013_debug;
  35. struct af9013_state {
  36. struct i2c_adapter *i2c;
  37. struct dvb_frontend frontend;
  38. struct af9013_config config;
  39. u16 signal_strength;
  40. u32 ber;
  41. u32 ucblocks;
  42. u16 snr;
  43. u32 frequency;
  44. unsigned long next_statistics_check;
  45. };
  46. static u8 regmask[8] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };
  47. static int af9013_write_regs(struct af9013_state *state, u8 mbox, u16 reg,
  48. u8 *val, u8 len)
  49. {
  50. u8 buf[3+len];
  51. struct i2c_msg msg = {
  52. .addr = state->config.demod_address,
  53. .flags = 0,
  54. .len = sizeof(buf),
  55. .buf = buf };
  56. buf[0] = reg >> 8;
  57. buf[1] = reg & 0xff;
  58. buf[2] = mbox;
  59. memcpy(&buf[3], val, len);
  60. if (i2c_transfer(state->i2c, &msg, 1) != 1) {
  61. warn("I2C write failed reg:%04x len:%d", reg, len);
  62. return -EREMOTEIO;
  63. }
  64. return 0;
  65. }
  66. static int af9013_write_ofdm_regs(struct af9013_state *state, u16 reg, u8 *val,
  67. u8 len)
  68. {
  69. u8 mbox = (1 << 0)|(1 << 1)|((len - 1) << 2)|(0 << 6)|(0 << 7);
  70. return af9013_write_regs(state, mbox, reg, val, len);
  71. }
  72. static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
  73. u8 len)
  74. {
  75. u8 mbox = (1 << 0)|(1 << 1)|((len - 1) << 2)|(1 << 6)|(1 << 7);
  76. return af9013_write_regs(state, mbox, reg, val, len);
  77. }
  78. /* write single register */
  79. static int af9013_write_reg(struct af9013_state *state, u16 reg, u8 val)
  80. {
  81. return af9013_write_ofdm_regs(state, reg, &val, 1);
  82. }
  83. /* read single register */
  84. static int af9013_read_reg(struct af9013_state *state, u16 reg, u8 *val)
  85. {
  86. u8 obuf[3] = { reg >> 8, reg & 0xff, 0 };
  87. u8 ibuf[1];
  88. struct i2c_msg msg[2] = {
  89. {
  90. .addr = state->config.demod_address,
  91. .flags = 0,
  92. .len = sizeof(obuf),
  93. .buf = obuf
  94. }, {
  95. .addr = state->config.demod_address,
  96. .flags = I2C_M_RD,
  97. .len = sizeof(ibuf),
  98. .buf = ibuf
  99. }
  100. };
  101. if (i2c_transfer(state->i2c, msg, 2) != 2) {
  102. warn("I2C read failed reg:%04x", reg);
  103. return -EREMOTEIO;
  104. }
  105. *val = ibuf[0];
  106. return 0;
  107. }
  108. static int af9013_write_reg_bits(struct af9013_state *state, u16 reg, u8 pos,
  109. u8 len, u8 val)
  110. {
  111. int ret;
  112. u8 tmp, mask;
  113. ret = af9013_read_reg(state, reg, &tmp);
  114. if (ret)
  115. return ret;
  116. mask = regmask[len - 1] << pos;
  117. tmp = (tmp & ~mask) | ((val << pos) & mask);
  118. return af9013_write_reg(state, reg, tmp);
  119. }
  120. static int af9013_read_reg_bits(struct af9013_state *state, u16 reg, u8 pos,
  121. u8 len, u8 *val)
  122. {
  123. int ret;
  124. u8 tmp;
  125. ret = af9013_read_reg(state, reg, &tmp);
  126. if (ret)
  127. return ret;
  128. *val = (tmp >> pos) & regmask[len - 1];
  129. return 0;
  130. }
  131. static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
  132. {
  133. int ret;
  134. u8 pos;
  135. u16 addr;
  136. deb_info("%s: gpio:%d gpioval:%02x\n", __func__, gpio, gpioval);
  137. /* GPIO0 & GPIO1 0xd735
  138. GPIO2 & GPIO3 0xd736 */
  139. switch (gpio) {
  140. case 0:
  141. case 1:
  142. addr = 0xd735;
  143. break;
  144. case 2:
  145. case 3:
  146. addr = 0xd736;
  147. break;
  148. default:
  149. err("invalid gpio:%d\n", gpio);
  150. ret = -EINVAL;
  151. goto error;
  152. };
  153. switch (gpio) {
  154. case 0:
  155. case 2:
  156. pos = 0;
  157. break;
  158. case 1:
  159. case 3:
  160. default:
  161. pos = 4;
  162. break;
  163. };
  164. ret = af9013_write_reg_bits(state, addr, pos, 4, gpioval);
  165. error:
  166. return ret;
  167. }
  168. static u32 af913_div(u32 a, u32 b, u32 x)
  169. {
  170. u32 r = 0, c = 0, i;
  171. deb_info("%s: a:%d b:%d x:%d\n", __func__, a, b, x);
  172. if (a > b) {
  173. c = a / b;
  174. a = a - c * b;
  175. }
  176. for (i = 0; i < x; i++) {
  177. if (a >= b) {
  178. r += 1;
  179. a -= b;
  180. }
  181. a <<= 1;
  182. r <<= 1;
  183. }
  184. r = (c << (u32)x) + r;
  185. deb_info("%s: a:%d b:%d x:%d r:%d r:%x\n", __func__, a, b, x, r, r);
  186. return r;
  187. }
  188. static int af9013_set_coeff(struct af9013_state *state, fe_bandwidth_t bw)
  189. {
  190. int ret = 0;
  191. u8 i = 0;
  192. u8 buf[24];
  193. u32 uninitialized_var(ns_coeff1_2048nu);
  194. u32 uninitialized_var(ns_coeff1_8191nu);
  195. u32 uninitialized_var(ns_coeff1_8192nu);
  196. u32 uninitialized_var(ns_coeff1_8193nu);
  197. u32 uninitialized_var(ns_coeff2_2k);
  198. u32 uninitialized_var(ns_coeff2_8k);
  199. deb_info("%s: adc_clock:%d bw:%d\n", __func__,
  200. state->config.adc_clock, bw);
  201. switch (state->config.adc_clock) {
  202. case 28800: /* 28.800 MHz */
  203. switch (bw) {
  204. case BANDWIDTH_6_MHZ:
  205. ns_coeff1_2048nu = 0x01e79e7a;
  206. ns_coeff1_8191nu = 0x0079eb6e;
  207. ns_coeff1_8192nu = 0x0079e79e;
  208. ns_coeff1_8193nu = 0x0079e3cf;
  209. ns_coeff2_2k = 0x00f3cf3d;
  210. ns_coeff2_8k = 0x003cf3cf;
  211. break;
  212. case BANDWIDTH_7_MHZ:
  213. ns_coeff1_2048nu = 0x0238e38e;
  214. ns_coeff1_8191nu = 0x008e3d55;
  215. ns_coeff1_8192nu = 0x008e38e4;
  216. ns_coeff1_8193nu = 0x008e3472;
  217. ns_coeff2_2k = 0x011c71c7;
  218. ns_coeff2_8k = 0x00471c72;
  219. break;
  220. case BANDWIDTH_8_MHZ:
  221. ns_coeff1_2048nu = 0x028a28a3;
  222. ns_coeff1_8191nu = 0x00a28f3d;
  223. ns_coeff1_8192nu = 0x00a28a29;
  224. ns_coeff1_8193nu = 0x00a28514;
  225. ns_coeff2_2k = 0x01451451;
  226. ns_coeff2_8k = 0x00514514;
  227. break;
  228. default:
  229. ret = -EINVAL;
  230. }
  231. break;
  232. case 20480: /* 20.480 MHz */
  233. switch (bw) {
  234. case BANDWIDTH_6_MHZ:
  235. ns_coeff1_2048nu = 0x02adb6dc;
  236. ns_coeff1_8191nu = 0x00ab7313;
  237. ns_coeff1_8192nu = 0x00ab6db7;
  238. ns_coeff1_8193nu = 0x00ab685c;
  239. ns_coeff2_2k = 0x0156db6e;
  240. ns_coeff2_8k = 0x0055b6dc;
  241. break;
  242. case BANDWIDTH_7_MHZ:
  243. ns_coeff1_2048nu = 0x03200001;
  244. ns_coeff1_8191nu = 0x00c80640;
  245. ns_coeff1_8192nu = 0x00c80000;
  246. ns_coeff1_8193nu = 0x00c7f9c0;
  247. ns_coeff2_2k = 0x01900000;
  248. ns_coeff2_8k = 0x00640000;
  249. break;
  250. case BANDWIDTH_8_MHZ:
  251. ns_coeff1_2048nu = 0x03924926;
  252. ns_coeff1_8191nu = 0x00e4996e;
  253. ns_coeff1_8192nu = 0x00e49249;
  254. ns_coeff1_8193nu = 0x00e48b25;
  255. ns_coeff2_2k = 0x01c92493;
  256. ns_coeff2_8k = 0x00724925;
  257. break;
  258. default:
  259. ret = -EINVAL;
  260. }
  261. break;
  262. case 28000: /* 28.000 MHz */
  263. switch (bw) {
  264. case BANDWIDTH_6_MHZ:
  265. ns_coeff1_2048nu = 0x01f58d10;
  266. ns_coeff1_8191nu = 0x007d672f;
  267. ns_coeff1_8192nu = 0x007d6344;
  268. ns_coeff1_8193nu = 0x007d5f59;
  269. ns_coeff2_2k = 0x00fac688;
  270. ns_coeff2_8k = 0x003eb1a2;
  271. break;
  272. case BANDWIDTH_7_MHZ:
  273. ns_coeff1_2048nu = 0x02492492;
  274. ns_coeff1_8191nu = 0x00924db7;
  275. ns_coeff1_8192nu = 0x00924925;
  276. ns_coeff1_8193nu = 0x00924492;
  277. ns_coeff2_2k = 0x01249249;
  278. ns_coeff2_8k = 0x00492492;
  279. break;
  280. case BANDWIDTH_8_MHZ:
  281. ns_coeff1_2048nu = 0x029cbc15;
  282. ns_coeff1_8191nu = 0x00a7343f;
  283. ns_coeff1_8192nu = 0x00a72f05;
  284. ns_coeff1_8193nu = 0x00a729cc;
  285. ns_coeff2_2k = 0x014e5e0a;
  286. ns_coeff2_8k = 0x00539783;
  287. break;
  288. default:
  289. ret = -EINVAL;
  290. }
  291. break;
  292. case 25000: /* 25.000 MHz */
  293. switch (bw) {
  294. case BANDWIDTH_6_MHZ:
  295. ns_coeff1_2048nu = 0x0231bcb5;
  296. ns_coeff1_8191nu = 0x008c7391;
  297. ns_coeff1_8192nu = 0x008c6f2d;
  298. ns_coeff1_8193nu = 0x008c6aca;
  299. ns_coeff2_2k = 0x0118de5b;
  300. ns_coeff2_8k = 0x00463797;
  301. break;
  302. case BANDWIDTH_7_MHZ:
  303. ns_coeff1_2048nu = 0x028f5c29;
  304. ns_coeff1_8191nu = 0x00a3dc29;
  305. ns_coeff1_8192nu = 0x00a3d70a;
  306. ns_coeff1_8193nu = 0x00a3d1ec;
  307. ns_coeff2_2k = 0x0147ae14;
  308. ns_coeff2_8k = 0x0051eb85;
  309. break;
  310. case BANDWIDTH_8_MHZ:
  311. ns_coeff1_2048nu = 0x02ecfb9d;
  312. ns_coeff1_8191nu = 0x00bb44c1;
  313. ns_coeff1_8192nu = 0x00bb3ee7;
  314. ns_coeff1_8193nu = 0x00bb390d;
  315. ns_coeff2_2k = 0x01767dce;
  316. ns_coeff2_8k = 0x005d9f74;
  317. break;
  318. default:
  319. ret = -EINVAL;
  320. }
  321. break;
  322. default:
  323. err("invalid xtal");
  324. return -EINVAL;
  325. }
  326. if (ret) {
  327. err("invalid bandwidth");
  328. return ret;
  329. }
  330. buf[i++] = (u8) ((ns_coeff1_2048nu & 0x03000000) >> 24);
  331. buf[i++] = (u8) ((ns_coeff1_2048nu & 0x00ff0000) >> 16);
  332. buf[i++] = (u8) ((ns_coeff1_2048nu & 0x0000ff00) >> 8);
  333. buf[i++] = (u8) ((ns_coeff1_2048nu & 0x000000ff));
  334. buf[i++] = (u8) ((ns_coeff2_2k & 0x01c00000) >> 22);
  335. buf[i++] = (u8) ((ns_coeff2_2k & 0x003fc000) >> 14);
  336. buf[i++] = (u8) ((ns_coeff2_2k & 0x00003fc0) >> 6);
  337. buf[i++] = (u8) ((ns_coeff2_2k & 0x0000003f));
  338. buf[i++] = (u8) ((ns_coeff1_8191nu & 0x03000000) >> 24);
  339. buf[i++] = (u8) ((ns_coeff1_8191nu & 0x00ffc000) >> 16);
  340. buf[i++] = (u8) ((ns_coeff1_8191nu & 0x0000ff00) >> 8);
  341. buf[i++] = (u8) ((ns_coeff1_8191nu & 0x000000ff));
  342. buf[i++] = (u8) ((ns_coeff1_8192nu & 0x03000000) >> 24);
  343. buf[i++] = (u8) ((ns_coeff1_8192nu & 0x00ffc000) >> 16);
  344. buf[i++] = (u8) ((ns_coeff1_8192nu & 0x0000ff00) >> 8);
  345. buf[i++] = (u8) ((ns_coeff1_8192nu & 0x000000ff));
  346. buf[i++] = (u8) ((ns_coeff1_8193nu & 0x03000000) >> 24);
  347. buf[i++] = (u8) ((ns_coeff1_8193nu & 0x00ffc000) >> 16);
  348. buf[i++] = (u8) ((ns_coeff1_8193nu & 0x0000ff00) >> 8);
  349. buf[i++] = (u8) ((ns_coeff1_8193nu & 0x000000ff));
  350. buf[i++] = (u8) ((ns_coeff2_8k & 0x01c00000) >> 22);
  351. buf[i++] = (u8) ((ns_coeff2_8k & 0x003fc000) >> 14);
  352. buf[i++] = (u8) ((ns_coeff2_8k & 0x00003fc0) >> 6);
  353. buf[i++] = (u8) ((ns_coeff2_8k & 0x0000003f));
  354. deb_info("%s: coeff:", __func__);
  355. debug_dump(buf, sizeof(buf), deb_info);
  356. /* program */
  357. for (i = 0; i < sizeof(buf); i++) {
  358. ret = af9013_write_reg(state, 0xae00 + i, buf[i]);
  359. if (ret)
  360. break;
  361. }
  362. return ret;
  363. }
  364. static int af9013_set_adc_ctrl(struct af9013_state *state)
  365. {
  366. int ret;
  367. u8 buf[3], tmp, i;
  368. u32 adc_cw;
  369. deb_info("%s: adc_clock:%d\n", __func__, state->config.adc_clock);
  370. /* adc frequency type */
  371. switch (state->config.adc_clock) {
  372. case 28800: /* 28.800 MHz */
  373. tmp = 0;
  374. break;
  375. case 20480: /* 20.480 MHz */
  376. tmp = 1;
  377. break;
  378. case 28000: /* 28.000 MHz */
  379. tmp = 2;
  380. break;
  381. case 25000: /* 25.000 MHz */
  382. tmp = 3;
  383. break;
  384. default:
  385. err("invalid xtal");
  386. return -EINVAL;
  387. }
  388. adc_cw = af913_div(state->config.adc_clock*1000, 1000000ul, 19ul);
  389. buf[0] = (u8) ((adc_cw & 0x000000ff));
  390. buf[1] = (u8) ((adc_cw & 0x0000ff00) >> 8);
  391. buf[2] = (u8) ((adc_cw & 0x00ff0000) >> 16);
  392. deb_info("%s: adc_cw:", __func__);
  393. debug_dump(buf, sizeof(buf), deb_info);
  394. /* program */
  395. for (i = 0; i < sizeof(buf); i++) {
  396. ret = af9013_write_reg(state, 0xd180 + i, buf[i]);
  397. if (ret)
  398. goto error;
  399. }
  400. ret = af9013_write_reg_bits(state, 0x9bd2, 0, 4, tmp);
  401. error:
  402. return ret;
  403. }
  404. static int af9013_set_freq_ctrl(struct af9013_state *state, fe_bandwidth_t bw)
  405. {
  406. int ret;
  407. u16 addr;
  408. u8 buf[3], i, j;
  409. u32 adc_freq, freq_cw;
  410. s8 bfs_spec_inv;
  411. int if_sample_freq;
  412. for (j = 0; j < 3; j++) {
  413. if (j == 0) {
  414. addr = 0xd140; /* fcw normal */
  415. bfs_spec_inv = state->config.rf_spec_inv ? -1 : 1;
  416. } else if (j == 1) {
  417. addr = 0x9be7; /* fcw dummy ram */
  418. bfs_spec_inv = state->config.rf_spec_inv ? -1 : 1;
  419. } else {
  420. addr = 0x9bea; /* fcw inverted */
  421. bfs_spec_inv = state->config.rf_spec_inv ? 1 : -1;
  422. }
  423. adc_freq = state->config.adc_clock * 1000;
  424. if_sample_freq = state->config.tuner_if * 1000;
  425. /* TDA18271 uses different sampling freq for every bw */
  426. if (state->config.tuner == AF9013_TUNER_TDA18271) {
  427. switch (bw) {
  428. case BANDWIDTH_6_MHZ:
  429. if_sample_freq = 3300000; /* 3.3 MHz */
  430. break;
  431. case BANDWIDTH_7_MHZ:
  432. if_sample_freq = 3800000; /* 3.8 MHz */
  433. break;
  434. case BANDWIDTH_8_MHZ:
  435. default:
  436. if_sample_freq = 4300000; /* 4.3 MHz */
  437. break;
  438. }
  439. }
  440. while (if_sample_freq > (adc_freq / 2))
  441. if_sample_freq = if_sample_freq - adc_freq;
  442. if (if_sample_freq >= 0)
  443. bfs_spec_inv = bfs_spec_inv * (-1);
  444. else
  445. if_sample_freq = if_sample_freq * (-1);
  446. freq_cw = af913_div(if_sample_freq, adc_freq, 23ul);
  447. if (bfs_spec_inv == -1)
  448. freq_cw = 0x00800000 - freq_cw;
  449. buf[0] = (u8) ((freq_cw & 0x000000ff));
  450. buf[1] = (u8) ((freq_cw & 0x0000ff00) >> 8);
  451. buf[2] = (u8) ((freq_cw & 0x007f0000) >> 16);
  452. deb_info("%s: freq_cw:", __func__);
  453. debug_dump(buf, sizeof(buf), deb_info);
  454. /* program */
  455. for (i = 0; i < sizeof(buf); i++) {
  456. ret = af9013_write_reg(state, addr++, buf[i]);
  457. if (ret)
  458. goto error;
  459. }
  460. }
  461. error:
  462. return ret;
  463. }
  464. static int af9013_set_ofdm_params(struct af9013_state *state,
  465. struct dvb_ofdm_parameters *params, u8 *auto_mode)
  466. {
  467. int ret;
  468. u8 i, buf[3] = {0, 0, 0};
  469. *auto_mode = 0; /* set if parameters are requested to auto set */
  470. switch (params->transmission_mode) {
  471. case TRANSMISSION_MODE_AUTO:
  472. *auto_mode = 1;
  473. case TRANSMISSION_MODE_2K:
  474. break;
  475. case TRANSMISSION_MODE_8K:
  476. buf[0] |= (1 << 0);
  477. break;
  478. default:
  479. return -EINVAL;
  480. }
  481. switch (params->guard_interval) {
  482. case GUARD_INTERVAL_AUTO:
  483. *auto_mode = 1;
  484. case GUARD_INTERVAL_1_32:
  485. break;
  486. case GUARD_INTERVAL_1_16:
  487. buf[0] |= (1 << 2);
  488. break;
  489. case GUARD_INTERVAL_1_8:
  490. buf[0] |= (2 << 2);
  491. break;
  492. case GUARD_INTERVAL_1_4:
  493. buf[0] |= (3 << 2);
  494. break;
  495. default:
  496. return -EINVAL;
  497. }
  498. switch (params->hierarchy_information) {
  499. case HIERARCHY_AUTO:
  500. *auto_mode = 1;
  501. case HIERARCHY_NONE:
  502. break;
  503. case HIERARCHY_1:
  504. buf[0] |= (1 << 4);
  505. break;
  506. case HIERARCHY_2:
  507. buf[0] |= (2 << 4);
  508. break;
  509. case HIERARCHY_4:
  510. buf[0] |= (3 << 4);
  511. break;
  512. default:
  513. return -EINVAL;
  514. };
  515. switch (params->constellation) {
  516. case QAM_AUTO:
  517. *auto_mode = 1;
  518. case QPSK:
  519. break;
  520. case QAM_16:
  521. buf[1] |= (1 << 6);
  522. break;
  523. case QAM_64:
  524. buf[1] |= (2 << 6);
  525. break;
  526. default:
  527. return -EINVAL;
  528. }
  529. /* Use HP. How and which case we can switch to LP? */
  530. buf[1] |= (1 << 4);
  531. switch (params->code_rate_HP) {
  532. case FEC_AUTO:
  533. *auto_mode = 1;
  534. case FEC_1_2:
  535. break;
  536. case FEC_2_3:
  537. buf[2] |= (1 << 0);
  538. break;
  539. case FEC_3_4:
  540. buf[2] |= (2 << 0);
  541. break;
  542. case FEC_5_6:
  543. buf[2] |= (3 << 0);
  544. break;
  545. case FEC_7_8:
  546. buf[2] |= (4 << 0);
  547. break;
  548. default:
  549. return -EINVAL;
  550. }
  551. switch (params->code_rate_LP) {
  552. case FEC_AUTO:
  553. /* if HIERARCHY_NONE and FEC_NONE then LP FEC is set to FEC_AUTO
  554. by dvb_frontend.c for compatibility */
  555. if (params->hierarchy_information != HIERARCHY_NONE)
  556. *auto_mode = 1;
  557. case FEC_1_2:
  558. break;
  559. case FEC_2_3:
  560. buf[2] |= (1 << 3);
  561. break;
  562. case FEC_3_4:
  563. buf[2] |= (2 << 3);
  564. break;
  565. case FEC_5_6:
  566. buf[2] |= (3 << 3);
  567. break;
  568. case FEC_7_8:
  569. buf[2] |= (4 << 3);
  570. break;
  571. case FEC_NONE:
  572. if (params->hierarchy_information == HIERARCHY_AUTO)
  573. break;
  574. default:
  575. return -EINVAL;
  576. }
  577. switch (params->bandwidth) {
  578. case BANDWIDTH_6_MHZ:
  579. break;
  580. case BANDWIDTH_7_MHZ:
  581. buf[1] |= (1 << 2);
  582. break;
  583. case BANDWIDTH_8_MHZ:
  584. buf[1] |= (2 << 2);
  585. break;
  586. default:
  587. return -EINVAL;
  588. }
  589. /* program */
  590. for (i = 0; i < sizeof(buf); i++) {
  591. ret = af9013_write_reg(state, 0xd3c0 + i, buf[i]);
  592. if (ret)
  593. break;
  594. }
  595. return ret;
  596. }
  597. static int af9013_reset(struct af9013_state *state, u8 sleep)
  598. {
  599. int ret;
  600. u8 tmp, i;
  601. deb_info("%s\n", __func__);
  602. /* enable OFDM reset */
  603. ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 1);
  604. if (ret)
  605. goto error;
  606. /* start reset mechanism */
  607. ret = af9013_write_reg(state, 0xaeff, 1);
  608. if (ret)
  609. goto error;
  610. /* reset is done when bit 1 is set */
  611. for (i = 0; i < 150; i++) {
  612. ret = af9013_read_reg_bits(state, 0xd417, 1, 1, &tmp);
  613. if (ret)
  614. goto error;
  615. if (tmp)
  616. break; /* reset done */
  617. msleep(10);
  618. }
  619. if (!tmp)
  620. return -ETIMEDOUT;
  621. /* don't clear reset when going to sleep */
  622. if (!sleep) {
  623. /* clear OFDM reset */
  624. ret = af9013_write_reg_bits(state, 0xd417, 1, 1, 0);
  625. if (ret)
  626. goto error;
  627. /* disable OFDM reset */
  628. ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 0);
  629. }
  630. error:
  631. return ret;
  632. }
  633. static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
  634. {
  635. int ret;
  636. deb_info("%s: onoff:%d\n", __func__, onoff);
  637. if (onoff) {
  638. /* power on */
  639. ret = af9013_write_reg_bits(state, 0xd73a, 3, 1, 0);
  640. if (ret)
  641. goto error;
  642. ret = af9013_write_reg_bits(state, 0xd417, 1, 1, 0);
  643. if (ret)
  644. goto error;
  645. ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 0);
  646. } else {
  647. /* power off */
  648. ret = af9013_reset(state, 1);
  649. if (ret)
  650. goto error;
  651. ret = af9013_write_reg_bits(state, 0xd73a, 3, 1, 1);
  652. }
  653. error:
  654. return ret;
  655. }
  656. static int af9013_lock_led(struct af9013_state *state, u8 onoff)
  657. {
  658. deb_info("%s: onoff:%d\n", __func__, onoff);
  659. return af9013_write_reg_bits(state, 0xd730, 0, 1, onoff);
  660. }
  661. static int af9013_set_frontend(struct dvb_frontend *fe,
  662. struct dvb_frontend_parameters *params)
  663. {
  664. struct af9013_state *state = fe->demodulator_priv;
  665. int ret;
  666. u8 auto_mode; /* auto set TPS */
  667. deb_info("%s: freq:%d bw:%d\n", __func__, params->frequency,
  668. params->u.ofdm.bandwidth);
  669. state->frequency = params->frequency;
  670. /* program CFOE coefficients */
  671. ret = af9013_set_coeff(state, params->u.ofdm.bandwidth);
  672. if (ret)
  673. goto error;
  674. /* program frequency control */
  675. ret = af9013_set_freq_ctrl(state, params->u.ofdm.bandwidth);
  676. if (ret)
  677. goto error;
  678. /* clear TPS lock flag (inverted flag) */
  679. ret = af9013_write_reg_bits(state, 0xd330, 3, 1, 1);
  680. if (ret)
  681. goto error;
  682. /* clear MPEG2 lock flag */
  683. ret = af9013_write_reg_bits(state, 0xd507, 6, 1, 0);
  684. if (ret)
  685. goto error;
  686. /* empty channel function */
  687. ret = af9013_write_reg_bits(state, 0x9bfe, 0, 1, 0);
  688. if (ret)
  689. goto error;
  690. /* empty DVB-T channel function */
  691. ret = af9013_write_reg_bits(state, 0x9bc2, 0, 1, 0);
  692. if (ret)
  693. goto error;
  694. /* program tuner */
  695. if (fe->ops.tuner_ops.set_params)
  696. fe->ops.tuner_ops.set_params(fe, params);
  697. /* program TPS and bandwidth, check if auto mode needed */
  698. ret = af9013_set_ofdm_params(state, &params->u.ofdm, &auto_mode);
  699. if (ret)
  700. goto error;
  701. if (auto_mode) {
  702. /* clear easy mode flag */
  703. ret = af9013_write_reg(state, 0xaefd, 0);
  704. deb_info("%s: auto TPS\n", __func__);
  705. } else {
  706. /* set easy mode flag */
  707. ret = af9013_write_reg(state, 0xaefd, 1);
  708. if (ret)
  709. goto error;
  710. ret = af9013_write_reg(state, 0xaefe, 0);
  711. deb_info("%s: manual TPS\n", __func__);
  712. }
  713. if (ret)
  714. goto error;
  715. /* everything is set, lets try to receive channel - OFSM GO! */
  716. ret = af9013_write_reg(state, 0xffff, 0);
  717. if (ret)
  718. goto error;
  719. error:
  720. return ret;
  721. }
  722. static int af9013_get_frontend(struct dvb_frontend *fe,
  723. struct dvb_frontend_parameters *p)
  724. {
  725. struct af9013_state *state = fe->demodulator_priv;
  726. int ret;
  727. u8 i, buf[3];
  728. deb_info("%s\n", __func__);
  729. /* read TPS registers */
  730. for (i = 0; i < 3; i++) {
  731. ret = af9013_read_reg(state, 0xd3c0 + i, &buf[i]);
  732. if (ret)
  733. goto error;
  734. }
  735. switch ((buf[1] >> 6) & 3) {
  736. case 0:
  737. p->u.ofdm.constellation = QPSK;
  738. break;
  739. case 1:
  740. p->u.ofdm.constellation = QAM_16;
  741. break;
  742. case 2:
  743. p->u.ofdm.constellation = QAM_64;
  744. break;
  745. }
  746. switch ((buf[0] >> 0) & 3) {
  747. case 0:
  748. p->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
  749. break;
  750. case 1:
  751. p->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
  752. }
  753. switch ((buf[0] >> 2) & 3) {
  754. case 0:
  755. p->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
  756. break;
  757. case 1:
  758. p->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
  759. break;
  760. case 2:
  761. p->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
  762. break;
  763. case 3:
  764. p->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
  765. break;
  766. }
  767. switch ((buf[0] >> 4) & 7) {
  768. case 0:
  769. p->u.ofdm.hierarchy_information = HIERARCHY_NONE;
  770. break;
  771. case 1:
  772. p->u.ofdm.hierarchy_information = HIERARCHY_1;
  773. break;
  774. case 2:
  775. p->u.ofdm.hierarchy_information = HIERARCHY_2;
  776. break;
  777. case 3:
  778. p->u.ofdm.hierarchy_information = HIERARCHY_4;
  779. break;
  780. }
  781. switch ((buf[2] >> 0) & 7) {
  782. case 0:
  783. p->u.ofdm.code_rate_HP = FEC_1_2;
  784. break;
  785. case 1:
  786. p->u.ofdm.code_rate_HP = FEC_2_3;
  787. break;
  788. case 2:
  789. p->u.ofdm.code_rate_HP = FEC_3_4;
  790. break;
  791. case 3:
  792. p->u.ofdm.code_rate_HP = FEC_5_6;
  793. break;
  794. case 4:
  795. p->u.ofdm.code_rate_HP = FEC_7_8;
  796. break;
  797. }
  798. switch ((buf[2] >> 3) & 7) {
  799. case 0:
  800. p->u.ofdm.code_rate_LP = FEC_1_2;
  801. break;
  802. case 1:
  803. p->u.ofdm.code_rate_LP = FEC_2_3;
  804. break;
  805. case 2:
  806. p->u.ofdm.code_rate_LP = FEC_3_4;
  807. break;
  808. case 3:
  809. p->u.ofdm.code_rate_LP = FEC_5_6;
  810. break;
  811. case 4:
  812. p->u.ofdm.code_rate_LP = FEC_7_8;
  813. break;
  814. }
  815. switch ((buf[1] >> 2) & 3) {
  816. case 0:
  817. p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
  818. break;
  819. case 1:
  820. p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
  821. break;
  822. case 2:
  823. p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
  824. break;
  825. }
  826. p->inversion = INVERSION_AUTO;
  827. p->frequency = state->frequency;
  828. error:
  829. return ret;
  830. }
  831. static int af9013_update_ber_unc(struct dvb_frontend *fe)
  832. {
  833. struct af9013_state *state = fe->demodulator_priv;
  834. int ret;
  835. u8 buf[3], i;
  836. u32 error_bit_count = 0;
  837. u32 total_bit_count = 0;
  838. u32 abort_packet_count = 0;
  839. state->ber = 0;
  840. /* check if error bit count is ready */
  841. ret = af9013_read_reg_bits(state, 0xd391, 4, 1, &buf[0]);
  842. if (ret)
  843. goto error;
  844. if (!buf[0])
  845. goto exit;
  846. /* get RSD packet abort count */
  847. for (i = 0; i < 2; i++) {
  848. ret = af9013_read_reg(state, 0xd38a + i, &buf[i]);
  849. if (ret)
  850. goto error;
  851. }
  852. abort_packet_count = (buf[1] << 8) + buf[0];
  853. /* get error bit count */
  854. for (i = 0; i < 3; i++) {
  855. ret = af9013_read_reg(state, 0xd387 + i, &buf[i]);
  856. if (ret)
  857. goto error;
  858. }
  859. error_bit_count = (buf[2] << 16) + (buf[1] << 8) + buf[0];
  860. error_bit_count = error_bit_count - abort_packet_count * 8 * 8;
  861. /* get used RSD counting period (10000 RSD packets used) */
  862. for (i = 0; i < 2; i++) {
  863. ret = af9013_read_reg(state, 0xd385 + i, &buf[i]);
  864. if (ret)
  865. goto error;
  866. }
  867. total_bit_count = (buf[1] << 8) + buf[0];
  868. total_bit_count = total_bit_count - abort_packet_count;
  869. total_bit_count = total_bit_count * 204 * 8;
  870. if (total_bit_count)
  871. state->ber = error_bit_count * 1000000000 / total_bit_count;
  872. state->ucblocks += abort_packet_count;
  873. deb_info("%s: err bits:%d total bits:%d abort count:%d\n", __func__,
  874. error_bit_count, total_bit_count, abort_packet_count);
  875. /* set BER counting range */
  876. ret = af9013_write_reg(state, 0xd385, 10000 & 0xff);
  877. if (ret)
  878. goto error;
  879. ret = af9013_write_reg(state, 0xd386, 10000 >> 8);
  880. if (ret)
  881. goto error;
  882. /* reset and start BER counter */
  883. ret = af9013_write_reg_bits(state, 0xd391, 4, 1, 1);
  884. if (ret)
  885. goto error;
  886. exit:
  887. error:
  888. return ret;
  889. }
  890. static int af9013_update_snr(struct dvb_frontend *fe)
  891. {
  892. struct af9013_state *state = fe->demodulator_priv;
  893. int ret;
  894. u8 buf[3], i, len;
  895. u32 quant = 0;
  896. struct snr_table *uninitialized_var(snr_table);
  897. /* check if quantizer ready (for snr) */
  898. ret = af9013_read_reg_bits(state, 0xd2e1, 3, 1, &buf[0]);
  899. if (ret)
  900. goto error;
  901. if (buf[0]) {
  902. /* quantizer ready - read it */
  903. for (i = 0; i < 3; i++) {
  904. ret = af9013_read_reg(state, 0xd2e3 + i, &buf[i]);
  905. if (ret)
  906. goto error;
  907. }
  908. quant = (buf[2] << 16) + (buf[1] << 8) + buf[0];
  909. /* read current constellation */
  910. ret = af9013_read_reg(state, 0xd3c1, &buf[0]);
  911. if (ret)
  912. goto error;
  913. switch ((buf[0] >> 6) & 3) {
  914. case 0:
  915. len = ARRAY_SIZE(qpsk_snr_table);
  916. snr_table = qpsk_snr_table;
  917. break;
  918. case 1:
  919. len = ARRAY_SIZE(qam16_snr_table);
  920. snr_table = qam16_snr_table;
  921. break;
  922. case 2:
  923. len = ARRAY_SIZE(qam64_snr_table);
  924. snr_table = qam64_snr_table;
  925. break;
  926. default:
  927. len = 0;
  928. break;
  929. }
  930. if (len) {
  931. for (i = 0; i < len; i++) {
  932. if (quant < snr_table[i].val) {
  933. state->snr = snr_table[i].snr * 10;
  934. break;
  935. }
  936. }
  937. }
  938. /* set quantizer super frame count */
  939. ret = af9013_write_reg(state, 0xd2e2, 1);
  940. if (ret)
  941. goto error;
  942. /* check quantizer availability */
  943. for (i = 0; i < 10; i++) {
  944. msleep(10);
  945. ret = af9013_read_reg_bits(state, 0xd2e6, 0, 1,
  946. &buf[0]);
  947. if (ret)
  948. goto error;
  949. if (!buf[0])
  950. break;
  951. }
  952. /* reset quantizer */
  953. ret = af9013_write_reg_bits(state, 0xd2e1, 3, 1, 1);
  954. if (ret)
  955. goto error;
  956. }
  957. error:
  958. return ret;
  959. }
  960. static int af9013_update_signal_strength(struct dvb_frontend *fe)
  961. {
  962. struct af9013_state *state = fe->demodulator_priv;
  963. int ret;
  964. u8 tmp0;
  965. u8 rf_gain, rf_50, rf_80, if_gain, if_50, if_80;
  966. int signal_strength;
  967. deb_info("%s\n", __func__);
  968. state->signal_strength = 0;
  969. ret = af9013_read_reg_bits(state, 0x9bee, 0, 1, &tmp0);
  970. if (ret)
  971. goto error;
  972. if (tmp0) {
  973. ret = af9013_read_reg(state, 0x9bbd, &rf_50);
  974. if (ret)
  975. goto error;
  976. ret = af9013_read_reg(state, 0x9bd0, &rf_80);
  977. if (ret)
  978. goto error;
  979. ret = af9013_read_reg(state, 0x9be2, &if_50);
  980. if (ret)
  981. goto error;
  982. ret = af9013_read_reg(state, 0x9be4, &if_80);
  983. if (ret)
  984. goto error;
  985. ret = af9013_read_reg(state, 0xd07c, &rf_gain);
  986. if (ret)
  987. goto error;
  988. ret = af9013_read_reg(state, 0xd07d, &if_gain);
  989. if (ret)
  990. goto error;
  991. signal_strength = (0xffff / (9 * (rf_50 + if_50) - \
  992. 11 * (rf_80 + if_80))) * (10 * (rf_gain + if_gain) - \
  993. 11 * (rf_80 + if_80));
  994. if (signal_strength < 0)
  995. signal_strength = 0;
  996. else if (signal_strength > 0xffff)
  997. signal_strength = 0xffff;
  998. state->signal_strength = signal_strength;
  999. }
  1000. error:
  1001. return ret;
  1002. }
  1003. static int af9013_update_statistics(struct dvb_frontend *fe)
  1004. {
  1005. struct af9013_state *state = fe->demodulator_priv;
  1006. int ret;
  1007. if (time_before(jiffies, state->next_statistics_check))
  1008. return 0;
  1009. /* set minimum statistic update interval */
  1010. state->next_statistics_check = jiffies + msecs_to_jiffies(1200);
  1011. ret = af9013_update_signal_strength(fe);
  1012. if (ret)
  1013. goto error;
  1014. ret = af9013_update_snr(fe);
  1015. if (ret)
  1016. goto error;
  1017. ret = af9013_update_ber_unc(fe);
  1018. if (ret)
  1019. goto error;
  1020. error:
  1021. return ret;
  1022. }
  1023. static int af9013_get_tune_settings(struct dvb_frontend *fe,
  1024. struct dvb_frontend_tune_settings *fesettings)
  1025. {
  1026. fesettings->min_delay_ms = 800;
  1027. fesettings->step_size = 0;
  1028. fesettings->max_drift = 0;
  1029. return 0;
  1030. }
  1031. static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
  1032. {
  1033. struct af9013_state *state = fe->demodulator_priv;
  1034. int ret = 0;
  1035. u8 tmp;
  1036. *status = 0;
  1037. /* TPS lock */
  1038. ret = af9013_read_reg_bits(state, 0xd330, 3, 1, &tmp);
  1039. if (ret)
  1040. goto error;
  1041. if (tmp)
  1042. *status |= FE_HAS_VITERBI | FE_HAS_CARRIER | FE_HAS_SIGNAL;
  1043. /* MPEG2 lock */
  1044. ret = af9013_read_reg_bits(state, 0xd507, 6, 1, &tmp);
  1045. if (ret)
  1046. goto error;
  1047. if (tmp)
  1048. *status |= FE_HAS_SYNC | FE_HAS_LOCK;
  1049. if (!(*status & FE_HAS_SIGNAL)) {
  1050. /* AGC lock */
  1051. ret = af9013_read_reg_bits(state, 0xd1a0, 6, 1, &tmp);
  1052. if (ret)
  1053. goto error;
  1054. if (tmp)
  1055. *status |= FE_HAS_SIGNAL;
  1056. }
  1057. if (!(*status & FE_HAS_CARRIER)) {
  1058. /* CFO lock */
  1059. ret = af9013_read_reg_bits(state, 0xd333, 7, 1, &tmp);
  1060. if (ret)
  1061. goto error;
  1062. if (tmp)
  1063. *status |= FE_HAS_CARRIER;
  1064. }
  1065. if (!(*status & FE_HAS_CARRIER)) {
  1066. /* SFOE lock */
  1067. ret = af9013_read_reg_bits(state, 0xd334, 6, 1, &tmp);
  1068. if (ret)
  1069. goto error;
  1070. if (tmp)
  1071. *status |= FE_HAS_CARRIER;
  1072. }
  1073. ret = af9013_update_statistics(fe);
  1074. error:
  1075. return ret;
  1076. }
  1077. static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
  1078. {
  1079. struct af9013_state *state = fe->demodulator_priv;
  1080. int ret;
  1081. ret = af9013_update_statistics(fe);
  1082. *ber = state->ber;
  1083. return ret;
  1084. }
  1085. static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  1086. {
  1087. struct af9013_state *state = fe->demodulator_priv;
  1088. int ret;
  1089. ret = af9013_update_statistics(fe);
  1090. *strength = state->signal_strength;
  1091. return ret;
  1092. }
  1093. static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
  1094. {
  1095. struct af9013_state *state = fe->demodulator_priv;
  1096. int ret;
  1097. ret = af9013_update_statistics(fe);
  1098. *snr = state->snr;
  1099. return ret;
  1100. }
  1101. static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  1102. {
  1103. struct af9013_state *state = fe->demodulator_priv;
  1104. int ret;
  1105. ret = af9013_update_statistics(fe);
  1106. *ucblocks = state->ucblocks;
  1107. return ret;
  1108. }
  1109. static int af9013_sleep(struct dvb_frontend *fe)
  1110. {
  1111. struct af9013_state *state = fe->demodulator_priv;
  1112. int ret;
  1113. deb_info("%s\n", __func__);
  1114. ret = af9013_lock_led(state, 0);
  1115. if (ret)
  1116. goto error;
  1117. ret = af9013_power_ctrl(state, 0);
  1118. error:
  1119. return ret;
  1120. }
  1121. static int af9013_init(struct dvb_frontend *fe)
  1122. {
  1123. struct af9013_state *state = fe->demodulator_priv;
  1124. int ret, i, len;
  1125. u8 tmp0, tmp1;
  1126. struct regdesc *init;
  1127. deb_info("%s\n", __func__);
  1128. /* reset OFDM */
  1129. ret = af9013_reset(state, 0);
  1130. if (ret)
  1131. goto error;
  1132. /* power on */
  1133. ret = af9013_power_ctrl(state, 1);
  1134. if (ret)
  1135. goto error;
  1136. /* enable ADC */
  1137. ret = af9013_write_reg(state, 0xd73a, 0xa4);
  1138. if (ret)
  1139. goto error;
  1140. /* write API version to firmware */
  1141. for (i = 0; i < sizeof(state->config.api_version); i++) {
  1142. ret = af9013_write_reg(state, 0x9bf2 + i,
  1143. state->config.api_version[i]);
  1144. if (ret)
  1145. goto error;
  1146. }
  1147. /* program ADC control */
  1148. ret = af9013_set_adc_ctrl(state);
  1149. if (ret)
  1150. goto error;
  1151. /* set I2C master clock */
  1152. ret = af9013_write_reg(state, 0xd416, 0x14);
  1153. if (ret)
  1154. goto error;
  1155. /* set 16 embx */
  1156. ret = af9013_write_reg_bits(state, 0xd700, 1, 1, 1);
  1157. if (ret)
  1158. goto error;
  1159. /* set no trigger */
  1160. ret = af9013_write_reg_bits(state, 0xd700, 2, 1, 0);
  1161. if (ret)
  1162. goto error;
  1163. /* set read-update bit for constellation */
  1164. ret = af9013_write_reg_bits(state, 0xd371, 1, 1, 1);
  1165. if (ret)
  1166. goto error;
  1167. /* enable FEC monitor */
  1168. ret = af9013_write_reg_bits(state, 0xd392, 1, 1, 1);
  1169. if (ret)
  1170. goto error;
  1171. /* load OFSM settings */
  1172. deb_info("%s: load ofsm settings\n", __func__);
  1173. len = ARRAY_SIZE(ofsm_init);
  1174. init = ofsm_init;
  1175. for (i = 0; i < len; i++) {
  1176. ret = af9013_write_reg_bits(state, init[i].addr, init[i].pos,
  1177. init[i].len, init[i].val);
  1178. if (ret)
  1179. goto error;
  1180. }
  1181. /* load tuner specific settings */
  1182. deb_info("%s: load tuner specific settings\n", __func__);
  1183. switch (state->config.tuner) {
  1184. case AF9013_TUNER_MXL5003D:
  1185. len = ARRAY_SIZE(tuner_init_mxl5003d);
  1186. init = tuner_init_mxl5003d;
  1187. break;
  1188. case AF9013_TUNER_MXL5005D:
  1189. case AF9013_TUNER_MXL5005R:
  1190. len = ARRAY_SIZE(tuner_init_mxl5005);
  1191. init = tuner_init_mxl5005;
  1192. break;
  1193. case AF9013_TUNER_ENV77H11D5:
  1194. len = ARRAY_SIZE(tuner_init_env77h11d5);
  1195. init = tuner_init_env77h11d5;
  1196. break;
  1197. case AF9013_TUNER_MT2060:
  1198. len = ARRAY_SIZE(tuner_init_mt2060);
  1199. init = tuner_init_mt2060;
  1200. break;
  1201. case AF9013_TUNER_MC44S803:
  1202. len = ARRAY_SIZE(tuner_init_mc44s803);
  1203. init = tuner_init_mc44s803;
  1204. break;
  1205. case AF9013_TUNER_QT1010:
  1206. case AF9013_TUNER_QT1010A:
  1207. len = ARRAY_SIZE(tuner_init_qt1010);
  1208. init = tuner_init_qt1010;
  1209. break;
  1210. case AF9013_TUNER_MT2060_2:
  1211. len = ARRAY_SIZE(tuner_init_mt2060_2);
  1212. init = tuner_init_mt2060_2;
  1213. break;
  1214. case AF9013_TUNER_TDA18271:
  1215. len = ARRAY_SIZE(tuner_init_tda18271);
  1216. init = tuner_init_tda18271;
  1217. break;
  1218. case AF9013_TUNER_UNKNOWN:
  1219. default:
  1220. len = ARRAY_SIZE(tuner_init_unknown);
  1221. init = tuner_init_unknown;
  1222. break;
  1223. }
  1224. for (i = 0; i < len; i++) {
  1225. ret = af9013_write_reg_bits(state, init[i].addr, init[i].pos,
  1226. init[i].len, init[i].val);
  1227. if (ret)
  1228. goto error;
  1229. }
  1230. /* set TS mode */
  1231. deb_info("%s: setting ts mode\n", __func__);
  1232. tmp0 = 0; /* parallel mode */
  1233. tmp1 = 0; /* serial mode */
  1234. switch (state->config.output_mode) {
  1235. case AF9013_OUTPUT_MODE_PARALLEL:
  1236. tmp0 = 1;
  1237. break;
  1238. case AF9013_OUTPUT_MODE_SERIAL:
  1239. tmp1 = 1;
  1240. break;
  1241. case AF9013_OUTPUT_MODE_USB:
  1242. /* usb mode for AF9015 */
  1243. default:
  1244. break;
  1245. }
  1246. ret = af9013_write_reg_bits(state, 0xd500, 1, 1, tmp0); /* parallel */
  1247. if (ret)
  1248. goto error;
  1249. ret = af9013_write_reg_bits(state, 0xd500, 2, 1, tmp1); /* serial */
  1250. if (ret)
  1251. goto error;
  1252. /* enable lock led */
  1253. ret = af9013_lock_led(state, 1);
  1254. if (ret)
  1255. goto error;
  1256. error:
  1257. return ret;
  1258. }
  1259. static struct dvb_frontend_ops af9013_ops;
  1260. static int af9013_download_firmware(struct af9013_state *state)
  1261. {
  1262. int i, len, packets, remainder, ret;
  1263. const struct firmware *fw;
  1264. u16 addr = 0x5100; /* firmware start address */
  1265. u16 checksum = 0;
  1266. u8 val;
  1267. u8 fw_params[4];
  1268. u8 *data;
  1269. u8 *fw_file = AF9013_DEFAULT_FIRMWARE;
  1270. msleep(100);
  1271. /* check whether firmware is already running */
  1272. ret = af9013_read_reg(state, 0x98be, &val);
  1273. if (ret)
  1274. goto error;
  1275. else
  1276. deb_info("%s: firmware status:%02x\n", __func__, val);
  1277. if (val == 0x0c) /* fw is running, no need for download */
  1278. goto exit;
  1279. info("found a '%s' in cold state, will try to load a firmware",
  1280. af9013_ops.info.name);
  1281. /* request the firmware, this will block and timeout */
  1282. ret = request_firmware(&fw, fw_file, &state->i2c->dev);
  1283. if (ret) {
  1284. err("did not find the firmware file. (%s) "
  1285. "Please see linux/Documentation/dvb/ for more details" \
  1286. " on firmware-problems. (%d)",
  1287. fw_file, ret);
  1288. goto error;
  1289. }
  1290. info("downloading firmware from file '%s'", fw_file);
  1291. /* calc checksum */
  1292. for (i = 0; i < fw->size; i++)
  1293. checksum += fw->data[i];
  1294. fw_params[0] = checksum >> 8;
  1295. fw_params[1] = checksum & 0xff;
  1296. fw_params[2] = fw->size >> 8;
  1297. fw_params[3] = fw->size & 0xff;
  1298. /* write fw checksum & size */
  1299. ret = af9013_write_ofsm_regs(state, 0x50fc,
  1300. fw_params, sizeof(fw_params));
  1301. if (ret)
  1302. goto error_release;
  1303. #define FW_PACKET_MAX_DATA 16
  1304. packets = fw->size / FW_PACKET_MAX_DATA;
  1305. remainder = fw->size % FW_PACKET_MAX_DATA;
  1306. len = FW_PACKET_MAX_DATA;
  1307. for (i = 0; i <= packets; i++) {
  1308. if (i == packets) /* set size of the last packet */
  1309. len = remainder;
  1310. data = (u8 *)(fw->data + i * FW_PACKET_MAX_DATA);
  1311. ret = af9013_write_ofsm_regs(state, addr, data, len);
  1312. addr += FW_PACKET_MAX_DATA;
  1313. if (ret) {
  1314. err("firmware download failed at %d with %d", i, ret);
  1315. goto error_release;
  1316. }
  1317. }
  1318. /* request boot firmware */
  1319. ret = af9013_write_reg(state, 0xe205, 1);
  1320. if (ret)
  1321. goto error_release;
  1322. for (i = 0; i < 15; i++) {
  1323. msleep(100);
  1324. /* check firmware status */
  1325. ret = af9013_read_reg(state, 0x98be, &val);
  1326. if (ret)
  1327. goto error_release;
  1328. deb_info("%s: firmware status:%02x\n", __func__, val);
  1329. if (val == 0x0c || val == 0x04) /* success or fail */
  1330. break;
  1331. }
  1332. if (val == 0x04) {
  1333. err("firmware did not run");
  1334. ret = -1;
  1335. } else if (val != 0x0c) {
  1336. err("firmware boot timeout");
  1337. ret = -1;
  1338. }
  1339. error_release:
  1340. release_firmware(fw);
  1341. error:
  1342. exit:
  1343. if (!ret)
  1344. info("found a '%s' in warm state.", af9013_ops.info.name);
  1345. return ret;
  1346. }
  1347. static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  1348. {
  1349. int ret;
  1350. struct af9013_state *state = fe->demodulator_priv;
  1351. deb_info("%s: enable:%d\n", __func__, enable);
  1352. if (state->config.output_mode == AF9013_OUTPUT_MODE_USB)
  1353. ret = af9013_write_reg_bits(state, 0xd417, 3, 1, enable);
  1354. else
  1355. ret = af9013_write_reg_bits(state, 0xd607, 2, 1, enable);
  1356. return ret;
  1357. }
  1358. static void af9013_release(struct dvb_frontend *fe)
  1359. {
  1360. struct af9013_state *state = fe->demodulator_priv;
  1361. kfree(state);
  1362. }
  1363. static struct dvb_frontend_ops af9013_ops;
  1364. struct dvb_frontend *af9013_attach(const struct af9013_config *config,
  1365. struct i2c_adapter *i2c)
  1366. {
  1367. int ret;
  1368. struct af9013_state *state = NULL;
  1369. u8 buf[3], i;
  1370. /* allocate memory for the internal state */
  1371. state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
  1372. if (state == NULL)
  1373. goto error;
  1374. /* setup the state */
  1375. state->i2c = i2c;
  1376. memcpy(&state->config, config, sizeof(struct af9013_config));
  1377. /* chip version */
  1378. ret = af9013_read_reg_bits(state, 0xd733, 4, 4, &buf[2]);
  1379. if (ret)
  1380. goto error;
  1381. /* ROM version */
  1382. for (i = 0; i < 2; i++) {
  1383. ret = af9013_read_reg(state, 0x116b + i, &buf[i]);
  1384. if (ret)
  1385. goto error;
  1386. }
  1387. deb_info("%s: chip version:%d ROM version:%d.%d\n", __func__,
  1388. buf[2], buf[0], buf[1]);
  1389. /* download firmware */
  1390. if (state->config.output_mode != AF9013_OUTPUT_MODE_USB) {
  1391. ret = af9013_download_firmware(state);
  1392. if (ret)
  1393. goto error;
  1394. }
  1395. /* firmware version */
  1396. for (i = 0; i < 3; i++) {
  1397. ret = af9013_read_reg(state, 0x5103 + i, &buf[i]);
  1398. if (ret)
  1399. goto error;
  1400. }
  1401. info("firmware version:%d.%d.%d", buf[0], buf[1], buf[2]);
  1402. /* settings for mp2if */
  1403. if (state->config.output_mode == AF9013_OUTPUT_MODE_USB) {
  1404. /* AF9015 split PSB to 1.5k + 0.5k */
  1405. ret = af9013_write_reg_bits(state, 0xd50b, 2, 1, 1);
  1406. } else {
  1407. /* AF9013 change the output bit to data7 */
  1408. ret = af9013_write_reg_bits(state, 0xd500, 3, 1, 1);
  1409. if (ret)
  1410. goto error;
  1411. /* AF9013 set mpeg to full speed */
  1412. ret = af9013_write_reg_bits(state, 0xd502, 4, 1, 1);
  1413. }
  1414. if (ret)
  1415. goto error;
  1416. ret = af9013_write_reg_bits(state, 0xd520, 4, 1, 1);
  1417. if (ret)
  1418. goto error;
  1419. /* set GPIOs */
  1420. for (i = 0; i < sizeof(state->config.gpio); i++) {
  1421. ret = af9013_set_gpio(state, i, state->config.gpio[i]);
  1422. if (ret)
  1423. goto error;
  1424. }
  1425. /* create dvb_frontend */
  1426. memcpy(&state->frontend.ops, &af9013_ops,
  1427. sizeof(struct dvb_frontend_ops));
  1428. state->frontend.demodulator_priv = state;
  1429. return &state->frontend;
  1430. error:
  1431. kfree(state);
  1432. return NULL;
  1433. }
  1434. EXPORT_SYMBOL(af9013_attach);
  1435. static struct dvb_frontend_ops af9013_ops = {
  1436. .info = {
  1437. .name = "Afatech AF9013 DVB-T",
  1438. .type = FE_OFDM,
  1439. .frequency_min = 174000000,
  1440. .frequency_max = 862000000,
  1441. .frequency_stepsize = 250000,
  1442. .frequency_tolerance = 0,
  1443. .caps =
  1444. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  1445. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  1446. FE_CAN_QPSK | FE_CAN_QAM_16 |
  1447. FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
  1448. FE_CAN_TRANSMISSION_MODE_AUTO |
  1449. FE_CAN_GUARD_INTERVAL_AUTO |
  1450. FE_CAN_HIERARCHY_AUTO |
  1451. FE_CAN_RECOVER |
  1452. FE_CAN_MUTE_TS
  1453. },
  1454. .release = af9013_release,
  1455. .init = af9013_init,
  1456. .sleep = af9013_sleep,
  1457. .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
  1458. .set_frontend = af9013_set_frontend,
  1459. .get_frontend = af9013_get_frontend,
  1460. .get_tune_settings = af9013_get_tune_settings,
  1461. .read_status = af9013_read_status,
  1462. .read_ber = af9013_read_ber,
  1463. .read_signal_strength = af9013_read_signal_strength,
  1464. .read_snr = af9013_read_snr,
  1465. .read_ucblocks = af9013_read_ucblocks,
  1466. };
  1467. module_param_named(debug, af9013_debug, int, 0644);
  1468. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  1469. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  1470. MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
  1471. MODULE_LICENSE("GPL");