dm1105.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921
  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/proc_fs.h>
  26. #include <linux/pci.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/input.h>
  29. #include <media/ir-common.h>
  30. #include "demux.h"
  31. #include "dmxdev.h"
  32. #include "dvb_demux.h"
  33. #include "dvb_frontend.h"
  34. #include "dvb_net.h"
  35. #include "dvbdev.h"
  36. #include "dvb-pll.h"
  37. #include "stv0299.h"
  38. #include "stv0288.h"
  39. #include "stb6000.h"
  40. #include "si21xx.h"
  41. #include "cx24116.h"
  42. #include "z0194a.h"
  43. /* ----------------------------------------------- */
  44. /*
  45. * PCI ID's
  46. */
  47. #ifndef PCI_VENDOR_ID_TRIGEM
  48. #define PCI_VENDOR_ID_TRIGEM 0x109f
  49. #endif
  50. #ifndef PCI_DEVICE_ID_DM1105
  51. #define PCI_DEVICE_ID_DM1105 0x036f
  52. #endif
  53. #ifndef PCI_DEVICE_ID_DW2002
  54. #define PCI_DEVICE_ID_DW2002 0x2002
  55. #endif
  56. #ifndef PCI_DEVICE_ID_DW2004
  57. #define PCI_DEVICE_ID_DW2004 0x2004
  58. #endif
  59. /* ----------------------------------------------- */
  60. /* sdmc dm1105 registers */
  61. /* TS Control */
  62. #define DM1105_TSCTR 0x00
  63. #define DM1105_DTALENTH 0x04
  64. /* GPIO Interface */
  65. #define DM1105_GPIOVAL 0x08
  66. #define DM1105_GPIOCTR 0x0c
  67. /* PID serial number */
  68. #define DM1105_PIDN 0x10
  69. /* Odd-even secret key select */
  70. #define DM1105_CWSEL 0x14
  71. /* Host Command Interface */
  72. #define DM1105_HOST_CTR 0x18
  73. #define DM1105_HOST_AD 0x1c
  74. /* PCI Interface */
  75. #define DM1105_CR 0x30
  76. #define DM1105_RST 0x34
  77. #define DM1105_STADR 0x38
  78. #define DM1105_RLEN 0x3c
  79. #define DM1105_WRP 0x40
  80. #define DM1105_INTCNT 0x44
  81. #define DM1105_INTMAK 0x48
  82. #define DM1105_INTSTS 0x4c
  83. /* CW Value */
  84. #define DM1105_ODD 0x50
  85. #define DM1105_EVEN 0x58
  86. /* PID Value */
  87. #define DM1105_PID 0x60
  88. /* IR Control */
  89. #define DM1105_IRCTR 0x64
  90. #define DM1105_IRMODE 0x68
  91. #define DM1105_SYSTEMCODE 0x6c
  92. #define DM1105_IRCODE 0x70
  93. /* Unknown Values */
  94. #define DM1105_ENCRYPT 0x74
  95. #define DM1105_VER 0x7c
  96. /* I2C Interface */
  97. #define DM1105_I2CCTR 0x80
  98. #define DM1105_I2CSTS 0x81
  99. #define DM1105_I2CDAT 0x82
  100. #define DM1105_I2C_RA 0x83
  101. /* ----------------------------------------------- */
  102. /* Interrupt Mask Bits */
  103. #define INTMAK_TSIRQM 0x01
  104. #define INTMAK_HIRQM 0x04
  105. #define INTMAK_IRM 0x08
  106. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  107. INTMAK_HIRQM | \
  108. INTMAK_IRM)
  109. #define INTMAK_NONEMASK 0x00
  110. /* Interrupt Status Bits */
  111. #define INTSTS_TSIRQ 0x01
  112. #define INTSTS_HIRQ 0x04
  113. #define INTSTS_IR 0x08
  114. /* IR Control Bits */
  115. #define DM1105_IR_EN 0x01
  116. #define DM1105_SYS_CHK 0x02
  117. #define DM1105_REP_FLG 0x08
  118. /* EEPROM addr */
  119. #define IIC_24C01_addr 0xa0
  120. /* Max board count */
  121. #define DM1105_MAX 0x04
  122. #define DRIVER_NAME "dm1105"
  123. #define DM1105_DMA_PACKETS 47
  124. #define DM1105_DMA_PACKET_LENGTH (128*4)
  125. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  126. /* GPIO's for LNB power control */
  127. #define DM1105_LNB_MASK 0x00000000
  128. #define DM1105_LNB_13V 0x00010100
  129. #define DM1105_LNB_18V 0x00000100
  130. static int ir_debug;
  131. module_param(ir_debug, int, 0644);
  132. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  133. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  134. static u16 ir_codes_dm1105_nec[128] = {
  135. [0x0a] = KEY_Q, /*power*/
  136. [0x0c] = KEY_M, /*mute*/
  137. [0x11] = KEY_1,
  138. [0x12] = KEY_2,
  139. [0x13] = KEY_3,
  140. [0x14] = KEY_4,
  141. [0x15] = KEY_5,
  142. [0x16] = KEY_6,
  143. [0x17] = KEY_7,
  144. [0x18] = KEY_8,
  145. [0x19] = KEY_9,
  146. [0x10] = KEY_0,
  147. [0x1c] = KEY_PAGEUP, /*ch+*/
  148. [0x0f] = KEY_PAGEDOWN, /*ch-*/
  149. [0x1a] = KEY_O, /*vol+*/
  150. [0x0e] = KEY_Z, /*vol-*/
  151. [0x04] = KEY_R, /*rec*/
  152. [0x09] = KEY_D, /*fav*/
  153. [0x08] = KEY_BACKSPACE, /*rewind*/
  154. [0x07] = KEY_A, /*fast*/
  155. [0x0b] = KEY_P, /*pause*/
  156. [0x02] = KEY_ESC, /*cancel*/
  157. [0x03] = KEY_G, /*tab*/
  158. [0x00] = KEY_UP, /*up*/
  159. [0x1f] = KEY_ENTER, /*ok*/
  160. [0x01] = KEY_DOWN, /*down*/
  161. [0x05] = KEY_C, /*cap*/
  162. [0x06] = KEY_S, /*stop*/
  163. [0x40] = KEY_F, /*full*/
  164. [0x1e] = KEY_W, /*tvmode*/
  165. [0x1b] = KEY_B, /*recall*/
  166. };
  167. /* infrared remote control */
  168. struct infrared {
  169. u16 key_map[128];
  170. struct input_dev *input_dev;
  171. char input_phys[32];
  172. struct tasklet_struct ir_tasklet;
  173. u32 ir_command;
  174. };
  175. struct dm1105dvb {
  176. /* pci */
  177. struct pci_dev *pdev;
  178. u8 __iomem *io_mem;
  179. /* ir */
  180. struct infrared ir;
  181. /* dvb */
  182. struct dmx_frontend hw_frontend;
  183. struct dmx_frontend mem_frontend;
  184. struct dmxdev dmxdev;
  185. struct dvb_adapter dvb_adapter;
  186. struct dvb_demux demux;
  187. struct dvb_frontend *fe;
  188. struct dvb_net dvbnet;
  189. unsigned int full_ts_users;
  190. /* i2c */
  191. struct i2c_adapter i2c_adap;
  192. /* dma */
  193. dma_addr_t dma_addr;
  194. unsigned char *ts_buf;
  195. u32 wrp;
  196. u32 buffer_size;
  197. unsigned int PacketErrorCount;
  198. unsigned int dmarst;
  199. spinlock_t lock;
  200. };
  201. #define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg]))
  202. static struct dm1105dvb *dm1105dvb_local;
  203. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  204. struct i2c_msg *msgs, int num)
  205. {
  206. struct dm1105dvb *dm1105dvb ;
  207. int addr, rc, i, j, k, len, byte, data;
  208. u8 status;
  209. dm1105dvb = i2c_adap->algo_data;
  210. for (i = 0; i < num; i++) {
  211. outb(0x00, dm_io_mem(DM1105_I2CCTR));
  212. if (msgs[i].flags & I2C_M_RD) {
  213. /* read bytes */
  214. addr = msgs[i].addr << 1;
  215. addr |= 1;
  216. outb(addr, dm_io_mem(DM1105_I2CDAT));
  217. for (byte = 0; byte < msgs[i].len; byte++)
  218. outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1));
  219. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  220. for (j = 0; j < 55; j++) {
  221. mdelay(10);
  222. status = inb(dm_io_mem(DM1105_I2CSTS));
  223. if ((status & 0xc0) == 0x40)
  224. break;
  225. }
  226. if (j >= 55)
  227. return -1;
  228. for (byte = 0; byte < msgs[i].len; byte++) {
  229. rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1));
  230. if (rc < 0)
  231. goto err;
  232. msgs[i].buf[byte] = rc;
  233. }
  234. } else {
  235. if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  236. /* prepaired for cx24116 firmware */
  237. /* Write in small blocks */
  238. len = msgs[i].len - 1;
  239. k = 1;
  240. do {
  241. outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT));
  242. outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1));
  243. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  244. data = msgs[i].buf[k+byte];
  245. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
  246. }
  247. outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
  248. for (j = 0; j < 25; j++) {
  249. mdelay(10);
  250. status = inb(dm_io_mem(DM1105_I2CSTS));
  251. if ((status & 0xc0) == 0x40)
  252. break;
  253. }
  254. if (j >= 25)
  255. return -1;
  256. k += 48;
  257. len -= 48;
  258. } while (len > 0);
  259. } else {
  260. /* write bytes */
  261. outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
  262. for (byte = 0; byte < msgs[i].len; byte++) {
  263. data = msgs[i].buf[byte];
  264. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
  265. }
  266. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  267. for (j = 0; j < 25; j++) {
  268. mdelay(10);
  269. status = inb(dm_io_mem(DM1105_I2CSTS));
  270. if ((status & 0xc0) == 0x40)
  271. break;
  272. }
  273. if (j >= 25)
  274. return -1;
  275. }
  276. }
  277. }
  278. return num;
  279. err:
  280. return rc;
  281. }
  282. static u32 functionality(struct i2c_adapter *adap)
  283. {
  284. return I2C_FUNC_I2C;
  285. }
  286. static struct i2c_algorithm dm1105_algo = {
  287. .master_xfer = dm1105_i2c_xfer,
  288. .functionality = functionality,
  289. };
  290. static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed)
  291. {
  292. return container_of(feed->demux, struct dm1105dvb, demux);
  293. }
  294. static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe)
  295. {
  296. return container_of(fe->dvb, struct dm1105dvb, dvb_adapter);
  297. }
  298. static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  299. {
  300. struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe);
  301. if (voltage == SEC_VOLTAGE_18) {
  302. outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
  303. outl(DM1105_LNB_18V, dm_io_mem(DM1105_GPIOVAL));
  304. } else {
  305. /*LNB ON-13V by default!*/
  306. outl(DM1105_LNB_MASK, dm_io_mem(DM1105_GPIOCTR));
  307. outl(DM1105_LNB_13V, dm_io_mem(DM1105_GPIOVAL));
  308. }
  309. return 0;
  310. }
  311. static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb)
  312. {
  313. outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR));
  314. }
  315. static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb)
  316. {
  317. dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr);
  318. return !dm1105dvb->ts_buf;
  319. }
  320. static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb)
  321. {
  322. pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr);
  323. }
  324. static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb)
  325. {
  326. outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK));
  327. outb(1, dm_io_mem(DM1105_CR));
  328. }
  329. static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb)
  330. {
  331. outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK));
  332. outb(0, dm_io_mem(DM1105_CR));
  333. }
  334. static int dm1105dvb_start_feed(struct dvb_demux_feed *f)
  335. {
  336. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  337. if (dm1105dvb->full_ts_users++ == 0)
  338. dm1105dvb_enable_irqs(dm1105dvb);
  339. return 0;
  340. }
  341. static int dm1105dvb_stop_feed(struct dvb_demux_feed *f)
  342. {
  343. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  344. if (--dm1105dvb->full_ts_users == 0)
  345. dm1105dvb_disable_irqs(dm1105dvb);
  346. return 0;
  347. }
  348. /* ir tasklet */
  349. static void dm1105_emit_key(unsigned long parm)
  350. {
  351. struct infrared *ir = (struct infrared *) parm;
  352. u32 ircom = ir->ir_command;
  353. u8 data;
  354. u16 keycode;
  355. data = (ircom >> 8) & 0x7f;
  356. input_event(ir->input_dev, EV_MSC, MSC_RAW, (0x0000f8 << 16) | data);
  357. input_event(ir->input_dev, EV_MSC, MSC_SCAN, data);
  358. keycode = ir->key_map[data];
  359. if (!keycode)
  360. return;
  361. input_event(ir->input_dev, EV_KEY, keycode, 1);
  362. input_sync(ir->input_dev);
  363. input_event(ir->input_dev, EV_KEY, keycode, 0);
  364. input_sync(ir->input_dev);
  365. }
  366. static irqreturn_t dm1105dvb_irq(int irq, void *dev_id)
  367. {
  368. struct dm1105dvb *dm1105dvb = dev_id;
  369. unsigned int piece;
  370. unsigned int nbpackets;
  371. u32 command;
  372. u32 nextwrp;
  373. u32 oldwrp;
  374. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  375. unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS));
  376. outb(intsts, dm_io_mem(DM1105_INTSTS));
  377. switch (intsts) {
  378. case INTSTS_TSIRQ:
  379. case (INTSTS_TSIRQ | INTSTS_IR):
  380. nextwrp = inl(dm_io_mem(DM1105_WRP)) -
  381. inl(dm_io_mem(DM1105_STADR)) ;
  382. oldwrp = dm1105dvb->wrp;
  383. spin_lock(&dm1105dvb->lock);
  384. if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) &&
  385. (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) &&
  386. (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  387. dm1105dvb->PacketErrorCount++;
  388. /* bad packet found */
  389. if ((dm1105dvb->PacketErrorCount >= 2) &&
  390. (dm1105dvb->dmarst == 0)) {
  391. outb(1, dm_io_mem(DM1105_RST));
  392. dm1105dvb->wrp = 0;
  393. dm1105dvb->PacketErrorCount = 0;
  394. dm1105dvb->dmarst = 0;
  395. spin_unlock(&dm1105dvb->lock);
  396. return IRQ_HANDLED;
  397. }
  398. }
  399. if (nextwrp < oldwrp) {
  400. piece = dm1105dvb->buffer_size - oldwrp;
  401. memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size, dm1105dvb->ts_buf, nextwrp);
  402. nbpackets = (piece + nextwrp)/188;
  403. } else {
  404. nbpackets = (nextwrp - oldwrp)/188;
  405. }
  406. dvb_dmx_swfilter_packets(&dm1105dvb->demux, &dm1105dvb->ts_buf[oldwrp], nbpackets);
  407. dm1105dvb->wrp = nextwrp;
  408. spin_unlock(&dm1105dvb->lock);
  409. break;
  410. case INTSTS_IR:
  411. command = inl(dm_io_mem(DM1105_IRCODE));
  412. if (ir_debug)
  413. printk("dm1105: received byte 0x%04x\n", command);
  414. dm1105dvb->ir.ir_command = command;
  415. tasklet_schedule(&dm1105dvb->ir.ir_tasklet);
  416. break;
  417. }
  418. return IRQ_HANDLED;
  419. }
  420. /* register with input layer */
  421. static void input_register_keys(struct infrared *ir)
  422. {
  423. int i;
  424. memset(ir->input_dev->keybit, 0, sizeof(ir->input_dev->keybit));
  425. for (i = 0; i < ARRAY_SIZE(ir->key_map); i++)
  426. set_bit(ir->key_map[i], ir->input_dev->keybit);
  427. ir->input_dev->keycode = ir->key_map;
  428. ir->input_dev->keycodesize = sizeof(ir->key_map[0]);
  429. ir->input_dev->keycodemax = ARRAY_SIZE(ir->key_map);
  430. }
  431. int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
  432. {
  433. struct input_dev *input_dev;
  434. int err;
  435. dm1105dvb_local = dm1105;
  436. input_dev = input_allocate_device();
  437. if (!input_dev)
  438. return -ENOMEM;
  439. dm1105->ir.input_dev = input_dev;
  440. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  441. "pci-%s/ir0", pci_name(dm1105->pdev));
  442. input_dev->evbit[0] = BIT(EV_KEY);
  443. input_dev->name = "DVB on-card IR receiver";
  444. input_dev->phys = dm1105->ir.input_phys;
  445. input_dev->id.bustype = BUS_PCI;
  446. input_dev->id.version = 2;
  447. if (dm1105->pdev->subsystem_vendor) {
  448. input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
  449. input_dev->id.product = dm1105->pdev->subsystem_device;
  450. } else {
  451. input_dev->id.vendor = dm1105->pdev->vendor;
  452. input_dev->id.product = dm1105->pdev->device;
  453. }
  454. input_dev->dev.parent = &dm1105->pdev->dev;
  455. /* initial keymap */
  456. memcpy(dm1105->ir.key_map, ir_codes_dm1105_nec, sizeof dm1105->ir.key_map);
  457. input_register_keys(&dm1105->ir);
  458. err = input_register_device(input_dev);
  459. if (err) {
  460. input_free_device(input_dev);
  461. return err;
  462. }
  463. tasklet_init(&dm1105->ir.ir_tasklet, dm1105_emit_key, (unsigned long) &dm1105->ir);
  464. return 0;
  465. }
  466. void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
  467. {
  468. tasklet_kill(&dm1105->ir.ir_tasklet);
  469. input_unregister_device(dm1105->ir.input_dev);
  470. }
  471. static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
  472. {
  473. dm1105dvb_disable_irqs(dm1105dvb);
  474. outb(0, dm_io_mem(DM1105_HOST_CTR));
  475. /*DATALEN 188,*/
  476. outb(188, dm_io_mem(DM1105_DTALENTH));
  477. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  478. outw(0xc10a, dm_io_mem(DM1105_TSCTR));
  479. /* map DMA and set address */
  480. dm1105dvb_dma_map(dm1105dvb);
  481. dm1105dvb_set_dma_addr(dm1105dvb);
  482. /* big buffer */
  483. outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN));
  484. outb(47, dm_io_mem(DM1105_INTCNT));
  485. /* IR NEC mode enable */
  486. outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR));
  487. outb(0, dm_io_mem(DM1105_IRMODE));
  488. outw(0, dm_io_mem(DM1105_SYSTEMCODE));
  489. return 0;
  490. }
  491. static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb)
  492. {
  493. dm1105dvb_disable_irqs(dm1105dvb);
  494. /* IR disable */
  495. outb(0, dm_io_mem(DM1105_IRCTR));
  496. outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK));
  497. dm1105dvb_dma_unmap(dm1105dvb);
  498. }
  499. static struct stv0299_config sharp_z0194a_config = {
  500. .demod_address = 0x68,
  501. .inittab = sharp_z0194a_inittab,
  502. .mclk = 88000000UL,
  503. .invert = 1,
  504. .skip_reinit = 0,
  505. .lock_output = STV0299_LOCKOUTPUT_1,
  506. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  507. .min_delay_ms = 100,
  508. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  509. };
  510. static struct stv0288_config earda_config = {
  511. .demod_address = 0x68,
  512. .min_delay_ms = 100,
  513. };
  514. static struct si21xx_config serit_config = {
  515. .demod_address = 0x68,
  516. .min_delay_ms = 100,
  517. };
  518. static struct cx24116_config serit_sp2633_config = {
  519. .demod_address = 0x55,
  520. };
  521. static int __devinit frontend_init(struct dm1105dvb *dm1105dvb)
  522. {
  523. int ret;
  524. switch (dm1105dvb->pdev->subsystem_device) {
  525. case PCI_DEVICE_ID_DW2002:
  526. dm1105dvb->fe = dvb_attach(
  527. stv0299_attach, &sharp_z0194a_config,
  528. &dm1105dvb->i2c_adap);
  529. if (dm1105dvb->fe) {
  530. dm1105dvb->fe->ops.set_voltage =
  531. dm1105dvb_set_voltage;
  532. dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60,
  533. &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
  534. }
  535. if (!dm1105dvb->fe) {
  536. dm1105dvb->fe = dvb_attach(
  537. stv0288_attach, &earda_config,
  538. &dm1105dvb->i2c_adap);
  539. if (dm1105dvb->fe) {
  540. dm1105dvb->fe->ops.set_voltage =
  541. dm1105dvb_set_voltage;
  542. dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61,
  543. &dm1105dvb->i2c_adap);
  544. }
  545. }
  546. if (!dm1105dvb->fe) {
  547. dm1105dvb->fe = dvb_attach(
  548. si21xx_attach, &serit_config,
  549. &dm1105dvb->i2c_adap);
  550. if (dm1105dvb->fe)
  551. dm1105dvb->fe->ops.set_voltage =
  552. dm1105dvb_set_voltage;
  553. }
  554. break;
  555. case PCI_DEVICE_ID_DW2004:
  556. dm1105dvb->fe = dvb_attach(
  557. cx24116_attach, &serit_sp2633_config,
  558. &dm1105dvb->i2c_adap);
  559. if (dm1105dvb->fe)
  560. dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage;
  561. break;
  562. }
  563. if (!dm1105dvb->fe) {
  564. dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n");
  565. return -ENODEV;
  566. }
  567. ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe);
  568. if (ret < 0) {
  569. if (dm1105dvb->fe->ops.release)
  570. dm1105dvb->fe->ops.release(dm1105dvb->fe);
  571. dm1105dvb->fe = NULL;
  572. return ret;
  573. }
  574. return 0;
  575. }
  576. static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
  577. {
  578. static u8 command[1] = { 0x28 };
  579. struct i2c_msg msg[] = {
  580. { .addr = IIC_24C01_addr >> 1, .flags = 0,
  581. .buf = command, .len = 1 },
  582. { .addr = IIC_24C01_addr >> 1, .flags = I2C_M_RD,
  583. .buf = mac, .len = 6 },
  584. };
  585. dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2);
  586. dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac);
  587. }
  588. static int __devinit dm1105_probe(struct pci_dev *pdev,
  589. const struct pci_device_id *ent)
  590. {
  591. struct dm1105dvb *dm1105dvb;
  592. struct dvb_adapter *dvb_adapter;
  593. struct dvb_demux *dvbdemux;
  594. struct dmx_demux *dmx;
  595. int ret = -ENOMEM;
  596. dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL);
  597. if (!dm1105dvb)
  598. goto out;
  599. dm1105dvb->pdev = pdev;
  600. dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES;
  601. dm1105dvb->PacketErrorCount = 0;
  602. dm1105dvb->dmarst = 0;
  603. ret = pci_enable_device(pdev);
  604. if (ret < 0)
  605. goto err_kfree;
  606. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  607. if (ret < 0)
  608. goto err_pci_disable_device;
  609. pci_set_master(pdev);
  610. ret = pci_request_regions(pdev, DRIVER_NAME);
  611. if (ret < 0)
  612. goto err_pci_disable_device;
  613. dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  614. if (!dm1105dvb->io_mem) {
  615. ret = -EIO;
  616. goto err_pci_release_regions;
  617. }
  618. spin_lock_init(&dm1105dvb->lock);
  619. pci_set_drvdata(pdev, dm1105dvb);
  620. ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED, DRIVER_NAME, dm1105dvb);
  621. if (ret < 0)
  622. goto err_pci_iounmap;
  623. ret = dm1105dvb_hw_init(dm1105dvb);
  624. if (ret < 0)
  625. goto err_free_irq;
  626. /* i2c */
  627. i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb);
  628. strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME);
  629. dm1105dvb->i2c_adap.owner = THIS_MODULE;
  630. dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  631. dm1105dvb->i2c_adap.dev.parent = &pdev->dev;
  632. dm1105dvb->i2c_adap.algo = &dm1105_algo;
  633. dm1105dvb->i2c_adap.algo_data = dm1105dvb;
  634. ret = i2c_add_adapter(&dm1105dvb->i2c_adap);
  635. if (ret < 0)
  636. goto err_dm1105dvb_hw_exit;
  637. /* dvb */
  638. ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME,
  639. THIS_MODULE, &pdev->dev, adapter_nr);
  640. if (ret < 0)
  641. goto err_i2c_del_adapter;
  642. dvb_adapter = &dm1105dvb->dvb_adapter;
  643. dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac);
  644. dvbdemux = &dm1105dvb->demux;
  645. dvbdemux->filternum = 256;
  646. dvbdemux->feednum = 256;
  647. dvbdemux->start_feed = dm1105dvb_start_feed;
  648. dvbdemux->stop_feed = dm1105dvb_stop_feed;
  649. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  650. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  651. ret = dvb_dmx_init(dvbdemux);
  652. if (ret < 0)
  653. goto err_dvb_unregister_adapter;
  654. dmx = &dvbdemux->dmx;
  655. dm1105dvb->dmxdev.filternum = 256;
  656. dm1105dvb->dmxdev.demux = dmx;
  657. dm1105dvb->dmxdev.capabilities = 0;
  658. ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter);
  659. if (ret < 0)
  660. goto err_dvb_dmx_release;
  661. dm1105dvb->hw_frontend.source = DMX_FRONTEND_0;
  662. ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend);
  663. if (ret < 0)
  664. goto err_dvb_dmxdev_release;
  665. dm1105dvb->mem_frontend.source = DMX_MEMORY_FE;
  666. ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend);
  667. if (ret < 0)
  668. goto err_remove_hw_frontend;
  669. ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend);
  670. if (ret < 0)
  671. goto err_remove_mem_frontend;
  672. ret = frontend_init(dm1105dvb);
  673. if (ret < 0)
  674. goto err_disconnect_frontend;
  675. dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx);
  676. dm1105_ir_init(dm1105dvb);
  677. out:
  678. return ret;
  679. err_disconnect_frontend:
  680. dmx->disconnect_frontend(dmx);
  681. err_remove_mem_frontend:
  682. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  683. err_remove_hw_frontend:
  684. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  685. err_dvb_dmxdev_release:
  686. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  687. err_dvb_dmx_release:
  688. dvb_dmx_release(dvbdemux);
  689. err_dvb_unregister_adapter:
  690. dvb_unregister_adapter(dvb_adapter);
  691. err_i2c_del_adapter:
  692. i2c_del_adapter(&dm1105dvb->i2c_adap);
  693. err_dm1105dvb_hw_exit:
  694. dm1105dvb_hw_exit(dm1105dvb);
  695. err_free_irq:
  696. free_irq(pdev->irq, dm1105dvb);
  697. err_pci_iounmap:
  698. pci_iounmap(pdev, dm1105dvb->io_mem);
  699. err_pci_release_regions:
  700. pci_release_regions(pdev);
  701. err_pci_disable_device:
  702. pci_disable_device(pdev);
  703. err_kfree:
  704. pci_set_drvdata(pdev, NULL);
  705. kfree(dm1105dvb);
  706. goto out;
  707. }
  708. static void __devexit dm1105_remove(struct pci_dev *pdev)
  709. {
  710. struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev);
  711. struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter;
  712. struct dvb_demux *dvbdemux = &dm1105dvb->demux;
  713. struct dmx_demux *dmx = &dvbdemux->dmx;
  714. dm1105_ir_exit(dm1105dvb);
  715. dmx->close(dmx);
  716. dvb_net_release(&dm1105dvb->dvbnet);
  717. if (dm1105dvb->fe)
  718. dvb_unregister_frontend(dm1105dvb->fe);
  719. dmx->disconnect_frontend(dmx);
  720. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  721. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  722. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  723. dvb_dmx_release(dvbdemux);
  724. dvb_unregister_adapter(dvb_adapter);
  725. if (&dm1105dvb->i2c_adap)
  726. i2c_del_adapter(&dm1105dvb->i2c_adap);
  727. dm1105dvb_hw_exit(dm1105dvb);
  728. synchronize_irq(pdev->irq);
  729. free_irq(pdev->irq, dm1105dvb);
  730. pci_iounmap(pdev, dm1105dvb->io_mem);
  731. pci_release_regions(pdev);
  732. pci_disable_device(pdev);
  733. pci_set_drvdata(pdev, NULL);
  734. kfree(dm1105dvb);
  735. }
  736. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  737. {
  738. .vendor = PCI_VENDOR_ID_TRIGEM,
  739. .device = PCI_DEVICE_ID_DM1105,
  740. .subvendor = PCI_ANY_ID,
  741. .subdevice = PCI_DEVICE_ID_DW2002,
  742. }, {
  743. .vendor = PCI_VENDOR_ID_TRIGEM,
  744. .device = PCI_DEVICE_ID_DM1105,
  745. .subvendor = PCI_ANY_ID,
  746. .subdevice = PCI_DEVICE_ID_DW2004,
  747. }, {
  748. /* empty */
  749. },
  750. };
  751. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  752. static struct pci_driver dm1105_driver = {
  753. .name = DRIVER_NAME,
  754. .id_table = dm1105_id_table,
  755. .probe = dm1105_probe,
  756. .remove = __devexit_p(dm1105_remove),
  757. };
  758. static int __init dm1105_init(void)
  759. {
  760. return pci_register_driver(&dm1105_driver);
  761. }
  762. static void __exit dm1105_exit(void)
  763. {
  764. pci_unregister_driver(&dm1105_driver);
  765. }
  766. module_init(dm1105_init);
  767. module_exit(dm1105_exit);
  768. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  769. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  770. MODULE_LICENSE("GPL");