mt2131.c 8.1 KB

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  1. /*
  2. * Driver for Microtune MT2131 "QAM/8VSB single chip tuner"
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/dvb/frontend.h>
  24. #include <linux/i2c.h>
  25. #include "dvb_frontend.h"
  26. #include "mt2131.h"
  27. #include "mt2131_priv.h"
  28. static int debug;
  29. module_param(debug, int, 0644);
  30. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  31. #define dprintk(level,fmt, arg...) if (debug >= level) \
  32. printk(KERN_INFO "%s: " fmt, "mt2131", ## arg)
  33. static u8 mt2131_config1[] = {
  34. 0x01,
  35. 0x50, 0x00, 0x50, 0x80, 0x00, 0x49, 0xfa, 0x88,
  36. 0x08, 0x77, 0x41, 0x04, 0x00, 0x00, 0x00, 0x32,
  37. 0x7f, 0xda, 0x4c, 0x00, 0x10, 0xaa, 0x78, 0x80,
  38. 0xff, 0x68, 0xa0, 0xff, 0xdd, 0x00, 0x00
  39. };
  40. static u8 mt2131_config2[] = {
  41. 0x10,
  42. 0x7f, 0xc8, 0x0a, 0x5f, 0x00, 0x04
  43. };
  44. static int mt2131_readreg(struct mt2131_priv *priv, u8 reg, u8 *val)
  45. {
  46. struct i2c_msg msg[2] = {
  47. { .addr = priv->cfg->i2c_address, .flags = 0,
  48. .buf = &reg, .len = 1 },
  49. { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD,
  50. .buf = val, .len = 1 },
  51. };
  52. if (i2c_transfer(priv->i2c, msg, 2) != 2) {
  53. printk(KERN_WARNING "mt2131 I2C read failed\n");
  54. return -EREMOTEIO;
  55. }
  56. return 0;
  57. }
  58. static int mt2131_writereg(struct mt2131_priv *priv, u8 reg, u8 val)
  59. {
  60. u8 buf[2] = { reg, val };
  61. struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0,
  62. .buf = buf, .len = 2 };
  63. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  64. printk(KERN_WARNING "mt2131 I2C write failed\n");
  65. return -EREMOTEIO;
  66. }
  67. return 0;
  68. }
  69. static int mt2131_writeregs(struct mt2131_priv *priv,u8 *buf, u8 len)
  70. {
  71. struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
  72. .flags = 0, .buf = buf, .len = len };
  73. if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
  74. printk(KERN_WARNING "mt2131 I2C write failed (len=%i)\n",
  75. (int)len);
  76. return -EREMOTEIO;
  77. }
  78. return 0;
  79. }
  80. static int mt2131_set_params(struct dvb_frontend *fe,
  81. struct dvb_frontend_parameters *params)
  82. {
  83. struct mt2131_priv *priv;
  84. int ret=0, i;
  85. u32 freq;
  86. u8 if_band_center;
  87. u32 f_lo1, f_lo2;
  88. u32 div1, num1, div2, num2;
  89. u8 b[8];
  90. u8 lockval = 0;
  91. priv = fe->tuner_priv;
  92. if (fe->ops.info.type == FE_OFDM)
  93. priv->bandwidth = params->u.ofdm.bandwidth;
  94. else
  95. priv->bandwidth = 0;
  96. freq = params->frequency / 1000; // Hz -> kHz
  97. dprintk(1, "%s() freq=%d\n", __func__, freq);
  98. f_lo1 = freq + MT2131_IF1 * 1000;
  99. f_lo1 = (f_lo1 / 250) * 250;
  100. f_lo2 = f_lo1 - freq - MT2131_IF2;
  101. priv->frequency = (f_lo1 - f_lo2 - MT2131_IF2) * 1000;
  102. /* Frequency LO1 = 16MHz * (DIV1 + NUM1/8192 ) */
  103. num1 = f_lo1 * 64 / (MT2131_FREF / 128);
  104. div1 = num1 / 8192;
  105. num1 &= 0x1fff;
  106. /* Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 ) */
  107. num2 = f_lo2 * 64 / (MT2131_FREF / 128);
  108. div2 = num2 / 8192;
  109. num2 &= 0x1fff;
  110. if (freq <= 82500) if_band_center = 0x00; else
  111. if (freq <= 137500) if_band_center = 0x01; else
  112. if (freq <= 192500) if_band_center = 0x02; else
  113. if (freq <= 247500) if_band_center = 0x03; else
  114. if (freq <= 302500) if_band_center = 0x04; else
  115. if (freq <= 357500) if_band_center = 0x05; else
  116. if (freq <= 412500) if_band_center = 0x06; else
  117. if (freq <= 467500) if_band_center = 0x07; else
  118. if (freq <= 522500) if_band_center = 0x08; else
  119. if (freq <= 577500) if_band_center = 0x09; else
  120. if (freq <= 632500) if_band_center = 0x0A; else
  121. if (freq <= 687500) if_band_center = 0x0B; else
  122. if (freq <= 742500) if_band_center = 0x0C; else
  123. if (freq <= 797500) if_band_center = 0x0D; else
  124. if (freq <= 852500) if_band_center = 0x0E; else
  125. if (freq <= 907500) if_band_center = 0x0F; else
  126. if (freq <= 962500) if_band_center = 0x10; else
  127. if (freq <= 1017500) if_band_center = 0x11; else
  128. if (freq <= 1072500) if_band_center = 0x12; else if_band_center = 0x13;
  129. b[0] = 1;
  130. b[1] = (num1 >> 5) & 0xFF;
  131. b[2] = (num1 & 0x1F);
  132. b[3] = div1;
  133. b[4] = (num2 >> 5) & 0xFF;
  134. b[5] = num2 & 0x1F;
  135. b[6] = div2;
  136. dprintk(1, "IF1: %dMHz IF2: %dMHz\n", MT2131_IF1, MT2131_IF2);
  137. dprintk(1, "PLL freq=%dkHz band=%d\n", (int)freq, (int)if_band_center);
  138. dprintk(1, "PLL f_lo1=%dkHz f_lo2=%dkHz\n", (int)f_lo1, (int)f_lo2);
  139. dprintk(1, "PLL div1=%d num1=%d div2=%d num2=%d\n",
  140. (int)div1, (int)num1, (int)div2, (int)num2);
  141. dprintk(1, "PLL [1..6]: %2x %2x %2x %2x %2x %2x\n",
  142. (int)b[1], (int)b[2], (int)b[3], (int)b[4], (int)b[5],
  143. (int)b[6]);
  144. ret = mt2131_writeregs(priv,b,7);
  145. if (ret < 0)
  146. return ret;
  147. mt2131_writereg(priv, 0x0b, if_band_center);
  148. /* Wait for lock */
  149. i = 0;
  150. do {
  151. mt2131_readreg(priv, 0x08, &lockval);
  152. if ((lockval & 0x88) == 0x88)
  153. break;
  154. msleep(4);
  155. i++;
  156. } while (i < 10);
  157. return ret;
  158. }
  159. static int mt2131_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  160. {
  161. struct mt2131_priv *priv = fe->tuner_priv;
  162. dprintk(1, "%s()\n", __func__);
  163. *frequency = priv->frequency;
  164. return 0;
  165. }
  166. static int mt2131_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  167. {
  168. struct mt2131_priv *priv = fe->tuner_priv;
  169. dprintk(1, "%s()\n", __func__);
  170. *bandwidth = priv->bandwidth;
  171. return 0;
  172. }
  173. static int mt2131_get_status(struct dvb_frontend *fe, u32 *status)
  174. {
  175. struct mt2131_priv *priv = fe->tuner_priv;
  176. u8 lock_status = 0;
  177. u8 afc_status = 0;
  178. *status = 0;
  179. mt2131_readreg(priv, 0x08, &lock_status);
  180. if ((lock_status & 0x88) == 0x88)
  181. *status = TUNER_STATUS_LOCKED;
  182. mt2131_readreg(priv, 0x09, &afc_status);
  183. dprintk(1, "%s() - LO Status = 0x%x, AFC Status = 0x%x\n",
  184. __func__, lock_status, afc_status);
  185. return 0;
  186. }
  187. static int mt2131_init(struct dvb_frontend *fe)
  188. {
  189. struct mt2131_priv *priv = fe->tuner_priv;
  190. int ret;
  191. dprintk(1, "%s()\n", __func__);
  192. if ((ret = mt2131_writeregs(priv, mt2131_config1,
  193. sizeof(mt2131_config1))) < 0)
  194. return ret;
  195. mt2131_writereg(priv, 0x0b, 0x09);
  196. mt2131_writereg(priv, 0x15, 0x47);
  197. mt2131_writereg(priv, 0x07, 0xf2);
  198. mt2131_writereg(priv, 0x0b, 0x01);
  199. if ((ret = mt2131_writeregs(priv, mt2131_config2,
  200. sizeof(mt2131_config2))) < 0)
  201. return ret;
  202. return ret;
  203. }
  204. static int mt2131_release(struct dvb_frontend *fe)
  205. {
  206. dprintk(1, "%s()\n", __func__);
  207. kfree(fe->tuner_priv);
  208. fe->tuner_priv = NULL;
  209. return 0;
  210. }
  211. static const struct dvb_tuner_ops mt2131_tuner_ops = {
  212. .info = {
  213. .name = "Microtune MT2131",
  214. .frequency_min = 48000000,
  215. .frequency_max = 860000000,
  216. .frequency_step = 50000,
  217. },
  218. .release = mt2131_release,
  219. .init = mt2131_init,
  220. .set_params = mt2131_set_params,
  221. .get_frequency = mt2131_get_frequency,
  222. .get_bandwidth = mt2131_get_bandwidth,
  223. .get_status = mt2131_get_status
  224. };
  225. struct dvb_frontend * mt2131_attach(struct dvb_frontend *fe,
  226. struct i2c_adapter *i2c,
  227. struct mt2131_config *cfg, u16 if1)
  228. {
  229. struct mt2131_priv *priv = NULL;
  230. u8 id = 0;
  231. dprintk(1, "%s()\n", __func__);
  232. priv = kzalloc(sizeof(struct mt2131_priv), GFP_KERNEL);
  233. if (priv == NULL)
  234. return NULL;
  235. priv->cfg = cfg;
  236. priv->bandwidth = 6000000; /* 6MHz */
  237. priv->i2c = i2c;
  238. if (mt2131_readreg(priv, 0, &id) != 0) {
  239. kfree(priv);
  240. return NULL;
  241. }
  242. if ( (id != 0x3E) && (id != 0x3F) ) {
  243. printk(KERN_ERR "MT2131: Device not found at addr 0x%02x\n",
  244. cfg->i2c_address);
  245. kfree(priv);
  246. return NULL;
  247. }
  248. printk(KERN_INFO "MT2131: successfully identified at address 0x%02x\n",
  249. cfg->i2c_address);
  250. memcpy(&fe->ops.tuner_ops, &mt2131_tuner_ops,
  251. sizeof(struct dvb_tuner_ops));
  252. fe->tuner_priv = priv;
  253. return fe;
  254. }
  255. EXPORT_SYMBOL(mt2131_attach);
  256. MODULE_AUTHOR("Steven Toth");
  257. MODULE_DESCRIPTION("Microtune MT2131 silicon tuner driver");
  258. MODULE_LICENSE("GPL");
  259. /*
  260. * Local variables:
  261. * c-basic-offset: 8
  262. */