atmel_tsadcc.c 11 KB

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  1. /*
  2. * Atmel Touch Screen Driver
  3. *
  4. * Copyright (c) 2008 ATMEL
  5. * Copyright (c) 2008 Dan Liang
  6. * Copyright (c) 2008 TimeSys Corporation
  7. * Copyright (c) 2008 Justin Waters
  8. *
  9. * Based on touchscreen code from Atmel Corporation.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/err.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/input.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/clk.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. /* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
  26. #define ATMEL_TSADCC_CR 0x00 /* Control register */
  27. #define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/
  28. #define ATMEL_TSADCC_START (1 << 1) /* Start conversion */
  29. #define ATMEL_TSADCC_MR 0x04 /* Mode register */
  30. #define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */
  31. #define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */
  32. #define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */
  33. #define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */
  34. #define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */
  35. #define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
  36. #define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
  37. #define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
  38. #define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
  39. #define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
  40. #define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */
  41. #define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */
  42. #define ATMEL_TSADCC_TRGMOD_NONE (0 << 0)
  43. #define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0)
  44. #define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0)
  45. #define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0)
  46. #define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0)
  47. #define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0)
  48. #define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0)
  49. #define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */
  50. #define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */
  51. #define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */
  52. #define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */
  53. #define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */
  54. #define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */
  55. #define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */
  56. #define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */
  57. #define ATMEL_TSADCC_SR 0x1C /* Status register */
  58. #define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */
  59. #define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */
  60. #define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */
  61. #define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */
  62. #define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */
  63. #define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */
  64. #define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */
  65. #define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */
  66. #define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */
  67. #define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */
  68. #define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */
  69. #define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */
  70. #define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */
  71. #define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */
  72. #define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */
  73. #define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */
  74. #define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */
  75. #define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */
  76. #define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */
  77. #define ADC_CLOCK 1000000
  78. struct atmel_tsadcc {
  79. struct input_dev *input;
  80. char phys[32];
  81. struct clk *clk;
  82. int irq;
  83. unsigned int prev_absx;
  84. unsigned int prev_absy;
  85. unsigned char bufferedmeasure;
  86. };
  87. static void __iomem *tsc_base;
  88. #define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg))
  89. #define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg))
  90. static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
  91. {
  92. struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev;
  93. struct input_dev *input_dev = ts_dev->input;
  94. unsigned int status;
  95. unsigned int reg;
  96. status = atmel_tsadcc_read(ATMEL_TSADCC_SR);
  97. status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR);
  98. if (status & ATMEL_TSADCC_NOCNT) {
  99. /* Contact lost */
  100. reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
  101. atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
  102. atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
  103. atmel_tsadcc_write(ATMEL_TSADCC_IDR,
  104. ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
  105. atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
  106. input_report_key(input_dev, BTN_TOUCH, 0);
  107. ts_dev->bufferedmeasure = 0;
  108. input_sync(input_dev);
  109. } else if (status & ATMEL_TSADCC_PENCNT) {
  110. /* Pen detected */
  111. reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
  112. reg &= ~ATMEL_TSADCC_PENDBC;
  113. atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
  114. atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
  115. atmel_tsadcc_write(ATMEL_TSADCC_IER,
  116. ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
  117. atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
  118. ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
  119. } else if (status & ATMEL_TSADCC_EOC(3)) {
  120. /* Conversion finished */
  121. if (ts_dev->bufferedmeasure) {
  122. /* Last measurement is always discarded, since it can
  123. * be erroneous.
  124. * Always report previous measurement */
  125. input_report_abs(input_dev, ABS_X, ts_dev->prev_absx);
  126. input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy);
  127. input_report_key(input_dev, BTN_TOUCH, 1);
  128. input_sync(input_dev);
  129. } else
  130. ts_dev->bufferedmeasure = 1;
  131. /* Now make new measurement */
  132. ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
  133. ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
  134. ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
  135. ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
  136. }
  137. return IRQ_HANDLED;
  138. }
  139. /*
  140. * The functions for inserting/removing us as a module.
  141. */
  142. static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
  143. {
  144. struct atmel_tsadcc *ts_dev;
  145. struct input_dev *input_dev;
  146. struct resource *res;
  147. int err = 0;
  148. unsigned int prsc;
  149. unsigned int reg;
  150. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  151. if (!res) {
  152. dev_err(&pdev->dev, "no mmio resource defined.\n");
  153. return -ENXIO;
  154. }
  155. /* Allocate memory for device */
  156. ts_dev = kzalloc(sizeof(struct atmel_tsadcc), GFP_KERNEL);
  157. if (!ts_dev) {
  158. dev_err(&pdev->dev, "failed to allocate memory.\n");
  159. return -ENOMEM;
  160. }
  161. platform_set_drvdata(pdev, ts_dev);
  162. input_dev = input_allocate_device();
  163. if (!input_dev) {
  164. dev_err(&pdev->dev, "failed to allocate input device.\n");
  165. err = -EBUSY;
  166. goto err_free_mem;
  167. }
  168. ts_dev->irq = platform_get_irq(pdev, 0);
  169. if (ts_dev->irq < 0) {
  170. dev_err(&pdev->dev, "no irq ID is designated.\n");
  171. err = -ENODEV;
  172. goto err_free_dev;
  173. }
  174. if (!request_mem_region(res->start, res->end - res->start + 1,
  175. "atmel tsadcc regs")) {
  176. dev_err(&pdev->dev, "resources is unavailable.\n");
  177. err = -EBUSY;
  178. goto err_free_dev;
  179. }
  180. tsc_base = ioremap(res->start, res->end - res->start + 1);
  181. if (!tsc_base) {
  182. dev_err(&pdev->dev, "failed to map registers.\n");
  183. err = -ENOMEM;
  184. goto err_release_mem;
  185. }
  186. err = request_irq(ts_dev->irq, atmel_tsadcc_interrupt, IRQF_DISABLED,
  187. pdev->dev.driver->name, ts_dev);
  188. if (err) {
  189. dev_err(&pdev->dev, "failed to allocate irq.\n");
  190. goto err_unmap_regs;
  191. }
  192. ts_dev->clk = clk_get(&pdev->dev, "tsc_clk");
  193. if (IS_ERR(ts_dev->clk)) {
  194. dev_err(&pdev->dev, "failed to get ts_clk\n");
  195. err = PTR_ERR(ts_dev->clk);
  196. goto err_free_irq;
  197. }
  198. ts_dev->input = input_dev;
  199. ts_dev->bufferedmeasure = 0;
  200. snprintf(ts_dev->phys, sizeof(ts_dev->phys),
  201. "%s/input0", pdev->dev.bus_id);
  202. input_dev->name = "atmel touch screen controller";
  203. input_dev->phys = ts_dev->phys;
  204. input_dev->dev.parent = &pdev->dev;
  205. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
  206. input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
  207. input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0);
  208. input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0);
  209. /* clk_enable() always returns 0, no need to check it */
  210. clk_enable(ts_dev->clk);
  211. prsc = clk_get_rate(ts_dev->clk);
  212. dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
  213. prsc = prsc / ADC_CLOCK / 2 - 1;
  214. reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
  215. ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
  216. ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
  217. ((prsc << 8) & ATMEL_TSADCC_PRESCAL) | /* PRESCAL */
  218. ((0x13 << 16) & ATMEL_TSADCC_STARTUP) | /* STARTUP */
  219. ((0x0F << 28) & ATMEL_TSADCC_PENDBC); /* PENDBC */
  220. atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
  221. atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
  222. atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
  223. atmel_tsadcc_write(ATMEL_TSADCC_TSR, (0x3 << 24) & ATMEL_TSADCC_TSSHTIM);
  224. atmel_tsadcc_read(ATMEL_TSADCC_SR);
  225. atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
  226. /* All went ok, so register to the input system */
  227. err = input_register_device(input_dev);
  228. if (err)
  229. goto err_fail;
  230. return 0;
  231. err_fail:
  232. clk_disable(ts_dev->clk);
  233. clk_put(ts_dev->clk);
  234. err_free_irq:
  235. free_irq(ts_dev->irq, ts_dev);
  236. err_unmap_regs:
  237. iounmap(tsc_base);
  238. err_release_mem:
  239. release_mem_region(res->start, res->end - res->start + 1);
  240. err_free_dev:
  241. input_free_device(ts_dev->input);
  242. err_free_mem:
  243. kfree(ts_dev);
  244. return err;
  245. }
  246. static int __devexit atmel_tsadcc_remove(struct platform_device *pdev)
  247. {
  248. struct atmel_tsadcc *ts_dev = dev_get_drvdata(&pdev->dev);
  249. struct resource *res;
  250. free_irq(ts_dev->irq, ts_dev);
  251. input_unregister_device(ts_dev->input);
  252. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  253. iounmap(tsc_base);
  254. release_mem_region(res->start, res->end - res->start + 1);
  255. clk_disable(ts_dev->clk);
  256. clk_put(ts_dev->clk);
  257. kfree(ts_dev);
  258. return 0;
  259. }
  260. static struct platform_driver atmel_tsadcc_driver = {
  261. .probe = atmel_tsadcc_probe,
  262. .remove = __devexit_p(atmel_tsadcc_remove),
  263. .driver = {
  264. .name = "atmel_tsadcc",
  265. },
  266. };
  267. static int __init atmel_tsadcc_init(void)
  268. {
  269. return platform_driver_register(&atmel_tsadcc_driver);
  270. }
  271. static void __exit atmel_tsadcc_exit(void)
  272. {
  273. platform_driver_unregister(&atmel_tsadcc_driver);
  274. }
  275. module_init(atmel_tsadcc_init);
  276. module_exit(atmel_tsadcc_exit);
  277. MODULE_LICENSE("GPL");
  278. MODULE_DESCRIPTION("Atmel TouchScreen Driver");
  279. MODULE_AUTHOR("Dan Liang <dan.liang@atmel.com>");