alim15x3.c 15 KB

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  1. /*
  2. * Copyright (C) 1998-2000 Michel Aubry, Maintainer
  3. * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
  4. * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
  5. *
  6. * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
  7. * May be copied or modified under the terms of the GNU General Public License
  8. * Copyright (C) 2002 Alan Cox
  9. * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
  10. * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
  11. * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
  12. *
  13. * (U)DMA capable version of ali 1533/1543(C), 1535(D)
  14. *
  15. **********************************************************************
  16. * 9/7/99 --Parts from the above author are included and need to be
  17. * converted into standard interface, once I finish the thought.
  18. *
  19. * Recent changes
  20. * Don't use LBA48 mode on ALi <= 0xC4
  21. * Don't poke 0x79 with a non ALi northbridge
  22. * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
  23. * Allow UDMA6 on revisions > 0xC4
  24. *
  25. * Documentation
  26. * Chipset documentation available under NDA only
  27. *
  28. */
  29. #include <linux/module.h>
  30. #include <linux/types.h>
  31. #include <linux/kernel.h>
  32. #include <linux/pci.h>
  33. #include <linux/ide.h>
  34. #include <linux/init.h>
  35. #include <linux/dmi.h>
  36. #include <asm/io.h>
  37. #define DRV_NAME "alim15x3"
  38. /*
  39. * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
  40. * (this is DANGEROUS and could result in data corruption).
  41. */
  42. static int wdc_udma;
  43. module_param(wdc_udma, bool, 0);
  44. MODULE_PARM_DESC(wdc_udma,
  45. "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");
  46. /*
  47. * ALi devices are not plug in. Otherwise these static values would
  48. * need to go. They ought to go away anyway
  49. */
  50. static u8 m5229_revision;
  51. static u8 chip_is_1543c_e;
  52. static struct pci_dev *isa_dev;
  53. /**
  54. * ali_set_pio_mode - set host controller for PIO mode
  55. * @drive: drive
  56. * @pio: PIO mode number
  57. *
  58. * Program the controller for the given PIO mode.
  59. */
  60. static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
  61. {
  62. ide_hwif_t *hwif = HWIF(drive);
  63. struct pci_dev *dev = to_pci_dev(hwif->dev);
  64. struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
  65. int s_time = t->setup, a_time = t->active, c_time = t->cycle;
  66. u8 s_clc, a_clc, r_clc;
  67. unsigned long flags;
  68. int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
  69. int port = hwif->channel ? 0x5c : 0x58;
  70. int portFIFO = hwif->channel ? 0x55 : 0x54;
  71. u8 cd_dma_fifo = 0, unit = drive->dn & 1;
  72. if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
  73. s_clc = 0;
  74. if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
  75. a_clc = 0;
  76. if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
  77. r_clc = 1;
  78. } else {
  79. if (r_clc >= 16)
  80. r_clc = 0;
  81. }
  82. local_irq_save(flags);
  83. /*
  84. * PIO mode => ATA FIFO on, ATAPI FIFO off
  85. */
  86. pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
  87. if (drive->media==ide_disk) {
  88. if (unit) {
  89. pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
  90. } else {
  91. pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
  92. }
  93. } else {
  94. if (unit) {
  95. pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
  96. } else {
  97. pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
  98. }
  99. }
  100. pci_write_config_byte(dev, port, s_clc);
  101. pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc);
  102. local_irq_restore(flags);
  103. }
  104. /**
  105. * ali_udma_filter - compute UDMA mask
  106. * @drive: IDE device
  107. *
  108. * Return available UDMA modes.
  109. *
  110. * The actual rules for the ALi are:
  111. * No UDMA on revisions <= 0x20
  112. * Disk only for revisions < 0xC2
  113. * Not WDC drives on M1543C-E (?)
  114. */
  115. static u8 ali_udma_filter(ide_drive_t *drive)
  116. {
  117. if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
  118. if (drive->media != ide_disk)
  119. return 0;
  120. if (wdc_udma == 0 && chip_is_1543c_e &&
  121. strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
  122. return 0;
  123. }
  124. return drive->hwif->ultra_mask;
  125. }
  126. /**
  127. * ali_set_dma_mode - set host controller for DMA mode
  128. * @drive: drive
  129. * @speed: DMA mode
  130. *
  131. * Configure the hardware for the desired IDE transfer mode.
  132. */
  133. static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
  134. {
  135. ide_hwif_t *hwif = HWIF(drive);
  136. struct pci_dev *dev = to_pci_dev(hwif->dev);
  137. u8 speed1 = speed;
  138. u8 unit = drive->dn & 1;
  139. u8 tmpbyte = 0x00;
  140. int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
  141. if (speed == XFER_UDMA_6)
  142. speed1 = 0x47;
  143. if (speed < XFER_UDMA_0) {
  144. u8 ultra_enable = (unit) ? 0x7f : 0xf7;
  145. /*
  146. * clear "ultra enable" bit
  147. */
  148. pci_read_config_byte(dev, m5229_udma, &tmpbyte);
  149. tmpbyte &= ultra_enable;
  150. pci_write_config_byte(dev, m5229_udma, tmpbyte);
  151. /*
  152. * FIXME: Oh, my... DMA timings are never set.
  153. */
  154. } else {
  155. pci_read_config_byte(dev, m5229_udma, &tmpbyte);
  156. tmpbyte &= (0x0f << ((1-unit) << 2));
  157. /*
  158. * enable ultra dma and set timing
  159. */
  160. tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
  161. pci_write_config_byte(dev, m5229_udma, tmpbyte);
  162. if (speed >= XFER_UDMA_3) {
  163. pci_read_config_byte(dev, 0x4b, &tmpbyte);
  164. tmpbyte |= 1;
  165. pci_write_config_byte(dev, 0x4b, tmpbyte);
  166. }
  167. }
  168. }
  169. /**
  170. * ali15x3_dma_setup - begin a DMA phase
  171. * @drive: target device
  172. *
  173. * Returns 1 if the DMA cannot be performed, zero on success.
  174. */
  175. static int ali15x3_dma_setup(ide_drive_t *drive)
  176. {
  177. if (m5229_revision < 0xC2 && drive->media != ide_disk) {
  178. if (rq_data_dir(drive->hwif->hwgroup->rq))
  179. return 1; /* try PIO instead of DMA */
  180. }
  181. return ide_dma_setup(drive);
  182. }
  183. /**
  184. * init_chipset_ali15x3 - Initialise an ALi IDE controller
  185. * @dev: PCI device
  186. *
  187. * This function initializes the ALI IDE controller and where
  188. * appropriate also sets up the 1533 southbridge.
  189. */
  190. static unsigned int init_chipset_ali15x3(struct pci_dev *dev)
  191. {
  192. unsigned long flags;
  193. u8 tmpbyte;
  194. struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
  195. m5229_revision = dev->revision;
  196. isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
  197. local_irq_save(flags);
  198. if (m5229_revision < 0xC2) {
  199. /*
  200. * revision 0x20 (1543-E, 1543-F)
  201. * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
  202. * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
  203. */
  204. pci_read_config_byte(dev, 0x4b, &tmpbyte);
  205. /*
  206. * clear bit 7
  207. */
  208. pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
  209. /*
  210. * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
  211. */
  212. if (m5229_revision >= 0x20 && isa_dev) {
  213. pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
  214. chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
  215. }
  216. goto out;
  217. }
  218. /*
  219. * 1543C-B?, 1535, 1535D, 1553
  220. * Note 1: not all "motherboard" support this detection
  221. * Note 2: if no udma 66 device, the detection may "error".
  222. * but in this case, we will not set the device to
  223. * ultra 66, the detection result is not important
  224. */
  225. /*
  226. * enable "Cable Detection", m5229, 0x4b, bit3
  227. */
  228. pci_read_config_byte(dev, 0x4b, &tmpbyte);
  229. pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
  230. /*
  231. * We should only tune the 1533 enable if we are using an ALi
  232. * North bridge. We might have no north found on some zany
  233. * box without a device at 0:0.0. The ALi bridge will be at
  234. * 0:0.0 so if we didn't find one we know what is cooking.
  235. */
  236. if (north && north->vendor != PCI_VENDOR_ID_AL)
  237. goto out;
  238. if (m5229_revision < 0xC5 && isa_dev)
  239. {
  240. /*
  241. * set south-bridge's enable bit, m1533, 0x79
  242. */
  243. pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
  244. if (m5229_revision == 0xC2) {
  245. /*
  246. * 1543C-B0 (m1533, 0x79, bit 2)
  247. */
  248. pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
  249. } else if (m5229_revision >= 0xC3) {
  250. /*
  251. * 1553/1535 (m1533, 0x79, bit 1)
  252. */
  253. pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
  254. }
  255. }
  256. out:
  257. /*
  258. * CD_ROM DMA on (m5229, 0x53, bit0)
  259. * Enable this bit even if we want to use PIO.
  260. * PIO FIFO off (m5229, 0x53, bit1)
  261. * The hardware will use 0x54h and 0x55h to control PIO FIFO.
  262. * (Not on later devices it seems)
  263. *
  264. * 0x53 changes meaning on later revs - we must no touch
  265. * bit 1 on them. Need to check if 0x20 is the right break.
  266. */
  267. if (m5229_revision >= 0x20) {
  268. pci_read_config_byte(dev, 0x53, &tmpbyte);
  269. if (m5229_revision <= 0x20)
  270. tmpbyte = (tmpbyte & (~0x02)) | 0x01;
  271. else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
  272. tmpbyte |= 0x03;
  273. else
  274. tmpbyte |= 0x01;
  275. pci_write_config_byte(dev, 0x53, tmpbyte);
  276. }
  277. pci_dev_put(north);
  278. pci_dev_put(isa_dev);
  279. local_irq_restore(flags);
  280. return 0;
  281. }
  282. /*
  283. * Cable special cases
  284. */
  285. static const struct dmi_system_id cable_dmi_table[] = {
  286. {
  287. .ident = "HP Pavilion N5430",
  288. .matches = {
  289. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  290. DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
  291. },
  292. },
  293. {
  294. .ident = "Toshiba Satellite S1800-814",
  295. .matches = {
  296. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  297. DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
  298. },
  299. },
  300. { }
  301. };
  302. static int ali_cable_override(struct pci_dev *pdev)
  303. {
  304. /* Fujitsu P2000 */
  305. if (pdev->subsystem_vendor == 0x10CF &&
  306. pdev->subsystem_device == 0x10AF)
  307. return 1;
  308. /* Mitac 8317 (Winbook-A) and relatives */
  309. if (pdev->subsystem_vendor == 0x1071 &&
  310. pdev->subsystem_device == 0x8317)
  311. return 1;
  312. /* Systems by DMI */
  313. if (dmi_check_system(cable_dmi_table))
  314. return 1;
  315. return 0;
  316. }
  317. /**
  318. * ali_cable_detect - cable detection
  319. * @hwif: IDE interface
  320. *
  321. * This checks if the controller and the cable are capable
  322. * of UDMA66 transfers. It doesn't check the drives.
  323. * But see note 2 below!
  324. *
  325. * FIXME: frobs bits that are not defined on newer ALi devicea
  326. */
  327. static u8 ali_cable_detect(ide_hwif_t *hwif)
  328. {
  329. struct pci_dev *dev = to_pci_dev(hwif->dev);
  330. unsigned long flags;
  331. u8 cbl = ATA_CBL_PATA40, tmpbyte;
  332. local_irq_save(flags);
  333. if (m5229_revision >= 0xC2) {
  334. /*
  335. * m5229 80-pin cable detection (from Host View)
  336. *
  337. * 0x4a bit0 is 0 => primary channel has 80-pin
  338. * 0x4a bit1 is 0 => secondary channel has 80-pin
  339. *
  340. * Certain laptops use short but suitable cables
  341. * and don't implement the detect logic.
  342. */
  343. if (ali_cable_override(dev))
  344. cbl = ATA_CBL_PATA40_SHORT;
  345. else {
  346. pci_read_config_byte(dev, 0x4a, &tmpbyte);
  347. if ((tmpbyte & (1 << hwif->channel)) == 0)
  348. cbl = ATA_CBL_PATA80;
  349. }
  350. }
  351. local_irq_restore(flags);
  352. return cbl;
  353. }
  354. #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
  355. /**
  356. * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
  357. * @hwif: interface to configure
  358. *
  359. * Obtain the IRQ tables for an ALi based IDE solution on the PC
  360. * class platforms. This part of the code isn't applicable to the
  361. * Sparc and PowerPC systems.
  362. */
  363. static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
  364. {
  365. struct pci_dev *dev = to_pci_dev(hwif->dev);
  366. u8 ideic, inmir;
  367. s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
  368. 1, 11, 0, 12, 0, 14, 0, 15 };
  369. int irq = -1;
  370. if (dev->device == PCI_DEVICE_ID_AL_M5229)
  371. hwif->irq = hwif->channel ? 15 : 14;
  372. if (isa_dev) {
  373. /*
  374. * read IDE interface control
  375. */
  376. pci_read_config_byte(isa_dev, 0x58, &ideic);
  377. /* bit0, bit1 */
  378. ideic = ideic & 0x03;
  379. /* get IRQ for IDE Controller */
  380. if ((hwif->channel && ideic == 0x03) ||
  381. (!hwif->channel && !ideic)) {
  382. /*
  383. * get SIRQ1 routing table
  384. */
  385. pci_read_config_byte(isa_dev, 0x44, &inmir);
  386. inmir = inmir & 0x0f;
  387. irq = irq_routing_table[inmir];
  388. } else if (hwif->channel && !(ideic & 0x01)) {
  389. /*
  390. * get SIRQ2 routing table
  391. */
  392. pci_read_config_byte(isa_dev, 0x75, &inmir);
  393. inmir = inmir & 0x0f;
  394. irq = irq_routing_table[inmir];
  395. }
  396. if(irq >= 0)
  397. hwif->irq = irq;
  398. }
  399. }
  400. #else
  401. #define init_hwif_ali15x3 NULL
  402. #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
  403. /**
  404. * init_dma_ali15x3 - set up DMA on ALi15x3
  405. * @hwif: IDE interface
  406. * @d: IDE port info
  407. *
  408. * Set up the DMA functionality on the ALi 15x3.
  409. */
  410. static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
  411. const struct ide_port_info *d)
  412. {
  413. struct pci_dev *dev = to_pci_dev(hwif->dev);
  414. unsigned long base = ide_pci_dma_base(hwif, d);
  415. if (base == 0)
  416. return -1;
  417. hwif->dma_base = base;
  418. if (ide_pci_check_simplex(hwif, d) < 0)
  419. return -1;
  420. if (ide_pci_set_master(dev, d->name) < 0)
  421. return -1;
  422. if (!hwif->channel)
  423. outb(inb(base + 2) & 0x60, base + 2);
  424. printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
  425. hwif->name, base, base + 7);
  426. if (ide_allocate_dma_engine(hwif))
  427. return -1;
  428. hwif->dma_ops = &sff_dma_ops;
  429. return 0;
  430. }
  431. static const struct ide_port_ops ali_port_ops = {
  432. .set_pio_mode = ali_set_pio_mode,
  433. .set_dma_mode = ali_set_dma_mode,
  434. .udma_filter = ali_udma_filter,
  435. .cable_detect = ali_cable_detect,
  436. };
  437. static const struct ide_dma_ops ali_dma_ops = {
  438. .dma_host_set = ide_dma_host_set,
  439. .dma_setup = ali15x3_dma_setup,
  440. .dma_exec_cmd = ide_dma_exec_cmd,
  441. .dma_start = ide_dma_start,
  442. .dma_end = ide_dma_end,
  443. .dma_test_irq = ide_dma_test_irq,
  444. .dma_lost_irq = ide_dma_lost_irq,
  445. .dma_timeout = ide_dma_timeout,
  446. };
  447. static const struct ide_port_info ali15x3_chipset __devinitdata = {
  448. .name = DRV_NAME,
  449. .init_chipset = init_chipset_ali15x3,
  450. .init_hwif = init_hwif_ali15x3,
  451. .init_dma = init_dma_ali15x3,
  452. .port_ops = &ali_port_ops,
  453. .pio_mask = ATA_PIO5,
  454. .swdma_mask = ATA_SWDMA2,
  455. .mwdma_mask = ATA_MWDMA2,
  456. };
  457. /**
  458. * alim15x3_init_one - set up an ALi15x3 IDE controller
  459. * @dev: PCI device to set up
  460. *
  461. * Perform the actual set up for an ALi15x3 that has been found by the
  462. * hot plug layer.
  463. */
  464. static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  465. {
  466. struct ide_port_info d = ali15x3_chipset;
  467. u8 rev = dev->revision, idx = id->driver_data;
  468. /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
  469. if (rev <= 0xC4)
  470. d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
  471. if (rev >= 0x20) {
  472. if (rev == 0x20)
  473. d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
  474. if (rev < 0xC2)
  475. d.udma_mask = ATA_UDMA2;
  476. else if (rev == 0xC2 || rev == 0xC3)
  477. d.udma_mask = ATA_UDMA4;
  478. else if (rev == 0xC4)
  479. d.udma_mask = ATA_UDMA5;
  480. else
  481. d.udma_mask = ATA_UDMA6;
  482. d.dma_ops = &ali_dma_ops;
  483. } else {
  484. d.host_flags |= IDE_HFLAG_NO_DMA;
  485. d.mwdma_mask = d.swdma_mask = 0;
  486. }
  487. if (idx == 0)
  488. d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
  489. return ide_pci_init_one(dev, &d, NULL);
  490. }
  491. static const struct pci_device_id alim15x3_pci_tbl[] = {
  492. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
  493. { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
  494. { 0, },
  495. };
  496. MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
  497. static struct pci_driver alim15x3_pci_driver = {
  498. .name = "ALI15x3_IDE",
  499. .id_table = alim15x3_pci_tbl,
  500. .probe = alim15x3_init_one,
  501. .remove = ide_pci_remove,
  502. .suspend = ide_pci_suspend,
  503. .resume = ide_pci_resume,
  504. };
  505. static int __init ali15x3_ide_init(void)
  506. {
  507. return ide_pci_register_driver(&alim15x3_pci_driver);
  508. }
  509. static void __exit ali15x3_ide_exit(void)
  510. {
  511. pci_unregister_driver(&alim15x3_pci_driver);
  512. }
  513. module_init(ali15x3_ide_init);
  514. module_exit(ali15x3_ide_exit);
  515. MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
  516. MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
  517. MODULE_LICENSE("GPL");