synclink_cs.c 112 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/slab.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/vmalloc.h>
  54. #include <linux/init.h>
  55. #include <linux/delay.h>
  56. #include <linux/ioctl.h>
  57. #include <linux/synclink.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  73. #define SYNCLINK_GENERIC_HDLC 1
  74. #else
  75. #define SYNCLINK_GENERIC_HDLC 0
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. struct tty_port port;
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int line;
  127. struct mgsl_icount icount;
  128. int timeout;
  129. int x_char; /* xon/xoff character */
  130. unsigned char read_status_mask;
  131. unsigned char ignore_status_mask;
  132. unsigned char *tx_buf;
  133. int tx_put;
  134. int tx_get;
  135. int tx_count;
  136. /* circular list of fixed length rx buffers */
  137. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  138. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  139. int rx_put; /* index of next empty rx buffer */
  140. int rx_get; /* index of next full rx buffer */
  141. int rx_buf_size; /* size in bytes of single rx buffer */
  142. int rx_buf_count; /* total number of rx buffers */
  143. int rx_frame_count; /* number of full rx buffers */
  144. wait_queue_head_t status_event_wait_q;
  145. wait_queue_head_t event_wait_q;
  146. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  147. struct _mgslpc_info *next_device; /* device list link */
  148. unsigned short imra_value;
  149. unsigned short imrb_value;
  150. unsigned char pim_value;
  151. spinlock_t lock;
  152. struct work_struct task; /* task structure for scheduling bh */
  153. u32 max_frame_size;
  154. u32 pending_bh;
  155. bool bh_running;
  156. bool bh_requested;
  157. int dcd_chkcount; /* check counts to prevent */
  158. int cts_chkcount; /* too many IRQs if a signal */
  159. int dsr_chkcount; /* is floating */
  160. int ri_chkcount;
  161. bool rx_enabled;
  162. bool rx_overflow;
  163. bool tx_enabled;
  164. bool tx_active;
  165. bool tx_aborting;
  166. u32 idle_mode;
  167. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  168. char device_name[25]; /* device instance name */
  169. unsigned int io_base; /* base I/O address of adapter */
  170. unsigned int irq_level;
  171. MGSL_PARAMS params; /* communications parameters */
  172. unsigned char serial_signals; /* current serial signal states */
  173. bool irq_occurred; /* for diagnostics use */
  174. char testing_irq;
  175. unsigned int init_error; /* startup error (DIAGS) */
  176. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  177. bool drop_rts_on_tx_done;
  178. struct _input_signal_events input_signal_events;
  179. /* PCMCIA support */
  180. struct pcmcia_device *p_dev;
  181. dev_node_t node;
  182. int stop;
  183. /* SPPP/Cisco HDLC device parts */
  184. int netcount;
  185. spinlock_t netlock;
  186. #if SYNCLINK_GENERIC_HDLC
  187. struct net_device *netdev;
  188. #endif
  189. } MGSLPC_INFO;
  190. #define MGSLPC_MAGIC 0x5402
  191. /*
  192. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  193. */
  194. #define TXBUFSIZE 4096
  195. #define CHA 0x00 /* channel A offset */
  196. #define CHB 0x40 /* channel B offset */
  197. /*
  198. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  199. */
  200. #undef PVR
  201. #define RXFIFO 0
  202. #define TXFIFO 0
  203. #define STAR 0x20
  204. #define CMDR 0x20
  205. #define RSTA 0x21
  206. #define PRE 0x21
  207. #define MODE 0x22
  208. #define TIMR 0x23
  209. #define XAD1 0x24
  210. #define XAD2 0x25
  211. #define RAH1 0x26
  212. #define RAH2 0x27
  213. #define DAFO 0x27
  214. #define RAL1 0x28
  215. #define RFC 0x28
  216. #define RHCR 0x29
  217. #define RAL2 0x29
  218. #define RBCL 0x2a
  219. #define XBCL 0x2a
  220. #define RBCH 0x2b
  221. #define XBCH 0x2b
  222. #define CCR0 0x2c
  223. #define CCR1 0x2d
  224. #define CCR2 0x2e
  225. #define CCR3 0x2f
  226. #define VSTR 0x34
  227. #define BGR 0x34
  228. #define RLCR 0x35
  229. #define AML 0x36
  230. #define AMH 0x37
  231. #define GIS 0x38
  232. #define IVA 0x38
  233. #define IPC 0x39
  234. #define ISR 0x3a
  235. #define IMR 0x3a
  236. #define PVR 0x3c
  237. #define PIS 0x3d
  238. #define PIM 0x3d
  239. #define PCR 0x3e
  240. #define CCR4 0x3f
  241. // IMR/ISR
  242. #define IRQ_BREAK_ON BIT15 // rx break detected
  243. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  244. #define IRQ_ALLSENT BIT13 // all sent
  245. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  246. #define IRQ_TIMER BIT11 // timer interrupt
  247. #define IRQ_CTS BIT10 // CTS status change
  248. #define IRQ_TXREPEAT BIT9 // tx message repeat
  249. #define IRQ_TXFIFO BIT8 // transmit pool ready
  250. #define IRQ_RXEOM BIT7 // receive message end
  251. #define IRQ_EXITHUNT BIT6 // receive frame start
  252. #define IRQ_RXTIME BIT6 // rx char timeout
  253. #define IRQ_DCD BIT2 // carrier detect status change
  254. #define IRQ_OVERRUN BIT1 // receive frame overflow
  255. #define IRQ_RXFIFO BIT0 // receive pool full
  256. // STAR
  257. #define XFW BIT6 // transmit FIFO write enable
  258. #define CEC BIT2 // command executing
  259. #define CTS BIT1 // CTS state
  260. #define PVR_DTR BIT0
  261. #define PVR_DSR BIT1
  262. #define PVR_RI BIT2
  263. #define PVR_AUTOCTS BIT3
  264. #define PVR_RS232 0x20 /* 0010b */
  265. #define PVR_V35 0xe0 /* 1110b */
  266. #define PVR_RS422 0x40 /* 0100b */
  267. /* Register access functions */
  268. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  269. #define read_reg(info, reg) inb((info)->io_base + (reg))
  270. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  271. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  272. #define set_reg_bits(info, reg, mask) \
  273. write_reg(info, (reg), \
  274. (unsigned char) (read_reg(info, (reg)) | (mask)))
  275. #define clear_reg_bits(info, reg, mask) \
  276. write_reg(info, (reg), \
  277. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  278. /*
  279. * interrupt enable/disable routines
  280. */
  281. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  282. {
  283. if (channel == CHA) {
  284. info->imra_value |= mask;
  285. write_reg16(info, CHA + IMR, info->imra_value);
  286. } else {
  287. info->imrb_value |= mask;
  288. write_reg16(info, CHB + IMR, info->imrb_value);
  289. }
  290. }
  291. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  292. {
  293. if (channel == CHA) {
  294. info->imra_value &= ~mask;
  295. write_reg16(info, CHA + IMR, info->imra_value);
  296. } else {
  297. info->imrb_value &= ~mask;
  298. write_reg16(info, CHB + IMR, info->imrb_value);
  299. }
  300. }
  301. #define port_irq_disable(info, mask) \
  302. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  303. #define port_irq_enable(info, mask) \
  304. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  305. static void rx_start(MGSLPC_INFO *info);
  306. static void rx_stop(MGSLPC_INFO *info);
  307. static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
  308. static void tx_stop(MGSLPC_INFO *info);
  309. static void tx_set_idle(MGSLPC_INFO *info);
  310. static void get_signals(MGSLPC_INFO *info);
  311. static void set_signals(MGSLPC_INFO *info);
  312. static void reset_device(MGSLPC_INFO *info);
  313. static void hdlc_mode(MGSLPC_INFO *info);
  314. static void async_mode(MGSLPC_INFO *info);
  315. static void tx_timeout(unsigned long context);
  316. static int carrier_raised(struct tty_port *port);
  317. static void raise_dtr_rts(struct tty_port *port);
  318. #if SYNCLINK_GENERIC_HDLC
  319. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  320. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  321. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  322. static int hdlcdev_init(MGSLPC_INFO *info);
  323. static void hdlcdev_exit(MGSLPC_INFO *info);
  324. #endif
  325. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  326. static bool register_test(MGSLPC_INFO *info);
  327. static bool irq_test(MGSLPC_INFO *info);
  328. static int adapter_test(MGSLPC_INFO *info);
  329. static int claim_resources(MGSLPC_INFO *info);
  330. static void release_resources(MGSLPC_INFO *info);
  331. static void mgslpc_add_device(MGSLPC_INFO *info);
  332. static void mgslpc_remove_device(MGSLPC_INFO *info);
  333. static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
  334. static void rx_reset_buffers(MGSLPC_INFO *info);
  335. static int rx_alloc_buffers(MGSLPC_INFO *info);
  336. static void rx_free_buffers(MGSLPC_INFO *info);
  337. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  338. /*
  339. * Bottom half interrupt handlers
  340. */
  341. static void bh_handler(struct work_struct *work);
  342. static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
  343. static void bh_status(MGSLPC_INFO *info);
  344. /*
  345. * ioctl handlers
  346. */
  347. static int tiocmget(struct tty_struct *tty, struct file *file);
  348. static int tiocmset(struct tty_struct *tty, struct file *file,
  349. unsigned int set, unsigned int clear);
  350. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  351. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  352. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
  353. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  354. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  355. static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
  356. static int tx_abort(MGSLPC_INFO *info);
  357. static int set_rxenable(MGSLPC_INFO *info, int enable);
  358. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  359. static MGSLPC_INFO *mgslpc_device_list = NULL;
  360. static int mgslpc_device_count = 0;
  361. /*
  362. * Set this param to non-zero to load eax with the
  363. * .text section address and breakpoint on module load.
  364. * This is useful for use with gdb and add-symbol-file command.
  365. */
  366. static int break_on_load=0;
  367. /*
  368. * Driver major number, defaults to zero to get auto
  369. * assigned major number. May be forced as module parameter.
  370. */
  371. static int ttymajor=0;
  372. static int debug_level = 0;
  373. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  374. module_param(break_on_load, bool, 0);
  375. module_param(ttymajor, int, 0);
  376. module_param(debug_level, int, 0);
  377. module_param_array(maxframe, int, NULL, 0);
  378. MODULE_LICENSE("GPL");
  379. static char *driver_name = "SyncLink PC Card driver";
  380. static char *driver_version = "$Revision: 4.34 $";
  381. static struct tty_driver *serial_driver;
  382. /* number of characters left in xmit buffer before we ask for more */
  383. #define WAKEUP_CHARS 256
  384. static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
  385. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  386. /* PCMCIA prototypes */
  387. static int mgslpc_config(struct pcmcia_device *link);
  388. static void mgslpc_release(u_long arg);
  389. static void mgslpc_detach(struct pcmcia_device *p_dev);
  390. /*
  391. * 1st function defined in .text section. Calling this function in
  392. * init_module() followed by a breakpoint allows a remote debugger
  393. * (gdb) to get the .text address for the add-symbol-file command.
  394. * This allows remote debugging of dynamically loadable modules.
  395. */
  396. static void* mgslpc_get_text_ptr(void)
  397. {
  398. return mgslpc_get_text_ptr;
  399. }
  400. /**
  401. * line discipline callback wrappers
  402. *
  403. * The wrappers maintain line discipline references
  404. * while calling into the line discipline.
  405. *
  406. * ldisc_receive_buf - pass receive data to line discipline
  407. */
  408. static void ldisc_receive_buf(struct tty_struct *tty,
  409. const __u8 *data, char *flags, int count)
  410. {
  411. struct tty_ldisc *ld;
  412. if (!tty)
  413. return;
  414. ld = tty_ldisc_ref(tty);
  415. if (ld) {
  416. if (ld->ops->receive_buf)
  417. ld->ops->receive_buf(tty, data, flags, count);
  418. tty_ldisc_deref(ld);
  419. }
  420. }
  421. static const struct tty_port_operations mgslpc_port_ops = {
  422. .carrier_raised = carrier_raised,
  423. .raise_dtr_rts = raise_dtr_rts
  424. };
  425. static int mgslpc_probe(struct pcmcia_device *link)
  426. {
  427. MGSLPC_INFO *info;
  428. int ret;
  429. if (debug_level >= DEBUG_LEVEL_INFO)
  430. printk("mgslpc_attach\n");
  431. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  432. if (!info) {
  433. printk("Error can't allocate device instance data\n");
  434. return -ENOMEM;
  435. }
  436. info->magic = MGSLPC_MAGIC;
  437. tty_port_init(&info->port);
  438. info->port.ops = &mgslpc_port_ops;
  439. INIT_WORK(&info->task, bh_handler);
  440. info->max_frame_size = 4096;
  441. info->port.close_delay = 5*HZ/10;
  442. info->port.closing_wait = 30*HZ;
  443. init_waitqueue_head(&info->status_event_wait_q);
  444. init_waitqueue_head(&info->event_wait_q);
  445. spin_lock_init(&info->lock);
  446. spin_lock_init(&info->netlock);
  447. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  448. info->idle_mode = HDLC_TXIDLE_FLAGS;
  449. info->imra_value = 0xffff;
  450. info->imrb_value = 0xffff;
  451. info->pim_value = 0xff;
  452. info->p_dev = link;
  453. link->priv = info;
  454. /* Initialize the struct pcmcia_device structure */
  455. /* Interrupt setup */
  456. link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
  457. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  458. link->irq.Handler = NULL;
  459. link->conf.Attributes = 0;
  460. link->conf.IntType = INT_MEMORY_AND_IO;
  461. ret = mgslpc_config(link);
  462. if (ret)
  463. return ret;
  464. mgslpc_add_device(info);
  465. return 0;
  466. }
  467. /* Card has been inserted.
  468. */
  469. #define CS_CHECK(fn, ret) \
  470. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  471. static int mgslpc_config(struct pcmcia_device *link)
  472. {
  473. MGSLPC_INFO *info = link->priv;
  474. tuple_t tuple;
  475. cisparse_t parse;
  476. int last_fn, last_ret;
  477. u_char buf[64];
  478. cistpl_cftable_entry_t dflt = { 0 };
  479. cistpl_cftable_entry_t *cfg;
  480. if (debug_level >= DEBUG_LEVEL_INFO)
  481. printk("mgslpc_config(0x%p)\n", link);
  482. tuple.Attributes = 0;
  483. tuple.TupleData = buf;
  484. tuple.TupleDataMax = sizeof(buf);
  485. tuple.TupleOffset = 0;
  486. /* get CIS configuration entry */
  487. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  488. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  489. cfg = &(parse.cftable_entry);
  490. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  491. CS_CHECK(ParseTuple, pcmcia_parse_tuple(&tuple, &parse));
  492. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  493. if (cfg->index == 0)
  494. goto cs_failed;
  495. link->conf.ConfigIndex = cfg->index;
  496. link->conf.Attributes |= CONF_ENABLE_IRQ;
  497. /* IO window settings */
  498. link->io.NumPorts1 = 0;
  499. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  500. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  501. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  502. if (!(io->flags & CISTPL_IO_8BIT))
  503. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  504. if (!(io->flags & CISTPL_IO_16BIT))
  505. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  506. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  507. link->io.BasePort1 = io->win[0].base;
  508. link->io.NumPorts1 = io->win[0].len;
  509. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  510. }
  511. link->conf.Attributes = CONF_ENABLE_IRQ;
  512. link->conf.IntType = INT_MEMORY_AND_IO;
  513. link->conf.ConfigIndex = 8;
  514. link->conf.Present = PRESENT_OPTION;
  515. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  516. link->irq.Handler = mgslpc_isr;
  517. link->irq.Instance = info;
  518. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  519. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  520. info->io_base = link->io.BasePort1;
  521. info->irq_level = link->irq.AssignedIRQ;
  522. /* add to linked list of devices */
  523. sprintf(info->node.dev_name, "mgslpc0");
  524. info->node.major = info->node.minor = 0;
  525. link->dev_node = &info->node;
  526. printk(KERN_INFO "%s: index 0x%02x:",
  527. info->node.dev_name, link->conf.ConfigIndex);
  528. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  529. printk(", irq %d", link->irq.AssignedIRQ);
  530. if (link->io.NumPorts1)
  531. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  532. link->io.BasePort1+link->io.NumPorts1-1);
  533. printk("\n");
  534. return 0;
  535. cs_failed:
  536. cs_error(link, last_fn, last_ret);
  537. mgslpc_release((u_long)link);
  538. return -ENODEV;
  539. }
  540. /* Card has been removed.
  541. * Unregister device and release PCMCIA configuration.
  542. * If device is open, postpone until it is closed.
  543. */
  544. static void mgslpc_release(u_long arg)
  545. {
  546. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  547. if (debug_level >= DEBUG_LEVEL_INFO)
  548. printk("mgslpc_release(0x%p)\n", link);
  549. pcmcia_disable_device(link);
  550. }
  551. static void mgslpc_detach(struct pcmcia_device *link)
  552. {
  553. if (debug_level >= DEBUG_LEVEL_INFO)
  554. printk("mgslpc_detach(0x%p)\n", link);
  555. ((MGSLPC_INFO *)link->priv)->stop = 1;
  556. mgslpc_release((u_long)link);
  557. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  558. }
  559. static int mgslpc_suspend(struct pcmcia_device *link)
  560. {
  561. MGSLPC_INFO *info = link->priv;
  562. info->stop = 1;
  563. return 0;
  564. }
  565. static int mgslpc_resume(struct pcmcia_device *link)
  566. {
  567. MGSLPC_INFO *info = link->priv;
  568. info->stop = 0;
  569. return 0;
  570. }
  571. static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
  572. char *name, const char *routine)
  573. {
  574. #ifdef MGSLPC_PARANOIA_CHECK
  575. static const char *badmagic =
  576. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  577. static const char *badinfo =
  578. "Warning: null mgslpc_info for (%s) in %s\n";
  579. if (!info) {
  580. printk(badinfo, name, routine);
  581. return true;
  582. }
  583. if (info->magic != MGSLPC_MAGIC) {
  584. printk(badmagic, name, routine);
  585. return true;
  586. }
  587. #else
  588. if (!info)
  589. return true;
  590. #endif
  591. return false;
  592. }
  593. #define CMD_RXFIFO BIT7 // release current rx FIFO
  594. #define CMD_RXRESET BIT6 // receiver reset
  595. #define CMD_RXFIFO_READ BIT5
  596. #define CMD_START_TIMER BIT4
  597. #define CMD_TXFIFO BIT3 // release current tx FIFO
  598. #define CMD_TXEOM BIT1 // transmit end message
  599. #define CMD_TXRESET BIT0 // transmit reset
  600. static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  601. {
  602. int i = 0;
  603. /* wait for command completion */
  604. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  605. udelay(1);
  606. if (i++ == 1000)
  607. return false;
  608. }
  609. return true;
  610. }
  611. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  612. {
  613. wait_command_complete(info, channel);
  614. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  615. }
  616. static void tx_pause(struct tty_struct *tty)
  617. {
  618. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  619. unsigned long flags;
  620. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  621. return;
  622. if (debug_level >= DEBUG_LEVEL_INFO)
  623. printk("tx_pause(%s)\n",info->device_name);
  624. spin_lock_irqsave(&info->lock,flags);
  625. if (info->tx_enabled)
  626. tx_stop(info);
  627. spin_unlock_irqrestore(&info->lock,flags);
  628. }
  629. static void tx_release(struct tty_struct *tty)
  630. {
  631. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  632. unsigned long flags;
  633. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  634. return;
  635. if (debug_level >= DEBUG_LEVEL_INFO)
  636. printk("tx_release(%s)\n",info->device_name);
  637. spin_lock_irqsave(&info->lock,flags);
  638. if (!info->tx_enabled)
  639. tx_start(info, tty);
  640. spin_unlock_irqrestore(&info->lock,flags);
  641. }
  642. /* Return next bottom half action to perform.
  643. * or 0 if nothing to do.
  644. */
  645. static int bh_action(MGSLPC_INFO *info)
  646. {
  647. unsigned long flags;
  648. int rc = 0;
  649. spin_lock_irqsave(&info->lock,flags);
  650. if (info->pending_bh & BH_RECEIVE) {
  651. info->pending_bh &= ~BH_RECEIVE;
  652. rc = BH_RECEIVE;
  653. } else if (info->pending_bh & BH_TRANSMIT) {
  654. info->pending_bh &= ~BH_TRANSMIT;
  655. rc = BH_TRANSMIT;
  656. } else if (info->pending_bh & BH_STATUS) {
  657. info->pending_bh &= ~BH_STATUS;
  658. rc = BH_STATUS;
  659. }
  660. if (!rc) {
  661. /* Mark BH routine as complete */
  662. info->bh_running = false;
  663. info->bh_requested = false;
  664. }
  665. spin_unlock_irqrestore(&info->lock,flags);
  666. return rc;
  667. }
  668. static void bh_handler(struct work_struct *work)
  669. {
  670. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  671. struct tty_struct *tty;
  672. int action;
  673. if (!info)
  674. return;
  675. if (debug_level >= DEBUG_LEVEL_BH)
  676. printk( "%s(%d):bh_handler(%s) entry\n",
  677. __FILE__,__LINE__,info->device_name);
  678. info->bh_running = true;
  679. tty = tty_port_tty_get(&info->port);
  680. while((action = bh_action(info)) != 0) {
  681. /* Process work item */
  682. if ( debug_level >= DEBUG_LEVEL_BH )
  683. printk( "%s(%d):bh_handler() work item action=%d\n",
  684. __FILE__,__LINE__,action);
  685. switch (action) {
  686. case BH_RECEIVE:
  687. while(rx_get_frame(info, tty));
  688. break;
  689. case BH_TRANSMIT:
  690. bh_transmit(info, tty);
  691. break;
  692. case BH_STATUS:
  693. bh_status(info);
  694. break;
  695. default:
  696. /* unknown work item ID */
  697. printk("Unknown work item ID=%08X!\n", action);
  698. break;
  699. }
  700. }
  701. tty_kref_put(tty);
  702. if (debug_level >= DEBUG_LEVEL_BH)
  703. printk( "%s(%d):bh_handler(%s) exit\n",
  704. __FILE__,__LINE__,info->device_name);
  705. }
  706. static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
  707. {
  708. if (debug_level >= DEBUG_LEVEL_BH)
  709. printk("bh_transmit() entry on %s\n", info->device_name);
  710. if (tty)
  711. tty_wakeup(tty);
  712. }
  713. static void bh_status(MGSLPC_INFO *info)
  714. {
  715. info->ri_chkcount = 0;
  716. info->dsr_chkcount = 0;
  717. info->dcd_chkcount = 0;
  718. info->cts_chkcount = 0;
  719. }
  720. /* eom: non-zero = end of frame */
  721. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  722. {
  723. unsigned char data[2];
  724. unsigned char fifo_count, read_count, i;
  725. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  726. if (debug_level >= DEBUG_LEVEL_ISR)
  727. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  728. if (!info->rx_enabled)
  729. return;
  730. if (info->rx_frame_count >= info->rx_buf_count) {
  731. /* no more free buffers */
  732. issue_command(info, CHA, CMD_RXRESET);
  733. info->pending_bh |= BH_RECEIVE;
  734. info->rx_overflow = true;
  735. info->icount.buf_overrun++;
  736. return;
  737. }
  738. if (eom) {
  739. /* end of frame, get FIFO count from RBCL register */
  740. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  741. fifo_count = 32;
  742. } else
  743. fifo_count = 32;
  744. do {
  745. if (fifo_count == 1) {
  746. read_count = 1;
  747. data[0] = read_reg(info, CHA + RXFIFO);
  748. } else {
  749. read_count = 2;
  750. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  751. }
  752. fifo_count -= read_count;
  753. if (!fifo_count && eom)
  754. buf->status = data[--read_count];
  755. for (i = 0; i < read_count; i++) {
  756. if (buf->count >= info->max_frame_size) {
  757. /* frame too large, reset receiver and reset current buffer */
  758. issue_command(info, CHA, CMD_RXRESET);
  759. buf->count = 0;
  760. return;
  761. }
  762. *(buf->data + buf->count) = data[i];
  763. buf->count++;
  764. }
  765. } while (fifo_count);
  766. if (eom) {
  767. info->pending_bh |= BH_RECEIVE;
  768. info->rx_frame_count++;
  769. info->rx_put++;
  770. if (info->rx_put >= info->rx_buf_count)
  771. info->rx_put = 0;
  772. }
  773. issue_command(info, CHA, CMD_RXFIFO);
  774. }
  775. static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
  776. {
  777. unsigned char data, status, flag;
  778. int fifo_count;
  779. int work = 0;
  780. struct mgsl_icount *icount = &info->icount;
  781. if (tcd) {
  782. /* early termination, get FIFO count from RBCL register */
  783. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  784. /* Zero fifo count could mean 0 or 32 bytes available.
  785. * If BIT5 of STAR is set then at least 1 byte is available.
  786. */
  787. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  788. fifo_count = 32;
  789. } else
  790. fifo_count = 32;
  791. tty_buffer_request_room(tty, fifo_count);
  792. /* Flush received async data to receive data buffer. */
  793. while (fifo_count) {
  794. data = read_reg(info, CHA + RXFIFO);
  795. status = read_reg(info, CHA + RXFIFO);
  796. fifo_count -= 2;
  797. icount->rx++;
  798. flag = TTY_NORMAL;
  799. // if no frameing/crc error then save data
  800. // BIT7:parity error
  801. // BIT6:framing error
  802. if (status & (BIT7 + BIT6)) {
  803. if (status & BIT7)
  804. icount->parity++;
  805. else
  806. icount->frame++;
  807. /* discard char if tty control flags say so */
  808. if (status & info->ignore_status_mask)
  809. continue;
  810. status &= info->read_status_mask;
  811. if (status & BIT7)
  812. flag = TTY_PARITY;
  813. else if (status & BIT6)
  814. flag = TTY_FRAME;
  815. }
  816. work += tty_insert_flip_char(tty, data, flag);
  817. }
  818. issue_command(info, CHA, CMD_RXFIFO);
  819. if (debug_level >= DEBUG_LEVEL_ISR) {
  820. printk("%s(%d):rx_ready_async",
  821. __FILE__,__LINE__);
  822. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  823. __FILE__,__LINE__,icount->rx,icount->brk,
  824. icount->parity,icount->frame,icount->overrun);
  825. }
  826. if (work)
  827. tty_flip_buffer_push(tty);
  828. }
  829. static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
  830. {
  831. if (!info->tx_active)
  832. return;
  833. info->tx_active = false;
  834. info->tx_aborting = false;
  835. if (info->params.mode == MGSL_MODE_ASYNC)
  836. return;
  837. info->tx_count = info->tx_put = info->tx_get = 0;
  838. del_timer(&info->tx_timer);
  839. if (info->drop_rts_on_tx_done) {
  840. get_signals(info);
  841. if (info->serial_signals & SerialSignal_RTS) {
  842. info->serial_signals &= ~SerialSignal_RTS;
  843. set_signals(info);
  844. }
  845. info->drop_rts_on_tx_done = false;
  846. }
  847. #if SYNCLINK_GENERIC_HDLC
  848. if (info->netcount)
  849. hdlcdev_tx_done(info);
  850. else
  851. #endif
  852. {
  853. if (tty->stopped || tty->hw_stopped) {
  854. tx_stop(info);
  855. return;
  856. }
  857. info->pending_bh |= BH_TRANSMIT;
  858. }
  859. }
  860. static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
  861. {
  862. unsigned char fifo_count = 32;
  863. int c;
  864. if (debug_level >= DEBUG_LEVEL_ISR)
  865. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  866. if (info->params.mode == MGSL_MODE_HDLC) {
  867. if (!info->tx_active)
  868. return;
  869. } else {
  870. if (tty->stopped || tty->hw_stopped) {
  871. tx_stop(info);
  872. return;
  873. }
  874. if (!info->tx_count)
  875. info->tx_active = false;
  876. }
  877. if (!info->tx_count)
  878. return;
  879. while (info->tx_count && fifo_count) {
  880. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  881. if (c == 1) {
  882. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  883. } else {
  884. write_reg16(info, CHA + TXFIFO,
  885. *((unsigned short*)(info->tx_buf + info->tx_get)));
  886. }
  887. info->tx_count -= c;
  888. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  889. fifo_count -= c;
  890. }
  891. if (info->params.mode == MGSL_MODE_ASYNC) {
  892. if (info->tx_count < WAKEUP_CHARS)
  893. info->pending_bh |= BH_TRANSMIT;
  894. issue_command(info, CHA, CMD_TXFIFO);
  895. } else {
  896. if (info->tx_count)
  897. issue_command(info, CHA, CMD_TXFIFO);
  898. else
  899. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  900. }
  901. }
  902. static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
  903. {
  904. get_signals(info);
  905. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  906. irq_disable(info, CHB, IRQ_CTS);
  907. info->icount.cts++;
  908. if (info->serial_signals & SerialSignal_CTS)
  909. info->input_signal_events.cts_up++;
  910. else
  911. info->input_signal_events.cts_down++;
  912. wake_up_interruptible(&info->status_event_wait_q);
  913. wake_up_interruptible(&info->event_wait_q);
  914. if (info->port.flags & ASYNC_CTS_FLOW) {
  915. if (tty->hw_stopped) {
  916. if (info->serial_signals & SerialSignal_CTS) {
  917. if (debug_level >= DEBUG_LEVEL_ISR)
  918. printk("CTS tx start...");
  919. if (tty)
  920. tty->hw_stopped = 0;
  921. tx_start(info, tty);
  922. info->pending_bh |= BH_TRANSMIT;
  923. return;
  924. }
  925. } else {
  926. if (!(info->serial_signals & SerialSignal_CTS)) {
  927. if (debug_level >= DEBUG_LEVEL_ISR)
  928. printk("CTS tx stop...");
  929. if (tty)
  930. tty->hw_stopped = 1;
  931. tx_stop(info);
  932. }
  933. }
  934. }
  935. info->pending_bh |= BH_STATUS;
  936. }
  937. static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
  938. {
  939. get_signals(info);
  940. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  941. irq_disable(info, CHB, IRQ_DCD);
  942. info->icount.dcd++;
  943. if (info->serial_signals & SerialSignal_DCD) {
  944. info->input_signal_events.dcd_up++;
  945. }
  946. else
  947. info->input_signal_events.dcd_down++;
  948. #if SYNCLINK_GENERIC_HDLC
  949. if (info->netcount) {
  950. if (info->serial_signals & SerialSignal_DCD)
  951. netif_carrier_on(info->netdev);
  952. else
  953. netif_carrier_off(info->netdev);
  954. }
  955. #endif
  956. wake_up_interruptible(&info->status_event_wait_q);
  957. wake_up_interruptible(&info->event_wait_q);
  958. if (info->port.flags & ASYNC_CHECK_CD) {
  959. if (debug_level >= DEBUG_LEVEL_ISR)
  960. printk("%s CD now %s...", info->device_name,
  961. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  962. if (info->serial_signals & SerialSignal_DCD)
  963. wake_up_interruptible(&info->port.open_wait);
  964. else {
  965. if (debug_level >= DEBUG_LEVEL_ISR)
  966. printk("doing serial hangup...");
  967. if (tty)
  968. tty_hangup(tty);
  969. }
  970. }
  971. info->pending_bh |= BH_STATUS;
  972. }
  973. static void dsr_change(MGSLPC_INFO *info)
  974. {
  975. get_signals(info);
  976. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  977. port_irq_disable(info, PVR_DSR);
  978. info->icount.dsr++;
  979. if (info->serial_signals & SerialSignal_DSR)
  980. info->input_signal_events.dsr_up++;
  981. else
  982. info->input_signal_events.dsr_down++;
  983. wake_up_interruptible(&info->status_event_wait_q);
  984. wake_up_interruptible(&info->event_wait_q);
  985. info->pending_bh |= BH_STATUS;
  986. }
  987. static void ri_change(MGSLPC_INFO *info)
  988. {
  989. get_signals(info);
  990. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  991. port_irq_disable(info, PVR_RI);
  992. info->icount.rng++;
  993. if (info->serial_signals & SerialSignal_RI)
  994. info->input_signal_events.ri_up++;
  995. else
  996. info->input_signal_events.ri_down++;
  997. wake_up_interruptible(&info->status_event_wait_q);
  998. wake_up_interruptible(&info->event_wait_q);
  999. info->pending_bh |= BH_STATUS;
  1000. }
  1001. /* Interrupt service routine entry point.
  1002. *
  1003. * Arguments:
  1004. *
  1005. * irq interrupt number that caused interrupt
  1006. * dev_id device ID supplied during interrupt registration
  1007. */
  1008. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  1009. {
  1010. MGSLPC_INFO *info = dev_id;
  1011. struct tty_struct *tty;
  1012. unsigned short isr;
  1013. unsigned char gis, pis;
  1014. int count=0;
  1015. if (debug_level >= DEBUG_LEVEL_ISR)
  1016. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  1017. if (!(info->p_dev->_locked))
  1018. return IRQ_HANDLED;
  1019. tty = tty_port_tty_get(&info->port);
  1020. spin_lock(&info->lock);
  1021. while ((gis = read_reg(info, CHA + GIS))) {
  1022. if (debug_level >= DEBUG_LEVEL_ISR)
  1023. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1024. if ((gis & 0x70) || count > 1000) {
  1025. printk("synclink_cs:hardware failed or ejected\n");
  1026. break;
  1027. }
  1028. count++;
  1029. if (gis & (BIT1 + BIT0)) {
  1030. isr = read_reg16(info, CHB + ISR);
  1031. if (isr & IRQ_DCD)
  1032. dcd_change(info, tty);
  1033. if (isr & IRQ_CTS)
  1034. cts_change(info, tty);
  1035. }
  1036. if (gis & (BIT3 + BIT2))
  1037. {
  1038. isr = read_reg16(info, CHA + ISR);
  1039. if (isr & IRQ_TIMER) {
  1040. info->irq_occurred = true;
  1041. irq_disable(info, CHA, IRQ_TIMER);
  1042. }
  1043. /* receive IRQs */
  1044. if (isr & IRQ_EXITHUNT) {
  1045. info->icount.exithunt++;
  1046. wake_up_interruptible(&info->event_wait_q);
  1047. }
  1048. if (isr & IRQ_BREAK_ON) {
  1049. info->icount.brk++;
  1050. if (info->port.flags & ASYNC_SAK)
  1051. do_SAK(tty);
  1052. }
  1053. if (isr & IRQ_RXTIME) {
  1054. issue_command(info, CHA, CMD_RXFIFO_READ);
  1055. }
  1056. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1057. if (info->params.mode == MGSL_MODE_HDLC)
  1058. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1059. else
  1060. rx_ready_async(info, isr & IRQ_RXEOM, tty);
  1061. }
  1062. /* transmit IRQs */
  1063. if (isr & IRQ_UNDERRUN) {
  1064. if (info->tx_aborting)
  1065. info->icount.txabort++;
  1066. else
  1067. info->icount.txunder++;
  1068. tx_done(info, tty);
  1069. }
  1070. else if (isr & IRQ_ALLSENT) {
  1071. info->icount.txok++;
  1072. tx_done(info, tty);
  1073. }
  1074. else if (isr & IRQ_TXFIFO)
  1075. tx_ready(info, tty);
  1076. }
  1077. if (gis & BIT7) {
  1078. pis = read_reg(info, CHA + PIS);
  1079. if (pis & BIT1)
  1080. dsr_change(info);
  1081. if (pis & BIT2)
  1082. ri_change(info);
  1083. }
  1084. }
  1085. /* Request bottom half processing if there's something
  1086. * for it to do and the bh is not already running
  1087. */
  1088. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1089. if ( debug_level >= DEBUG_LEVEL_ISR )
  1090. printk("%s(%d):%s queueing bh task.\n",
  1091. __FILE__,__LINE__,info->device_name);
  1092. schedule_work(&info->task);
  1093. info->bh_requested = true;
  1094. }
  1095. spin_unlock(&info->lock);
  1096. tty_kref_put(tty);
  1097. if (debug_level >= DEBUG_LEVEL_ISR)
  1098. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1099. __FILE__, __LINE__, info->irq_level);
  1100. return IRQ_HANDLED;
  1101. }
  1102. /* Initialize and start device.
  1103. */
  1104. static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
  1105. {
  1106. int retval = 0;
  1107. if (debug_level >= DEBUG_LEVEL_INFO)
  1108. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1109. if (info->port.flags & ASYNC_INITIALIZED)
  1110. return 0;
  1111. if (!info->tx_buf) {
  1112. /* allocate a page of memory for a transmit buffer */
  1113. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1114. if (!info->tx_buf) {
  1115. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1116. __FILE__,__LINE__,info->device_name);
  1117. return -ENOMEM;
  1118. }
  1119. }
  1120. info->pending_bh = 0;
  1121. memset(&info->icount, 0, sizeof(info->icount));
  1122. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1123. /* Allocate and claim adapter resources */
  1124. retval = claim_resources(info);
  1125. /* perform existance check and diagnostics */
  1126. if ( !retval )
  1127. retval = adapter_test(info);
  1128. if ( retval ) {
  1129. if (capable(CAP_SYS_ADMIN) && tty)
  1130. set_bit(TTY_IO_ERROR, &tty->flags);
  1131. release_resources(info);
  1132. return retval;
  1133. }
  1134. /* program hardware for current parameters */
  1135. mgslpc_change_params(info, tty);
  1136. if (tty)
  1137. clear_bit(TTY_IO_ERROR, &tty->flags);
  1138. info->port.flags |= ASYNC_INITIALIZED;
  1139. return 0;
  1140. }
  1141. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1142. */
  1143. static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
  1144. {
  1145. unsigned long flags;
  1146. if (!(info->port.flags & ASYNC_INITIALIZED))
  1147. return;
  1148. if (debug_level >= DEBUG_LEVEL_INFO)
  1149. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1150. __FILE__,__LINE__, info->device_name );
  1151. /* clear status wait queue because status changes */
  1152. /* can't happen after shutting down the hardware */
  1153. wake_up_interruptible(&info->status_event_wait_q);
  1154. wake_up_interruptible(&info->event_wait_q);
  1155. del_timer_sync(&info->tx_timer);
  1156. if (info->tx_buf) {
  1157. free_page((unsigned long) info->tx_buf);
  1158. info->tx_buf = NULL;
  1159. }
  1160. spin_lock_irqsave(&info->lock,flags);
  1161. rx_stop(info);
  1162. tx_stop(info);
  1163. /* TODO:disable interrupts instead of reset to preserve signal states */
  1164. reset_device(info);
  1165. if (!tty || tty->termios->c_cflag & HUPCL) {
  1166. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1167. set_signals(info);
  1168. }
  1169. spin_unlock_irqrestore(&info->lock,flags);
  1170. release_resources(info);
  1171. if (tty)
  1172. set_bit(TTY_IO_ERROR, &tty->flags);
  1173. info->port.flags &= ~ASYNC_INITIALIZED;
  1174. }
  1175. static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
  1176. {
  1177. unsigned long flags;
  1178. spin_lock_irqsave(&info->lock,flags);
  1179. rx_stop(info);
  1180. tx_stop(info);
  1181. info->tx_count = info->tx_put = info->tx_get = 0;
  1182. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1183. hdlc_mode(info);
  1184. else
  1185. async_mode(info);
  1186. set_signals(info);
  1187. info->dcd_chkcount = 0;
  1188. info->cts_chkcount = 0;
  1189. info->ri_chkcount = 0;
  1190. info->dsr_chkcount = 0;
  1191. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1192. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1193. get_signals(info);
  1194. if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
  1195. rx_start(info);
  1196. spin_unlock_irqrestore(&info->lock,flags);
  1197. }
  1198. /* Reconfigure adapter based on new parameters
  1199. */
  1200. static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
  1201. {
  1202. unsigned cflag;
  1203. int bits_per_char;
  1204. if (!tty || !tty->termios)
  1205. return;
  1206. if (debug_level >= DEBUG_LEVEL_INFO)
  1207. printk("%s(%d):mgslpc_change_params(%s)\n",
  1208. __FILE__,__LINE__, info->device_name );
  1209. cflag = tty->termios->c_cflag;
  1210. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1211. /* otherwise assert DTR and RTS */
  1212. if (cflag & CBAUD)
  1213. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1214. else
  1215. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1216. /* byte size and parity */
  1217. switch (cflag & CSIZE) {
  1218. case CS5: info->params.data_bits = 5; break;
  1219. case CS6: info->params.data_bits = 6; break;
  1220. case CS7: info->params.data_bits = 7; break;
  1221. case CS8: info->params.data_bits = 8; break;
  1222. default: info->params.data_bits = 7; break;
  1223. }
  1224. if (cflag & CSTOPB)
  1225. info->params.stop_bits = 2;
  1226. else
  1227. info->params.stop_bits = 1;
  1228. info->params.parity = ASYNC_PARITY_NONE;
  1229. if (cflag & PARENB) {
  1230. if (cflag & PARODD)
  1231. info->params.parity = ASYNC_PARITY_ODD;
  1232. else
  1233. info->params.parity = ASYNC_PARITY_EVEN;
  1234. #ifdef CMSPAR
  1235. if (cflag & CMSPAR)
  1236. info->params.parity = ASYNC_PARITY_SPACE;
  1237. #endif
  1238. }
  1239. /* calculate number of jiffies to transmit a full
  1240. * FIFO (32 bytes) at specified data rate
  1241. */
  1242. bits_per_char = info->params.data_bits +
  1243. info->params.stop_bits + 1;
  1244. /* if port data rate is set to 460800 or less then
  1245. * allow tty settings to override, otherwise keep the
  1246. * current data rate.
  1247. */
  1248. if (info->params.data_rate <= 460800) {
  1249. info->params.data_rate = tty_get_baud_rate(tty);
  1250. }
  1251. if ( info->params.data_rate ) {
  1252. info->timeout = (32*HZ*bits_per_char) /
  1253. info->params.data_rate;
  1254. }
  1255. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1256. if (cflag & CRTSCTS)
  1257. info->port.flags |= ASYNC_CTS_FLOW;
  1258. else
  1259. info->port.flags &= ~ASYNC_CTS_FLOW;
  1260. if (cflag & CLOCAL)
  1261. info->port.flags &= ~ASYNC_CHECK_CD;
  1262. else
  1263. info->port.flags |= ASYNC_CHECK_CD;
  1264. /* process tty input control flags */
  1265. info->read_status_mask = 0;
  1266. if (I_INPCK(tty))
  1267. info->read_status_mask |= BIT7 | BIT6;
  1268. if (I_IGNPAR(tty))
  1269. info->ignore_status_mask |= BIT7 | BIT6;
  1270. mgslpc_program_hw(info, tty);
  1271. }
  1272. /* Add a character to the transmit buffer
  1273. */
  1274. static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1275. {
  1276. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1277. unsigned long flags;
  1278. if (debug_level >= DEBUG_LEVEL_INFO) {
  1279. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1280. __FILE__,__LINE__,ch,info->device_name);
  1281. }
  1282. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1283. return 0;
  1284. if (!info->tx_buf)
  1285. return 0;
  1286. spin_lock_irqsave(&info->lock,flags);
  1287. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1288. if (info->tx_count < TXBUFSIZE - 1) {
  1289. info->tx_buf[info->tx_put++] = ch;
  1290. info->tx_put &= TXBUFSIZE-1;
  1291. info->tx_count++;
  1292. }
  1293. }
  1294. spin_unlock_irqrestore(&info->lock,flags);
  1295. return 1;
  1296. }
  1297. /* Enable transmitter so remaining characters in the
  1298. * transmit buffer are sent.
  1299. */
  1300. static void mgslpc_flush_chars(struct tty_struct *tty)
  1301. {
  1302. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1303. unsigned long flags;
  1304. if (debug_level >= DEBUG_LEVEL_INFO)
  1305. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1306. __FILE__,__LINE__,info->device_name,info->tx_count);
  1307. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1308. return;
  1309. if (info->tx_count <= 0 || tty->stopped ||
  1310. tty->hw_stopped || !info->tx_buf)
  1311. return;
  1312. if (debug_level >= DEBUG_LEVEL_INFO)
  1313. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1314. __FILE__,__LINE__,info->device_name);
  1315. spin_lock_irqsave(&info->lock,flags);
  1316. if (!info->tx_active)
  1317. tx_start(info, tty);
  1318. spin_unlock_irqrestore(&info->lock,flags);
  1319. }
  1320. /* Send a block of data
  1321. *
  1322. * Arguments:
  1323. *
  1324. * tty pointer to tty information structure
  1325. * buf pointer to buffer containing send data
  1326. * count size of send data in bytes
  1327. *
  1328. * Returns: number of characters written
  1329. */
  1330. static int mgslpc_write(struct tty_struct * tty,
  1331. const unsigned char *buf, int count)
  1332. {
  1333. int c, ret = 0;
  1334. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1335. unsigned long flags;
  1336. if (debug_level >= DEBUG_LEVEL_INFO)
  1337. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1338. __FILE__,__LINE__,info->device_name,count);
  1339. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1340. !info->tx_buf)
  1341. goto cleanup;
  1342. if (info->params.mode == MGSL_MODE_HDLC) {
  1343. if (count > TXBUFSIZE) {
  1344. ret = -EIO;
  1345. goto cleanup;
  1346. }
  1347. if (info->tx_active)
  1348. goto cleanup;
  1349. else if (info->tx_count)
  1350. goto start;
  1351. }
  1352. for (;;) {
  1353. c = min(count,
  1354. min(TXBUFSIZE - info->tx_count - 1,
  1355. TXBUFSIZE - info->tx_put));
  1356. if (c <= 0)
  1357. break;
  1358. memcpy(info->tx_buf + info->tx_put, buf, c);
  1359. spin_lock_irqsave(&info->lock,flags);
  1360. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1361. info->tx_count += c;
  1362. spin_unlock_irqrestore(&info->lock,flags);
  1363. buf += c;
  1364. count -= c;
  1365. ret += c;
  1366. }
  1367. start:
  1368. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1369. spin_lock_irqsave(&info->lock,flags);
  1370. if (!info->tx_active)
  1371. tx_start(info, tty);
  1372. spin_unlock_irqrestore(&info->lock,flags);
  1373. }
  1374. cleanup:
  1375. if (debug_level >= DEBUG_LEVEL_INFO)
  1376. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1377. __FILE__,__LINE__,info->device_name,ret);
  1378. return ret;
  1379. }
  1380. /* Return the count of free bytes in transmit buffer
  1381. */
  1382. static int mgslpc_write_room(struct tty_struct *tty)
  1383. {
  1384. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1385. int ret;
  1386. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1387. return 0;
  1388. if (info->params.mode == MGSL_MODE_HDLC) {
  1389. /* HDLC (frame oriented) mode */
  1390. if (info->tx_active)
  1391. return 0;
  1392. else
  1393. return HDLC_MAX_FRAME_SIZE;
  1394. } else {
  1395. ret = TXBUFSIZE - info->tx_count - 1;
  1396. if (ret < 0)
  1397. ret = 0;
  1398. }
  1399. if (debug_level >= DEBUG_LEVEL_INFO)
  1400. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1401. __FILE__,__LINE__, info->device_name, ret);
  1402. return ret;
  1403. }
  1404. /* Return the count of bytes in transmit buffer
  1405. */
  1406. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1407. {
  1408. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1409. int rc;
  1410. if (debug_level >= DEBUG_LEVEL_INFO)
  1411. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1412. __FILE__,__LINE__, info->device_name );
  1413. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1414. return 0;
  1415. if (info->params.mode == MGSL_MODE_HDLC)
  1416. rc = info->tx_active ? info->max_frame_size : 0;
  1417. else
  1418. rc = info->tx_count;
  1419. if (debug_level >= DEBUG_LEVEL_INFO)
  1420. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1421. __FILE__,__LINE__, info->device_name, rc);
  1422. return rc;
  1423. }
  1424. /* Discard all data in the send buffer
  1425. */
  1426. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1427. {
  1428. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1429. unsigned long flags;
  1430. if (debug_level >= DEBUG_LEVEL_INFO)
  1431. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1432. __FILE__,__LINE__, info->device_name );
  1433. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1434. return;
  1435. spin_lock_irqsave(&info->lock,flags);
  1436. info->tx_count = info->tx_put = info->tx_get = 0;
  1437. del_timer(&info->tx_timer);
  1438. spin_unlock_irqrestore(&info->lock,flags);
  1439. wake_up_interruptible(&tty->write_wait);
  1440. tty_wakeup(tty);
  1441. }
  1442. /* Send a high-priority XON/XOFF character
  1443. */
  1444. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1445. {
  1446. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1447. unsigned long flags;
  1448. if (debug_level >= DEBUG_LEVEL_INFO)
  1449. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1450. __FILE__,__LINE__, info->device_name, ch );
  1451. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1452. return;
  1453. info->x_char = ch;
  1454. if (ch) {
  1455. spin_lock_irqsave(&info->lock,flags);
  1456. if (!info->tx_enabled)
  1457. tx_start(info, tty);
  1458. spin_unlock_irqrestore(&info->lock,flags);
  1459. }
  1460. }
  1461. /* Signal remote device to throttle send data (our receive data)
  1462. */
  1463. static void mgslpc_throttle(struct tty_struct * tty)
  1464. {
  1465. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1466. unsigned long flags;
  1467. if (debug_level >= DEBUG_LEVEL_INFO)
  1468. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1469. __FILE__,__LINE__, info->device_name );
  1470. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1471. return;
  1472. if (I_IXOFF(tty))
  1473. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1474. if (tty->termios->c_cflag & CRTSCTS) {
  1475. spin_lock_irqsave(&info->lock,flags);
  1476. info->serial_signals &= ~SerialSignal_RTS;
  1477. set_signals(info);
  1478. spin_unlock_irqrestore(&info->lock,flags);
  1479. }
  1480. }
  1481. /* Signal remote device to stop throttling send data (our receive data)
  1482. */
  1483. static void mgslpc_unthrottle(struct tty_struct * tty)
  1484. {
  1485. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1486. unsigned long flags;
  1487. if (debug_level >= DEBUG_LEVEL_INFO)
  1488. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1489. __FILE__,__LINE__, info->device_name );
  1490. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1491. return;
  1492. if (I_IXOFF(tty)) {
  1493. if (info->x_char)
  1494. info->x_char = 0;
  1495. else
  1496. mgslpc_send_xchar(tty, START_CHAR(tty));
  1497. }
  1498. if (tty->termios->c_cflag & CRTSCTS) {
  1499. spin_lock_irqsave(&info->lock,flags);
  1500. info->serial_signals |= SerialSignal_RTS;
  1501. set_signals(info);
  1502. spin_unlock_irqrestore(&info->lock,flags);
  1503. }
  1504. }
  1505. /* get the current serial statistics
  1506. */
  1507. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1508. {
  1509. int err;
  1510. if (debug_level >= DEBUG_LEVEL_INFO)
  1511. printk("get_params(%s)\n", info->device_name);
  1512. if (!user_icount) {
  1513. memset(&info->icount, 0, sizeof(info->icount));
  1514. } else {
  1515. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1516. if (err)
  1517. return -EFAULT;
  1518. }
  1519. return 0;
  1520. }
  1521. /* get the current serial parameters
  1522. */
  1523. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1524. {
  1525. int err;
  1526. if (debug_level >= DEBUG_LEVEL_INFO)
  1527. printk("get_params(%s)\n", info->device_name);
  1528. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1529. if (err)
  1530. return -EFAULT;
  1531. return 0;
  1532. }
  1533. /* set the serial parameters
  1534. *
  1535. * Arguments:
  1536. *
  1537. * info pointer to device instance data
  1538. * new_params user buffer containing new serial params
  1539. *
  1540. * Returns: 0 if success, otherwise error code
  1541. */
  1542. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
  1543. {
  1544. unsigned long flags;
  1545. MGSL_PARAMS tmp_params;
  1546. int err;
  1547. if (debug_level >= DEBUG_LEVEL_INFO)
  1548. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1549. info->device_name );
  1550. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1551. if (err) {
  1552. if ( debug_level >= DEBUG_LEVEL_INFO )
  1553. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1554. __FILE__,__LINE__,info->device_name);
  1555. return -EFAULT;
  1556. }
  1557. spin_lock_irqsave(&info->lock,flags);
  1558. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1559. spin_unlock_irqrestore(&info->lock,flags);
  1560. mgslpc_change_params(info, tty);
  1561. return 0;
  1562. }
  1563. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1564. {
  1565. int err;
  1566. if (debug_level >= DEBUG_LEVEL_INFO)
  1567. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1568. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1569. if (err)
  1570. return -EFAULT;
  1571. return 0;
  1572. }
  1573. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1574. {
  1575. unsigned long flags;
  1576. if (debug_level >= DEBUG_LEVEL_INFO)
  1577. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1578. spin_lock_irqsave(&info->lock,flags);
  1579. info->idle_mode = idle_mode;
  1580. tx_set_idle(info);
  1581. spin_unlock_irqrestore(&info->lock,flags);
  1582. return 0;
  1583. }
  1584. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1585. {
  1586. int err;
  1587. if (debug_level >= DEBUG_LEVEL_INFO)
  1588. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1589. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1590. if (err)
  1591. return -EFAULT;
  1592. return 0;
  1593. }
  1594. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1595. {
  1596. unsigned long flags;
  1597. unsigned char val;
  1598. if (debug_level >= DEBUG_LEVEL_INFO)
  1599. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1600. spin_lock_irqsave(&info->lock,flags);
  1601. info->if_mode = if_mode;
  1602. val = read_reg(info, PVR) & 0x0f;
  1603. switch (info->if_mode)
  1604. {
  1605. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1606. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1607. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1608. }
  1609. write_reg(info, PVR, val);
  1610. spin_unlock_irqrestore(&info->lock,flags);
  1611. return 0;
  1612. }
  1613. static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
  1614. {
  1615. unsigned long flags;
  1616. if (debug_level >= DEBUG_LEVEL_INFO)
  1617. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1618. spin_lock_irqsave(&info->lock,flags);
  1619. if (enable) {
  1620. if (!info->tx_enabled)
  1621. tx_start(info, tty);
  1622. } else {
  1623. if (info->tx_enabled)
  1624. tx_stop(info);
  1625. }
  1626. spin_unlock_irqrestore(&info->lock,flags);
  1627. return 0;
  1628. }
  1629. static int tx_abort(MGSLPC_INFO * info)
  1630. {
  1631. unsigned long flags;
  1632. if (debug_level >= DEBUG_LEVEL_INFO)
  1633. printk("tx_abort(%s)\n", info->device_name);
  1634. spin_lock_irqsave(&info->lock,flags);
  1635. if (info->tx_active && info->tx_count &&
  1636. info->params.mode == MGSL_MODE_HDLC) {
  1637. /* clear data count so FIFO is not filled on next IRQ.
  1638. * This results in underrun and abort transmission.
  1639. */
  1640. info->tx_count = info->tx_put = info->tx_get = 0;
  1641. info->tx_aborting = true;
  1642. }
  1643. spin_unlock_irqrestore(&info->lock,flags);
  1644. return 0;
  1645. }
  1646. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1647. {
  1648. unsigned long flags;
  1649. if (debug_level >= DEBUG_LEVEL_INFO)
  1650. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1651. spin_lock_irqsave(&info->lock,flags);
  1652. if (enable) {
  1653. if (!info->rx_enabled)
  1654. rx_start(info);
  1655. } else {
  1656. if (info->rx_enabled)
  1657. rx_stop(info);
  1658. }
  1659. spin_unlock_irqrestore(&info->lock,flags);
  1660. return 0;
  1661. }
  1662. /* wait for specified event to occur
  1663. *
  1664. * Arguments: info pointer to device instance data
  1665. * mask pointer to bitmask of events to wait for
  1666. * Return Value: 0 if successful and bit mask updated with
  1667. * of events triggerred,
  1668. * otherwise error code
  1669. */
  1670. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1671. {
  1672. unsigned long flags;
  1673. int s;
  1674. int rc=0;
  1675. struct mgsl_icount cprev, cnow;
  1676. int events;
  1677. int mask;
  1678. struct _input_signal_events oldsigs, newsigs;
  1679. DECLARE_WAITQUEUE(wait, current);
  1680. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1681. if (rc)
  1682. return -EFAULT;
  1683. if (debug_level >= DEBUG_LEVEL_INFO)
  1684. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1685. spin_lock_irqsave(&info->lock,flags);
  1686. /* return immediately if state matches requested events */
  1687. get_signals(info);
  1688. s = info->serial_signals;
  1689. events = mask &
  1690. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1691. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1692. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1693. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1694. if (events) {
  1695. spin_unlock_irqrestore(&info->lock,flags);
  1696. goto exit;
  1697. }
  1698. /* save current irq counts */
  1699. cprev = info->icount;
  1700. oldsigs = info->input_signal_events;
  1701. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1702. (mask & MgslEvent_ExitHuntMode))
  1703. irq_enable(info, CHA, IRQ_EXITHUNT);
  1704. set_current_state(TASK_INTERRUPTIBLE);
  1705. add_wait_queue(&info->event_wait_q, &wait);
  1706. spin_unlock_irqrestore(&info->lock,flags);
  1707. for(;;) {
  1708. schedule();
  1709. if (signal_pending(current)) {
  1710. rc = -ERESTARTSYS;
  1711. break;
  1712. }
  1713. /* get current irq counts */
  1714. spin_lock_irqsave(&info->lock,flags);
  1715. cnow = info->icount;
  1716. newsigs = info->input_signal_events;
  1717. set_current_state(TASK_INTERRUPTIBLE);
  1718. spin_unlock_irqrestore(&info->lock,flags);
  1719. /* if no change, wait aborted for some reason */
  1720. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1721. newsigs.dsr_down == oldsigs.dsr_down &&
  1722. newsigs.dcd_up == oldsigs.dcd_up &&
  1723. newsigs.dcd_down == oldsigs.dcd_down &&
  1724. newsigs.cts_up == oldsigs.cts_up &&
  1725. newsigs.cts_down == oldsigs.cts_down &&
  1726. newsigs.ri_up == oldsigs.ri_up &&
  1727. newsigs.ri_down == oldsigs.ri_down &&
  1728. cnow.exithunt == cprev.exithunt &&
  1729. cnow.rxidle == cprev.rxidle) {
  1730. rc = -EIO;
  1731. break;
  1732. }
  1733. events = mask &
  1734. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1735. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1736. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1737. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1738. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1739. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1740. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1741. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1742. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1743. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1744. if (events)
  1745. break;
  1746. cprev = cnow;
  1747. oldsigs = newsigs;
  1748. }
  1749. remove_wait_queue(&info->event_wait_q, &wait);
  1750. set_current_state(TASK_RUNNING);
  1751. if (mask & MgslEvent_ExitHuntMode) {
  1752. spin_lock_irqsave(&info->lock,flags);
  1753. if (!waitqueue_active(&info->event_wait_q))
  1754. irq_disable(info, CHA, IRQ_EXITHUNT);
  1755. spin_unlock_irqrestore(&info->lock,flags);
  1756. }
  1757. exit:
  1758. if (rc == 0)
  1759. PUT_USER(rc, events, mask_ptr);
  1760. return rc;
  1761. }
  1762. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1763. {
  1764. unsigned long flags;
  1765. int rc;
  1766. struct mgsl_icount cprev, cnow;
  1767. DECLARE_WAITQUEUE(wait, current);
  1768. /* save current irq counts */
  1769. spin_lock_irqsave(&info->lock,flags);
  1770. cprev = info->icount;
  1771. add_wait_queue(&info->status_event_wait_q, &wait);
  1772. set_current_state(TASK_INTERRUPTIBLE);
  1773. spin_unlock_irqrestore(&info->lock,flags);
  1774. for(;;) {
  1775. schedule();
  1776. if (signal_pending(current)) {
  1777. rc = -ERESTARTSYS;
  1778. break;
  1779. }
  1780. /* get new irq counts */
  1781. spin_lock_irqsave(&info->lock,flags);
  1782. cnow = info->icount;
  1783. set_current_state(TASK_INTERRUPTIBLE);
  1784. spin_unlock_irqrestore(&info->lock,flags);
  1785. /* if no change, wait aborted for some reason */
  1786. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1787. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1788. rc = -EIO;
  1789. break;
  1790. }
  1791. /* check for change in caller specified modem input */
  1792. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1793. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1794. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1795. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1796. rc = 0;
  1797. break;
  1798. }
  1799. cprev = cnow;
  1800. }
  1801. remove_wait_queue(&info->status_event_wait_q, &wait);
  1802. set_current_state(TASK_RUNNING);
  1803. return rc;
  1804. }
  1805. /* return the state of the serial control and status signals
  1806. */
  1807. static int tiocmget(struct tty_struct *tty, struct file *file)
  1808. {
  1809. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1810. unsigned int result;
  1811. unsigned long flags;
  1812. spin_lock_irqsave(&info->lock,flags);
  1813. get_signals(info);
  1814. spin_unlock_irqrestore(&info->lock,flags);
  1815. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1816. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1817. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1818. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1819. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1820. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1821. if (debug_level >= DEBUG_LEVEL_INFO)
  1822. printk("%s(%d):%s tiocmget() value=%08X\n",
  1823. __FILE__,__LINE__, info->device_name, result );
  1824. return result;
  1825. }
  1826. /* set modem control signals (DTR/RTS)
  1827. */
  1828. static int tiocmset(struct tty_struct *tty, struct file *file,
  1829. unsigned int set, unsigned int clear)
  1830. {
  1831. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1832. unsigned long flags;
  1833. if (debug_level >= DEBUG_LEVEL_INFO)
  1834. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1835. __FILE__,__LINE__,info->device_name, set, clear);
  1836. if (set & TIOCM_RTS)
  1837. info->serial_signals |= SerialSignal_RTS;
  1838. if (set & TIOCM_DTR)
  1839. info->serial_signals |= SerialSignal_DTR;
  1840. if (clear & TIOCM_RTS)
  1841. info->serial_signals &= ~SerialSignal_RTS;
  1842. if (clear & TIOCM_DTR)
  1843. info->serial_signals &= ~SerialSignal_DTR;
  1844. spin_lock_irqsave(&info->lock,flags);
  1845. set_signals(info);
  1846. spin_unlock_irqrestore(&info->lock,flags);
  1847. return 0;
  1848. }
  1849. /* Set or clear transmit break condition
  1850. *
  1851. * Arguments: tty pointer to tty instance data
  1852. * break_state -1=set break condition, 0=clear
  1853. */
  1854. static int mgslpc_break(struct tty_struct *tty, int break_state)
  1855. {
  1856. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1857. unsigned long flags;
  1858. if (debug_level >= DEBUG_LEVEL_INFO)
  1859. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1860. __FILE__,__LINE__, info->device_name, break_state);
  1861. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1862. return -EINVAL;
  1863. spin_lock_irqsave(&info->lock,flags);
  1864. if (break_state == -1)
  1865. set_reg_bits(info, CHA+DAFO, BIT6);
  1866. else
  1867. clear_reg_bits(info, CHA+DAFO, BIT6);
  1868. spin_unlock_irqrestore(&info->lock,flags);
  1869. return 0;
  1870. }
  1871. /* Service an IOCTL request
  1872. *
  1873. * Arguments:
  1874. *
  1875. * tty pointer to tty instance data
  1876. * file pointer to associated file object for device
  1877. * cmd IOCTL command code
  1878. * arg command argument/context
  1879. *
  1880. * Return Value: 0 if success, otherwise error code
  1881. */
  1882. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1883. unsigned int cmd, unsigned long arg)
  1884. {
  1885. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1886. int error;
  1887. struct mgsl_icount cnow; /* kernel counter temps */
  1888. struct serial_icounter_struct __user *p_cuser; /* user space */
  1889. void __user *argp = (void __user *)arg;
  1890. unsigned long flags;
  1891. if (debug_level >= DEBUG_LEVEL_INFO)
  1892. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1893. info->device_name, cmd );
  1894. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1895. return -ENODEV;
  1896. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1897. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1898. if (tty->flags & (1 << TTY_IO_ERROR))
  1899. return -EIO;
  1900. }
  1901. switch (cmd) {
  1902. case MGSL_IOCGPARAMS:
  1903. return get_params(info, argp);
  1904. case MGSL_IOCSPARAMS:
  1905. return set_params(info, argp, tty);
  1906. case MGSL_IOCGTXIDLE:
  1907. return get_txidle(info, argp);
  1908. case MGSL_IOCSTXIDLE:
  1909. return set_txidle(info, (int)arg);
  1910. case MGSL_IOCGIF:
  1911. return get_interface(info, argp);
  1912. case MGSL_IOCSIF:
  1913. return set_interface(info,(int)arg);
  1914. case MGSL_IOCTXENABLE:
  1915. return set_txenable(info,(int)arg, tty);
  1916. case MGSL_IOCRXENABLE:
  1917. return set_rxenable(info,(int)arg);
  1918. case MGSL_IOCTXABORT:
  1919. return tx_abort(info);
  1920. case MGSL_IOCGSTATS:
  1921. return get_stats(info, argp);
  1922. case MGSL_IOCWAITEVENT:
  1923. return wait_events(info, argp);
  1924. case TIOCMIWAIT:
  1925. return modem_input_wait(info,(int)arg);
  1926. case TIOCGICOUNT:
  1927. spin_lock_irqsave(&info->lock,flags);
  1928. cnow = info->icount;
  1929. spin_unlock_irqrestore(&info->lock,flags);
  1930. p_cuser = argp;
  1931. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1932. if (error) return error;
  1933. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1934. if (error) return error;
  1935. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1936. if (error) return error;
  1937. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1938. if (error) return error;
  1939. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1940. if (error) return error;
  1941. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1942. if (error) return error;
  1943. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1944. if (error) return error;
  1945. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1946. if (error) return error;
  1947. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1948. if (error) return error;
  1949. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1950. if (error) return error;
  1951. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1952. if (error) return error;
  1953. return 0;
  1954. default:
  1955. return -ENOIOCTLCMD;
  1956. }
  1957. return 0;
  1958. }
  1959. /* Set new termios settings
  1960. *
  1961. * Arguments:
  1962. *
  1963. * tty pointer to tty structure
  1964. * termios pointer to buffer to hold returned old termios
  1965. */
  1966. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1967. {
  1968. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1969. unsigned long flags;
  1970. if (debug_level >= DEBUG_LEVEL_INFO)
  1971. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1972. tty->driver->name );
  1973. /* just return if nothing has changed */
  1974. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1975. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1976. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1977. return;
  1978. mgslpc_change_params(info, tty);
  1979. /* Handle transition to B0 status */
  1980. if (old_termios->c_cflag & CBAUD &&
  1981. !(tty->termios->c_cflag & CBAUD)) {
  1982. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1983. spin_lock_irqsave(&info->lock,flags);
  1984. set_signals(info);
  1985. spin_unlock_irqrestore(&info->lock,flags);
  1986. }
  1987. /* Handle transition away from B0 status */
  1988. if (!(old_termios->c_cflag & CBAUD) &&
  1989. tty->termios->c_cflag & CBAUD) {
  1990. info->serial_signals |= SerialSignal_DTR;
  1991. if (!(tty->termios->c_cflag & CRTSCTS) ||
  1992. !test_bit(TTY_THROTTLED, &tty->flags)) {
  1993. info->serial_signals |= SerialSignal_RTS;
  1994. }
  1995. spin_lock_irqsave(&info->lock,flags);
  1996. set_signals(info);
  1997. spin_unlock_irqrestore(&info->lock,flags);
  1998. }
  1999. /* Handle turning off CRTSCTS */
  2000. if (old_termios->c_cflag & CRTSCTS &&
  2001. !(tty->termios->c_cflag & CRTSCTS)) {
  2002. tty->hw_stopped = 0;
  2003. tx_release(tty);
  2004. }
  2005. }
  2006. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2007. {
  2008. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2009. struct tty_port *port = &info->port;
  2010. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2011. return;
  2012. if (debug_level >= DEBUG_LEVEL_INFO)
  2013. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2014. __FILE__,__LINE__, info->device_name, port->count);
  2015. WARN_ON(!port->count);
  2016. if (tty_port_close_start(port, tty, filp) == 0)
  2017. goto cleanup;
  2018. if (port->flags & ASYNC_INITIALIZED)
  2019. mgslpc_wait_until_sent(tty, info->timeout);
  2020. mgslpc_flush_buffer(tty);
  2021. tty_ldisc_flush(tty);
  2022. shutdown(info, tty);
  2023. tty_port_close_end(port, tty);
  2024. tty_port_tty_set(port, NULL);
  2025. cleanup:
  2026. if (debug_level >= DEBUG_LEVEL_INFO)
  2027. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2028. tty->driver->name, port->count);
  2029. }
  2030. /* Wait until the transmitter is empty.
  2031. */
  2032. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2033. {
  2034. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2035. unsigned long orig_jiffies, char_time;
  2036. if (!info )
  2037. return;
  2038. if (debug_level >= DEBUG_LEVEL_INFO)
  2039. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2040. __FILE__,__LINE__, info->device_name );
  2041. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2042. return;
  2043. if (!(info->port.flags & ASYNC_INITIALIZED))
  2044. goto exit;
  2045. orig_jiffies = jiffies;
  2046. /* Set check interval to 1/5 of estimated time to
  2047. * send a character, and make it at least 1. The check
  2048. * interval should also be less than the timeout.
  2049. * Note: use tight timings here to satisfy the NIST-PCTS.
  2050. */
  2051. if ( info->params.data_rate ) {
  2052. char_time = info->timeout/(32 * 5);
  2053. if (!char_time)
  2054. char_time++;
  2055. } else
  2056. char_time = 1;
  2057. if (timeout)
  2058. char_time = min_t(unsigned long, char_time, timeout);
  2059. if (info->params.mode == MGSL_MODE_HDLC) {
  2060. while (info->tx_active) {
  2061. msleep_interruptible(jiffies_to_msecs(char_time));
  2062. if (signal_pending(current))
  2063. break;
  2064. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2065. break;
  2066. }
  2067. } else {
  2068. while ((info->tx_count || info->tx_active) &&
  2069. info->tx_enabled) {
  2070. msleep_interruptible(jiffies_to_msecs(char_time));
  2071. if (signal_pending(current))
  2072. break;
  2073. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2074. break;
  2075. }
  2076. }
  2077. exit:
  2078. if (debug_level >= DEBUG_LEVEL_INFO)
  2079. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2080. __FILE__,__LINE__, info->device_name );
  2081. }
  2082. /* Called by tty_hangup() when a hangup is signaled.
  2083. * This is the same as closing all open files for the port.
  2084. */
  2085. static void mgslpc_hangup(struct tty_struct *tty)
  2086. {
  2087. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2088. if (debug_level >= DEBUG_LEVEL_INFO)
  2089. printk("%s(%d):mgslpc_hangup(%s)\n",
  2090. __FILE__,__LINE__, info->device_name );
  2091. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2092. return;
  2093. mgslpc_flush_buffer(tty);
  2094. shutdown(info, tty);
  2095. tty_port_hangup(&info->port);
  2096. }
  2097. static int carrier_raised(struct tty_port *port)
  2098. {
  2099. MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
  2100. unsigned long flags;
  2101. spin_lock_irqsave(&info->lock,flags);
  2102. get_signals(info);
  2103. spin_unlock_irqrestore(&info->lock,flags);
  2104. if (info->serial_signals & SerialSignal_DCD)
  2105. return 1;
  2106. return 0;
  2107. }
  2108. static void raise_dtr_rts(struct tty_port *port)
  2109. {
  2110. MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
  2111. unsigned long flags;
  2112. spin_lock_irqsave(&info->lock,flags);
  2113. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2114. set_signals(info);
  2115. spin_unlock_irqrestore(&info->lock,flags);
  2116. }
  2117. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2118. {
  2119. MGSLPC_INFO *info;
  2120. struct tty_port *port;
  2121. int retval, line;
  2122. unsigned long flags;
  2123. /* verify range of specified line number */
  2124. line = tty->index;
  2125. if ((line < 0) || (line >= mgslpc_device_count)) {
  2126. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2127. __FILE__,__LINE__,line);
  2128. return -ENODEV;
  2129. }
  2130. /* find the info structure for the specified line */
  2131. info = mgslpc_device_list;
  2132. while(info && info->line != line)
  2133. info = info->next_device;
  2134. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2135. return -ENODEV;
  2136. port = &info->port;
  2137. tty->driver_data = info;
  2138. tty_port_tty_set(port, tty);
  2139. if (debug_level >= DEBUG_LEVEL_INFO)
  2140. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2141. __FILE__,__LINE__,tty->driver->name, port->count);
  2142. /* If port is closing, signal caller to try again */
  2143. if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
  2144. if (port->flags & ASYNC_CLOSING)
  2145. interruptible_sleep_on(&port->close_wait);
  2146. retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
  2147. -EAGAIN : -ERESTARTSYS);
  2148. goto cleanup;
  2149. }
  2150. tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2151. spin_lock_irqsave(&info->netlock, flags);
  2152. if (info->netcount) {
  2153. retval = -EBUSY;
  2154. spin_unlock_irqrestore(&info->netlock, flags);
  2155. goto cleanup;
  2156. }
  2157. spin_lock(&port->lock);
  2158. port->count++;
  2159. spin_unlock(&port->lock);
  2160. spin_unlock_irqrestore(&info->netlock, flags);
  2161. if (port->count == 1) {
  2162. /* 1st open on this device, init hardware */
  2163. retval = startup(info, tty);
  2164. if (retval < 0)
  2165. goto cleanup;
  2166. }
  2167. retval = tty_port_block_til_ready(&info->port, tty, filp);
  2168. if (retval) {
  2169. if (debug_level >= DEBUG_LEVEL_INFO)
  2170. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2171. __FILE__,__LINE__, info->device_name, retval);
  2172. goto cleanup;
  2173. }
  2174. if (debug_level >= DEBUG_LEVEL_INFO)
  2175. printk("%s(%d):mgslpc_open(%s) success\n",
  2176. __FILE__,__LINE__, info->device_name);
  2177. retval = 0;
  2178. cleanup:
  2179. return retval;
  2180. }
  2181. /*
  2182. * /proc fs routines....
  2183. */
  2184. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2185. {
  2186. char stat_buf[30];
  2187. int ret;
  2188. unsigned long flags;
  2189. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2190. info->device_name, info->io_base, info->irq_level);
  2191. /* output current serial signal states */
  2192. spin_lock_irqsave(&info->lock,flags);
  2193. get_signals(info);
  2194. spin_unlock_irqrestore(&info->lock,flags);
  2195. stat_buf[0] = 0;
  2196. stat_buf[1] = 0;
  2197. if (info->serial_signals & SerialSignal_RTS)
  2198. strcat(stat_buf, "|RTS");
  2199. if (info->serial_signals & SerialSignal_CTS)
  2200. strcat(stat_buf, "|CTS");
  2201. if (info->serial_signals & SerialSignal_DTR)
  2202. strcat(stat_buf, "|DTR");
  2203. if (info->serial_signals & SerialSignal_DSR)
  2204. strcat(stat_buf, "|DSR");
  2205. if (info->serial_signals & SerialSignal_DCD)
  2206. strcat(stat_buf, "|CD");
  2207. if (info->serial_signals & SerialSignal_RI)
  2208. strcat(stat_buf, "|RI");
  2209. if (info->params.mode == MGSL_MODE_HDLC) {
  2210. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2211. info->icount.txok, info->icount.rxok);
  2212. if (info->icount.txunder)
  2213. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2214. if (info->icount.txabort)
  2215. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2216. if (info->icount.rxshort)
  2217. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2218. if (info->icount.rxlong)
  2219. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2220. if (info->icount.rxover)
  2221. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2222. if (info->icount.rxcrc)
  2223. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2224. } else {
  2225. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2226. info->icount.tx, info->icount.rx);
  2227. if (info->icount.frame)
  2228. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2229. if (info->icount.parity)
  2230. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2231. if (info->icount.brk)
  2232. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2233. if (info->icount.overrun)
  2234. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2235. }
  2236. /* Append serial signal status to end */
  2237. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2238. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2239. info->tx_active,info->bh_requested,info->bh_running,
  2240. info->pending_bh);
  2241. return ret;
  2242. }
  2243. /* Called to print information about devices
  2244. */
  2245. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2246. int *eof, void *data)
  2247. {
  2248. int len = 0, l;
  2249. off_t begin = 0;
  2250. MGSLPC_INFO *info;
  2251. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2252. info = mgslpc_device_list;
  2253. while( info ) {
  2254. l = line_info(page + len, info);
  2255. len += l;
  2256. if (len+begin > off+count)
  2257. goto done;
  2258. if (len+begin < off) {
  2259. begin += len;
  2260. len = 0;
  2261. }
  2262. info = info->next_device;
  2263. }
  2264. *eof = 1;
  2265. done:
  2266. if (off >= len+begin)
  2267. return 0;
  2268. *start = page + (off-begin);
  2269. return ((count < begin+len-off) ? count : begin+len-off);
  2270. }
  2271. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2272. {
  2273. /* each buffer has header and data */
  2274. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2275. /* calculate total allocation size for 8 buffers */
  2276. info->rx_buf_total_size = info->rx_buf_size * 8;
  2277. /* limit total allocated memory */
  2278. if (info->rx_buf_total_size > 0x10000)
  2279. info->rx_buf_total_size = 0x10000;
  2280. /* calculate number of buffers */
  2281. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2282. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2283. if (info->rx_buf == NULL)
  2284. return -ENOMEM;
  2285. rx_reset_buffers(info);
  2286. return 0;
  2287. }
  2288. static void rx_free_buffers(MGSLPC_INFO *info)
  2289. {
  2290. kfree(info->rx_buf);
  2291. info->rx_buf = NULL;
  2292. }
  2293. static int claim_resources(MGSLPC_INFO *info)
  2294. {
  2295. if (rx_alloc_buffers(info) < 0 ) {
  2296. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2297. release_resources(info);
  2298. return -ENODEV;
  2299. }
  2300. return 0;
  2301. }
  2302. static void release_resources(MGSLPC_INFO *info)
  2303. {
  2304. if (debug_level >= DEBUG_LEVEL_INFO)
  2305. printk("release_resources(%s)\n", info->device_name);
  2306. rx_free_buffers(info);
  2307. }
  2308. /* Add the specified device instance data structure to the
  2309. * global linked list of devices and increment the device count.
  2310. *
  2311. * Arguments: info pointer to device instance data
  2312. */
  2313. static void mgslpc_add_device(MGSLPC_INFO *info)
  2314. {
  2315. info->next_device = NULL;
  2316. info->line = mgslpc_device_count;
  2317. sprintf(info->device_name,"ttySLP%d",info->line);
  2318. if (info->line < MAX_DEVICE_COUNT) {
  2319. if (maxframe[info->line])
  2320. info->max_frame_size = maxframe[info->line];
  2321. }
  2322. mgslpc_device_count++;
  2323. if (!mgslpc_device_list)
  2324. mgslpc_device_list = info;
  2325. else {
  2326. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2327. while( current_dev->next_device )
  2328. current_dev = current_dev->next_device;
  2329. current_dev->next_device = info;
  2330. }
  2331. if (info->max_frame_size < 4096)
  2332. info->max_frame_size = 4096;
  2333. else if (info->max_frame_size > 65535)
  2334. info->max_frame_size = 65535;
  2335. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2336. info->device_name, info->io_base, info->irq_level);
  2337. #if SYNCLINK_GENERIC_HDLC
  2338. hdlcdev_init(info);
  2339. #endif
  2340. }
  2341. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2342. {
  2343. MGSLPC_INFO *info = mgslpc_device_list;
  2344. MGSLPC_INFO *last = NULL;
  2345. while(info) {
  2346. if (info == remove_info) {
  2347. if (last)
  2348. last->next_device = info->next_device;
  2349. else
  2350. mgslpc_device_list = info->next_device;
  2351. #if SYNCLINK_GENERIC_HDLC
  2352. hdlcdev_exit(info);
  2353. #endif
  2354. release_resources(info);
  2355. kfree(info);
  2356. mgslpc_device_count--;
  2357. return;
  2358. }
  2359. last = info;
  2360. info = info->next_device;
  2361. }
  2362. }
  2363. static struct pcmcia_device_id mgslpc_ids[] = {
  2364. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2365. PCMCIA_DEVICE_NULL
  2366. };
  2367. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2368. static struct pcmcia_driver mgslpc_driver = {
  2369. .owner = THIS_MODULE,
  2370. .drv = {
  2371. .name = "synclink_cs",
  2372. },
  2373. .probe = mgslpc_probe,
  2374. .remove = mgslpc_detach,
  2375. .id_table = mgslpc_ids,
  2376. .suspend = mgslpc_suspend,
  2377. .resume = mgslpc_resume,
  2378. };
  2379. static const struct tty_operations mgslpc_ops = {
  2380. .open = mgslpc_open,
  2381. .close = mgslpc_close,
  2382. .write = mgslpc_write,
  2383. .put_char = mgslpc_put_char,
  2384. .flush_chars = mgslpc_flush_chars,
  2385. .write_room = mgslpc_write_room,
  2386. .chars_in_buffer = mgslpc_chars_in_buffer,
  2387. .flush_buffer = mgslpc_flush_buffer,
  2388. .ioctl = mgslpc_ioctl,
  2389. .throttle = mgslpc_throttle,
  2390. .unthrottle = mgslpc_unthrottle,
  2391. .send_xchar = mgslpc_send_xchar,
  2392. .break_ctl = mgslpc_break,
  2393. .wait_until_sent = mgslpc_wait_until_sent,
  2394. .read_proc = mgslpc_read_proc,
  2395. .set_termios = mgslpc_set_termios,
  2396. .stop = tx_pause,
  2397. .start = tx_release,
  2398. .hangup = mgslpc_hangup,
  2399. .tiocmget = tiocmget,
  2400. .tiocmset = tiocmset,
  2401. };
  2402. static void synclink_cs_cleanup(void)
  2403. {
  2404. int rc;
  2405. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2406. while(mgslpc_device_list)
  2407. mgslpc_remove_device(mgslpc_device_list);
  2408. if (serial_driver) {
  2409. if ((rc = tty_unregister_driver(serial_driver)))
  2410. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2411. __FILE__,__LINE__,rc);
  2412. put_tty_driver(serial_driver);
  2413. }
  2414. pcmcia_unregister_driver(&mgslpc_driver);
  2415. }
  2416. static int __init synclink_cs_init(void)
  2417. {
  2418. int rc;
  2419. if (break_on_load) {
  2420. mgslpc_get_text_ptr();
  2421. BREAKPOINT();
  2422. }
  2423. printk("%s %s\n", driver_name, driver_version);
  2424. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2425. return rc;
  2426. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2427. if (!serial_driver) {
  2428. rc = -ENOMEM;
  2429. goto error;
  2430. }
  2431. /* Initialize the tty_driver structure */
  2432. serial_driver->owner = THIS_MODULE;
  2433. serial_driver->driver_name = "synclink_cs";
  2434. serial_driver->name = "ttySLP";
  2435. serial_driver->major = ttymajor;
  2436. serial_driver->minor_start = 64;
  2437. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2438. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2439. serial_driver->init_termios = tty_std_termios;
  2440. serial_driver->init_termios.c_cflag =
  2441. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2442. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2443. tty_set_operations(serial_driver, &mgslpc_ops);
  2444. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2445. printk("%s(%d):Couldn't register serial driver\n",
  2446. __FILE__,__LINE__);
  2447. put_tty_driver(serial_driver);
  2448. serial_driver = NULL;
  2449. goto error;
  2450. }
  2451. printk("%s %s, tty major#%d\n",
  2452. driver_name, driver_version,
  2453. serial_driver->major);
  2454. return 0;
  2455. error:
  2456. synclink_cs_cleanup();
  2457. return rc;
  2458. }
  2459. static void __exit synclink_cs_exit(void)
  2460. {
  2461. synclink_cs_cleanup();
  2462. }
  2463. module_init(synclink_cs_init);
  2464. module_exit(synclink_cs_exit);
  2465. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2466. {
  2467. unsigned int M, N;
  2468. unsigned char val;
  2469. /* note:standard BRG mode is broken in V3.2 chip
  2470. * so enhanced mode is always used
  2471. */
  2472. if (rate) {
  2473. N = 3686400 / rate;
  2474. if (!N)
  2475. N = 1;
  2476. N >>= 1;
  2477. for (M = 1; N > 64 && M < 16; M++)
  2478. N >>= 1;
  2479. N--;
  2480. /* BGR[5..0] = N
  2481. * BGR[9..6] = M
  2482. * BGR[7..0] contained in BGR register
  2483. * BGR[9..8] contained in CCR2[7..6]
  2484. * divisor = (N+1)*2^M
  2485. *
  2486. * Note: M *must* not be zero (causes asymetric duty cycle)
  2487. */
  2488. write_reg(info, (unsigned char) (channel + BGR),
  2489. (unsigned char) ((M << 6) + N));
  2490. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2491. val |= ((M << 4) & 0xc0);
  2492. write_reg(info, (unsigned char) (channel + CCR2), val);
  2493. }
  2494. }
  2495. /* Enabled the AUX clock output at the specified frequency.
  2496. */
  2497. static void enable_auxclk(MGSLPC_INFO *info)
  2498. {
  2499. unsigned char val;
  2500. /* MODE
  2501. *
  2502. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2503. * 05 ADM Address Mode, 0 = no addr recognition
  2504. * 04 TMD Timer Mode, 0 = external
  2505. * 03 RAC Receiver Active, 0 = inactive
  2506. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2507. * 01 TRS Timer Resolution, 1=512
  2508. * 00 TLP Test Loop, 0 = no loop
  2509. *
  2510. * 1000 0010
  2511. */
  2512. val = 0x82;
  2513. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2514. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2515. val |= BIT2;
  2516. write_reg(info, CHB + MODE, val);
  2517. /* CCR0
  2518. *
  2519. * 07 PU Power Up, 1=active, 0=power down
  2520. * 06 MCE Master Clock Enable, 1=enabled
  2521. * 05 Reserved, 0
  2522. * 04..02 SC[2..0] Encoding
  2523. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2524. *
  2525. * 11000000
  2526. */
  2527. write_reg(info, CHB + CCR0, 0xc0);
  2528. /* CCR1
  2529. *
  2530. * 07 SFLG Shared Flag, 0 = disable shared flags
  2531. * 06 GALP Go Active On Loop, 0 = not used
  2532. * 05 GLP Go On Loop, 0 = not used
  2533. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2534. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2535. * 02..00 CM[2..0] Clock Mode
  2536. *
  2537. * 0001 0111
  2538. */
  2539. write_reg(info, CHB + CCR1, 0x17);
  2540. /* CCR2 (Channel B)
  2541. *
  2542. * 07..06 BGR[9..8] Baud rate bits 9..8
  2543. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2544. * 04 SSEL Clock source select, 1=submode b
  2545. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2546. * 02 RWX Read/Write Exchange 0=disabled
  2547. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2548. * 00 DIV, data inversion 0=disabled, 1=enabled
  2549. *
  2550. * 0011 1000
  2551. */
  2552. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2553. write_reg(info, CHB + CCR2, 0x38);
  2554. else
  2555. write_reg(info, CHB + CCR2, 0x30);
  2556. /* CCR4
  2557. *
  2558. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2559. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2560. * 05 TST1 Test Pin, 0=normal operation
  2561. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2562. * 03..02 Reserved, must be 0
  2563. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2564. *
  2565. * 0101 0000
  2566. */
  2567. write_reg(info, CHB + CCR4, 0x50);
  2568. /* if auxclk not enabled, set internal BRG so
  2569. * CTS transitions can be detected (requires TxC)
  2570. */
  2571. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2572. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2573. else
  2574. mgslpc_set_rate(info, CHB, 921600);
  2575. }
  2576. static void loopback_enable(MGSLPC_INFO *info)
  2577. {
  2578. unsigned char val;
  2579. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2580. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2581. write_reg(info, CHA + CCR1, val);
  2582. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2583. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2584. write_reg(info, CHA + CCR2, val);
  2585. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2586. if (info->params.clock_speed)
  2587. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2588. else
  2589. mgslpc_set_rate(info, CHA, 1843200);
  2590. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2591. val = read_reg(info, CHA + MODE) | BIT0;
  2592. write_reg(info, CHA + MODE, val);
  2593. }
  2594. static void hdlc_mode(MGSLPC_INFO *info)
  2595. {
  2596. unsigned char val;
  2597. unsigned char clkmode, clksubmode;
  2598. /* disable all interrupts */
  2599. irq_disable(info, CHA, 0xffff);
  2600. irq_disable(info, CHB, 0xffff);
  2601. port_irq_disable(info, 0xff);
  2602. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2603. clkmode = clksubmode = 0;
  2604. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2605. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2606. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2607. clkmode = 7;
  2608. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2609. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2610. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2611. clkmode = 7;
  2612. clksubmode = 1;
  2613. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2614. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2615. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2616. clkmode = 6;
  2617. clksubmode = 1;
  2618. } else {
  2619. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2620. clkmode = 6;
  2621. }
  2622. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2623. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2624. clksubmode = 1;
  2625. }
  2626. /* MODE
  2627. *
  2628. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2629. * 05 ADM Address Mode, 0 = no addr recognition
  2630. * 04 TMD Timer Mode, 0 = external
  2631. * 03 RAC Receiver Active, 0 = inactive
  2632. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2633. * 01 TRS Timer Resolution, 1=512
  2634. * 00 TLP Test Loop, 0 = no loop
  2635. *
  2636. * 1000 0010
  2637. */
  2638. val = 0x82;
  2639. if (info->params.loopback)
  2640. val |= BIT0;
  2641. /* preserve RTS state */
  2642. if (info->serial_signals & SerialSignal_RTS)
  2643. val |= BIT2;
  2644. write_reg(info, CHA + MODE, val);
  2645. /* CCR0
  2646. *
  2647. * 07 PU Power Up, 1=active, 0=power down
  2648. * 06 MCE Master Clock Enable, 1=enabled
  2649. * 05 Reserved, 0
  2650. * 04..02 SC[2..0] Encoding
  2651. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2652. *
  2653. * 11000000
  2654. */
  2655. val = 0xc0;
  2656. switch (info->params.encoding)
  2657. {
  2658. case HDLC_ENCODING_NRZI:
  2659. val |= BIT3;
  2660. break;
  2661. case HDLC_ENCODING_BIPHASE_SPACE:
  2662. val |= BIT4;
  2663. break; // FM0
  2664. case HDLC_ENCODING_BIPHASE_MARK:
  2665. val |= BIT4 + BIT2;
  2666. break; // FM1
  2667. case HDLC_ENCODING_BIPHASE_LEVEL:
  2668. val |= BIT4 + BIT3;
  2669. break; // Manchester
  2670. }
  2671. write_reg(info, CHA + CCR0, val);
  2672. /* CCR1
  2673. *
  2674. * 07 SFLG Shared Flag, 0 = disable shared flags
  2675. * 06 GALP Go Active On Loop, 0 = not used
  2676. * 05 GLP Go On Loop, 0 = not used
  2677. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2678. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2679. * 02..00 CM[2..0] Clock Mode
  2680. *
  2681. * 0001 0000
  2682. */
  2683. val = 0x10 + clkmode;
  2684. write_reg(info, CHA + CCR1, val);
  2685. /* CCR2
  2686. *
  2687. * 07..06 BGR[9..8] Baud rate bits 9..8
  2688. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2689. * 04 SSEL Clock source select, 1=submode b
  2690. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2691. * 02 RWX Read/Write Exchange 0=disabled
  2692. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2693. * 00 DIV, data inversion 0=disabled, 1=enabled
  2694. *
  2695. * 0000 0000
  2696. */
  2697. val = 0x00;
  2698. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2699. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2700. val |= BIT5;
  2701. if (clksubmode)
  2702. val |= BIT4;
  2703. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2704. val |= BIT1;
  2705. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2706. val |= BIT0;
  2707. write_reg(info, CHA + CCR2, val);
  2708. /* CCR3
  2709. *
  2710. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2711. * 05 EPT Enable preamble transmission, 1=enabled
  2712. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2713. * 03 CRL CRC Reset Level, 0=FFFF
  2714. * 02 RCRC Rx CRC 0=On 1=Off
  2715. * 01 TCRC Tx CRC 0=On 1=Off
  2716. * 00 PSD DPLL Phase Shift Disable
  2717. *
  2718. * 0000 0000
  2719. */
  2720. val = 0x00;
  2721. if (info->params.crc_type == HDLC_CRC_NONE)
  2722. val |= BIT2 + BIT1;
  2723. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2724. val |= BIT5;
  2725. switch (info->params.preamble_length)
  2726. {
  2727. case HDLC_PREAMBLE_LENGTH_16BITS:
  2728. val |= BIT6;
  2729. break;
  2730. case HDLC_PREAMBLE_LENGTH_32BITS:
  2731. val |= BIT6;
  2732. break;
  2733. case HDLC_PREAMBLE_LENGTH_64BITS:
  2734. val |= BIT7 + BIT6;
  2735. break;
  2736. }
  2737. write_reg(info, CHA + CCR3, val);
  2738. /* PRE - Preamble pattern */
  2739. val = 0;
  2740. switch (info->params.preamble)
  2741. {
  2742. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2743. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2744. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2745. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2746. }
  2747. write_reg(info, CHA + PRE, val);
  2748. /* CCR4
  2749. *
  2750. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2751. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2752. * 05 TST1 Test Pin, 0=normal operation
  2753. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2754. * 03..02 Reserved, must be 0
  2755. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2756. *
  2757. * 0101 0000
  2758. */
  2759. val = 0x50;
  2760. write_reg(info, CHA + CCR4, val);
  2761. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2762. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2763. else
  2764. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2765. /* RLCR Receive length check register
  2766. *
  2767. * 7 1=enable receive length check
  2768. * 6..0 Max frame length = (RL + 1) * 32
  2769. */
  2770. write_reg(info, CHA + RLCR, 0);
  2771. /* XBCH Transmit Byte Count High
  2772. *
  2773. * 07 DMA mode, 0 = interrupt driven
  2774. * 06 NRM, 0=ABM (ignored)
  2775. * 05 CAS Carrier Auto Start
  2776. * 04 XC Transmit Continuously (ignored)
  2777. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2778. *
  2779. * 0000 0000
  2780. */
  2781. val = 0x00;
  2782. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2783. val |= BIT5;
  2784. write_reg(info, CHA + XBCH, val);
  2785. enable_auxclk(info);
  2786. if (info->params.loopback || info->testing_irq)
  2787. loopback_enable(info);
  2788. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2789. {
  2790. irq_enable(info, CHB, IRQ_CTS);
  2791. /* PVR[3] 1=AUTO CTS active */
  2792. set_reg_bits(info, CHA + PVR, BIT3);
  2793. } else
  2794. clear_reg_bits(info, CHA + PVR, BIT3);
  2795. irq_enable(info, CHA,
  2796. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2797. IRQ_UNDERRUN + IRQ_TXFIFO);
  2798. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2799. wait_command_complete(info, CHA);
  2800. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2801. /* Master clock mode enabled above to allow reset commands
  2802. * to complete even if no data clocks are present.
  2803. *
  2804. * Disable master clock mode for normal communications because
  2805. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2806. * IRQ when in master clock mode.
  2807. *
  2808. * Leave master clock mode enabled for IRQ test because the
  2809. * timer IRQ used by the test can only happen in master clock mode.
  2810. */
  2811. if (!info->testing_irq)
  2812. clear_reg_bits(info, CHA + CCR0, BIT6);
  2813. tx_set_idle(info);
  2814. tx_stop(info);
  2815. rx_stop(info);
  2816. }
  2817. static void rx_stop(MGSLPC_INFO *info)
  2818. {
  2819. if (debug_level >= DEBUG_LEVEL_ISR)
  2820. printk("%s(%d):rx_stop(%s)\n",
  2821. __FILE__,__LINE__, info->device_name );
  2822. /* MODE:03 RAC Receiver Active, 0=inactive */
  2823. clear_reg_bits(info, CHA + MODE, BIT3);
  2824. info->rx_enabled = false;
  2825. info->rx_overflow = false;
  2826. }
  2827. static void rx_start(MGSLPC_INFO *info)
  2828. {
  2829. if (debug_level >= DEBUG_LEVEL_ISR)
  2830. printk("%s(%d):rx_start(%s)\n",
  2831. __FILE__,__LINE__, info->device_name );
  2832. rx_reset_buffers(info);
  2833. info->rx_enabled = false;
  2834. info->rx_overflow = false;
  2835. /* MODE:03 RAC Receiver Active, 1=active */
  2836. set_reg_bits(info, CHA + MODE, BIT3);
  2837. info->rx_enabled = true;
  2838. }
  2839. static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
  2840. {
  2841. if (debug_level >= DEBUG_LEVEL_ISR)
  2842. printk("%s(%d):tx_start(%s)\n",
  2843. __FILE__,__LINE__, info->device_name );
  2844. if (info->tx_count) {
  2845. /* If auto RTS enabled and RTS is inactive, then assert */
  2846. /* RTS and set a flag indicating that the driver should */
  2847. /* negate RTS when the transmission completes. */
  2848. info->drop_rts_on_tx_done = false;
  2849. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2850. get_signals(info);
  2851. if (!(info->serial_signals & SerialSignal_RTS)) {
  2852. info->serial_signals |= SerialSignal_RTS;
  2853. set_signals(info);
  2854. info->drop_rts_on_tx_done = true;
  2855. }
  2856. }
  2857. if (info->params.mode == MGSL_MODE_ASYNC) {
  2858. if (!info->tx_active) {
  2859. info->tx_active = true;
  2860. tx_ready(info, tty);
  2861. }
  2862. } else {
  2863. info->tx_active = true;
  2864. tx_ready(info, tty);
  2865. mod_timer(&info->tx_timer, jiffies +
  2866. msecs_to_jiffies(5000));
  2867. }
  2868. }
  2869. if (!info->tx_enabled)
  2870. info->tx_enabled = true;
  2871. }
  2872. static void tx_stop(MGSLPC_INFO *info)
  2873. {
  2874. if (debug_level >= DEBUG_LEVEL_ISR)
  2875. printk("%s(%d):tx_stop(%s)\n",
  2876. __FILE__,__LINE__, info->device_name );
  2877. del_timer(&info->tx_timer);
  2878. info->tx_enabled = false;
  2879. info->tx_active = false;
  2880. }
  2881. /* Reset the adapter to a known state and prepare it for further use.
  2882. */
  2883. static void reset_device(MGSLPC_INFO *info)
  2884. {
  2885. /* power up both channels (set BIT7) */
  2886. write_reg(info, CHA + CCR0, 0x80);
  2887. write_reg(info, CHB + CCR0, 0x80);
  2888. write_reg(info, CHA + MODE, 0);
  2889. write_reg(info, CHB + MODE, 0);
  2890. /* disable all interrupts */
  2891. irq_disable(info, CHA, 0xffff);
  2892. irq_disable(info, CHB, 0xffff);
  2893. port_irq_disable(info, 0xff);
  2894. /* PCR Port Configuration Register
  2895. *
  2896. * 07..04 DEC[3..0] Serial I/F select outputs
  2897. * 03 output, 1=AUTO CTS control enabled
  2898. * 02 RI Ring Indicator input 0=active
  2899. * 01 DSR input 0=active
  2900. * 00 DTR output 0=active
  2901. *
  2902. * 0000 0110
  2903. */
  2904. write_reg(info, PCR, 0x06);
  2905. /* PVR Port Value Register
  2906. *
  2907. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  2908. * 03 AUTO CTS output 1=enabled
  2909. * 02 RI Ring Indicator input
  2910. * 01 DSR input
  2911. * 00 DTR output (1=inactive)
  2912. *
  2913. * 0000 0001
  2914. */
  2915. // write_reg(info, PVR, PVR_DTR);
  2916. /* IPC Interrupt Port Configuration
  2917. *
  2918. * 07 VIS 1=Masked interrupts visible
  2919. * 06..05 Reserved, 0
  2920. * 04..03 SLA Slave address, 00 ignored
  2921. * 02 CASM Cascading Mode, 1=daisy chain
  2922. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  2923. *
  2924. * 0000 0101
  2925. */
  2926. write_reg(info, IPC, 0x05);
  2927. }
  2928. static void async_mode(MGSLPC_INFO *info)
  2929. {
  2930. unsigned char val;
  2931. /* disable all interrupts */
  2932. irq_disable(info, CHA, 0xffff);
  2933. irq_disable(info, CHB, 0xffff);
  2934. port_irq_disable(info, 0xff);
  2935. /* MODE
  2936. *
  2937. * 07 Reserved, 0
  2938. * 06 FRTS RTS State, 0=active
  2939. * 05 FCTS Flow Control on CTS
  2940. * 04 FLON Flow Control Enable
  2941. * 03 RAC Receiver Active, 0 = inactive
  2942. * 02 RTS 0=Auto RTS, 1=manual RTS
  2943. * 01 TRS Timer Resolution, 1=512
  2944. * 00 TLP Test Loop, 0 = no loop
  2945. *
  2946. * 0000 0110
  2947. */
  2948. val = 0x06;
  2949. if (info->params.loopback)
  2950. val |= BIT0;
  2951. /* preserve RTS state */
  2952. if (!(info->serial_signals & SerialSignal_RTS))
  2953. val |= BIT6;
  2954. write_reg(info, CHA + MODE, val);
  2955. /* CCR0
  2956. *
  2957. * 07 PU Power Up, 1=active, 0=power down
  2958. * 06 MCE Master Clock Enable, 1=enabled
  2959. * 05 Reserved, 0
  2960. * 04..02 SC[2..0] Encoding, 000=NRZ
  2961. * 01..00 SM[1..0] Serial Mode, 11=Async
  2962. *
  2963. * 1000 0011
  2964. */
  2965. write_reg(info, CHA + CCR0, 0x83);
  2966. /* CCR1
  2967. *
  2968. * 07..05 Reserved, 0
  2969. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2970. * 03 BCR Bit Clock Rate, 1=16x
  2971. * 02..00 CM[2..0] Clock Mode, 111=BRG
  2972. *
  2973. * 0001 1111
  2974. */
  2975. write_reg(info, CHA + CCR1, 0x1f);
  2976. /* CCR2 (channel A)
  2977. *
  2978. * 07..06 BGR[9..8] Baud rate bits 9..8
  2979. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2980. * 04 SSEL Clock source select, 1=submode b
  2981. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2982. * 02 RWX Read/Write Exchange 0=disabled
  2983. * 01 Reserved, 0
  2984. * 00 DIV, data inversion 0=disabled, 1=enabled
  2985. *
  2986. * 0001 0000
  2987. */
  2988. write_reg(info, CHA + CCR2, 0x10);
  2989. /* CCR3
  2990. *
  2991. * 07..01 Reserved, 0
  2992. * 00 PSD DPLL Phase Shift Disable
  2993. *
  2994. * 0000 0000
  2995. */
  2996. write_reg(info, CHA + CCR3, 0);
  2997. /* CCR4
  2998. *
  2999. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3000. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3001. * 05 TST1 Test Pin, 0=normal operation
  3002. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3003. * 03..00 Reserved, must be 0
  3004. *
  3005. * 0101 0000
  3006. */
  3007. write_reg(info, CHA + CCR4, 0x50);
  3008. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3009. /* DAFO Data Format
  3010. *
  3011. * 07 Reserved, 0
  3012. * 06 XBRK transmit break, 0=normal operation
  3013. * 05 Stop bits (0=1, 1=2)
  3014. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3015. * 02 PAREN Parity Enable
  3016. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3017. *
  3018. */
  3019. val = 0x00;
  3020. if (info->params.data_bits != 8)
  3021. val |= BIT0; /* 7 bits */
  3022. if (info->params.stop_bits != 1)
  3023. val |= BIT5;
  3024. if (info->params.parity != ASYNC_PARITY_NONE)
  3025. {
  3026. val |= BIT2; /* Parity enable */
  3027. if (info->params.parity == ASYNC_PARITY_ODD)
  3028. val |= BIT3;
  3029. else
  3030. val |= BIT4;
  3031. }
  3032. write_reg(info, CHA + DAFO, val);
  3033. /* RFC Rx FIFO Control
  3034. *
  3035. * 07 Reserved, 0
  3036. * 06 DPS, 1=parity bit not stored in data byte
  3037. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3038. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3039. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3040. * 01 Reserved, 0
  3041. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3042. *
  3043. * 0101 1100
  3044. */
  3045. write_reg(info, CHA + RFC, 0x5c);
  3046. /* RLCR Receive length check register
  3047. *
  3048. * Max frame length = (RL + 1) * 32
  3049. */
  3050. write_reg(info, CHA + RLCR, 0);
  3051. /* XBCH Transmit Byte Count High
  3052. *
  3053. * 07 DMA mode, 0 = interrupt driven
  3054. * 06 NRM, 0=ABM (ignored)
  3055. * 05 CAS Carrier Auto Start
  3056. * 04 XC Transmit Continuously (ignored)
  3057. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3058. *
  3059. * 0000 0000
  3060. */
  3061. val = 0x00;
  3062. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3063. val |= BIT5;
  3064. write_reg(info, CHA + XBCH, val);
  3065. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3066. irq_enable(info, CHA, IRQ_CTS);
  3067. /* MODE:03 RAC Receiver Active, 1=active */
  3068. set_reg_bits(info, CHA + MODE, BIT3);
  3069. enable_auxclk(info);
  3070. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3071. irq_enable(info, CHB, IRQ_CTS);
  3072. /* PVR[3] 1=AUTO CTS active */
  3073. set_reg_bits(info, CHA + PVR, BIT3);
  3074. } else
  3075. clear_reg_bits(info, CHA + PVR, BIT3);
  3076. irq_enable(info, CHA,
  3077. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3078. IRQ_ALLSENT + IRQ_TXFIFO);
  3079. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3080. wait_command_complete(info, CHA);
  3081. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3082. }
  3083. /* Set the HDLC idle mode for the transmitter.
  3084. */
  3085. static void tx_set_idle(MGSLPC_INFO *info)
  3086. {
  3087. /* Note: ESCC2 only supports flags and one idle modes */
  3088. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3089. set_reg_bits(info, CHA + CCR1, BIT3);
  3090. else
  3091. clear_reg_bits(info, CHA + CCR1, BIT3);
  3092. }
  3093. /* get state of the V24 status (input) signals.
  3094. */
  3095. static void get_signals(MGSLPC_INFO *info)
  3096. {
  3097. unsigned char status = 0;
  3098. /* preserve DTR and RTS */
  3099. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3100. if (read_reg(info, CHB + VSTR) & BIT7)
  3101. info->serial_signals |= SerialSignal_DCD;
  3102. if (read_reg(info, CHB + STAR) & BIT1)
  3103. info->serial_signals |= SerialSignal_CTS;
  3104. status = read_reg(info, CHA + PVR);
  3105. if (!(status & PVR_RI))
  3106. info->serial_signals |= SerialSignal_RI;
  3107. if (!(status & PVR_DSR))
  3108. info->serial_signals |= SerialSignal_DSR;
  3109. }
  3110. /* Set the state of DTR and RTS based on contents of
  3111. * serial_signals member of device extension.
  3112. */
  3113. static void set_signals(MGSLPC_INFO *info)
  3114. {
  3115. unsigned char val;
  3116. val = read_reg(info, CHA + MODE);
  3117. if (info->params.mode == MGSL_MODE_ASYNC) {
  3118. if (info->serial_signals & SerialSignal_RTS)
  3119. val &= ~BIT6;
  3120. else
  3121. val |= BIT6;
  3122. } else {
  3123. if (info->serial_signals & SerialSignal_RTS)
  3124. val |= BIT2;
  3125. else
  3126. val &= ~BIT2;
  3127. }
  3128. write_reg(info, CHA + MODE, val);
  3129. if (info->serial_signals & SerialSignal_DTR)
  3130. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3131. else
  3132. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3133. }
  3134. static void rx_reset_buffers(MGSLPC_INFO *info)
  3135. {
  3136. RXBUF *buf;
  3137. int i;
  3138. info->rx_put = 0;
  3139. info->rx_get = 0;
  3140. info->rx_frame_count = 0;
  3141. for (i=0 ; i < info->rx_buf_count ; i++) {
  3142. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3143. buf->status = buf->count = 0;
  3144. }
  3145. }
  3146. /* Attempt to return a received HDLC frame
  3147. * Only frames received without errors are returned.
  3148. *
  3149. * Returns true if frame returned, otherwise false
  3150. */
  3151. static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
  3152. {
  3153. unsigned short status;
  3154. RXBUF *buf;
  3155. unsigned int framesize = 0;
  3156. unsigned long flags;
  3157. bool return_frame = false;
  3158. if (info->rx_frame_count == 0)
  3159. return false;
  3160. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3161. status = buf->status;
  3162. /* 07 VFR 1=valid frame
  3163. * 06 RDO 1=data overrun
  3164. * 05 CRC 1=OK, 0=error
  3165. * 04 RAB 1=frame aborted
  3166. */
  3167. if ((status & 0xf0) != 0xA0) {
  3168. if (!(status & BIT7) || (status & BIT4))
  3169. info->icount.rxabort++;
  3170. else if (status & BIT6)
  3171. info->icount.rxover++;
  3172. else if (!(status & BIT5)) {
  3173. info->icount.rxcrc++;
  3174. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3175. return_frame = true;
  3176. }
  3177. framesize = 0;
  3178. #if SYNCLINK_GENERIC_HDLC
  3179. {
  3180. info->netdev->stats.rx_errors++;
  3181. info->netdev->stats.rx_frame_errors++;
  3182. }
  3183. #endif
  3184. } else
  3185. return_frame = true;
  3186. if (return_frame)
  3187. framesize = buf->count;
  3188. if (debug_level >= DEBUG_LEVEL_BH)
  3189. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3190. __FILE__,__LINE__,info->device_name,status,framesize);
  3191. if (debug_level >= DEBUG_LEVEL_DATA)
  3192. trace_block(info, buf->data, framesize, 0);
  3193. if (framesize) {
  3194. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3195. framesize+1 > info->max_frame_size) ||
  3196. framesize > info->max_frame_size)
  3197. info->icount.rxlong++;
  3198. else {
  3199. if (status & BIT5)
  3200. info->icount.rxok++;
  3201. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3202. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3203. ++framesize;
  3204. }
  3205. #if SYNCLINK_GENERIC_HDLC
  3206. if (info->netcount)
  3207. hdlcdev_rx(info, buf->data, framesize);
  3208. else
  3209. #endif
  3210. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3211. }
  3212. }
  3213. spin_lock_irqsave(&info->lock,flags);
  3214. buf->status = buf->count = 0;
  3215. info->rx_frame_count--;
  3216. info->rx_get++;
  3217. if (info->rx_get >= info->rx_buf_count)
  3218. info->rx_get = 0;
  3219. spin_unlock_irqrestore(&info->lock,flags);
  3220. return true;
  3221. }
  3222. static bool register_test(MGSLPC_INFO *info)
  3223. {
  3224. static unsigned char patterns[] =
  3225. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3226. static unsigned int count = ARRAY_SIZE(patterns);
  3227. unsigned int i;
  3228. bool rc = true;
  3229. unsigned long flags;
  3230. spin_lock_irqsave(&info->lock,flags);
  3231. reset_device(info);
  3232. for (i = 0; i < count; i++) {
  3233. write_reg(info, XAD1, patterns[i]);
  3234. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3235. if ((read_reg(info, XAD1) != patterns[i]) ||
  3236. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3237. rc = false;
  3238. break;
  3239. }
  3240. }
  3241. spin_unlock_irqrestore(&info->lock,flags);
  3242. return rc;
  3243. }
  3244. static bool irq_test(MGSLPC_INFO *info)
  3245. {
  3246. unsigned long end_time;
  3247. unsigned long flags;
  3248. spin_lock_irqsave(&info->lock,flags);
  3249. reset_device(info);
  3250. info->testing_irq = true;
  3251. hdlc_mode(info);
  3252. info->irq_occurred = false;
  3253. /* init hdlc mode */
  3254. irq_enable(info, CHA, IRQ_TIMER);
  3255. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3256. issue_command(info, CHA, CMD_START_TIMER);
  3257. spin_unlock_irqrestore(&info->lock,flags);
  3258. end_time=100;
  3259. while(end_time-- && !info->irq_occurred) {
  3260. msleep_interruptible(10);
  3261. }
  3262. info->testing_irq = false;
  3263. spin_lock_irqsave(&info->lock,flags);
  3264. reset_device(info);
  3265. spin_unlock_irqrestore(&info->lock,flags);
  3266. return info->irq_occurred;
  3267. }
  3268. static int adapter_test(MGSLPC_INFO *info)
  3269. {
  3270. if (!register_test(info)) {
  3271. info->init_error = DiagStatus_AddressFailure;
  3272. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3273. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3274. return -ENODEV;
  3275. }
  3276. if (!irq_test(info)) {
  3277. info->init_error = DiagStatus_IrqFailure;
  3278. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3279. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3280. return -ENODEV;
  3281. }
  3282. if (debug_level >= DEBUG_LEVEL_INFO)
  3283. printk("%s(%d):device %s passed diagnostics\n",
  3284. __FILE__,__LINE__,info->device_name);
  3285. return 0;
  3286. }
  3287. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3288. {
  3289. int i;
  3290. int linecount;
  3291. if (xmit)
  3292. printk("%s tx data:\n",info->device_name);
  3293. else
  3294. printk("%s rx data:\n",info->device_name);
  3295. while(count) {
  3296. if (count > 16)
  3297. linecount = 16;
  3298. else
  3299. linecount = count;
  3300. for(i=0;i<linecount;i++)
  3301. printk("%02X ",(unsigned char)data[i]);
  3302. for(;i<17;i++)
  3303. printk(" ");
  3304. for(i=0;i<linecount;i++) {
  3305. if (data[i]>=040 && data[i]<=0176)
  3306. printk("%c",data[i]);
  3307. else
  3308. printk(".");
  3309. }
  3310. printk("\n");
  3311. data += linecount;
  3312. count -= linecount;
  3313. }
  3314. }
  3315. /* HDLC frame time out
  3316. * update stats and do tx completion processing
  3317. */
  3318. static void tx_timeout(unsigned long context)
  3319. {
  3320. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3321. unsigned long flags;
  3322. if ( debug_level >= DEBUG_LEVEL_INFO )
  3323. printk( "%s(%d):tx_timeout(%s)\n",
  3324. __FILE__,__LINE__,info->device_name);
  3325. if(info->tx_active &&
  3326. info->params.mode == MGSL_MODE_HDLC) {
  3327. info->icount.txtimeout++;
  3328. }
  3329. spin_lock_irqsave(&info->lock,flags);
  3330. info->tx_active = false;
  3331. info->tx_count = info->tx_put = info->tx_get = 0;
  3332. spin_unlock_irqrestore(&info->lock,flags);
  3333. #if SYNCLINK_GENERIC_HDLC
  3334. if (info->netcount)
  3335. hdlcdev_tx_done(info);
  3336. else
  3337. #endif
  3338. {
  3339. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3340. bh_transmit(info, tty);
  3341. tty_kref_put(tty);
  3342. }
  3343. }
  3344. #if SYNCLINK_GENERIC_HDLC
  3345. /**
  3346. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3347. * set encoding and frame check sequence (FCS) options
  3348. *
  3349. * dev pointer to network device structure
  3350. * encoding serial encoding setting
  3351. * parity FCS setting
  3352. *
  3353. * returns 0 if success, otherwise error code
  3354. */
  3355. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3356. unsigned short parity)
  3357. {
  3358. MGSLPC_INFO *info = dev_to_port(dev);
  3359. struct tty_struct *tty;
  3360. unsigned char new_encoding;
  3361. unsigned short new_crctype;
  3362. /* return error if TTY interface open */
  3363. if (info->port.count)
  3364. return -EBUSY;
  3365. switch (encoding)
  3366. {
  3367. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3368. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3369. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3370. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3371. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3372. default: return -EINVAL;
  3373. }
  3374. switch (parity)
  3375. {
  3376. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3377. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3378. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3379. default: return -EINVAL;
  3380. }
  3381. info->params.encoding = new_encoding;
  3382. info->params.crc_type = new_crctype;
  3383. /* if network interface up, reprogram hardware */
  3384. if (info->netcount) {
  3385. tty = tty_port_tty_get(&info->port);
  3386. mgslpc_program_hw(info, tty);
  3387. tty_kref_put(tty);
  3388. }
  3389. return 0;
  3390. }
  3391. /**
  3392. * called by generic HDLC layer to send frame
  3393. *
  3394. * skb socket buffer containing HDLC frame
  3395. * dev pointer to network device structure
  3396. *
  3397. * returns 0 if success, otherwise error code
  3398. */
  3399. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3400. {
  3401. MGSLPC_INFO *info = dev_to_port(dev);
  3402. unsigned long flags;
  3403. if (debug_level >= DEBUG_LEVEL_INFO)
  3404. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3405. /* stop sending until this frame completes */
  3406. netif_stop_queue(dev);
  3407. /* copy data to device buffers */
  3408. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3409. info->tx_get = 0;
  3410. info->tx_put = info->tx_count = skb->len;
  3411. /* update network statistics */
  3412. dev->stats.tx_packets++;
  3413. dev->stats.tx_bytes += skb->len;
  3414. /* done with socket buffer, so free it */
  3415. dev_kfree_skb(skb);
  3416. /* save start time for transmit timeout detection */
  3417. dev->trans_start = jiffies;
  3418. /* start hardware transmitter if necessary */
  3419. spin_lock_irqsave(&info->lock,flags);
  3420. if (!info->tx_active) {
  3421. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3422. tx_start(info, tty);
  3423. tty_kref_put(tty);
  3424. }
  3425. spin_unlock_irqrestore(&info->lock,flags);
  3426. return 0;
  3427. }
  3428. /**
  3429. * called by network layer when interface enabled
  3430. * claim resources and initialize hardware
  3431. *
  3432. * dev pointer to network device structure
  3433. *
  3434. * returns 0 if success, otherwise error code
  3435. */
  3436. static int hdlcdev_open(struct net_device *dev)
  3437. {
  3438. MGSLPC_INFO *info = dev_to_port(dev);
  3439. struct tty_struct *tty;
  3440. int rc;
  3441. unsigned long flags;
  3442. if (debug_level >= DEBUG_LEVEL_INFO)
  3443. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3444. /* generic HDLC layer open processing */
  3445. if ((rc = hdlc_open(dev)))
  3446. return rc;
  3447. /* arbitrate between network and tty opens */
  3448. spin_lock_irqsave(&info->netlock, flags);
  3449. if (info->port.count != 0 || info->netcount != 0) {
  3450. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3451. spin_unlock_irqrestore(&info->netlock, flags);
  3452. return -EBUSY;
  3453. }
  3454. info->netcount=1;
  3455. spin_unlock_irqrestore(&info->netlock, flags);
  3456. tty = tty_port_tty_get(&info->port);
  3457. /* claim resources and init adapter */
  3458. if ((rc = startup(info, tty)) != 0) {
  3459. tty_kref_put(tty);
  3460. spin_lock_irqsave(&info->netlock, flags);
  3461. info->netcount=0;
  3462. spin_unlock_irqrestore(&info->netlock, flags);
  3463. return rc;
  3464. }
  3465. /* assert DTR and RTS, apply hardware settings */
  3466. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3467. mgslpc_program_hw(info, tty);
  3468. tty_kref_put(tty);
  3469. /* enable network layer transmit */
  3470. dev->trans_start = jiffies;
  3471. netif_start_queue(dev);
  3472. /* inform generic HDLC layer of current DCD status */
  3473. spin_lock_irqsave(&info->lock, flags);
  3474. get_signals(info);
  3475. spin_unlock_irqrestore(&info->lock, flags);
  3476. if (info->serial_signals & SerialSignal_DCD)
  3477. netif_carrier_on(dev);
  3478. else
  3479. netif_carrier_off(dev);
  3480. return 0;
  3481. }
  3482. /**
  3483. * called by network layer when interface is disabled
  3484. * shutdown hardware and release resources
  3485. *
  3486. * dev pointer to network device structure
  3487. *
  3488. * returns 0 if success, otherwise error code
  3489. */
  3490. static int hdlcdev_close(struct net_device *dev)
  3491. {
  3492. MGSLPC_INFO *info = dev_to_port(dev);
  3493. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3494. unsigned long flags;
  3495. if (debug_level >= DEBUG_LEVEL_INFO)
  3496. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3497. netif_stop_queue(dev);
  3498. /* shutdown adapter and release resources */
  3499. shutdown(info, tty);
  3500. tty_kref_put(tty);
  3501. hdlc_close(dev);
  3502. spin_lock_irqsave(&info->netlock, flags);
  3503. info->netcount=0;
  3504. spin_unlock_irqrestore(&info->netlock, flags);
  3505. return 0;
  3506. }
  3507. /**
  3508. * called by network layer to process IOCTL call to network device
  3509. *
  3510. * dev pointer to network device structure
  3511. * ifr pointer to network interface request structure
  3512. * cmd IOCTL command code
  3513. *
  3514. * returns 0 if success, otherwise error code
  3515. */
  3516. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3517. {
  3518. const size_t size = sizeof(sync_serial_settings);
  3519. sync_serial_settings new_line;
  3520. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3521. MGSLPC_INFO *info = dev_to_port(dev);
  3522. unsigned int flags;
  3523. if (debug_level >= DEBUG_LEVEL_INFO)
  3524. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3525. /* return error if TTY interface open */
  3526. if (info->port.count)
  3527. return -EBUSY;
  3528. if (cmd != SIOCWANDEV)
  3529. return hdlc_ioctl(dev, ifr, cmd);
  3530. switch(ifr->ifr_settings.type) {
  3531. case IF_GET_IFACE: /* return current sync_serial_settings */
  3532. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3533. if (ifr->ifr_settings.size < size) {
  3534. ifr->ifr_settings.size = size; /* data size wanted */
  3535. return -ENOBUFS;
  3536. }
  3537. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3538. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3539. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3540. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3541. switch (flags){
  3542. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3543. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3544. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3545. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3546. default: new_line.clock_type = CLOCK_DEFAULT;
  3547. }
  3548. new_line.clock_rate = info->params.clock_speed;
  3549. new_line.loopback = info->params.loopback ? 1:0;
  3550. if (copy_to_user(line, &new_line, size))
  3551. return -EFAULT;
  3552. return 0;
  3553. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3554. if(!capable(CAP_NET_ADMIN))
  3555. return -EPERM;
  3556. if (copy_from_user(&new_line, line, size))
  3557. return -EFAULT;
  3558. switch (new_line.clock_type)
  3559. {
  3560. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3561. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3562. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3563. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3564. case CLOCK_DEFAULT: flags = info->params.flags &
  3565. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3566. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3567. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3568. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3569. default: return -EINVAL;
  3570. }
  3571. if (new_line.loopback != 0 && new_line.loopback != 1)
  3572. return -EINVAL;
  3573. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3574. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3575. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3576. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3577. info->params.flags |= flags;
  3578. info->params.loopback = new_line.loopback;
  3579. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3580. info->params.clock_speed = new_line.clock_rate;
  3581. else
  3582. info->params.clock_speed = 0;
  3583. /* if network interface up, reprogram hardware */
  3584. if (info->netcount) {
  3585. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3586. mgslpc_program_hw(info, tty);
  3587. tty_kref_put(tty);
  3588. }
  3589. return 0;
  3590. default:
  3591. return hdlc_ioctl(dev, ifr, cmd);
  3592. }
  3593. }
  3594. /**
  3595. * called by network layer when transmit timeout is detected
  3596. *
  3597. * dev pointer to network device structure
  3598. */
  3599. static void hdlcdev_tx_timeout(struct net_device *dev)
  3600. {
  3601. MGSLPC_INFO *info = dev_to_port(dev);
  3602. unsigned long flags;
  3603. if (debug_level >= DEBUG_LEVEL_INFO)
  3604. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3605. dev->stats.tx_errors++;
  3606. dev->stats.tx_aborted_errors++;
  3607. spin_lock_irqsave(&info->lock,flags);
  3608. tx_stop(info);
  3609. spin_unlock_irqrestore(&info->lock,flags);
  3610. netif_wake_queue(dev);
  3611. }
  3612. /**
  3613. * called by device driver when transmit completes
  3614. * reenable network layer transmit if stopped
  3615. *
  3616. * info pointer to device instance information
  3617. */
  3618. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3619. {
  3620. if (netif_queue_stopped(info->netdev))
  3621. netif_wake_queue(info->netdev);
  3622. }
  3623. /**
  3624. * called by device driver when frame received
  3625. * pass frame to network layer
  3626. *
  3627. * info pointer to device instance information
  3628. * buf pointer to buffer contianing frame data
  3629. * size count of data bytes in buf
  3630. */
  3631. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3632. {
  3633. struct sk_buff *skb = dev_alloc_skb(size);
  3634. struct net_device *dev = info->netdev;
  3635. if (debug_level >= DEBUG_LEVEL_INFO)
  3636. printk("hdlcdev_rx(%s)\n",dev->name);
  3637. if (skb == NULL) {
  3638. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3639. dev->stats.rx_dropped++;
  3640. return;
  3641. }
  3642. memcpy(skb_put(skb, size), buf, size);
  3643. skb->protocol = hdlc_type_trans(skb, dev);
  3644. dev->stats.rx_packets++;
  3645. dev->stats.rx_bytes += size;
  3646. netif_rx(skb);
  3647. dev->last_rx = jiffies;
  3648. }
  3649. /**
  3650. * called by device driver when adding device instance
  3651. * do generic HDLC initialization
  3652. *
  3653. * info pointer to device instance information
  3654. *
  3655. * returns 0 if success, otherwise error code
  3656. */
  3657. static int hdlcdev_init(MGSLPC_INFO *info)
  3658. {
  3659. int rc;
  3660. struct net_device *dev;
  3661. hdlc_device *hdlc;
  3662. /* allocate and initialize network and HDLC layer objects */
  3663. if (!(dev = alloc_hdlcdev(info))) {
  3664. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3665. return -ENOMEM;
  3666. }
  3667. /* for network layer reporting purposes only */
  3668. dev->base_addr = info->io_base;
  3669. dev->irq = info->irq_level;
  3670. /* network layer callbacks and settings */
  3671. dev->do_ioctl = hdlcdev_ioctl;
  3672. dev->open = hdlcdev_open;
  3673. dev->stop = hdlcdev_close;
  3674. dev->tx_timeout = hdlcdev_tx_timeout;
  3675. dev->watchdog_timeo = 10*HZ;
  3676. dev->tx_queue_len = 50;
  3677. /* generic HDLC layer callbacks and settings */
  3678. hdlc = dev_to_hdlc(dev);
  3679. hdlc->attach = hdlcdev_attach;
  3680. hdlc->xmit = hdlcdev_xmit;
  3681. /* register objects with HDLC layer */
  3682. if ((rc = register_hdlc_device(dev))) {
  3683. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3684. free_netdev(dev);
  3685. return rc;
  3686. }
  3687. info->netdev = dev;
  3688. return 0;
  3689. }
  3690. /**
  3691. * called by device driver when removing device instance
  3692. * do generic HDLC cleanup
  3693. *
  3694. * info pointer to device instance information
  3695. */
  3696. static void hdlcdev_exit(MGSLPC_INFO *info)
  3697. {
  3698. unregister_hdlc_device(info->netdev);
  3699. free_netdev(info->netdev);
  3700. info->netdev = NULL;
  3701. }
  3702. #endif /* CONFIG_HDLC */