cm4040_cs.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732
  1. /*
  2. * A driver for the Omnikey PCMCIA smartcard reader CardMan 4040
  3. *
  4. * (c) 2000-2004 Omnikey AG (http://www.omnikey.com/)
  5. *
  6. * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
  7. * - add support for poll()
  8. * - driver cleanup
  9. * - add waitqueues
  10. * - adhere to linux kernel coding style and policies
  11. * - support 2.6.13 "new style" pcmcia interface
  12. * - add class interface for udev device creation
  13. *
  14. * The device basically is a USB CCID compliant device that has been
  15. * attached to an I/O-Mapped FIFO.
  16. *
  17. * All rights reserved, Dual BSD/GPL Licensed.
  18. */
  19. /* #define PCMCIA_DEBUG 6 */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/init.h>
  24. #include <linux/fs.h>
  25. #include <linux/delay.h>
  26. #include <linux/poll.h>
  27. #include <linux/smp_lock.h>
  28. #include <linux/wait.h>
  29. #include <asm/uaccess.h>
  30. #include <asm/io.h>
  31. #include <pcmcia/cs_types.h>
  32. #include <pcmcia/cs.h>
  33. #include <pcmcia/cistpl.h>
  34. #include <pcmcia/cisreg.h>
  35. #include <pcmcia/ciscode.h>
  36. #include <pcmcia/ds.h>
  37. #include "cm4040_cs.h"
  38. #ifdef PCMCIA_DEBUG
  39. #define reader_to_dev(x) (&handle_to_dev(x->p_dev))
  40. static int pc_debug = PCMCIA_DEBUG;
  41. module_param(pc_debug, int, 0600);
  42. #define DEBUGP(n, rdr, x, args...) do { \
  43. if (pc_debug >= (n)) \
  44. dev_printk(KERN_DEBUG, reader_to_dev(rdr), "%s:" x, \
  45. __func__ , ##args); \
  46. } while (0)
  47. #else
  48. #define DEBUGP(n, rdr, x, args...)
  49. #endif
  50. static char *version =
  51. "OMNIKEY CardMan 4040 v1.1.0gm5 - All bugs added by Harald Welte";
  52. #define CCID_DRIVER_BULK_DEFAULT_TIMEOUT (150*HZ)
  53. #define CCID_DRIVER_ASYNC_POWERUP_TIMEOUT (35*HZ)
  54. #define CCID_DRIVER_MINIMUM_TIMEOUT (3*HZ)
  55. #define READ_WRITE_BUFFER_SIZE 512
  56. #define POLL_LOOP_COUNT 1000
  57. /* how often to poll for fifo status change */
  58. #define POLL_PERIOD msecs_to_jiffies(10)
  59. static void reader_release(struct pcmcia_device *link);
  60. static int major;
  61. static struct class *cmx_class;
  62. #define BS_READABLE 0x01
  63. #define BS_WRITABLE 0x02
  64. struct reader_dev {
  65. struct pcmcia_device *p_dev;
  66. dev_node_t node;
  67. wait_queue_head_t devq;
  68. wait_queue_head_t poll_wait;
  69. wait_queue_head_t read_wait;
  70. wait_queue_head_t write_wait;
  71. unsigned long buffer_status;
  72. unsigned long timeout;
  73. unsigned char s_buf[READ_WRITE_BUFFER_SIZE];
  74. unsigned char r_buf[READ_WRITE_BUFFER_SIZE];
  75. struct timer_list poll_timer;
  76. };
  77. static struct pcmcia_device *dev_table[CM_MAX_DEV];
  78. #ifndef PCMCIA_DEBUG
  79. #define xoutb outb
  80. #define xinb inb
  81. #else
  82. static inline void xoutb(unsigned char val, unsigned short port)
  83. {
  84. if (pc_debug >= 7)
  85. printk(KERN_DEBUG "outb(val=%.2x,port=%.4x)\n", val, port);
  86. outb(val, port);
  87. }
  88. static inline unsigned char xinb(unsigned short port)
  89. {
  90. unsigned char val;
  91. val = inb(port);
  92. if (pc_debug >= 7)
  93. printk(KERN_DEBUG "%.2x=inb(%.4x)\n", val, port);
  94. return val;
  95. }
  96. #endif
  97. /* poll the device fifo status register. not to be confused with
  98. * the poll syscall. */
  99. static void cm4040_do_poll(unsigned long dummy)
  100. {
  101. struct reader_dev *dev = (struct reader_dev *) dummy;
  102. unsigned int obs = xinb(dev->p_dev->io.BasePort1
  103. + REG_OFFSET_BUFFER_STATUS);
  104. if ((obs & BSR_BULK_IN_FULL)) {
  105. set_bit(BS_READABLE, &dev->buffer_status);
  106. DEBUGP(4, dev, "waking up read_wait\n");
  107. wake_up_interruptible(&dev->read_wait);
  108. } else
  109. clear_bit(BS_READABLE, &dev->buffer_status);
  110. if (!(obs & BSR_BULK_OUT_FULL)) {
  111. set_bit(BS_WRITABLE, &dev->buffer_status);
  112. DEBUGP(4, dev, "waking up write_wait\n");
  113. wake_up_interruptible(&dev->write_wait);
  114. } else
  115. clear_bit(BS_WRITABLE, &dev->buffer_status);
  116. if (dev->buffer_status)
  117. wake_up_interruptible(&dev->poll_wait);
  118. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  119. }
  120. static void cm4040_stop_poll(struct reader_dev *dev)
  121. {
  122. del_timer_sync(&dev->poll_timer);
  123. }
  124. static int wait_for_bulk_out_ready(struct reader_dev *dev)
  125. {
  126. int i, rc;
  127. int iobase = dev->p_dev->io.BasePort1;
  128. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  129. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  130. & BSR_BULK_OUT_FULL) == 0) {
  131. DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i);
  132. return 1;
  133. }
  134. }
  135. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  136. dev->timeout);
  137. rc = wait_event_interruptible_timeout(dev->write_wait,
  138. test_and_clear_bit(BS_WRITABLE,
  139. &dev->buffer_status),
  140. dev->timeout);
  141. if (rc > 0)
  142. DEBUGP(4, dev, "woke up: BulkOut empty\n");
  143. else if (rc == 0)
  144. DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n");
  145. else if (rc < 0)
  146. DEBUGP(4, dev, "woke up: signal arrived\n");
  147. return rc;
  148. }
  149. /* Write to Sync Control Register */
  150. static int write_sync_reg(unsigned char val, struct reader_dev *dev)
  151. {
  152. int iobase = dev->p_dev->io.BasePort1;
  153. int rc;
  154. rc = wait_for_bulk_out_ready(dev);
  155. if (rc <= 0)
  156. return rc;
  157. xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL);
  158. rc = wait_for_bulk_out_ready(dev);
  159. if (rc <= 0)
  160. return rc;
  161. return 1;
  162. }
  163. static int wait_for_bulk_in_ready(struct reader_dev *dev)
  164. {
  165. int i, rc;
  166. int iobase = dev->p_dev->io.BasePort1;
  167. for (i = 0; i < POLL_LOOP_COUNT; i++) {
  168. if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS)
  169. & BSR_BULK_IN_FULL) == BSR_BULK_IN_FULL) {
  170. DEBUGP(3, dev, "BulkIn full (i=%d)\n", i);
  171. return 1;
  172. }
  173. }
  174. DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n",
  175. dev->timeout);
  176. rc = wait_event_interruptible_timeout(dev->read_wait,
  177. test_and_clear_bit(BS_READABLE,
  178. &dev->buffer_status),
  179. dev->timeout);
  180. if (rc > 0)
  181. DEBUGP(4, dev, "woke up: BulkIn full\n");
  182. else if (rc == 0)
  183. DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n");
  184. else if (rc < 0)
  185. DEBUGP(4, dev, "woke up: signal arrived\n");
  186. return rc;
  187. }
  188. static ssize_t cm4040_read(struct file *filp, char __user *buf,
  189. size_t count, loff_t *ppos)
  190. {
  191. struct reader_dev *dev = filp->private_data;
  192. int iobase = dev->p_dev->io.BasePort1;
  193. size_t bytes_to_read;
  194. unsigned long i;
  195. size_t min_bytes_to_read;
  196. int rc;
  197. unsigned char uc;
  198. DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
  199. if (count == 0)
  200. return 0;
  201. if (count < 10)
  202. return -EFAULT;
  203. if (filp->f_flags & O_NONBLOCK) {
  204. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  205. DEBUGP(2, dev, "<- cm4040_read (failure)\n");
  206. return -EAGAIN;
  207. }
  208. if (!pcmcia_dev_present(dev->p_dev))
  209. return -ENODEV;
  210. for (i = 0; i < 5; i++) {
  211. rc = wait_for_bulk_in_ready(dev);
  212. if (rc <= 0) {
  213. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  214. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  215. if (rc == -ERESTARTSYS)
  216. return rc;
  217. return -EIO;
  218. }
  219. dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN);
  220. #ifdef PCMCIA_DEBUG
  221. if (pc_debug >= 6)
  222. printk(KERN_DEBUG "%lu:%2x ", i, dev->r_buf[i]);
  223. }
  224. printk("\n");
  225. #else
  226. }
  227. #endif
  228. bytes_to_read = 5 + le32_to_cpu(*(__le32 *)&dev->r_buf[1]);
  229. DEBUGP(6, dev, "BytesToRead=%lu\n", bytes_to_read);
  230. min_bytes_to_read = min(count, bytes_to_read + 5);
  231. min_bytes_to_read = min_t(size_t, min_bytes_to_read, READ_WRITE_BUFFER_SIZE);
  232. DEBUGP(6, dev, "Min=%lu\n", min_bytes_to_read);
  233. for (i = 0; i < (min_bytes_to_read-5); i++) {
  234. rc = wait_for_bulk_in_ready(dev);
  235. if (rc <= 0) {
  236. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  237. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  238. if (rc == -ERESTARTSYS)
  239. return rc;
  240. return -EIO;
  241. }
  242. dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
  243. #ifdef PCMCIA_DEBUG
  244. if (pc_debug >= 6)
  245. printk(KERN_DEBUG "%lu:%2x ", i, dev->r_buf[i]);
  246. }
  247. printk("\n");
  248. #else
  249. }
  250. #endif
  251. *ppos = min_bytes_to_read;
  252. if (copy_to_user(buf, dev->r_buf, min_bytes_to_read))
  253. return -EFAULT;
  254. rc = wait_for_bulk_in_ready(dev);
  255. if (rc <= 0) {
  256. DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc);
  257. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  258. if (rc == -ERESTARTSYS)
  259. return rc;
  260. return -EIO;
  261. }
  262. rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev);
  263. if (rc <= 0) {
  264. DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc);
  265. DEBUGP(2, dev, "<- cm4040_read (failed)\n");
  266. if (rc == -ERESTARTSYS)
  267. return rc;
  268. else
  269. return -EIO;
  270. }
  271. uc = xinb(iobase + REG_OFFSET_BULK_IN);
  272. DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
  273. return min_bytes_to_read;
  274. }
  275. static ssize_t cm4040_write(struct file *filp, const char __user *buf,
  276. size_t count, loff_t *ppos)
  277. {
  278. struct reader_dev *dev = filp->private_data;
  279. int iobase = dev->p_dev->io.BasePort1;
  280. ssize_t rc;
  281. int i;
  282. unsigned int bytes_to_write;
  283. DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid);
  284. if (count == 0) {
  285. DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n");
  286. return 0;
  287. }
  288. if ((count < 5) || (count > READ_WRITE_BUFFER_SIZE)) {
  289. DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count);
  290. return -EIO;
  291. }
  292. if (filp->f_flags & O_NONBLOCK) {
  293. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  294. DEBUGP(4, dev, "<- cm4040_write (failure)\n");
  295. return -EAGAIN;
  296. }
  297. if (!pcmcia_dev_present(dev->p_dev))
  298. return -ENODEV;
  299. bytes_to_write = count;
  300. if (copy_from_user(dev->s_buf, buf, bytes_to_write))
  301. return -EFAULT;
  302. switch (dev->s_buf[0]) {
  303. case CMD_PC_TO_RDR_XFRBLOCK:
  304. case CMD_PC_TO_RDR_SECURE:
  305. case CMD_PC_TO_RDR_TEST_SECURE:
  306. case CMD_PC_TO_RDR_OK_SECURE:
  307. dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT;
  308. break;
  309. case CMD_PC_TO_RDR_ICCPOWERON:
  310. dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT;
  311. break;
  312. case CMD_PC_TO_RDR_GETSLOTSTATUS:
  313. case CMD_PC_TO_RDR_ICCPOWEROFF:
  314. case CMD_PC_TO_RDR_GETPARAMETERS:
  315. case CMD_PC_TO_RDR_RESETPARAMETERS:
  316. case CMD_PC_TO_RDR_SETPARAMETERS:
  317. case CMD_PC_TO_RDR_ESCAPE:
  318. case CMD_PC_TO_RDR_ICCCLOCK:
  319. default:
  320. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  321. break;
  322. }
  323. rc = write_sync_reg(SCR_HOST_TO_READER_START, dev);
  324. if (rc <= 0) {
  325. DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
  326. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  327. if (rc == -ERESTARTSYS)
  328. return rc;
  329. else
  330. return -EIO;
  331. }
  332. DEBUGP(4, dev, "start \n");
  333. for (i = 0; i < bytes_to_write; i++) {
  334. rc = wait_for_bulk_out_ready(dev);
  335. if (rc <= 0) {
  336. DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n",
  337. rc);
  338. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  339. if (rc == -ERESTARTSYS)
  340. return rc;
  341. else
  342. return -EIO;
  343. }
  344. xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT);
  345. }
  346. DEBUGP(4, dev, "end\n");
  347. rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev);
  348. if (rc <= 0) {
  349. DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc);
  350. DEBUGP(2, dev, "<- cm4040_write (failed)\n");
  351. if (rc == -ERESTARTSYS)
  352. return rc;
  353. else
  354. return -EIO;
  355. }
  356. DEBUGP(2, dev, "<- cm4040_write (successfully)\n");
  357. return count;
  358. }
  359. static unsigned int cm4040_poll(struct file *filp, poll_table *wait)
  360. {
  361. struct reader_dev *dev = filp->private_data;
  362. unsigned int mask = 0;
  363. poll_wait(filp, &dev->poll_wait, wait);
  364. if (test_and_clear_bit(BS_READABLE, &dev->buffer_status))
  365. mask |= POLLIN | POLLRDNORM;
  366. if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status))
  367. mask |= POLLOUT | POLLWRNORM;
  368. DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask);
  369. return mask;
  370. }
  371. static int cm4040_open(struct inode *inode, struct file *filp)
  372. {
  373. struct reader_dev *dev;
  374. struct pcmcia_device *link;
  375. int minor = iminor(inode);
  376. int ret;
  377. if (minor >= CM_MAX_DEV)
  378. return -ENODEV;
  379. lock_kernel();
  380. link = dev_table[minor];
  381. if (link == NULL || !pcmcia_dev_present(link)) {
  382. ret = -ENODEV;
  383. goto out;
  384. }
  385. if (link->open) {
  386. ret = -EBUSY;
  387. goto out;
  388. }
  389. dev = link->priv;
  390. filp->private_data = dev;
  391. if (filp->f_flags & O_NONBLOCK) {
  392. DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n");
  393. ret = -EAGAIN;
  394. goto out;
  395. }
  396. link->open = 1;
  397. dev->poll_timer.data = (unsigned long) dev;
  398. mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD);
  399. DEBUGP(2, dev, "<- cm4040_open (successfully)\n");
  400. ret = nonseekable_open(inode, filp);
  401. out:
  402. unlock_kernel();
  403. return ret;
  404. }
  405. static int cm4040_close(struct inode *inode, struct file *filp)
  406. {
  407. struct reader_dev *dev = filp->private_data;
  408. struct pcmcia_device *link;
  409. int minor = iminor(inode);
  410. DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode),
  411. iminor(inode));
  412. if (minor >= CM_MAX_DEV)
  413. return -ENODEV;
  414. link = dev_table[minor];
  415. if (link == NULL)
  416. return -ENODEV;
  417. cm4040_stop_poll(dev);
  418. link->open = 0;
  419. wake_up(&dev->devq);
  420. DEBUGP(2, dev, "<- cm4040_close\n");
  421. return 0;
  422. }
  423. static void cm4040_reader_release(struct pcmcia_device *link)
  424. {
  425. struct reader_dev *dev = link->priv;
  426. DEBUGP(3, dev, "-> cm4040_reader_release\n");
  427. while (link->open) {
  428. DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release "
  429. "until process has terminated\n");
  430. wait_event(dev->devq, (link->open == 0));
  431. }
  432. DEBUGP(3, dev, "<- cm4040_reader_release\n");
  433. return;
  434. }
  435. static int cm4040_config_check(struct pcmcia_device *p_dev,
  436. cistpl_cftable_entry_t *cfg,
  437. cistpl_cftable_entry_t *dflt,
  438. unsigned int vcc,
  439. void *priv_data)
  440. {
  441. int rc;
  442. if (!cfg->io.nwin)
  443. return -ENODEV;
  444. /* Get the IOaddr */
  445. p_dev->io.BasePort1 = cfg->io.win[0].base;
  446. p_dev->io.NumPorts1 = cfg->io.win[0].len;
  447. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  448. if (!(cfg->io.flags & CISTPL_IO_8BIT))
  449. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  450. if (!(cfg->io.flags & CISTPL_IO_16BIT))
  451. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  452. p_dev->io.IOAddrLines = cfg->io.flags & CISTPL_IO_LINES_MASK;
  453. rc = pcmcia_request_io(p_dev, &p_dev->io);
  454. dev_printk(KERN_INFO, &handle_to_dev(p_dev),
  455. "pcmcia_request_io returned 0x%x\n", rc);
  456. return rc;
  457. }
  458. static int reader_config(struct pcmcia_device *link, int devno)
  459. {
  460. struct reader_dev *dev;
  461. int fail_rc;
  462. link->io.BasePort2 = 0;
  463. link->io.NumPorts2 = 0;
  464. link->io.Attributes2 = 0;
  465. if (pcmcia_loop_config(link, cm4040_config_check, NULL))
  466. goto cs_release;
  467. link->conf.IntType = 00000002;
  468. fail_rc = pcmcia_request_configuration(link, &link->conf);
  469. if (fail_rc != 0) {
  470. dev_printk(KERN_INFO, &handle_to_dev(link),
  471. "pcmcia_request_configuration failed 0x%x\n",
  472. fail_rc);
  473. goto cs_release;
  474. }
  475. dev = link->priv;
  476. sprintf(dev->node.dev_name, DEVICE_NAME "%d", devno);
  477. dev->node.major = major;
  478. dev->node.minor = devno;
  479. dev->node.next = &dev->node;
  480. DEBUGP(2, dev, "device " DEVICE_NAME "%d at 0x%.4x-0x%.4x\n", devno,
  481. link->io.BasePort1, link->io.BasePort1+link->io.NumPorts1);
  482. DEBUGP(2, dev, "<- reader_config (succ)\n");
  483. return 0;
  484. cs_release:
  485. reader_release(link);
  486. return -ENODEV;
  487. }
  488. static void reader_release(struct pcmcia_device *link)
  489. {
  490. cm4040_reader_release(link);
  491. pcmcia_disable_device(link);
  492. }
  493. static int reader_probe(struct pcmcia_device *link)
  494. {
  495. struct reader_dev *dev;
  496. int i, ret;
  497. for (i = 0; i < CM_MAX_DEV; i++) {
  498. if (dev_table[i] == NULL)
  499. break;
  500. }
  501. if (i == CM_MAX_DEV)
  502. return -ENODEV;
  503. dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL);
  504. if (dev == NULL)
  505. return -ENOMEM;
  506. dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT;
  507. dev->buffer_status = 0;
  508. link->priv = dev;
  509. dev->p_dev = link;
  510. link->conf.IntType = INT_MEMORY_AND_IO;
  511. dev_table[i] = link;
  512. init_waitqueue_head(&dev->devq);
  513. init_waitqueue_head(&dev->poll_wait);
  514. init_waitqueue_head(&dev->read_wait);
  515. init_waitqueue_head(&dev->write_wait);
  516. setup_timer(&dev->poll_timer, cm4040_do_poll, 0);
  517. ret = reader_config(link, i);
  518. if (ret) {
  519. dev_table[i] = NULL;
  520. kfree(dev);
  521. return ret;
  522. }
  523. device_create(cmx_class, NULL, MKDEV(major, i), NULL, "cmx%d", i);
  524. return 0;
  525. }
  526. static void reader_detach(struct pcmcia_device *link)
  527. {
  528. struct reader_dev *dev = link->priv;
  529. int devno;
  530. /* find device */
  531. for (devno = 0; devno < CM_MAX_DEV; devno++) {
  532. if (dev_table[devno] == link)
  533. break;
  534. }
  535. if (devno == CM_MAX_DEV)
  536. return;
  537. reader_release(link);
  538. dev_table[devno] = NULL;
  539. kfree(dev);
  540. device_destroy(cmx_class, MKDEV(major, devno));
  541. return;
  542. }
  543. static const struct file_operations reader_fops = {
  544. .owner = THIS_MODULE,
  545. .read = cm4040_read,
  546. .write = cm4040_write,
  547. .open = cm4040_open,
  548. .release = cm4040_close,
  549. .poll = cm4040_poll,
  550. };
  551. static struct pcmcia_device_id cm4040_ids[] = {
  552. PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0200),
  553. PCMCIA_DEVICE_PROD_ID12("OMNIKEY", "CardMan 4040",
  554. 0xE32CDD8C, 0x8F23318B),
  555. PCMCIA_DEVICE_NULL,
  556. };
  557. MODULE_DEVICE_TABLE(pcmcia, cm4040_ids);
  558. static struct pcmcia_driver reader_driver = {
  559. .owner = THIS_MODULE,
  560. .drv = {
  561. .name = "cm4040_cs",
  562. },
  563. .probe = reader_probe,
  564. .remove = reader_detach,
  565. .id_table = cm4040_ids,
  566. };
  567. static int __init cm4040_init(void)
  568. {
  569. int rc;
  570. printk(KERN_INFO "%s\n", version);
  571. cmx_class = class_create(THIS_MODULE, "cardman_4040");
  572. if (IS_ERR(cmx_class))
  573. return PTR_ERR(cmx_class);
  574. major = register_chrdev(0, DEVICE_NAME, &reader_fops);
  575. if (major < 0) {
  576. printk(KERN_WARNING MODULE_NAME
  577. ": could not get major number\n");
  578. class_destroy(cmx_class);
  579. return major;
  580. }
  581. rc = pcmcia_register_driver(&reader_driver);
  582. if (rc < 0) {
  583. unregister_chrdev(major, DEVICE_NAME);
  584. class_destroy(cmx_class);
  585. return rc;
  586. }
  587. return 0;
  588. }
  589. static void __exit cm4040_exit(void)
  590. {
  591. printk(KERN_INFO MODULE_NAME ": unloading\n");
  592. pcmcia_unregister_driver(&reader_driver);
  593. unregister_chrdev(major, DEVICE_NAME);
  594. class_destroy(cmx_class);
  595. }
  596. module_init(cm4040_init);
  597. module_exit(cm4040_exit);
  598. MODULE_LICENSE("Dual BSD/GPL");