solos-pci.c 19 KB

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  1. /*
  2. * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
  3. * Traverse Technologies -- http://www.traverse.com.au/
  4. * Xrio Limited -- http://www.xrio.com/
  5. *
  6. *
  7. * Copyright © 2008 Traverse Technologies
  8. * Copyright © 2008 Intel Corporation
  9. *
  10. * Authors: Nathan Williams <nathan@traverse.com.au>
  11. * David Woodhouse <dwmw2@infradead.org>
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License
  15. * version 2, as published by the Free Software Foundation.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. */
  22. #define DEBUG
  23. #define VERBOSE_DEBUG
  24. #include <linux/interrupt.h>
  25. #include <linux/module.h>
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/ioport.h>
  29. #include <linux/types.h>
  30. #include <linux/pci.h>
  31. #include <linux/atm.h>
  32. #include <linux/atmdev.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/sysfs.h>
  35. #include <linux/device.h>
  36. #include <linux/kobject.h>
  37. #define VERSION "0.04"
  38. #define PTAG "solos-pci"
  39. #define CONFIG_RAM_SIZE 128
  40. #define FLAGS_ADDR 0x7C
  41. #define IRQ_EN_ADDR 0x78
  42. #define FPGA_VER 0x74
  43. #define IRQ_CLEAR 0x70
  44. #define BUG_FLAG 0x6C
  45. #define DATA_RAM_SIZE 32768
  46. #define BUF_SIZE 4096
  47. #define RX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2)
  48. #define TX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2 + BUF_SIZE)
  49. static int debug = 0;
  50. static int atmdebug = 0;
  51. struct pkt_hdr {
  52. __le16 size;
  53. __le16 vpi;
  54. __le16 vci;
  55. __le16 type;
  56. };
  57. #define PKT_DATA 0
  58. #define PKT_COMMAND 1
  59. #define PKT_POPEN 3
  60. #define PKT_PCLOSE 4
  61. struct solos_card {
  62. void __iomem *config_regs;
  63. void __iomem *buffers;
  64. int nr_ports;
  65. struct pci_dev *dev;
  66. struct atm_dev *atmdev[4];
  67. struct tasklet_struct tlet;
  68. spinlock_t tx_lock;
  69. spinlock_t tx_queue_lock;
  70. spinlock_t cli_queue_lock;
  71. struct sk_buff_head tx_queue[4];
  72. struct sk_buff_head cli_queue[4];
  73. };
  74. #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
  75. MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
  76. MODULE_DESCRIPTION("Solos PCI driver");
  77. MODULE_VERSION(VERSION);
  78. MODULE_LICENSE("GPL");
  79. MODULE_PARM_DESC(debug, "Enable Loopback");
  80. MODULE_PARM_DESC(atmdebug, "Print ATM data");
  81. module_param(debug, int, 0444);
  82. module_param(atmdebug, int, 0444);
  83. static int opens;
  84. static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
  85. struct atm_vcc *vcc);
  86. static int fpga_tx(struct solos_card *);
  87. static irqreturn_t solos_irq(int irq, void *dev_id);
  88. static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
  89. static int list_vccs(int vci);
  90. static int atm_init(struct solos_card *);
  91. static void atm_remove(struct solos_card *);
  92. static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
  93. static void solos_bh(unsigned long);
  94. static int print_buffer(struct sk_buff *buf);
  95. static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
  96. {
  97. if (vcc->pop)
  98. vcc->pop(vcc, skb);
  99. else
  100. dev_kfree_skb_any(skb);
  101. }
  102. static ssize_t console_show(struct device *dev, struct device_attribute *attr,
  103. char *buf)
  104. {
  105. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  106. struct solos_card *card = atmdev->dev_data;
  107. struct sk_buff *skb;
  108. spin_lock(&card->cli_queue_lock);
  109. skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
  110. spin_unlock(&card->cli_queue_lock);
  111. if(skb == NULL)
  112. return sprintf(buf, "No data.\n");
  113. memcpy(buf, skb->data, skb->len);
  114. dev_dbg(&card->dev->dev, "len: %d\n", skb->len);
  115. kfree_skb(skb);
  116. return skb->len;
  117. }
  118. static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
  119. {
  120. struct sk_buff *skb;
  121. struct pkt_hdr *header;
  122. // dev_dbg(&card->dev->dev, "size: %d\n", size);
  123. if (size > (BUF_SIZE - sizeof(*header))) {
  124. dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
  125. return 0;
  126. }
  127. skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
  128. if (!skb) {
  129. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
  130. return 0;
  131. }
  132. header = (void *)skb_put(skb, sizeof(*header));
  133. header->size = cpu_to_le16(size);
  134. header->vpi = cpu_to_le16(0);
  135. header->vci = cpu_to_le16(0);
  136. header->type = cpu_to_le16(PKT_COMMAND);
  137. memcpy(skb_put(skb, size), buf, size);
  138. fpga_queue(card, dev, skb, NULL);
  139. return 0;
  140. }
  141. static ssize_t console_store(struct device *dev, struct device_attribute *attr,
  142. const char *buf, size_t count)
  143. {
  144. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  145. struct solos_card *card = atmdev->dev_data;
  146. int err;
  147. err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
  148. return err?:count;
  149. }
  150. static DEVICE_ATTR(console, 0644, console_show, console_store);
  151. static irqreturn_t solos_irq(int irq, void *dev_id)
  152. {
  153. struct solos_card *card = dev_id;
  154. int handled = 1;
  155. //ACK IRQ
  156. iowrite32(0, card->config_regs + IRQ_CLEAR);
  157. //Disable IRQs from FPGA
  158. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  159. /* If we only do it when the device is open, we lose console
  160. messages */
  161. if (1 || opens)
  162. tasklet_schedule(&card->tlet);
  163. //Enable IRQs from FPGA
  164. iowrite32(1, card->config_regs + IRQ_EN_ADDR);
  165. return IRQ_RETVAL(handled);
  166. }
  167. void solos_bh(unsigned long card_arg)
  168. {
  169. struct solos_card *card = (void *)card_arg;
  170. int port;
  171. uint32_t card_flags;
  172. uint32_t tx_mask;
  173. uint32_t rx_done = 0;
  174. card_flags = ioread32(card->config_regs + FLAGS_ADDR);
  175. /* The TX bits are set if the channel is busy; clear if not. We want to
  176. invoke fpga_tx() unless _all_ the bits for active channels are set */
  177. tx_mask = (1 << card->nr_ports) - 1;
  178. if ((card_flags & tx_mask) != tx_mask)
  179. fpga_tx(card);
  180. for (port = 0; port < card->nr_ports; port++) {
  181. if (card_flags & (0x10 << port)) {
  182. struct pkt_hdr header;
  183. struct sk_buff *skb;
  184. struct atm_vcc *vcc;
  185. int size;
  186. rx_done |= 0x10 << port;
  187. memcpy_fromio(&header, RX_BUF(card, port), sizeof(header));
  188. size = le16_to_cpu(header.size);
  189. skb = alloc_skb(size, GFP_ATOMIC);
  190. if (!skb) {
  191. if (net_ratelimit())
  192. dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
  193. continue;
  194. }
  195. memcpy_fromio(skb_put(skb, size),
  196. RX_BUF(card, port) + sizeof(header),
  197. size);
  198. if (atmdebug) {
  199. dev_info(&card->dev->dev, "Received: device %d\n", port);
  200. dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
  201. size, le16_to_cpu(header.vpi),
  202. le16_to_cpu(header.vci));
  203. print_buffer(skb);
  204. }
  205. switch (le16_to_cpu(header.type)) {
  206. case PKT_DATA:
  207. vcc = find_vcc(card->atmdev[port], le16_to_cpu(header.vpi),
  208. le16_to_cpu(header.vci));
  209. if (!vcc) {
  210. if (net_ratelimit())
  211. dev_warn(&card->dev->dev, "Received packet for unknown VCI.VPI %d.%d on port %d\n",
  212. le16_to_cpu(header.vci), le16_to_cpu(header.vpi),
  213. port);
  214. continue;
  215. }
  216. atm_charge(vcc, skb->truesize);
  217. vcc->push(vcc, skb);
  218. atomic_inc(&vcc->stats->rx);
  219. break;
  220. case PKT_COMMAND:
  221. default: /* FIXME: Not really, surely? */
  222. spin_lock(&card->cli_queue_lock);
  223. if (skb_queue_len(&card->cli_queue[port]) > 10) {
  224. if (net_ratelimit())
  225. dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
  226. port);
  227. } else
  228. skb_queue_tail(&card->cli_queue[port], skb);
  229. spin_unlock(&card->cli_queue_lock);
  230. break;
  231. }
  232. }
  233. }
  234. if (rx_done)
  235. iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
  236. return;
  237. }
  238. static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
  239. {
  240. struct hlist_head *head;
  241. struct atm_vcc *vcc = NULL;
  242. struct hlist_node *node;
  243. struct sock *s;
  244. read_lock(&vcc_sklist_lock);
  245. head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
  246. sk_for_each(s, node, head) {
  247. vcc = atm_sk(s);
  248. if (vcc->dev == dev && vcc->vci == vci &&
  249. vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE)
  250. goto out;
  251. }
  252. vcc = NULL;
  253. out:
  254. read_unlock(&vcc_sklist_lock);
  255. return vcc;
  256. }
  257. static int list_vccs(int vci)
  258. {
  259. struct hlist_head *head;
  260. struct atm_vcc *vcc;
  261. struct hlist_node *node;
  262. struct sock *s;
  263. int num_found = 0;
  264. int i;
  265. read_lock(&vcc_sklist_lock);
  266. if (vci != 0){
  267. head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
  268. sk_for_each(s, node, head) {
  269. num_found ++;
  270. vcc = atm_sk(s);
  271. printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
  272. vcc->dev->number,
  273. vcc->vpi,
  274. vcc->vci);
  275. }
  276. } else {
  277. for(i=0; i<32; i++){
  278. head = &vcc_hash[i];
  279. sk_for_each(s, node, head) {
  280. num_found ++;
  281. vcc = atm_sk(s);
  282. printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
  283. vcc->dev->number,
  284. vcc->vpi,
  285. vcc->vci);
  286. }
  287. }
  288. }
  289. read_unlock(&vcc_sklist_lock);
  290. return num_found;
  291. }
  292. static int popen(struct atm_vcc *vcc)
  293. {
  294. struct solos_card *card = vcc->dev->dev_data;
  295. struct sk_buff *skb;
  296. struct pkt_hdr *header;
  297. skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
  298. if (!skb && net_ratelimit()) {
  299. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
  300. return -ENOMEM;
  301. }
  302. header = (void *)skb_put(skb, sizeof(*header));
  303. header->size = cpu_to_le16(sizeof(*header));
  304. header->vpi = cpu_to_le16(vcc->vpi);
  305. header->vci = cpu_to_le16(vcc->vci);
  306. header->type = cpu_to_le16(PKT_POPEN);
  307. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
  308. // dev_dbg(&card->dev->dev, "Open for vpi %d and vci %d on interface %d\n", vcc->vpi, vcc->vci, SOLOS_CHAN(vcc->dev));
  309. set_bit(ATM_VF_ADDR, &vcc->flags); // accept the vpi / vci
  310. set_bit(ATM_VF_READY, &vcc->flags);
  311. list_vccs(0);
  312. if (!opens)
  313. iowrite32(1, card->config_regs + IRQ_EN_ADDR);
  314. opens++; //count open PVCs
  315. return 0;
  316. }
  317. static void pclose(struct atm_vcc *vcc)
  318. {
  319. struct solos_card *card = vcc->dev->dev_data;
  320. struct sk_buff *skb;
  321. struct pkt_hdr *header;
  322. skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
  323. if (!skb) {
  324. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
  325. return;
  326. }
  327. header = (void *)skb_put(skb, sizeof(*header));
  328. header->size = cpu_to_le16(sizeof(*header));
  329. header->vpi = cpu_to_le16(vcc->vpi);
  330. header->vci = cpu_to_le16(vcc->vci);
  331. header->type = cpu_to_le16(PKT_PCLOSE);
  332. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
  333. // dev_dbg(&card->dev->dev, "Close for vpi %d and vci %d on interface %d\n", vcc->vpi, vcc->vci, SOLOS_CHAN(vcc->dev));
  334. if (!--opens)
  335. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  336. clear_bit(ATM_VF_ADDR, &vcc->flags);
  337. clear_bit(ATM_VF_READY, &vcc->flags);
  338. return;
  339. }
  340. static int print_buffer(struct sk_buff *buf)
  341. {
  342. int len,i;
  343. char msg[500];
  344. char item[10];
  345. len = buf->len;
  346. for (i = 0; i < len; i++){
  347. if(i % 8 == 0)
  348. sprintf(msg, "%02X: ", i);
  349. sprintf(item,"%02X ",*(buf->data + i));
  350. strcat(msg, item);
  351. if(i % 8 == 7) {
  352. sprintf(item, "\n");
  353. strcat(msg, item);
  354. printk(KERN_DEBUG "%s", msg);
  355. }
  356. }
  357. if (i % 8 != 0) {
  358. sprintf(item, "\n");
  359. strcat(msg, item);
  360. printk(KERN_DEBUG "%s", msg);
  361. }
  362. printk(KERN_DEBUG "\n");
  363. return 0;
  364. }
  365. static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
  366. struct atm_vcc *vcc)
  367. {
  368. int old_len;
  369. *(void **)skb->cb = vcc;
  370. spin_lock(&card->tx_queue_lock);
  371. old_len = skb_queue_len(&card->tx_queue[port]);
  372. skb_queue_tail(&card->tx_queue[port], skb);
  373. spin_unlock(&card->tx_queue_lock);
  374. /* If TX might need to be started, do so */
  375. if (!old_len)
  376. fpga_tx(card);
  377. }
  378. static int fpga_tx(struct solos_card *card)
  379. {
  380. uint32_t tx_pending;
  381. uint32_t tx_started = 0;
  382. struct sk_buff *skb;
  383. struct atm_vcc *vcc;
  384. unsigned char port;
  385. unsigned long flags;
  386. spin_lock_irqsave(&card->tx_lock, flags);
  387. tx_pending = ioread32(card->config_regs + FLAGS_ADDR);
  388. dev_vdbg(&card->dev->dev, "TX Flags are %X\n", tx_pending);
  389. for (port = 0; port < card->nr_ports; port++) {
  390. if (!(tx_pending & (1 << port))) {
  391. spin_lock(&card->tx_queue_lock);
  392. skb = skb_dequeue(&card->tx_queue[port]);
  393. spin_unlock(&card->tx_queue_lock);
  394. if (!skb)
  395. continue;
  396. if (atmdebug) {
  397. dev_info(&card->dev->dev, "Transmitted: port %d\n",
  398. port);
  399. print_buffer(skb);
  400. }
  401. memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
  402. vcc = *(void **)skb->cb;
  403. if (vcc) {
  404. atomic_inc(&vcc->stats->tx);
  405. solos_pop(vcc, skb);
  406. } else
  407. dev_kfree_skb_irq(skb);
  408. tx_started |= 1 << port; //Set TX full flag
  409. }
  410. }
  411. if (tx_started)
  412. iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
  413. spin_unlock_irqrestore(&card->tx_lock, flags);
  414. return 0;
  415. }
  416. static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
  417. {
  418. struct solos_card *card = vcc->dev->dev_data;
  419. struct sk_buff *skb2 = NULL;
  420. struct pkt_hdr *header;
  421. //dev_dbg(&card->dev->dev, "psend called.\n");
  422. //dev_dbg(&card->dev->dev, "dev,vpi,vci = %d,%d,%d\n",SOLOS_CHAN(vcc->dev),vcc->vpi,vcc->vci);
  423. if (debug) {
  424. skb2 = atm_alloc_charge(vcc, skb->len, GFP_ATOMIC);
  425. if (skb2) {
  426. memcpy(skb2->data, skb->data, skb->len);
  427. skb_put(skb2, skb->len);
  428. vcc->push(vcc, skb2);
  429. atomic_inc(&vcc->stats->rx);
  430. }
  431. atomic_inc(&vcc->stats->tx);
  432. solos_pop(vcc, skb);
  433. return 0;
  434. }
  435. if (skb->len > (BUF_SIZE - sizeof(*header))) {
  436. dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
  437. solos_pop(vcc, skb);
  438. return 0;
  439. }
  440. if (!skb_clone_writable(skb, sizeof(*header))) {
  441. int expand_by = 0;
  442. int ret;
  443. if (skb_headroom(skb) < sizeof(*header))
  444. expand_by = sizeof(*header) - skb_headroom(skb);
  445. ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
  446. if (ret) {
  447. solos_pop(vcc, skb);
  448. return ret;
  449. }
  450. }
  451. header = (void *)skb_push(skb, sizeof(*header));
  452. header->size = cpu_to_le16(skb->len);
  453. header->vpi = cpu_to_le16(vcc->vpi);
  454. header->vci = cpu_to_le16(vcc->vci);
  455. header->type = cpu_to_le16(PKT_DATA);
  456. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
  457. return 0;
  458. }
  459. static struct atmdev_ops fpga_ops = {
  460. .open = popen,
  461. .close = pclose,
  462. .ioctl = NULL,
  463. .getsockopt = NULL,
  464. .setsockopt = NULL,
  465. .send = psend,
  466. .send_oam = NULL,
  467. .phy_put = NULL,
  468. .phy_get = NULL,
  469. .change_qos = NULL,
  470. .proc_read = NULL,
  471. .owner = THIS_MODULE
  472. };
  473. static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
  474. {
  475. int err, i;
  476. uint16_t fpga_ver;
  477. uint8_t major_ver, minor_ver;
  478. uint32_t data32;
  479. struct solos_card *card;
  480. if (debug)
  481. return 0;
  482. card = kzalloc(sizeof(*card), GFP_KERNEL);
  483. if (!card)
  484. return -ENOMEM;
  485. card->dev = dev;
  486. err = pci_enable_device(dev);
  487. if (err) {
  488. dev_warn(&dev->dev, "Failed to enable PCI device\n");
  489. goto out;
  490. }
  491. err = pci_request_regions(dev, "solos");
  492. if (err) {
  493. dev_warn(&dev->dev, "Failed to request regions\n");
  494. goto out;
  495. }
  496. card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
  497. if (!card->config_regs) {
  498. dev_warn(&dev->dev, "Failed to ioremap config registers\n");
  499. goto out_release_regions;
  500. }
  501. card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
  502. if (!card->buffers) {
  503. dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
  504. goto out_unmap_config;
  505. }
  506. // for(i=0;i<64 ;i+=4){
  507. // data32=ioread32(card->buffers + i);
  508. // dev_dbg(&card->dev->dev, "%08lX\n",(unsigned long)data32);
  509. // }
  510. //Fill Config Mem with zeros
  511. for(i = 0; i < 128; i += 4)
  512. iowrite32(0, card->config_regs + i);
  513. //Set RX empty flags
  514. iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
  515. data32 = ioread32(card->config_regs + FPGA_VER);
  516. fpga_ver = (data32 & 0x0000FFFF);
  517. major_ver = ((data32 & 0xFF000000) >> 24);
  518. minor_ver = ((data32 & 0x00FF0000) >> 16);
  519. dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
  520. major_ver, minor_ver, fpga_ver);
  521. card->nr_ports = 2; /* FIXME: Detect daughterboard */
  522. err = atm_init(card);
  523. if (err)
  524. goto out_unmap_both;
  525. pci_set_drvdata(dev, card);
  526. tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
  527. spin_lock_init(&card->tx_lock);
  528. spin_lock_init(&card->tx_queue_lock);
  529. spin_lock_init(&card->cli_queue_lock);
  530. /*
  531. // Set Loopback mode
  532. data32 = 0x00010000;
  533. iowrite32(data32,card->config_regs + FLAGS_ADDR);
  534. */
  535. /*
  536. // Fill Buffers with zeros
  537. for (i = 0; i < BUF_SIZE * 8; i += 4)
  538. iowrite32(0, card->buffers + i);
  539. */
  540. /*
  541. for(i = 0; i < (BUF_SIZE * 1); i += 4)
  542. iowrite32(0x12345678, card->buffers + i + (0*BUF_SIZE));
  543. for(i = 0; i < (BUF_SIZE * 1); i += 4)
  544. iowrite32(0xabcdef98, card->buffers + i + (1*BUF_SIZE));
  545. // Read Config Memory
  546. printk(KERN_DEBUG "Reading Config MEM\n");
  547. i = 0;
  548. for(i = 0; i < 16; i++) {
  549. data32=ioread32(card->buffers + i*(BUF_SIZE/2));
  550. printk(KERN_ALERT "Addr: %lX Data: %08lX\n",
  551. (unsigned long)(addr_start + i*(BUF_SIZE/2)),
  552. (unsigned long)data32);
  553. }
  554. */
  555. //dev_dbg(&card->dev->dev, "Requesting IRQ: %d\n",dev->irq);
  556. err = request_irq(dev->irq, solos_irq, IRQF_DISABLED|IRQF_SHARED,
  557. "solos-pci", card);
  558. if (err)
  559. dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
  560. // Enable IRQs
  561. iowrite32(1, card->config_regs + IRQ_EN_ADDR);
  562. return 0;
  563. out_unmap_both:
  564. pci_iounmap(dev, card->config_regs);
  565. out_unmap_config:
  566. pci_iounmap(dev, card->buffers);
  567. out_release_regions:
  568. pci_release_regions(dev);
  569. out:
  570. return err;
  571. }
  572. static int atm_init(struct solos_card *card)
  573. {
  574. int i;
  575. opens = 0;
  576. for (i = 0; i < card->nr_ports; i++) {
  577. skb_queue_head_init(&card->tx_queue[i]);
  578. skb_queue_head_init(&card->cli_queue[i]);
  579. card->atmdev[i] = atm_dev_register("solos-pci", &fpga_ops, -1, NULL);
  580. if (!card->atmdev[i]) {
  581. dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
  582. atm_remove(card);
  583. return -ENODEV;
  584. }
  585. if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
  586. dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
  587. dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
  588. card->atmdev[i]->ci_range.vpi_bits = 8;
  589. card->atmdev[i]->ci_range.vci_bits = 16;
  590. card->atmdev[i]->dev_data = card;
  591. card->atmdev[i]->phy_data = (void *)(unsigned long)i;
  592. }
  593. return 0;
  594. }
  595. static void atm_remove(struct solos_card *card)
  596. {
  597. int i;
  598. for (i = 0; i < card->nr_ports; i++) {
  599. if (card->atmdev[i]) {
  600. dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
  601. atm_dev_deregister(card->atmdev[i]);
  602. }
  603. }
  604. }
  605. static void fpga_remove(struct pci_dev *dev)
  606. {
  607. struct solos_card *card = pci_get_drvdata(dev);
  608. if (debug)
  609. return;
  610. atm_remove(card);
  611. dev_vdbg(&dev->dev, "Freeing IRQ\n");
  612. // Disable IRQs from FPGA
  613. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  614. free_irq(dev->irq, card);
  615. tasklet_kill(&card->tlet);
  616. // iowrite32(0x01,pciregs);
  617. dev_vdbg(&dev->dev, "Unmapping PCI resource\n");
  618. pci_iounmap(dev, card->buffers);
  619. pci_iounmap(dev, card->config_regs);
  620. dev_vdbg(&dev->dev, "Releasing PCI Region\n");
  621. pci_release_regions(dev);
  622. pci_disable_device(dev);
  623. pci_set_drvdata(dev, NULL);
  624. kfree(card);
  625. // dev_dbg(&card->dev->dev, "fpga_remove\n");
  626. return;
  627. }
  628. static struct pci_device_id fpga_pci_tbl[] __devinitdata = {
  629. { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  630. { 0, }
  631. };
  632. MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
  633. static struct pci_driver fpga_driver = {
  634. .name = "solos",
  635. .id_table = fpga_pci_tbl,
  636. .probe = fpga_probe,
  637. .remove = fpga_remove,
  638. };
  639. static int __init solos_pci_init(void)
  640. {
  641. printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
  642. return pci_register_driver(&fpga_driver);
  643. }
  644. static void __exit solos_pci_exit(void)
  645. {
  646. pci_unregister_driver(&fpga_driver);
  647. printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
  648. }
  649. module_init(solos_pci_init);
  650. module_exit(solos_pci_exit);