setup.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387
  1. /*
  2. * Toshiba RBTX4939 setup routines.
  3. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  4. * and RBTX49xx patch from CELF patch archive.
  5. *
  6. * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
  7. * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
  8. * terms of the GNU General Public License version 2. This program is
  9. * licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/leds.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/smc91x.h>
  19. #include <asm/reboot.h>
  20. #include <asm/txx9/generic.h>
  21. #include <asm/txx9/pci.h>
  22. #include <asm/txx9/rbtx4939.h>
  23. static void rbtx4939_machine_restart(char *command)
  24. {
  25. local_irq_disable();
  26. writeb(1, rbtx4939_reseten_addr);
  27. writeb(1, rbtx4939_softreset_addr);
  28. while (1)
  29. ;
  30. }
  31. static void __init rbtx4939_time_init(void)
  32. {
  33. tx4939_time_init(0);
  34. }
  35. #if defined(__BIG_ENDIAN) && \
  36. (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE))
  37. #define HAVE_RBTX4939_IOSWAB
  38. #define IS_CE1_ADDR(addr) \
  39. ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
  40. static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x)
  41. {
  42. return IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
  43. }
  44. static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x)
  45. {
  46. return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
  47. }
  48. #endif /* __BIG_ENDIAN && CONFIG_SMC91X */
  49. static void __init rbtx4939_pci_setup(void)
  50. {
  51. #ifdef CONFIG_PCI
  52. int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
  53. struct pci_controller *c = &txx9_primary_pcic;
  54. register_pci_controller(c);
  55. tx4939_report_pciclk();
  56. tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
  57. if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
  58. (__raw_readq(&tx4939_ccfgptr->pcfg) &
  59. (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
  60. tx4939_report_pci1clk();
  61. /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
  62. c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
  63. register_pci_controller(c);
  64. tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
  65. }
  66. tx4939_setup_pcierr_irq();
  67. #endif /* CONFIG_PCI */
  68. }
  69. static unsigned long long default_ebccr[] __initdata = {
  70. 0x01c0000000007608ULL, /* 64M ROM */
  71. 0x017f000000007049ULL, /* 1M IOC */
  72. 0x0180000000408608ULL, /* ISA */
  73. 0,
  74. };
  75. static void __init rbtx4939_ebusc_setup(void)
  76. {
  77. int i;
  78. unsigned int sp;
  79. /* use user-configured speed */
  80. sp = TX4939_EBUSC_CR(0) & 0x30;
  81. default_ebccr[0] |= sp;
  82. default_ebccr[1] |= sp;
  83. default_ebccr[2] |= sp;
  84. /* initialise by myself */
  85. for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
  86. if (default_ebccr[i])
  87. ____raw_writeq(default_ebccr[i],
  88. &tx4939_ebuscptr->cr[i]);
  89. else
  90. ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
  91. & ~8,
  92. &tx4939_ebuscptr->cr[i]);
  93. }
  94. }
  95. static void __init rbtx4939_update_ioc_pen(void)
  96. {
  97. __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
  98. __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
  99. __u8 pe1 = readb(rbtx4939_pe1_addr);
  100. __u8 pe2 = readb(rbtx4939_pe2_addr);
  101. __u8 pe3 = readb(rbtx4939_pe3_addr);
  102. if (pcfg & TX4939_PCFG_ATA0MODE)
  103. pe1 |= RBTX4939_PE1_ATA(0);
  104. else
  105. pe1 &= ~RBTX4939_PE1_ATA(0);
  106. if (pcfg & TX4939_PCFG_ATA1MODE) {
  107. pe1 |= RBTX4939_PE1_ATA(1);
  108. pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
  109. } else {
  110. pe1 &= ~RBTX4939_PE1_ATA(1);
  111. if (pcfg & TX4939_PCFG_ET0MODE)
  112. pe1 |= RBTX4939_PE1_RMII(0);
  113. else
  114. pe1 &= ~RBTX4939_PE1_RMII(0);
  115. if (pcfg & TX4939_PCFG_ET1MODE)
  116. pe1 |= RBTX4939_PE1_RMII(1);
  117. else
  118. pe1 &= ~RBTX4939_PE1_RMII(1);
  119. }
  120. if (ccfg & TX4939_CCFG_PTSEL)
  121. pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
  122. RBTX4939_PE3_VP_S);
  123. else {
  124. __u64 vmode = pcfg &
  125. (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
  126. if (vmode == 0)
  127. pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
  128. RBTX4939_PE3_VP_S);
  129. else if (vmode == TX4939_PCFG_VPSMODE) {
  130. pe3 |= RBTX4939_PE3_VP_P;
  131. pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
  132. } else if (vmode == TX4939_PCFG_VSSMODE) {
  133. pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
  134. pe3 &= ~RBTX4939_PE3_VP_P;
  135. } else {
  136. pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
  137. pe3 &= ~RBTX4939_PE3_VP_S;
  138. }
  139. }
  140. if (pcfg & TX4939_PCFG_SPIMODE) {
  141. if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
  142. pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
  143. else {
  144. if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
  145. pe2 |= RBTX4939_PE2_SIO2;
  146. pe2 &= ~RBTX4939_PE2_SIO0;
  147. } else {
  148. pe2 |= RBTX4939_PE2_SIO0;
  149. pe2 &= ~RBTX4939_PE2_SIO2;
  150. }
  151. }
  152. if (pcfg & TX4939_PCFG_SIO3MODE)
  153. pe2 |= RBTX4939_PE2_SIO3;
  154. else
  155. pe2 &= ~RBTX4939_PE2_SIO3;
  156. pe2 &= ~RBTX4939_PE2_SPI;
  157. } else {
  158. pe2 |= RBTX4939_PE2_SPI;
  159. pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
  160. RBTX4939_PE2_SIO0);
  161. }
  162. if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
  163. pe2 |= RBTX4939_PE2_GPIO;
  164. else
  165. pe2 &= ~RBTX4939_PE2_GPIO;
  166. writeb(pe1, rbtx4939_pe1_addr);
  167. writeb(pe2, rbtx4939_pe2_addr);
  168. writeb(pe3, rbtx4939_pe3_addr);
  169. }
  170. #define RBTX4939_MAX_7SEGLEDS 8
  171. #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
  172. static u8 led_val[RBTX4939_MAX_7SEGLEDS];
  173. struct rbtx4939_led_data {
  174. struct led_classdev cdev;
  175. char name[32];
  176. unsigned int num;
  177. };
  178. /* Use "dot" in 7seg LEDs */
  179. static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
  180. enum led_brightness value)
  181. {
  182. struct rbtx4939_led_data *led_dat =
  183. container_of(led_cdev, struct rbtx4939_led_data, cdev);
  184. unsigned int num = led_dat->num;
  185. unsigned long flags;
  186. local_irq_save(flags);
  187. led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
  188. writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
  189. local_irq_restore(flags);
  190. }
  191. static int __init rbtx4939_led_probe(struct platform_device *pdev)
  192. {
  193. struct rbtx4939_led_data *leds_data;
  194. int i;
  195. static char *default_triggers[] __initdata = {
  196. "heartbeat",
  197. "ide-disk",
  198. "nand-disk",
  199. };
  200. leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS,
  201. GFP_KERNEL);
  202. if (!leds_data)
  203. return -ENOMEM;
  204. for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
  205. int rc;
  206. struct rbtx4939_led_data *led_dat = &leds_data[i];
  207. led_dat->num = i;
  208. led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
  209. sprintf(led_dat->name, "rbtx4939:amber:%u", i);
  210. led_dat->cdev.name = led_dat->name;
  211. if (i < ARRAY_SIZE(default_triggers))
  212. led_dat->cdev.default_trigger = default_triggers[i];
  213. rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
  214. if (rc < 0)
  215. return rc;
  216. led_dat->cdev.brightness_set(&led_dat->cdev, 0);
  217. }
  218. return 0;
  219. }
  220. static struct platform_driver rbtx4939_led_driver = {
  221. .driver = {
  222. .name = "rbtx4939-led",
  223. .owner = THIS_MODULE,
  224. },
  225. };
  226. static void __init rbtx4939_led_setup(void)
  227. {
  228. platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
  229. platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
  230. }
  231. #else
  232. static inline void rbtx4939_led_setup(void)
  233. {
  234. }
  235. #endif
  236. static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
  237. {
  238. #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
  239. unsigned long flags;
  240. local_irq_save(flags);
  241. /* bit7: reserved for LED class */
  242. led_val[pos] = (led_val[pos] & 0x80) | (val & 0x7f);
  243. val = led_val[pos];
  244. local_irq_restore(flags);
  245. #endif
  246. writeb(val, rbtx4939_7seg_addr(pos / 4, pos % 4));
  247. }
  248. static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
  249. {
  250. /* convert from map_to_seg7() notation */
  251. val = (val & 0x88) |
  252. ((val & 0x40) >> 6) |
  253. ((val & 0x20) >> 4) |
  254. ((val & 0x10) >> 2) |
  255. ((val & 0x04) << 2) |
  256. ((val & 0x02) << 4) |
  257. ((val & 0x01) << 6);
  258. __rbtx4939_7segled_putc(pos, val);
  259. }
  260. static void __init rbtx4939_arch_init(void)
  261. {
  262. rbtx4939_pci_setup();
  263. }
  264. static void __init rbtx4939_device_init(void)
  265. {
  266. unsigned long smc_addr = RBTX4939_ETHER_ADDR - IO_BASE;
  267. struct resource smc_res[] = {
  268. {
  269. .start = smc_addr,
  270. .end = smc_addr + 0x10 - 1,
  271. .flags = IORESOURCE_MEM,
  272. }, {
  273. .start = RBTX4939_IRQ_ETHER,
  274. /* override default irq flag defined in smc91x.h */
  275. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  276. },
  277. };
  278. struct smc91x_platdata smc_pdata = {
  279. .flags = SMC91X_USE_16BIT,
  280. };
  281. struct platform_device *pdev;
  282. #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
  283. int i, j;
  284. unsigned char ethaddr[2][6];
  285. u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
  286. for (i = 0; i < 2; i++) {
  287. unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
  288. if (bdipsw == 0)
  289. memcpy(ethaddr[i], (void *)area, 6);
  290. else {
  291. u16 buf[3];
  292. if (bdipsw & 8)
  293. area -= 0x03000000;
  294. else
  295. area -= 0x01000000;
  296. for (j = 0; j < 3; j++)
  297. buf[j] = le16_to_cpup((u16 *)(area + j * 2));
  298. memcpy(ethaddr[i], buf, 6);
  299. }
  300. }
  301. tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
  302. #endif
  303. pdev = platform_device_alloc("smc91x", -1);
  304. if (!pdev ||
  305. platform_device_add_resources(pdev, smc_res, ARRAY_SIZE(smc_res)) ||
  306. platform_device_add_data(pdev, &smc_pdata, sizeof(smc_pdata)) ||
  307. platform_device_add(pdev))
  308. platform_device_put(pdev);
  309. rbtx4939_led_setup();
  310. tx4939_wdt_init();
  311. tx4939_ata_init();
  312. }
  313. static void __init rbtx4939_setup(void)
  314. {
  315. int i;
  316. rbtx4939_ebusc_setup();
  317. /* always enable ATA0 */
  318. txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
  319. rbtx4939_update_ioc_pen();
  320. if (txx9_master_clock == 0)
  321. txx9_master_clock = 20000000;
  322. tx4939_setup();
  323. #ifdef HAVE_RBTX4939_IOSWAB
  324. ioswabw = rbtx4939_ioswabw;
  325. __mem_ioswabw = rbtx4939_mem_ioswabw;
  326. #endif
  327. _machine_restart = rbtx4939_machine_restart;
  328. txx9_7segled_init(RBTX4939_MAX_7SEGLEDS, rbtx4939_7segled_putc);
  329. for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++)
  330. txx9_7segled_putc(i, '-');
  331. pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
  332. readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
  333. readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
  334. #ifdef CONFIG_PCI
  335. txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
  336. txx9_board_pcibios_setup = tx4927_pcibios_setup;
  337. #else
  338. set_io_port_base(RBTX4939_ETHER_BASE);
  339. #endif
  340. tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
  341. }
  342. struct txx9_board_vec rbtx4939_vec __initdata = {
  343. .system = "Tothiba RBTX4939",
  344. .prom_init = rbtx4939_prom_init,
  345. .mem_setup = rbtx4939_setup,
  346. .irq_setup = rbtx4939_irq_setup,
  347. .time_init = rbtx4939_time_init,
  348. .device_init = rbtx4939_device_init,
  349. .arch_init = rbtx4939_arch_init,
  350. #ifdef CONFIG_PCI
  351. .pci_map_irq = tx4939_pci_map_irq,
  352. #endif
  353. };