cm_bf561.c 11 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2006
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  36. #include <linux/usb/isp1362.h>
  37. #endif
  38. #include <linux/ata_platform.h>
  39. #include <linux/irq.h>
  40. #include <asm/dma.h>
  41. #include <asm/bfin5xx_spi.h>
  42. #include <asm/portmux.h>
  43. #include <asm/dpmc.h>
  44. /*
  45. * Name the Board for the /proc/cpuinfo
  46. */
  47. const char bfin_board_name[] = "Bluetechnix CM BF561";
  48. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  49. /* all SPI peripherals info goes here */
  50. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  51. static struct mtd_partition bfin_spi_flash_partitions[] = {
  52. {
  53. .name = "bootloader(spi)",
  54. .size = 0x00020000,
  55. .offset = 0,
  56. .mask_flags = MTD_CAP_ROM
  57. }, {
  58. .name = "linux kernel(spi)",
  59. .size = 0xe0000,
  60. .offset = 0x20000
  61. }, {
  62. .name = "file system(spi)",
  63. .size = 0x700000,
  64. .offset = 0x00100000,
  65. }
  66. };
  67. static struct flash_platform_data bfin_spi_flash_data = {
  68. .name = "m25p80",
  69. .parts = bfin_spi_flash_partitions,
  70. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  71. .type = "m25p64",
  72. };
  73. /* SPI flash chip (m25p64) */
  74. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  75. .enable_dma = 0, /* use dma transfer with this chip*/
  76. .bits_per_word = 8,
  77. };
  78. #endif
  79. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  80. /* SPI ADC chip */
  81. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  82. .enable_dma = 1, /* use dma transfer with this chip*/
  83. .bits_per_word = 16,
  84. };
  85. #endif
  86. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  87. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  88. .enable_dma = 0,
  89. .bits_per_word = 16,
  90. };
  91. #endif
  92. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  93. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  94. .enable_dma = 0,
  95. .bits_per_word = 16,
  96. };
  97. #endif
  98. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  99. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  100. .enable_dma = 1,
  101. .bits_per_word = 8,
  102. };
  103. #endif
  104. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  105. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  106. {
  107. /* the modalias must be the same as spi device driver name */
  108. .modalias = "m25p80", /* Name of spi_driver for this device */
  109. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  110. .bus_num = 0, /* Framework bus number */
  111. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  112. .platform_data = &bfin_spi_flash_data,
  113. .controller_data = &spi_flash_chip_info,
  114. .mode = SPI_MODE_3,
  115. },
  116. #endif
  117. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  118. {
  119. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  120. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  121. .bus_num = 0, /* Framework bus number */
  122. .chip_select = 1, /* Framework chip select. */
  123. .platform_data = NULL, /* No spi_driver specific config */
  124. .controller_data = &spi_adc_chip_info,
  125. },
  126. #endif
  127. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  128. {
  129. .modalias = "ad1836-spi",
  130. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  131. .bus_num = 0,
  132. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  133. .controller_data = &ad1836_spi_chip_info,
  134. },
  135. #endif
  136. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  137. {
  138. .modalias = "ad9960-spi",
  139. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  140. .bus_num = 0,
  141. .chip_select = 1,
  142. .controller_data = &ad9960_spi_chip_info,
  143. },
  144. #endif
  145. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  146. {
  147. .modalias = "spi_mmc",
  148. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  149. .bus_num = 0,
  150. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  151. .platform_data = NULL,
  152. .controller_data = &spi_mmc_chip_info,
  153. .mode = SPI_MODE_3,
  154. },
  155. #endif
  156. };
  157. /* SPI (0) */
  158. static struct resource bfin_spi0_resource[] = {
  159. [0] = {
  160. .start = SPI0_REGBASE,
  161. .end = SPI0_REGBASE + 0xFF,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. [1] = {
  165. .start = CH_SPI,
  166. .end = CH_SPI,
  167. .flags = IORESOURCE_IRQ,
  168. }
  169. };
  170. /* SPI controller data */
  171. static struct bfin5xx_spi_master bfin_spi0_info = {
  172. .num_chipselect = 8,
  173. .enable_dma = 1, /* master has the ability to do dma transfer */
  174. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  175. };
  176. static struct platform_device bfin_spi0_device = {
  177. .name = "bfin-spi",
  178. .id = 0, /* Bus number */
  179. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  180. .resource = bfin_spi0_resource,
  181. .dev = {
  182. .platform_data = &bfin_spi0_info, /* Passed to driver */
  183. },
  184. };
  185. #endif /* spi master and devices */
  186. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  187. static struct platform_device hitachi_fb_device = {
  188. .name = "hitachi-tx09",
  189. };
  190. #endif
  191. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  192. static struct resource smc91x_resources[] = {
  193. {
  194. .name = "smc91x-regs",
  195. .start = 0x28000300,
  196. .end = 0x28000300 + 16,
  197. .flags = IORESOURCE_MEM,
  198. }, {
  199. .start = IRQ_PF0,
  200. .end = IRQ_PF0,
  201. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  202. },
  203. };
  204. static struct platform_device smc91x_device = {
  205. .name = "smc91x",
  206. .id = 0,
  207. .num_resources = ARRAY_SIZE(smc91x_resources),
  208. .resource = smc91x_resources,
  209. };
  210. #endif
  211. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  212. static struct resource isp1362_hcd_resources[] = {
  213. {
  214. .start = 0x24008000,
  215. .end = 0x24008000,
  216. .flags = IORESOURCE_MEM,
  217. }, {
  218. .start = 0x24008004,
  219. .end = 0x24008004,
  220. .flags = IORESOURCE_MEM,
  221. }, {
  222. .start = IRQ_PF47,
  223. .end = IRQ_PF47,
  224. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  225. },
  226. };
  227. static struct isp1362_platform_data isp1362_priv = {
  228. .sel15Kres = 1,
  229. .clknotstop = 0,
  230. .oc_enable = 0,
  231. .int_act_high = 0,
  232. .int_edge_triggered = 0,
  233. .remote_wakeup_connected = 0,
  234. .no_power_switching = 1,
  235. .power_switching_mode = 0,
  236. };
  237. static struct platform_device isp1362_hcd_device = {
  238. .name = "isp1362-hcd",
  239. .id = 0,
  240. .dev = {
  241. .platform_data = &isp1362_priv,
  242. },
  243. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  244. .resource = isp1362_hcd_resources,
  245. };
  246. #endif
  247. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  248. static struct resource bfin_uart_resources[] = {
  249. {
  250. .start = 0xFFC00400,
  251. .end = 0xFFC004FF,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. };
  255. static struct platform_device bfin_uart_device = {
  256. .name = "bfin-uart",
  257. .id = 1,
  258. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  259. .resource = bfin_uart_resources,
  260. };
  261. #endif
  262. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  263. static struct resource bfin_sir_resources[] = {
  264. #ifdef CONFIG_BFIN_SIR0
  265. {
  266. .start = 0xFFC00400,
  267. .end = 0xFFC004FF,
  268. .flags = IORESOURCE_MEM,
  269. },
  270. #endif
  271. };
  272. static struct platform_device bfin_sir_device = {
  273. .name = "bfin_sir",
  274. .id = 0,
  275. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  276. .resource = bfin_sir_resources,
  277. };
  278. #endif
  279. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  280. #define PATA_INT IRQ_PF46
  281. static struct pata_platform_info bfin_pata_platform_data = {
  282. .ioport_shift = 2,
  283. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  284. };
  285. static struct resource bfin_pata_resources[] = {
  286. {
  287. .start = 0x2400C000,
  288. .end = 0x2400C001F,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. {
  292. .start = 0x2400D018,
  293. .end = 0x2400D01B,
  294. .flags = IORESOURCE_MEM,
  295. },
  296. {
  297. .start = PATA_INT,
  298. .end = PATA_INT,
  299. .flags = IORESOURCE_IRQ,
  300. },
  301. };
  302. static struct platform_device bfin_pata_device = {
  303. .name = "pata_platform",
  304. .id = -1,
  305. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  306. .resource = bfin_pata_resources,
  307. .dev = {
  308. .platform_data = &bfin_pata_platform_data,
  309. }
  310. };
  311. #endif
  312. static const unsigned int cclk_vlev_datasheet[] =
  313. {
  314. VRPAIR(VLEV_085, 250000000),
  315. VRPAIR(VLEV_090, 300000000),
  316. VRPAIR(VLEV_095, 313000000),
  317. VRPAIR(VLEV_100, 350000000),
  318. VRPAIR(VLEV_105, 400000000),
  319. VRPAIR(VLEV_110, 444000000),
  320. VRPAIR(VLEV_115, 450000000),
  321. VRPAIR(VLEV_120, 475000000),
  322. VRPAIR(VLEV_125, 500000000),
  323. VRPAIR(VLEV_130, 600000000),
  324. };
  325. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  326. .tuple_tab = cclk_vlev_datasheet,
  327. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  328. .vr_settling_time = 25 /* us */,
  329. };
  330. static struct platform_device bfin_dpmc = {
  331. .name = "bfin dpmc",
  332. .dev = {
  333. .platform_data = &bfin_dmpc_vreg_data,
  334. },
  335. };
  336. static struct platform_device *cm_bf561_devices[] __initdata = {
  337. &bfin_dpmc,
  338. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  339. &hitachi_fb_device,
  340. #endif
  341. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  342. &bfin_uart_device,
  343. #endif
  344. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  345. &bfin_sir_device,
  346. #endif
  347. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  348. &isp1362_hcd_device,
  349. #endif
  350. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  351. &smc91x_device,
  352. #endif
  353. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  354. &bfin_spi0_device,
  355. #endif
  356. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  357. &bfin_pata_device,
  358. #endif
  359. };
  360. static int __init cm_bf561_init(void)
  361. {
  362. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  363. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  364. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  365. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  366. #endif
  367. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  368. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  369. #endif
  370. return 0;
  371. }
  372. arch_initcall(cm_bf561_init);