bf537.h 3.6 KB

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  1. /*
  2. * File: include/asm-blackfin/mach-bf537/bf537.h
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description: SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF537
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #ifndef __MACH_BF537_H__
  30. #define __MACH_BF537_H__
  31. /* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
  32. #define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */
  33. #define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF) /* SPORTx_STAT */
  34. #define PPI_ERR_MASK (0xFFFF & ~FLD) /* PPI_STATUS */
  35. #define EMAC_ERR_MASK (PHYINT | MMCINT | RXFSINT | TXFSINT | WAKEDET | RXDMAERR | TXDMAERR | STMDONE) /* EMAC_SYSTAT */
  36. #define UART_ERR_MASK_STAT1 (0x4) /* UARTx_IIR */
  37. #define UART_ERR_MASK_STAT0 (0x2) /* UARTx_IIR */
  38. #define CAN_ERR_MASK (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | RMLIF | UCEIF | EXTIF | ADIF) /* CAN_GIF */
  39. #define OFFSET_(x) ((x) & 0x0000FFFF)
  40. /*some misc defines*/
  41. #define IMASK_IVG15 0x8000
  42. #define IMASK_IVG14 0x4000
  43. #define IMASK_IVG13 0x2000
  44. #define IMASK_IVG12 0x1000
  45. #define IMASK_IVG11 0x0800
  46. #define IMASK_IVG10 0x0400
  47. #define IMASK_IVG9 0x0200
  48. #define IMASK_IVG8 0x0100
  49. #define IMASK_IVG7 0x0080
  50. #define IMASK_IVGTMR 0x0040
  51. #define IMASK_IVGHW 0x0020
  52. /***************************/
  53. #define BFIN_DSUBBANKS 4
  54. #define BFIN_DWAYS 2
  55. #define BFIN_DLINES 64
  56. #define BFIN_ISUBBANKS 4
  57. #define BFIN_IWAYS 4
  58. #define BFIN_ILINES 32
  59. #define WAY0_L 0x1
  60. #define WAY1_L 0x2
  61. #define WAY01_L 0x3
  62. #define WAY2_L 0x4
  63. #define WAY02_L 0x5
  64. #define WAY12_L 0x6
  65. #define WAY012_L 0x7
  66. #define WAY3_L 0x8
  67. #define WAY03_L 0x9
  68. #define WAY13_L 0xA
  69. #define WAY013_L 0xB
  70. #define WAY32_L 0xC
  71. #define WAY320_L 0xD
  72. #define WAY321_L 0xE
  73. #define WAYALL_L 0xF
  74. #define DMC_ENABLE (2<<2) /*yes, 2, not 1 */
  75. /********************************* EBIU Settings ************************************/
  76. #define AMBCTL0VAL ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
  77. #define AMBCTL1VAL ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
  78. #ifdef CONFIG_C_AMBEN_ALL
  79. #define V_AMBEN AMBEN_ALL
  80. #endif
  81. #ifdef CONFIG_C_AMBEN
  82. #define V_AMBEN 0x0
  83. #endif
  84. #ifdef CONFIG_C_AMBEN_B0
  85. #define V_AMBEN AMBEN_B0
  86. #endif
  87. #ifdef CONFIG_C_AMBEN_B0_B1
  88. #define V_AMBEN AMBEN_B0_B1
  89. #endif
  90. #ifdef CONFIG_C_AMBEN_B0_B1_B2
  91. #define V_AMBEN AMBEN_B0_B1_B2
  92. #endif
  93. #ifdef CONFIG_C_AMCKEN
  94. #define V_AMCKEN AMCKEN
  95. #else
  96. #define V_AMCKEN 0x0
  97. #endif
  98. #ifdef CONFIG_C_CDPRIO
  99. #define V_CDPRIO 0x100
  100. #else
  101. #define V_CDPRIO 0x0
  102. #endif
  103. #define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
  104. #ifdef CONFIG_BF537
  105. #define CPU "BF537"
  106. #define CPUID 0x27c8
  107. #endif
  108. #ifdef CONFIG_BF536
  109. #define CPU "BF536"
  110. #define CPUID 0x27c8
  111. #endif
  112. #ifdef CONFIG_BF534
  113. #define CPU "BF534"
  114. #define CPUID 0x27c6
  115. #endif
  116. #ifndef CPU
  117. #error Unknown CPU type - This kernel doesn't seem to be configured properly
  118. #endif
  119. #endif /* __MACH_BF537_H__ */