stamp.c 29 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/kernel.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/nand.h>
  35. #include <linux/mtd/partitions.h>
  36. #include <linux/mtd/plat-ram.h>
  37. #include <linux/mtd/physmap.h>
  38. #include <linux/spi/spi.h>
  39. #include <linux/spi/flash.h>
  40. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  41. #include <linux/usb/isp1362.h>
  42. #endif
  43. #include <linux/ata_platform.h>
  44. #include <linux/irq.h>
  45. #include <linux/interrupt.h>
  46. #include <linux/i2c.h>
  47. #include <linux/usb/sl811.h>
  48. #include <asm/dma.h>
  49. #include <asm/bfin5xx_spi.h>
  50. #include <asm/reboot.h>
  51. #include <asm/portmux.h>
  52. #include <asm/dpmc.h>
  53. /*
  54. * Name the Board for the /proc/cpuinfo
  55. */
  56. const char bfin_board_name[] = "ADDS-BF537-STAMP";
  57. /*
  58. * Driver needs to know address, irq and flag pin.
  59. */
  60. #define ISP1761_BASE 0x203C0000
  61. #define ISP1761_IRQ IRQ_PF7
  62. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  63. static struct resource bfin_isp1761_resources[] = {
  64. [0] = {
  65. .name = "isp1761-regs",
  66. .start = ISP1761_BASE + 0x00000000,
  67. .end = ISP1761_BASE + 0x000fffff,
  68. .flags = IORESOURCE_MEM,
  69. },
  70. [1] = {
  71. .start = ISP1761_IRQ,
  72. .end = ISP1761_IRQ,
  73. .flags = IORESOURCE_IRQ,
  74. },
  75. };
  76. static struct platform_device bfin_isp1761_device = {
  77. .name = "isp1761",
  78. .id = 0,
  79. .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
  80. .resource = bfin_isp1761_resources,
  81. };
  82. static struct platform_device *bfin_isp1761_devices[] = {
  83. &bfin_isp1761_device,
  84. };
  85. int __init bfin_isp1761_init(void)
  86. {
  87. unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
  88. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  89. set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
  90. return platform_add_devices(bfin_isp1761_devices, num_devices);
  91. }
  92. void __exit bfin_isp1761_exit(void)
  93. {
  94. platform_device_unregister(&bfin_isp1761_device);
  95. }
  96. arch_initcall(bfin_isp1761_init);
  97. #endif
  98. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  99. #include <linux/input.h>
  100. #include <linux/gpio_keys.h>
  101. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  102. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  103. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  104. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  105. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  106. };
  107. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  108. .buttons = bfin_gpio_keys_table,
  109. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  110. };
  111. static struct platform_device bfin_device_gpiokeys = {
  112. .name = "gpio-keys",
  113. .dev = {
  114. .platform_data = &bfin_gpio_keys_data,
  115. },
  116. };
  117. #endif
  118. static struct resource bfin_gpios_resources = {
  119. .start = 0,
  120. .end = MAX_BLACKFIN_GPIOS - 1,
  121. .flags = IORESOURCE_IRQ,
  122. };
  123. static struct platform_device bfin_gpios_device = {
  124. .name = "simple-gpio",
  125. .id = -1,
  126. .num_resources = 1,
  127. .resource = &bfin_gpios_resources,
  128. };
  129. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  130. static struct resource bfin_pcmcia_cf_resources[] = {
  131. {
  132. .start = 0x20310000, /* IO PORT */
  133. .end = 0x20312000,
  134. .flags = IORESOURCE_MEM,
  135. }, {
  136. .start = 0x20311000, /* Attribute Memory */
  137. .end = 0x20311FFF,
  138. .flags = IORESOURCE_MEM,
  139. }, {
  140. .start = IRQ_PF4,
  141. .end = IRQ_PF4,
  142. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  143. }, {
  144. .start = 6, /* Card Detect PF6 */
  145. .end = 6,
  146. .flags = IORESOURCE_IRQ,
  147. },
  148. };
  149. static struct platform_device bfin_pcmcia_cf_device = {
  150. .name = "bfin_cf_pcmcia",
  151. .id = -1,
  152. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  153. .resource = bfin_pcmcia_cf_resources,
  154. };
  155. #endif
  156. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  157. static struct platform_device rtc_device = {
  158. .name = "rtc-bfin",
  159. .id = -1,
  160. };
  161. #endif
  162. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  163. static struct resource smc91x_resources[] = {
  164. {
  165. .name = "smc91x-regs",
  166. .start = 0x20300300,
  167. .end = 0x20300300 + 16,
  168. .flags = IORESOURCE_MEM,
  169. }, {
  170. .start = IRQ_PF7,
  171. .end = IRQ_PF7,
  172. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  173. },
  174. };
  175. static struct platform_device smc91x_device = {
  176. .name = "smc91x",
  177. .id = 0,
  178. .num_resources = ARRAY_SIZE(smc91x_resources),
  179. .resource = smc91x_resources,
  180. };
  181. #endif
  182. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  183. static struct resource dm9000_resources[] = {
  184. [0] = {
  185. .start = 0x203FB800,
  186. .end = 0x203FB800 + 8,
  187. .flags = IORESOURCE_MEM,
  188. },
  189. [1] = {
  190. .start = IRQ_PF9,
  191. .end = IRQ_PF9,
  192. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  193. },
  194. };
  195. static struct platform_device dm9000_device = {
  196. .name = "dm9000",
  197. .id = -1,
  198. .num_resources = ARRAY_SIZE(dm9000_resources),
  199. .resource = dm9000_resources,
  200. };
  201. #endif
  202. #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
  203. static struct resource ax88180_resources[] = {
  204. [0] = {
  205. .start = 0x20300000,
  206. .end = 0x20300000 + 0x8000,
  207. .flags = IORESOURCE_MEM,
  208. },
  209. [1] = {
  210. .start = IRQ_PF7,
  211. .end = IRQ_PF7,
  212. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
  213. },
  214. };
  215. static struct platform_device ax88180_device = {
  216. .name = "ax88180",
  217. .id = -1,
  218. .num_resources = ARRAY_SIZE(ax88180_resources),
  219. .resource = ax88180_resources,
  220. };
  221. #endif
  222. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  223. static struct resource sl811_hcd_resources[] = {
  224. {
  225. .start = 0x20340000,
  226. .end = 0x20340000,
  227. .flags = IORESOURCE_MEM,
  228. }, {
  229. .start = 0x20340004,
  230. .end = 0x20340004,
  231. .flags = IORESOURCE_MEM,
  232. }, {
  233. .start = CONFIG_USB_SL811_BFIN_IRQ,
  234. .end = CONFIG_USB_SL811_BFIN_IRQ,
  235. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  236. },
  237. };
  238. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  239. void sl811_port_power(struct device *dev, int is_on)
  240. {
  241. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  242. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  243. }
  244. #endif
  245. static struct sl811_platform_data sl811_priv = {
  246. .potpg = 10,
  247. .power = 250, /* == 500mA */
  248. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  249. .port_power = &sl811_port_power,
  250. #endif
  251. };
  252. static struct platform_device sl811_hcd_device = {
  253. .name = "sl811-hcd",
  254. .id = 0,
  255. .dev = {
  256. .platform_data = &sl811_priv,
  257. },
  258. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  259. .resource = sl811_hcd_resources,
  260. };
  261. #endif
  262. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  263. static struct resource isp1362_hcd_resources[] = {
  264. {
  265. .start = 0x20360000,
  266. .end = 0x20360000,
  267. .flags = IORESOURCE_MEM,
  268. }, {
  269. .start = 0x20360004,
  270. .end = 0x20360004,
  271. .flags = IORESOURCE_MEM,
  272. }, {
  273. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  274. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  275. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  276. },
  277. };
  278. static struct isp1362_platform_data isp1362_priv = {
  279. .sel15Kres = 1,
  280. .clknotstop = 0,
  281. .oc_enable = 0,
  282. .int_act_high = 0,
  283. .int_edge_triggered = 0,
  284. .remote_wakeup_connected = 0,
  285. .no_power_switching = 1,
  286. .power_switching_mode = 0,
  287. };
  288. static struct platform_device isp1362_hcd_device = {
  289. .name = "isp1362-hcd",
  290. .id = 0,
  291. .dev = {
  292. .platform_data = &isp1362_priv,
  293. },
  294. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  295. .resource = isp1362_hcd_resources,
  296. };
  297. #endif
  298. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  299. static struct platform_device bfin_mac_device = {
  300. .name = "bfin_mac",
  301. };
  302. #endif
  303. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  304. static struct resource net2272_bfin_resources[] = {
  305. {
  306. .start = 0x20300000,
  307. .end = 0x20300000 + 0x100,
  308. .flags = IORESOURCE_MEM,
  309. }, {
  310. .start = IRQ_PF7,
  311. .end = IRQ_PF7,
  312. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  313. },
  314. };
  315. static struct platform_device net2272_bfin_device = {
  316. .name = "net2272",
  317. .id = -1,
  318. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  319. .resource = net2272_bfin_resources,
  320. };
  321. #endif
  322. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  323. #ifdef CONFIG_MTD_PARTITIONS
  324. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  325. static struct mtd_partition bfin_plat_nand_partitions[] = {
  326. {
  327. .name = "linux kernel(nand)",
  328. .size = 0x400000,
  329. .offset = 0,
  330. }, {
  331. .name = "file system(nand)",
  332. .size = MTDPART_SIZ_FULL,
  333. .offset = MTDPART_OFS_APPEND,
  334. },
  335. };
  336. #endif
  337. #define BFIN_NAND_PLAT_CLE 2
  338. #define BFIN_NAND_PLAT_ALE 1
  339. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  340. {
  341. struct nand_chip *this = mtd->priv;
  342. if (cmd == NAND_CMD_NONE)
  343. return;
  344. if (ctrl & NAND_CLE)
  345. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  346. else
  347. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  348. }
  349. #define BFIN_NAND_PLAT_READY GPIO_PF3
  350. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  351. {
  352. return gpio_get_value(BFIN_NAND_PLAT_READY);
  353. }
  354. static struct platform_nand_data bfin_plat_nand_data = {
  355. .chip = {
  356. .chip_delay = 30,
  357. #ifdef CONFIG_MTD_PARTITIONS
  358. .part_probe_types = part_probes,
  359. .partitions = bfin_plat_nand_partitions,
  360. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  361. #endif
  362. },
  363. .ctrl = {
  364. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  365. .dev_ready = bfin_plat_nand_dev_ready,
  366. },
  367. };
  368. #define MAX(x, y) (x > y ? x : y)
  369. static struct resource bfin_plat_nand_resources = {
  370. .start = 0x20212000,
  371. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  372. .flags = IORESOURCE_IO,
  373. };
  374. static struct platform_device bfin_async_nand_device = {
  375. .name = "gen_nand",
  376. .id = -1,
  377. .num_resources = 1,
  378. .resource = &bfin_plat_nand_resources,
  379. .dev = {
  380. .platform_data = &bfin_plat_nand_data,
  381. },
  382. };
  383. static void bfin_plat_nand_init(void)
  384. {
  385. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  386. }
  387. #else
  388. static void bfin_plat_nand_init(void) {}
  389. #endif
  390. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  391. static struct mtd_partition stamp_partitions[] = {
  392. {
  393. .name = "bootloader(nor)",
  394. .size = 0x40000,
  395. .offset = 0,
  396. }, {
  397. .name = "linux kernel(nor)",
  398. .size = 0xE0000,
  399. .offset = MTDPART_OFS_APPEND,
  400. }, {
  401. .name = "file system(nor)",
  402. .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
  403. .offset = MTDPART_OFS_APPEND,
  404. }, {
  405. .name = "MAC Address(nor)",
  406. .size = MTDPART_SIZ_FULL,
  407. .offset = 0x3F0000,
  408. .mask_flags = MTD_WRITEABLE,
  409. }
  410. };
  411. static struct physmap_flash_data stamp_flash_data = {
  412. .width = 2,
  413. .parts = stamp_partitions,
  414. .nr_parts = ARRAY_SIZE(stamp_partitions),
  415. };
  416. static struct resource stamp_flash_resource = {
  417. .start = 0x20000000,
  418. .end = 0x203fffff,
  419. .flags = IORESOURCE_MEM,
  420. };
  421. static struct platform_device stamp_flash_device = {
  422. .name = "physmap-flash",
  423. .id = 0,
  424. .dev = {
  425. .platform_data = &stamp_flash_data,
  426. },
  427. .num_resources = 1,
  428. .resource = &stamp_flash_resource,
  429. };
  430. #endif
  431. #if defined(CONFIG_MTD_M25P80) \
  432. || defined(CONFIG_MTD_M25P80_MODULE)
  433. static struct mtd_partition bfin_spi_flash_partitions[] = {
  434. {
  435. .name = "bootloader(spi)",
  436. .size = 0x00040000,
  437. .offset = 0,
  438. .mask_flags = MTD_CAP_ROM
  439. }, {
  440. .name = "linux kernel(spi)",
  441. .size = 0xe0000,
  442. .offset = MTDPART_OFS_APPEND,
  443. }, {
  444. .name = "file system(spi)",
  445. .size = MTDPART_SIZ_FULL,
  446. .offset = MTDPART_OFS_APPEND,
  447. }
  448. };
  449. static struct flash_platform_data bfin_spi_flash_data = {
  450. .name = "m25p80",
  451. .parts = bfin_spi_flash_partitions,
  452. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  453. .type = "m25p64",
  454. };
  455. /* SPI flash chip (m25p64) */
  456. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  457. .enable_dma = 0, /* use dma transfer with this chip*/
  458. .bits_per_word = 8,
  459. };
  460. #endif
  461. #if defined(CONFIG_SPI_ADC_BF533) \
  462. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  463. /* SPI ADC chip */
  464. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  465. .enable_dma = 1, /* use dma transfer with this chip*/
  466. .bits_per_word = 16,
  467. };
  468. #endif
  469. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  470. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  471. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  472. .enable_dma = 0,
  473. .bits_per_word = 16,
  474. };
  475. #endif
  476. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  477. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  478. .enable_dma = 0,
  479. .bits_per_word = 16,
  480. };
  481. #endif
  482. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  483. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  484. .enable_dma = 1,
  485. .bits_per_word = 8,
  486. };
  487. #endif
  488. #if defined(CONFIG_PBX)
  489. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  490. .ctl_reg = 0x4, /* send zero */
  491. .enable_dma = 0,
  492. .bits_per_word = 8,
  493. .cs_change_per_word = 1,
  494. };
  495. #endif
  496. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  497. #include <linux/spi/ad7877.h>
  498. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  499. .enable_dma = 0,
  500. .bits_per_word = 16,
  501. };
  502. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  503. .model = 7877,
  504. .vref_delay_usecs = 50, /* internal, no capacitor */
  505. .x_plate_ohms = 419,
  506. .y_plate_ohms = 486,
  507. .pressure_max = 1000,
  508. .pressure_min = 0,
  509. .stopacq_polarity = 1,
  510. .first_conversion_delay = 3,
  511. .acquisition_time = 1,
  512. .averaging = 1,
  513. .pen_down_acc_interval = 1,
  514. };
  515. #endif
  516. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  517. #include <linux/spi/ad7879.h>
  518. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  519. .model = 7879, /* Model = AD7879 */
  520. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  521. .pressure_max = 10000,
  522. .pressure_min = 0,
  523. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  524. .acquisition_time = 1, /* 4us acquisition time per sample */
  525. .median = 2, /* do 8 measurements */
  526. .averaging = 1, /* take the average of 4 middle samples */
  527. .pen_down_acc_interval = 255, /* 9.4 ms */
  528. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  529. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  530. };
  531. #endif
  532. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  533. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  534. .enable_dma = 0,
  535. .bits_per_word = 16,
  536. };
  537. #endif
  538. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  539. static struct bfin5xx_spi_chip spidev_chip_info = {
  540. .enable_dma = 0,
  541. .bits_per_word = 8,
  542. };
  543. #endif
  544. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  545. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  546. .enable_dma = 0,
  547. .bits_per_word = 8,
  548. };
  549. #endif
  550. #if defined(CONFIG_MTD_DATAFLASH) \
  551. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  552. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  553. {
  554. .name = "bootloader(spi)",
  555. .size = 0x00040000,
  556. .offset = 0,
  557. .mask_flags = MTD_CAP_ROM
  558. }, {
  559. .name = "linux kernel(spi)",
  560. .size = 0xe0000,
  561. .offset = MTDPART_OFS_APPEND,
  562. }, {
  563. .name = "file system(spi)",
  564. .size = MTDPART_SIZ_FULL,
  565. .offset = MTDPART_OFS_APPEND,
  566. }
  567. };
  568. static struct flash_platform_data bfin_spi_dataflash_data = {
  569. .name = "SPI Dataflash",
  570. .parts = bfin_spi_dataflash_partitions,
  571. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  572. };
  573. /* DataFlash chip */
  574. static struct bfin5xx_spi_chip data_flash_chip_info = {
  575. .enable_dma = 0, /* use dma transfer with this chip*/
  576. .bits_per_word = 8,
  577. };
  578. #endif
  579. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  580. #if defined(CONFIG_MTD_M25P80) \
  581. || defined(CONFIG_MTD_M25P80_MODULE)
  582. {
  583. /* the modalias must be the same as spi device driver name */
  584. .modalias = "m25p80", /* Name of spi_driver for this device */
  585. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  586. .bus_num = 0, /* Framework bus number */
  587. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  588. .platform_data = &bfin_spi_flash_data,
  589. .controller_data = &spi_flash_chip_info,
  590. .mode = SPI_MODE_3,
  591. },
  592. #endif
  593. #if defined(CONFIG_MTD_DATAFLASH) \
  594. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  595. { /* DataFlash chip */
  596. .modalias = "mtd_dataflash",
  597. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  598. .bus_num = 0, /* Framework bus number */
  599. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  600. .platform_data = &bfin_spi_dataflash_data,
  601. .controller_data = &data_flash_chip_info,
  602. .mode = SPI_MODE_3,
  603. },
  604. #endif
  605. #if defined(CONFIG_SPI_ADC_BF533) \
  606. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  607. {
  608. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  609. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  610. .bus_num = 0, /* Framework bus number */
  611. .chip_select = 1, /* Framework chip select. */
  612. .platform_data = NULL, /* No spi_driver specific config */
  613. .controller_data = &spi_adc_chip_info,
  614. },
  615. #endif
  616. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  617. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  618. {
  619. .modalias = "ad1836-spi",
  620. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  621. .bus_num = 0,
  622. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  623. .controller_data = &ad1836_spi_chip_info,
  624. },
  625. #endif
  626. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  627. {
  628. .modalias = "ad9960-spi",
  629. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  630. .bus_num = 0,
  631. .chip_select = 1,
  632. .controller_data = &ad9960_spi_chip_info,
  633. },
  634. #endif
  635. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  636. {
  637. .modalias = "spi_mmc_dummy",
  638. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  639. .bus_num = 0,
  640. .chip_select = 0,
  641. .platform_data = NULL,
  642. .controller_data = &spi_mmc_chip_info,
  643. .mode = SPI_MODE_3,
  644. },
  645. {
  646. .modalias = "spi_mmc",
  647. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  648. .bus_num = 0,
  649. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  650. .platform_data = NULL,
  651. .controller_data = &spi_mmc_chip_info,
  652. .mode = SPI_MODE_3,
  653. },
  654. #endif
  655. #if defined(CONFIG_PBX)
  656. {
  657. .modalias = "fxs-spi",
  658. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  659. .bus_num = 0,
  660. .chip_select = 8 - CONFIG_J11_JUMPER,
  661. .controller_data = &spi_si3xxx_chip_info,
  662. .mode = SPI_MODE_3,
  663. },
  664. {
  665. .modalias = "fxo-spi",
  666. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  667. .bus_num = 0,
  668. .chip_select = 8 - CONFIG_J19_JUMPER,
  669. .controller_data = &spi_si3xxx_chip_info,
  670. .mode = SPI_MODE_3,
  671. },
  672. #endif
  673. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  674. {
  675. .modalias = "ad7877",
  676. .platform_data = &bfin_ad7877_ts_info,
  677. .irq = IRQ_PF6,
  678. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  679. .bus_num = 0,
  680. .chip_select = 1,
  681. .controller_data = &spi_ad7877_chip_info,
  682. },
  683. #endif
  684. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  685. {
  686. .modalias = "ad7879",
  687. .platform_data = &bfin_ad7879_ts_info,
  688. .irq = IRQ_PF7,
  689. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  690. .bus_num = 0,
  691. .chip_select = 1,
  692. .controller_data = &spi_ad7879_chip_info,
  693. .mode = SPI_CPHA | SPI_CPOL,
  694. },
  695. #endif
  696. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  697. {
  698. .modalias = "spidev",
  699. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  700. .bus_num = 0,
  701. .chip_select = 1,
  702. .controller_data = &spidev_chip_info,
  703. },
  704. #endif
  705. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  706. {
  707. .modalias = "bfin-lq035q1-spi",
  708. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  709. .bus_num = 0,
  710. .chip_select = 2,
  711. .controller_data = &lq035q1_spi_chip_info,
  712. .mode = SPI_CPHA | SPI_CPOL,
  713. },
  714. #endif
  715. };
  716. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  717. /* SPI controller data */
  718. static struct bfin5xx_spi_master bfin_spi0_info = {
  719. .num_chipselect = 8,
  720. .enable_dma = 1, /* master has the ability to do dma transfer */
  721. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  722. };
  723. /* SPI (0) */
  724. static struct resource bfin_spi0_resource[] = {
  725. [0] = {
  726. .start = SPI0_REGBASE,
  727. .end = SPI0_REGBASE + 0xFF,
  728. .flags = IORESOURCE_MEM,
  729. },
  730. [1] = {
  731. .start = CH_SPI,
  732. .end = CH_SPI,
  733. .flags = IORESOURCE_IRQ,
  734. },
  735. };
  736. static struct platform_device bfin_spi0_device = {
  737. .name = "bfin-spi",
  738. .id = 0, /* Bus number */
  739. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  740. .resource = bfin_spi0_resource,
  741. .dev = {
  742. .platform_data = &bfin_spi0_info, /* Passed to driver */
  743. },
  744. };
  745. #endif /* spi master and devices */
  746. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  747. static struct platform_device bfin_fb_device = {
  748. .name = "bf537-lq035",
  749. };
  750. #endif
  751. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  752. static struct platform_device bfin_fb_adv7393_device = {
  753. .name = "bfin-adv7393",
  754. };
  755. #endif
  756. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  757. #include <asm/bfin-lq035q1.h>
  758. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  759. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  760. .use_bl = 0, /* let something else control the LCD Blacklight */
  761. .gpio_bl = GPIO_PF7,
  762. };
  763. static struct resource bfin_lq035q1_resources[] = {
  764. {
  765. .start = IRQ_PPI_ERROR,
  766. .end = IRQ_PPI_ERROR,
  767. .flags = IORESOURCE_IRQ,
  768. },
  769. };
  770. static struct platform_device bfin_lq035q1_device = {
  771. .name = "bfin-lq035q1",
  772. .id = -1,
  773. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  774. .resource = bfin_lq035q1_resources,
  775. .dev = {
  776. .platform_data = &bfin_lq035q1_data,
  777. },
  778. };
  779. #endif
  780. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  781. static struct resource bfin_uart_resources[] = {
  782. #ifdef CONFIG_SERIAL_BFIN_UART0
  783. {
  784. .start = 0xFFC00400,
  785. .end = 0xFFC004FF,
  786. .flags = IORESOURCE_MEM,
  787. },
  788. #endif
  789. #ifdef CONFIG_SERIAL_BFIN_UART1
  790. {
  791. .start = 0xFFC02000,
  792. .end = 0xFFC020FF,
  793. .flags = IORESOURCE_MEM,
  794. },
  795. #endif
  796. };
  797. static struct platform_device bfin_uart_device = {
  798. .name = "bfin-uart",
  799. .id = 1,
  800. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  801. .resource = bfin_uart_resources,
  802. };
  803. #endif
  804. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  805. static struct resource bfin_sir_resources[] = {
  806. #ifdef CONFIG_BFIN_SIR0
  807. {
  808. .start = 0xFFC00400,
  809. .end = 0xFFC004FF,
  810. .flags = IORESOURCE_MEM,
  811. },
  812. #endif
  813. #ifdef CONFIG_BFIN_SIR1
  814. {
  815. .start = 0xFFC02000,
  816. .end = 0xFFC020FF,
  817. .flags = IORESOURCE_MEM,
  818. },
  819. #endif
  820. };
  821. static struct platform_device bfin_sir_device = {
  822. .name = "bfin_sir",
  823. .id = 0,
  824. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  825. .resource = bfin_sir_resources,
  826. };
  827. #endif
  828. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  829. static struct resource bfin_twi0_resource[] = {
  830. [0] = {
  831. .start = TWI0_REGBASE,
  832. .end = TWI0_REGBASE,
  833. .flags = IORESOURCE_MEM,
  834. },
  835. [1] = {
  836. .start = IRQ_TWI,
  837. .end = IRQ_TWI,
  838. .flags = IORESOURCE_IRQ,
  839. },
  840. };
  841. static struct platform_device i2c_bfin_twi_device = {
  842. .name = "i2c-bfin-twi",
  843. .id = 0,
  844. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  845. .resource = bfin_twi0_resource,
  846. };
  847. #endif
  848. #ifdef CONFIG_I2C_BOARDINFO
  849. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  850. #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
  851. {
  852. I2C_BOARD_INFO("ad7142_joystick", 0x2C),
  853. .irq = IRQ_PF5,
  854. },
  855. #endif
  856. #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
  857. {
  858. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  859. },
  860. #endif
  861. #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
  862. {
  863. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  864. .irq = IRQ_PG6,
  865. },
  866. #endif
  867. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  868. {
  869. I2C_BOARD_INFO("ad7879", 0x2F),
  870. .irq = IRQ_PG5,
  871. .platform_data = (void *)&bfin_ad7879_ts_info,
  872. },
  873. #endif
  874. };
  875. #endif
  876. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  877. static struct platform_device bfin_sport0_uart_device = {
  878. .name = "bfin-sport-uart",
  879. .id = 0,
  880. };
  881. static struct platform_device bfin_sport1_uart_device = {
  882. .name = "bfin-sport-uart",
  883. .id = 1,
  884. };
  885. #endif
  886. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  887. #define PATA_INT IRQ_PF5
  888. static struct pata_platform_info bfin_pata_platform_data = {
  889. .ioport_shift = 1,
  890. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  891. };
  892. static struct resource bfin_pata_resources[] = {
  893. {
  894. .start = 0x20314020,
  895. .end = 0x2031403F,
  896. .flags = IORESOURCE_MEM,
  897. },
  898. {
  899. .start = 0x2031401C,
  900. .end = 0x2031401F,
  901. .flags = IORESOURCE_MEM,
  902. },
  903. {
  904. .start = PATA_INT,
  905. .end = PATA_INT,
  906. .flags = IORESOURCE_IRQ,
  907. },
  908. };
  909. static struct platform_device bfin_pata_device = {
  910. .name = "pata_platform",
  911. .id = -1,
  912. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  913. .resource = bfin_pata_resources,
  914. .dev = {
  915. .platform_data = &bfin_pata_platform_data,
  916. }
  917. };
  918. #endif
  919. static const unsigned int cclk_vlev_datasheet[] =
  920. {
  921. VRPAIR(VLEV_085, 250000000),
  922. VRPAIR(VLEV_090, 376000000),
  923. VRPAIR(VLEV_095, 426000000),
  924. VRPAIR(VLEV_100, 426000000),
  925. VRPAIR(VLEV_105, 476000000),
  926. VRPAIR(VLEV_110, 476000000),
  927. VRPAIR(VLEV_115, 476000000),
  928. VRPAIR(VLEV_120, 500000000),
  929. VRPAIR(VLEV_125, 533000000),
  930. VRPAIR(VLEV_130, 600000000),
  931. };
  932. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  933. .tuple_tab = cclk_vlev_datasheet,
  934. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  935. .vr_settling_time = 25 /* us */,
  936. };
  937. static struct platform_device bfin_dpmc = {
  938. .name = "bfin dpmc",
  939. .dev = {
  940. .platform_data = &bfin_dmpc_vreg_data,
  941. },
  942. };
  943. static struct platform_device *stamp_devices[] __initdata = {
  944. &bfin_dpmc,
  945. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  946. &bfin_pcmcia_cf_device,
  947. #endif
  948. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  949. &rtc_device,
  950. #endif
  951. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  952. &sl811_hcd_device,
  953. #endif
  954. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  955. &isp1362_hcd_device,
  956. #endif
  957. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  958. &smc91x_device,
  959. #endif
  960. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  961. &dm9000_device,
  962. #endif
  963. #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
  964. &ax88180_device,
  965. #endif
  966. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  967. &bfin_mac_device,
  968. #endif
  969. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  970. &net2272_bfin_device,
  971. #endif
  972. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  973. &bfin_spi0_device,
  974. #endif
  975. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  976. &bfin_fb_device,
  977. #endif
  978. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  979. &bfin_lq035q1_device,
  980. #endif
  981. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  982. &bfin_fb_adv7393_device,
  983. #endif
  984. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  985. &bfin_uart_device,
  986. #endif
  987. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  988. &bfin_sir_device,
  989. #endif
  990. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  991. &i2c_bfin_twi_device,
  992. #endif
  993. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  994. &bfin_sport0_uart_device,
  995. &bfin_sport1_uart_device,
  996. #endif
  997. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  998. &bfin_pata_device,
  999. #endif
  1000. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1001. &bfin_device_gpiokeys,
  1002. #endif
  1003. &bfin_gpios_device,
  1004. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  1005. &bfin_async_nand_device,
  1006. #endif
  1007. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1008. &stamp_flash_device,
  1009. #endif
  1010. };
  1011. static int __init stamp_init(void)
  1012. {
  1013. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1014. #ifdef CONFIG_I2C_BOARDINFO
  1015. i2c_register_board_info(0, bfin_i2c_board_info,
  1016. ARRAY_SIZE(bfin_i2c_board_info));
  1017. #endif
  1018. bfin_plat_nand_init();
  1019. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1020. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1021. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1022. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  1023. #endif
  1024. return 0;
  1025. }
  1026. arch_initcall(stamp_init);
  1027. void native_machine_restart(char *cmd)
  1028. {
  1029. /* workaround reboot hang when booting from SPI */
  1030. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1031. bfin_gpio_reset_spi0_ssel1();
  1032. }
  1033. /*
  1034. * Currently the MAC address is saved in Flash by U-Boot
  1035. */
  1036. #define FLASH_MAC 0x203f0000
  1037. void bfin_get_ether_addr(char *addr)
  1038. {
  1039. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  1040. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  1041. }
  1042. EXPORT_SYMBOL(bfin_get_ether_addr);