ezkit.c 25 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Based on: arch/blackfin/mach-bf537/boards/stamp.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/physmap.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/i2c.h>
  41. #include <linux/irq.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/usb/sl811.h>
  44. #include <linux/usb/musb.h>
  45. #include <asm/dma.h>
  46. #include <asm/bfin5xx_spi.h>
  47. #include <asm/reboot.h>
  48. #include <asm/nand.h>
  49. #include <asm/portmux.h>
  50. #include <asm/dpmc.h>
  51. #include <linux/spi/ad7877.h>
  52. /*
  53. * Name the Board for the /proc/cpuinfo
  54. */
  55. const char bfin_board_name[] = "ADDS-BF527-EZKIT";
  56. /*
  57. * Driver needs to know address, irq and flag pin.
  58. */
  59. #define ISP1761_BASE 0x203C0000
  60. #define ISP1761_IRQ IRQ_PF7
  61. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  62. static struct resource bfin_isp1761_resources[] = {
  63. [0] = {
  64. .name = "isp1761-regs",
  65. .start = ISP1761_BASE + 0x00000000,
  66. .end = ISP1761_BASE + 0x000fffff,
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [1] = {
  70. .start = ISP1761_IRQ,
  71. .end = ISP1761_IRQ,
  72. .flags = IORESOURCE_IRQ,
  73. },
  74. };
  75. static struct platform_device bfin_isp1761_device = {
  76. .name = "isp1761",
  77. .id = 0,
  78. .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
  79. .resource = bfin_isp1761_resources,
  80. };
  81. static struct platform_device *bfin_isp1761_devices[] = {
  82. &bfin_isp1761_device,
  83. };
  84. int __init bfin_isp1761_init(void)
  85. {
  86. unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
  87. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  88. set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
  89. return platform_add_devices(bfin_isp1761_devices, num_devices);
  90. }
  91. void __exit bfin_isp1761_exit(void)
  92. {
  93. platform_device_unregister(&bfin_isp1761_device);
  94. }
  95. arch_initcall(bfin_isp1761_init);
  96. #endif
  97. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  98. static struct resource musb_resources[] = {
  99. [0] = {
  100. .start = 0xffc03800,
  101. .end = 0xffc03cff,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. [1] = { /* general IRQ */
  105. .start = IRQ_USB_INT0,
  106. .end = IRQ_USB_INT0,
  107. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  108. },
  109. [2] = { /* DMA IRQ */
  110. .start = IRQ_USB_DMA,
  111. .end = IRQ_USB_DMA,
  112. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  113. },
  114. };
  115. static struct musb_hdrc_config musb_config = {
  116. .multipoint = 0,
  117. .dyn_fifo = 0,
  118. .soft_con = 1,
  119. .dma = 1,
  120. .num_eps = 7,
  121. .dma_channels = 7,
  122. .gpio_vrsel = GPIO_PG13,
  123. };
  124. static struct musb_hdrc_platform_data musb_plat = {
  125. #if defined(CONFIG_USB_MUSB_OTG)
  126. .mode = MUSB_OTG,
  127. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  128. .mode = MUSB_HOST,
  129. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  130. .mode = MUSB_PERIPHERAL,
  131. #endif
  132. .config = &musb_config,
  133. };
  134. static u64 musb_dmamask = ~(u32)0;
  135. static struct platform_device musb_device = {
  136. .name = "musb_hdrc",
  137. .id = 0,
  138. .dev = {
  139. .dma_mask = &musb_dmamask,
  140. .coherent_dma_mask = 0xffffffff,
  141. .platform_data = &musb_plat,
  142. },
  143. .num_resources = ARRAY_SIZE(musb_resources),
  144. .resource = musb_resources,
  145. };
  146. #endif
  147. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  148. static struct resource bf52x_t350mcqb_resources[] = {
  149. {
  150. .start = IRQ_PPI_ERROR,
  151. .end = IRQ_PPI_ERROR,
  152. .flags = IORESOURCE_IRQ,
  153. },
  154. };
  155. static struct platform_device bf52x_t350mcqb_device = {
  156. .name = "bfin-t350mcqb",
  157. .id = -1,
  158. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  159. .resource = bf52x_t350mcqb_resources,
  160. };
  161. #endif
  162. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  163. static struct mtd_partition ezkit_partitions[] = {
  164. {
  165. .name = "bootloader(nor)",
  166. .size = 0x40000,
  167. .offset = 0,
  168. }, {
  169. .name = "linux kernel(nor)",
  170. .size = 0x1C0000,
  171. .offset = MTDPART_OFS_APPEND,
  172. }, {
  173. .name = "file system(nor)",
  174. .size = MTDPART_SIZ_FULL,
  175. .offset = MTDPART_OFS_APPEND,
  176. }
  177. };
  178. static struct physmap_flash_data ezkit_flash_data = {
  179. .width = 2,
  180. .parts = ezkit_partitions,
  181. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  182. };
  183. static struct resource ezkit_flash_resource = {
  184. .start = 0x20000000,
  185. .end = 0x203fffff,
  186. .flags = IORESOURCE_MEM,
  187. };
  188. static struct platform_device ezkit_flash_device = {
  189. .name = "physmap-flash",
  190. .id = 0,
  191. .dev = {
  192. .platform_data = &ezkit_flash_data,
  193. },
  194. .num_resources = 1,
  195. .resource = &ezkit_flash_resource,
  196. };
  197. #endif
  198. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  199. static struct mtd_partition partition_info[] = {
  200. {
  201. .name = "linux kernel(nand)",
  202. .offset = 0,
  203. .size = 4 * 1024 * 1024,
  204. },
  205. {
  206. .name = "file system(nand)",
  207. .offset = MTDPART_OFS_APPEND,
  208. .size = MTDPART_SIZ_FULL,
  209. },
  210. };
  211. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  212. .page_size = NFC_PG_SIZE_256,
  213. .data_width = NFC_NWIDTH_8,
  214. .partitions = partition_info,
  215. .nr_partitions = ARRAY_SIZE(partition_info),
  216. .rd_dly = 3,
  217. .wr_dly = 3,
  218. };
  219. static struct resource bf5xx_nand_resources[] = {
  220. {
  221. .start = NFC_CTL,
  222. .end = NFC_DATA_RD + 2,
  223. .flags = IORESOURCE_MEM,
  224. },
  225. {
  226. .start = CH_NFC,
  227. .end = CH_NFC,
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. };
  231. static struct platform_device bf5xx_nand_device = {
  232. .name = "bf5xx-nand",
  233. .id = 0,
  234. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  235. .resource = bf5xx_nand_resources,
  236. .dev = {
  237. .platform_data = &bf5xx_nand_platform,
  238. },
  239. };
  240. #endif
  241. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  242. static struct resource bfin_pcmcia_cf_resources[] = {
  243. {
  244. .start = 0x20310000, /* IO PORT */
  245. .end = 0x20312000,
  246. .flags = IORESOURCE_MEM,
  247. }, {
  248. .start = 0x20311000, /* Attribute Memory */
  249. .end = 0x20311FFF,
  250. .flags = IORESOURCE_MEM,
  251. }, {
  252. .start = IRQ_PF4,
  253. .end = IRQ_PF4,
  254. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  255. }, {
  256. .start = 6, /* Card Detect PF6 */
  257. .end = 6,
  258. .flags = IORESOURCE_IRQ,
  259. },
  260. };
  261. static struct platform_device bfin_pcmcia_cf_device = {
  262. .name = "bfin_cf_pcmcia",
  263. .id = -1,
  264. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  265. .resource = bfin_pcmcia_cf_resources,
  266. };
  267. #endif
  268. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  269. static struct platform_device rtc_device = {
  270. .name = "rtc-bfin",
  271. .id = -1,
  272. };
  273. #endif
  274. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  275. static struct resource smc91x_resources[] = {
  276. {
  277. .name = "smc91x-regs",
  278. .start = 0x20300300,
  279. .end = 0x20300300 + 16,
  280. .flags = IORESOURCE_MEM,
  281. }, {
  282. .start = IRQ_PF7,
  283. .end = IRQ_PF7,
  284. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  285. },
  286. };
  287. static struct platform_device smc91x_device = {
  288. .name = "smc91x",
  289. .id = 0,
  290. .num_resources = ARRAY_SIZE(smc91x_resources),
  291. .resource = smc91x_resources,
  292. };
  293. #endif
  294. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  295. static struct resource dm9000_resources[] = {
  296. [0] = {
  297. .start = 0x203FB800,
  298. .end = 0x203FB800 + 1,
  299. .flags = IORESOURCE_MEM,
  300. },
  301. [1] = {
  302. .start = 0x203FB800 + 4,
  303. .end = 0x203FB800 + 5,
  304. .flags = IORESOURCE_MEM,
  305. },
  306. [2] = {
  307. .start = IRQ_PF9,
  308. .end = IRQ_PF9,
  309. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  310. },
  311. };
  312. static struct platform_device dm9000_device = {
  313. .name = "dm9000",
  314. .id = -1,
  315. .num_resources = ARRAY_SIZE(dm9000_resources),
  316. .resource = dm9000_resources,
  317. };
  318. #endif
  319. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  320. static struct resource sl811_hcd_resources[] = {
  321. {
  322. .start = 0x20340000,
  323. .end = 0x20340000,
  324. .flags = IORESOURCE_MEM,
  325. }, {
  326. .start = 0x20340004,
  327. .end = 0x20340004,
  328. .flags = IORESOURCE_MEM,
  329. }, {
  330. .start = CONFIG_USB_SL811_BFIN_IRQ,
  331. .end = CONFIG_USB_SL811_BFIN_IRQ,
  332. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  333. },
  334. };
  335. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  336. void sl811_port_power(struct device *dev, int is_on)
  337. {
  338. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  339. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  340. }
  341. #endif
  342. static struct sl811_platform_data sl811_priv = {
  343. .potpg = 10,
  344. .power = 250, /* == 500mA */
  345. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  346. .port_power = &sl811_port_power,
  347. #endif
  348. };
  349. static struct platform_device sl811_hcd_device = {
  350. .name = "sl811-hcd",
  351. .id = 0,
  352. .dev = {
  353. .platform_data = &sl811_priv,
  354. },
  355. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  356. .resource = sl811_hcd_resources,
  357. };
  358. #endif
  359. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  360. static struct resource isp1362_hcd_resources[] = {
  361. {
  362. .start = 0x20360000,
  363. .end = 0x20360000,
  364. .flags = IORESOURCE_MEM,
  365. }, {
  366. .start = 0x20360004,
  367. .end = 0x20360004,
  368. .flags = IORESOURCE_MEM,
  369. }, {
  370. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  371. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  372. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  373. },
  374. };
  375. static struct isp1362_platform_data isp1362_priv = {
  376. .sel15Kres = 1,
  377. .clknotstop = 0,
  378. .oc_enable = 0,
  379. .int_act_high = 0,
  380. .int_edge_triggered = 0,
  381. .remote_wakeup_connected = 0,
  382. .no_power_switching = 1,
  383. .power_switching_mode = 0,
  384. };
  385. static struct platform_device isp1362_hcd_device = {
  386. .name = "isp1362-hcd",
  387. .id = 0,
  388. .dev = {
  389. .platform_data = &isp1362_priv,
  390. },
  391. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  392. .resource = isp1362_hcd_resources,
  393. };
  394. #endif
  395. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  396. static struct platform_device bfin_mac_device = {
  397. .name = "bfin_mac",
  398. };
  399. #endif
  400. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  401. static struct resource net2272_bfin_resources[] = {
  402. {
  403. .start = 0x20300000,
  404. .end = 0x20300000 + 0x100,
  405. .flags = IORESOURCE_MEM,
  406. }, {
  407. .start = IRQ_PF7,
  408. .end = IRQ_PF7,
  409. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  410. },
  411. };
  412. static struct platform_device net2272_bfin_device = {
  413. .name = "net2272",
  414. .id = -1,
  415. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  416. .resource = net2272_bfin_resources,
  417. };
  418. #endif
  419. #if defined(CONFIG_MTD_M25P80) \
  420. || defined(CONFIG_MTD_M25P80_MODULE)
  421. static struct mtd_partition bfin_spi_flash_partitions[] = {
  422. {
  423. .name = "bootloader(spi)",
  424. .size = 0x00040000,
  425. .offset = 0,
  426. .mask_flags = MTD_CAP_ROM
  427. }, {
  428. .name = "linux kernel(spi)",
  429. .size = MTDPART_SIZ_FULL,
  430. .offset = MTDPART_OFS_APPEND,
  431. }
  432. };
  433. static struct flash_platform_data bfin_spi_flash_data = {
  434. .name = "m25p80",
  435. .parts = bfin_spi_flash_partitions,
  436. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  437. .type = "m25p16",
  438. };
  439. /* SPI flash chip (m25p64) */
  440. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  441. .enable_dma = 0, /* use dma transfer with this chip*/
  442. .bits_per_word = 8,
  443. };
  444. #endif
  445. #if defined(CONFIG_SPI_ADC_BF533) \
  446. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  447. /* SPI ADC chip */
  448. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  449. .enable_dma = 1, /* use dma transfer with this chip*/
  450. .bits_per_word = 16,
  451. };
  452. #endif
  453. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  454. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  455. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  456. .enable_dma = 0,
  457. .bits_per_word = 16,
  458. };
  459. #endif
  460. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  461. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  462. .enable_dma = 0,
  463. .bits_per_word = 16,
  464. };
  465. #endif
  466. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  467. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  468. .enable_dma = 1,
  469. .bits_per_word = 8,
  470. };
  471. #endif
  472. #if defined(CONFIG_PBX)
  473. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  474. .ctl_reg = 0x4, /* send zero */
  475. .enable_dma = 0,
  476. .bits_per_word = 8,
  477. .cs_change_per_word = 1,
  478. };
  479. #endif
  480. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  481. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  482. .enable_dma = 0,
  483. .bits_per_word = 16,
  484. };
  485. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  486. .model = 7877,
  487. .vref_delay_usecs = 50, /* internal, no capacitor */
  488. .x_plate_ohms = 419,
  489. .y_plate_ohms = 486,
  490. .pressure_max = 1000,
  491. .pressure_min = 0,
  492. .stopacq_polarity = 1,
  493. .first_conversion_delay = 3,
  494. .acquisition_time = 1,
  495. .averaging = 1,
  496. .pen_down_acc_interval = 1,
  497. };
  498. #endif
  499. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  500. && defined(CONFIG_SND_SOC_WM8731_SPI)
  501. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  502. .enable_dma = 0,
  503. .bits_per_word = 16,
  504. };
  505. #endif
  506. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  507. static struct bfin5xx_spi_chip spidev_chip_info = {
  508. .enable_dma = 0,
  509. .bits_per_word = 8,
  510. };
  511. #endif
  512. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  513. #if defined(CONFIG_MTD_M25P80) \
  514. || defined(CONFIG_MTD_M25P80_MODULE)
  515. {
  516. /* the modalias must be the same as spi device driver name */
  517. .modalias = "m25p80", /* Name of spi_driver for this device */
  518. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  519. .bus_num = 0, /* Framework bus number */
  520. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  521. .platform_data = &bfin_spi_flash_data,
  522. .controller_data = &spi_flash_chip_info,
  523. .mode = SPI_MODE_3,
  524. },
  525. #endif
  526. #if defined(CONFIG_SPI_ADC_BF533) \
  527. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  528. {
  529. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  530. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  531. .bus_num = 0, /* Framework bus number */
  532. .chip_select = 1, /* Framework chip select. */
  533. .platform_data = NULL, /* No spi_driver specific config */
  534. .controller_data = &spi_adc_chip_info,
  535. },
  536. #endif
  537. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  538. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  539. {
  540. .modalias = "ad1836-spi",
  541. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  542. .bus_num = 0,
  543. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  544. .controller_data = &ad1836_spi_chip_info,
  545. },
  546. #endif
  547. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  548. {
  549. .modalias = "ad9960-spi",
  550. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  551. .bus_num = 0,
  552. .chip_select = 1,
  553. .controller_data = &ad9960_spi_chip_info,
  554. },
  555. #endif
  556. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  557. {
  558. .modalias = "spi_mmc_dummy",
  559. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  560. .bus_num = 0,
  561. .chip_select = 0,
  562. .platform_data = NULL,
  563. .controller_data = &spi_mmc_chip_info,
  564. .mode = SPI_MODE_3,
  565. },
  566. {
  567. .modalias = "spi_mmc",
  568. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  569. .bus_num = 0,
  570. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  571. .platform_data = NULL,
  572. .controller_data = &spi_mmc_chip_info,
  573. .mode = SPI_MODE_3,
  574. },
  575. #endif
  576. #if defined(CONFIG_PBX)
  577. {
  578. .modalias = "fxs-spi",
  579. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  580. .bus_num = 0,
  581. .chip_select = 8 - CONFIG_J11_JUMPER,
  582. .controller_data = &spi_si3xxx_chip_info,
  583. .mode = SPI_MODE_3,
  584. },
  585. {
  586. .modalias = "fxo-spi",
  587. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  588. .bus_num = 0,
  589. .chip_select = 8 - CONFIG_J19_JUMPER,
  590. .controller_data = &spi_si3xxx_chip_info,
  591. .mode = SPI_MODE_3,
  592. },
  593. #endif
  594. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  595. {
  596. .modalias = "ad7877",
  597. .platform_data = &bfin_ad7877_ts_info,
  598. .irq = IRQ_PF8,
  599. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  600. .bus_num = 0,
  601. .chip_select = 2,
  602. .controller_data = &spi_ad7877_chip_info,
  603. },
  604. #endif
  605. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  606. && defined(CONFIG_SND_SOC_WM8731_SPI)
  607. {
  608. .modalias = "wm8731",
  609. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  610. .bus_num = 0,
  611. .chip_select = 5,
  612. .controller_data = &spi_wm8731_chip_info,
  613. .mode = SPI_MODE_0,
  614. },
  615. #endif
  616. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  617. {
  618. .modalias = "spidev",
  619. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  620. .bus_num = 0,
  621. .chip_select = 1,
  622. .controller_data = &spidev_chip_info,
  623. },
  624. #endif
  625. };
  626. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  627. /* SPI controller data */
  628. static struct bfin5xx_spi_master bfin_spi0_info = {
  629. .num_chipselect = 8,
  630. .enable_dma = 1, /* master has the ability to do dma transfer */
  631. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  632. };
  633. /* SPI (0) */
  634. static struct resource bfin_spi0_resource[] = {
  635. [0] = {
  636. .start = SPI0_REGBASE,
  637. .end = SPI0_REGBASE + 0xFF,
  638. .flags = IORESOURCE_MEM,
  639. },
  640. [1] = {
  641. .start = CH_SPI,
  642. .end = CH_SPI,
  643. .flags = IORESOURCE_IRQ,
  644. },
  645. };
  646. static struct platform_device bfin_spi0_device = {
  647. .name = "bfin-spi",
  648. .id = 0, /* Bus number */
  649. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  650. .resource = bfin_spi0_resource,
  651. .dev = {
  652. .platform_data = &bfin_spi0_info, /* Passed to driver */
  653. },
  654. };
  655. #endif /* spi master and devices */
  656. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  657. static struct platform_device bfin_fb_device = {
  658. .name = "bf537-lq035",
  659. };
  660. #endif
  661. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  662. static struct platform_device bfin_fb_adv7393_device = {
  663. .name = "bfin-adv7393",
  664. };
  665. #endif
  666. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  667. static struct resource bfin_uart_resources[] = {
  668. #ifdef CONFIG_SERIAL_BFIN_UART0
  669. {
  670. .start = 0xFFC00400,
  671. .end = 0xFFC004FF,
  672. .flags = IORESOURCE_MEM,
  673. },
  674. #endif
  675. #ifdef CONFIG_SERIAL_BFIN_UART1
  676. {
  677. .start = 0xFFC02000,
  678. .end = 0xFFC020FF,
  679. .flags = IORESOURCE_MEM,
  680. },
  681. #endif
  682. };
  683. static struct platform_device bfin_uart_device = {
  684. .name = "bfin-uart",
  685. .id = 1,
  686. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  687. .resource = bfin_uart_resources,
  688. };
  689. #endif
  690. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  691. static struct resource bfin_sir_resources[] = {
  692. #ifdef CONFIG_BFIN_SIR0
  693. {
  694. .start = 0xFFC00400,
  695. .end = 0xFFC004FF,
  696. .flags = IORESOURCE_MEM,
  697. },
  698. #endif
  699. #ifdef CONFIG_BFIN_SIR1
  700. {
  701. .start = 0xFFC02000,
  702. .end = 0xFFC020FF,
  703. .flags = IORESOURCE_MEM,
  704. },
  705. #endif
  706. };
  707. static struct platform_device bfin_sir_device = {
  708. .name = "bfin_sir",
  709. .id = 0,
  710. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  711. .resource = bfin_sir_resources,
  712. };
  713. #endif
  714. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  715. static struct resource bfin_twi0_resource[] = {
  716. [0] = {
  717. .start = TWI0_REGBASE,
  718. .end = TWI0_REGBASE,
  719. .flags = IORESOURCE_MEM,
  720. },
  721. [1] = {
  722. .start = IRQ_TWI,
  723. .end = IRQ_TWI,
  724. .flags = IORESOURCE_IRQ,
  725. },
  726. };
  727. static struct platform_device i2c_bfin_twi_device = {
  728. .name = "i2c-bfin-twi",
  729. .id = 0,
  730. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  731. .resource = bfin_twi0_resource,
  732. };
  733. #endif
  734. #ifdef CONFIG_I2C_BOARDINFO
  735. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  736. #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
  737. {
  738. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  739. },
  740. #endif
  741. #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
  742. {
  743. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  744. .irq = IRQ_PF8,
  745. },
  746. #endif
  747. };
  748. #endif
  749. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  750. static struct platform_device bfin_sport0_uart_device = {
  751. .name = "bfin-sport-uart",
  752. .id = 0,
  753. };
  754. static struct platform_device bfin_sport1_uart_device = {
  755. .name = "bfin-sport-uart",
  756. .id = 1,
  757. };
  758. #endif
  759. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  760. #include <linux/input.h>
  761. #include <linux/gpio_keys.h>
  762. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  763. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  764. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  765. };
  766. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  767. .buttons = bfin_gpio_keys_table,
  768. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  769. };
  770. static struct platform_device bfin_device_gpiokeys = {
  771. .name = "gpio-keys",
  772. .dev = {
  773. .platform_data = &bfin_gpio_keys_data,
  774. },
  775. };
  776. #endif
  777. #if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
  778. #include <linux/input.h>
  779. #include <asm/bfin_rotary.h>
  780. static struct bfin_rotary_platform_data bfin_rotary_data = {
  781. /*.rotary_up_key = KEY_UP,*/
  782. /*.rotary_down_key = KEY_DOWN,*/
  783. .rotary_rel_code = REL_WHEEL,
  784. .rotary_button_key = KEY_ENTER,
  785. .debounce = 10, /* 0..17 */
  786. .mode = ROT_QUAD_ENC | ROT_DEBE,
  787. };
  788. static struct resource bfin_rotary_resources[] = {
  789. {
  790. .start = IRQ_CNT,
  791. .end = IRQ_CNT,
  792. .flags = IORESOURCE_IRQ,
  793. },
  794. };
  795. static struct platform_device bfin_rotary_device = {
  796. .name = "bfin-rotary",
  797. .id = -1,
  798. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  799. .resource = bfin_rotary_resources,
  800. .dev = {
  801. .platform_data = &bfin_rotary_data,
  802. },
  803. };
  804. #endif
  805. static struct resource bfin_gpios_resources = {
  806. .start = 0,
  807. .end = MAX_BLACKFIN_GPIOS - 1,
  808. .flags = IORESOURCE_IRQ,
  809. };
  810. static struct platform_device bfin_gpios_device = {
  811. .name = "simple-gpio",
  812. .id = -1,
  813. .num_resources = 1,
  814. .resource = &bfin_gpios_resources,
  815. };
  816. static const unsigned int cclk_vlev_datasheet[] =
  817. {
  818. VRPAIR(VLEV_100, 400000000),
  819. VRPAIR(VLEV_105, 426000000),
  820. VRPAIR(VLEV_110, 500000000),
  821. VRPAIR(VLEV_115, 533000000),
  822. VRPAIR(VLEV_120, 600000000),
  823. };
  824. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  825. .tuple_tab = cclk_vlev_datasheet,
  826. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  827. .vr_settling_time = 25 /* us */,
  828. };
  829. static struct platform_device bfin_dpmc = {
  830. .name = "bfin dpmc",
  831. .dev = {
  832. .platform_data = &bfin_dmpc_vreg_data,
  833. },
  834. };
  835. static struct platform_device *stamp_devices[] __initdata = {
  836. &bfin_dpmc,
  837. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  838. &bf5xx_nand_device,
  839. #endif
  840. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  841. &bfin_pcmcia_cf_device,
  842. #endif
  843. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  844. &rtc_device,
  845. #endif
  846. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  847. &sl811_hcd_device,
  848. #endif
  849. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  850. &isp1362_hcd_device,
  851. #endif
  852. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  853. &musb_device,
  854. #endif
  855. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  856. &smc91x_device,
  857. #endif
  858. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  859. &dm9000_device,
  860. #endif
  861. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  862. &bfin_mac_device,
  863. #endif
  864. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  865. &net2272_bfin_device,
  866. #endif
  867. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  868. &bfin_spi0_device,
  869. #endif
  870. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  871. &bfin_fb_device,
  872. #endif
  873. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  874. &bf52x_t350mcqb_device,
  875. #endif
  876. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  877. &bfin_fb_adv7393_device,
  878. #endif
  879. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  880. &bfin_uart_device,
  881. #endif
  882. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  883. &bfin_sir_device,
  884. #endif
  885. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  886. &i2c_bfin_twi_device,
  887. #endif
  888. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  889. &bfin_sport0_uart_device,
  890. &bfin_sport1_uart_device,
  891. #endif
  892. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  893. &bfin_device_gpiokeys,
  894. #endif
  895. #if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE)
  896. &bfin_rotary_device,
  897. #endif
  898. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  899. &ezkit_flash_device,
  900. #endif
  901. &bfin_gpios_device,
  902. };
  903. static int __init stamp_init(void)
  904. {
  905. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  906. #ifdef CONFIG_I2C_BOARDINFO
  907. i2c_register_board_info(0, bfin_i2c_board_info,
  908. ARRAY_SIZE(bfin_i2c_board_info));
  909. #endif
  910. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  911. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  912. return 0;
  913. }
  914. arch_initcall(stamp_init);
  915. void native_machine_restart(char *cmd)
  916. {
  917. /* workaround reboot hang when booting from SPI */
  918. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  919. bfin_gpio_reset_spi0_ssel1();
  920. }
  921. void bfin_get_ether_addr(char *addr)
  922. {
  923. /* the MAC is stored in OTP memory page 0xDF */
  924. u32 ret;
  925. u64 otp_mac;
  926. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  927. ret = otp_read(0xDF, 0x00, &otp_mac);
  928. if (!(ret & 0x1)) {
  929. char *otp_mac_p = (char *)&otp_mac;
  930. for (ret = 0; ret < 6; ++ret)
  931. addr[ret] = otp_mac_p[5 - ret];
  932. }
  933. }
  934. EXPORT_SYMBOL(bfin_get_ether_addr);