ssi.txt 3.0 KB

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  1. Freescale Synchronous Serial Interface
  2. The SSI is a serial device that communicates with audio codecs. It can
  3. be programmed in AC97, I2S, left-justified, or right-justified modes.
  4. Required properties:
  5. - compatible : compatible list, containing "fsl,ssi"
  6. - cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
  7. - reg : offset and length of the register set for the device
  8. - interrupts : <a b> where a is the interrupt number and b is a
  9. field that represents an encoding of the sense and
  10. level information for the interrupt. This should be
  11. encoded based on the information in section 2)
  12. depending on the type of interrupt controller you
  13. have.
  14. - interrupt-parent : the phandle for the interrupt controller that
  15. services interrupts for this device.
  16. - fsl,mode : the operating mode for the SSI interface
  17. "i2s-slave" - I2S mode, SSI is clock slave
  18. "i2s-master" - I2S mode, SSI is clock master
  19. "lj-slave" - left-justified mode, SSI is clock slave
  20. "lj-master" - l.j. mode, SSI is clock master
  21. "rj-slave" - right-justified mode, SSI is clock slave
  22. "rj-master" - r.j., SSI is clock master
  23. "ac97-slave" - AC97 mode, SSI is clock slave
  24. "ac97-master" - AC97 mode, SSI is clock master
  25. - fsl,playback-dma: phandle to a node for the DMA channel to use for
  26. playback of audio. This is typically dictated by SOC
  27. design. See the notes below.
  28. - fsl,capture-dma: phandle to a node for the DMA channel to use for
  29. capture (recording) of audio. This is typically dictated
  30. by SOC design. See the notes below.
  31. Optional properties:
  32. - codec-handle : phandle to a 'codec' node that defines an audio
  33. codec connected to this SSI. This node is typically
  34. a child of an I2C or other control node.
  35. Child 'codec' node required properties:
  36. - compatible : compatible list, contains the name of the codec
  37. Child 'codec' node optional properties:
  38. - clock-frequency : The frequency of the input clock, which typically
  39. comes from an on-board dedicated oscillator.
  40. Notes on fsl,playback-dma and fsl,capture-dma:
  41. On SOCs that have an SSI, specific DMA channels are hard-wired for playback
  42. and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
  43. playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
  44. playback and DMA channel 3 for capture. The developer can choose which
  45. DMA controller to use, but the channels themselves are hard-wired. The
  46. purpose of these two properties is to represent this hardware design.
  47. The device tree nodes for the DMA channels that are referenced by
  48. "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
  49. "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
  50. "fsl,mpc8610-dma-channel") can remain. If these nodes are left as
  51. "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
  52. drivers (fsldma) will attempt to use them, and it will conflict with the
  53. sound drivers.