time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/kernel_stat.h>
  17. #include <linux/errno.h>
  18. #include <linux/module.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/param.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/cpu.h>
  26. #include <linux/stop_machine.h>
  27. #include <linux/time.h>
  28. #include <linux/sysdev.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/smp.h>
  32. #include <linux/types.h>
  33. #include <linux/profile.h>
  34. #include <linux/timex.h>
  35. #include <linux/notifier.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/gfp.h>
  39. #include <linux/kprobes.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/delay.h>
  42. #include <asm/div64.h>
  43. #include <asm/vdso.h>
  44. #include <asm/irq.h>
  45. #include <asm/irq_regs.h>
  46. #include <asm/timer.h>
  47. #include <asm/etr.h>
  48. #include <asm/cio.h>
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return (get_clock_monotonic() * 125) >> 9;
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. set_clock_comparator(S390_lowcore.clock_comparator);
  85. cd = &__get_cpu_var(comparators);
  86. cd->event_handler(cd);
  87. }
  88. /*
  89. * Fixup the clock comparator.
  90. */
  91. static void fixup_clock_comparator(unsigned long long delta)
  92. {
  93. /* If nobody is waiting there's nothing to fix. */
  94. if (S390_lowcore.clock_comparator == -1ULL)
  95. return;
  96. S390_lowcore.clock_comparator += delta;
  97. set_clock_comparator(S390_lowcore.clock_comparator);
  98. }
  99. static int s390_next_ktime(ktime_t expires,
  100. struct clock_event_device *evt)
  101. {
  102. u64 nsecs;
  103. nsecs = ktime_to_ns(ktime_sub(expires, ktime_get_monotonic_offset()));
  104. do_div(nsecs, 125);
  105. S390_lowcore.clock_comparator = TOD_UNIX_EPOCH + (nsecs << 9);
  106. set_clock_comparator(S390_lowcore.clock_comparator);
  107. return 0;
  108. }
  109. static void s390_set_mode(enum clock_event_mode mode,
  110. struct clock_event_device *evt)
  111. {
  112. }
  113. /*
  114. * Set up lowcore and control register of the current cpu to
  115. * enable TOD clock and clock comparator interrupts.
  116. */
  117. void init_cpu_timer(void)
  118. {
  119. struct clock_event_device *cd;
  120. int cpu;
  121. S390_lowcore.clock_comparator = -1ULL;
  122. set_clock_comparator(S390_lowcore.clock_comparator);
  123. cpu = smp_processor_id();
  124. cd = &per_cpu(comparators, cpu);
  125. cd->name = "comparator";
  126. cd->features = CLOCK_EVT_FEAT_ONESHOT |
  127. CLOCK_EVT_FEAT_KTIME;
  128. cd->mult = 16777;
  129. cd->shift = 12;
  130. cd->min_delta_ns = 1;
  131. cd->max_delta_ns = LONG_MAX;
  132. cd->rating = 400;
  133. cd->cpumask = cpumask_of(cpu);
  134. cd->set_next_ktime = s390_next_ktime;
  135. cd->set_mode = s390_set_mode;
  136. clockevents_register_device(cd);
  137. /* Enable clock comparator timer interrupt. */
  138. __ctl_set_bit(0,11);
  139. /* Always allow the timing alert external interrupt. */
  140. __ctl_set_bit(0, 4);
  141. }
  142. static void clock_comparator_interrupt(unsigned int ext_int_code,
  143. unsigned int param32,
  144. unsigned long param64)
  145. {
  146. kstat_cpu(smp_processor_id()).irqs[EXTINT_CLK]++;
  147. if (S390_lowcore.clock_comparator == -1ULL)
  148. set_clock_comparator(S390_lowcore.clock_comparator);
  149. }
  150. static void etr_timing_alert(struct etr_irq_parm *);
  151. static void stp_timing_alert(struct stp_irq_parm *);
  152. static void timing_alert_interrupt(unsigned int ext_int_code,
  153. unsigned int param32, unsigned long param64)
  154. {
  155. kstat_cpu(smp_processor_id()).irqs[EXTINT_TLA]++;
  156. if (param32 & 0x00c40000)
  157. etr_timing_alert((struct etr_irq_parm *) &param32);
  158. if (param32 & 0x00038000)
  159. stp_timing_alert((struct stp_irq_parm *) &param32);
  160. }
  161. static void etr_reset(void);
  162. static void stp_reset(void);
  163. void read_persistent_clock(struct timespec *ts)
  164. {
  165. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  166. }
  167. void read_boot_clock(struct timespec *ts)
  168. {
  169. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  170. }
  171. static cycle_t read_tod_clock(struct clocksource *cs)
  172. {
  173. return get_clock();
  174. }
  175. static struct clocksource clocksource_tod = {
  176. .name = "tod",
  177. .rating = 400,
  178. .read = read_tod_clock,
  179. .mask = -1ULL,
  180. .mult = 1000,
  181. .shift = 12,
  182. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  183. };
  184. struct clocksource * __init clocksource_default_clock(void)
  185. {
  186. return &clocksource_tod;
  187. }
  188. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  189. struct clocksource *clock, u32 mult)
  190. {
  191. if (clock != &clocksource_tod)
  192. return;
  193. /* Make userspace gettimeofday spin until we're done. */
  194. ++vdso_data->tb_update_count;
  195. smp_wmb();
  196. vdso_data->xtime_tod_stamp = clock->cycle_last;
  197. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  198. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  199. vdso_data->wtom_clock_sec = wtm->tv_sec;
  200. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  201. vdso_data->ntp_mult = mult;
  202. smp_wmb();
  203. ++vdso_data->tb_update_count;
  204. }
  205. extern struct timezone sys_tz;
  206. void update_vsyscall_tz(void)
  207. {
  208. /* Make userspace gettimeofday spin until we're done. */
  209. ++vdso_data->tb_update_count;
  210. smp_wmb();
  211. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  212. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  213. smp_wmb();
  214. ++vdso_data->tb_update_count;
  215. }
  216. /*
  217. * Initialize the TOD clock and the CPU timer of
  218. * the boot cpu.
  219. */
  220. void __init time_init(void)
  221. {
  222. /* Reset time synchronization interfaces. */
  223. etr_reset();
  224. stp_reset();
  225. /* request the clock comparator external interrupt */
  226. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  227. panic("Couldn't request external interrupt 0x1004");
  228. /* request the timing alert external interrupt */
  229. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  230. panic("Couldn't request external interrupt 0x1406");
  231. if (clocksource_register(&clocksource_tod) != 0)
  232. panic("Could not register TOD clock source");
  233. /* Enable TOD clock interrupts on the boot cpu. */
  234. init_cpu_timer();
  235. /* Enable cpu timer interrupts on the boot cpu. */
  236. vtime_init();
  237. }
  238. /*
  239. * The time is "clock". old is what we think the time is.
  240. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  241. * "delay" is an approximation how long the synchronization took. If
  242. * the time correction is positive, then "delay" is subtracted from
  243. * the time difference and only the remaining part is passed to ntp.
  244. */
  245. static unsigned long long adjust_time(unsigned long long old,
  246. unsigned long long clock,
  247. unsigned long long delay)
  248. {
  249. unsigned long long delta, ticks;
  250. struct timex adjust;
  251. if (clock > old) {
  252. /* It is later than we thought. */
  253. delta = ticks = clock - old;
  254. delta = ticks = (delta < delay) ? 0 : delta - delay;
  255. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  256. adjust.offset = ticks * (1000000 / HZ);
  257. } else {
  258. /* It is earlier than we thought. */
  259. delta = ticks = old - clock;
  260. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  261. delta = -delta;
  262. adjust.offset = -ticks * (1000000 / HZ);
  263. }
  264. sched_clock_base_cc += delta;
  265. if (adjust.offset != 0) {
  266. pr_notice("The ETR interface has adjusted the clock "
  267. "by %li microseconds\n", adjust.offset);
  268. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  269. do_adjtimex(&adjust);
  270. }
  271. return delta;
  272. }
  273. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  274. static DEFINE_MUTEX(clock_sync_mutex);
  275. static unsigned long clock_sync_flags;
  276. #define CLOCK_SYNC_HAS_ETR 0
  277. #define CLOCK_SYNC_HAS_STP 1
  278. #define CLOCK_SYNC_ETR 2
  279. #define CLOCK_SYNC_STP 3
  280. /*
  281. * The synchronous get_clock function. It will write the current clock
  282. * value to the clock pointer and return 0 if the clock is in sync with
  283. * the external time source. If the clock mode is local it will return
  284. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  285. * reference.
  286. */
  287. int get_sync_clock(unsigned long long *clock)
  288. {
  289. atomic_t *sw_ptr;
  290. unsigned int sw0, sw1;
  291. sw_ptr = &get_cpu_var(clock_sync_word);
  292. sw0 = atomic_read(sw_ptr);
  293. *clock = get_clock();
  294. sw1 = atomic_read(sw_ptr);
  295. put_cpu_var(clock_sync_word);
  296. if (sw0 == sw1 && (sw0 & 0x80000000U))
  297. /* Success: time is in sync. */
  298. return 0;
  299. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  300. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  301. return -ENOSYS;
  302. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  303. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  304. return -EACCES;
  305. return -EAGAIN;
  306. }
  307. EXPORT_SYMBOL(get_sync_clock);
  308. /*
  309. * Make get_sync_clock return -EAGAIN.
  310. */
  311. static void disable_sync_clock(void *dummy)
  312. {
  313. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  314. /*
  315. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  316. * fail until the sync bit is turned back on. In addition
  317. * increase the "sequence" counter to avoid the race of an
  318. * etr event and the complete recovery against get_sync_clock.
  319. */
  320. atomic_clear_mask(0x80000000, sw_ptr);
  321. atomic_inc(sw_ptr);
  322. }
  323. /*
  324. * Make get_sync_clock return 0 again.
  325. * Needs to be called from a context disabled for preemption.
  326. */
  327. static void enable_sync_clock(void)
  328. {
  329. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  330. atomic_set_mask(0x80000000, sw_ptr);
  331. }
  332. /*
  333. * Function to check if the clock is in sync.
  334. */
  335. static inline int check_sync_clock(void)
  336. {
  337. atomic_t *sw_ptr;
  338. int rc;
  339. sw_ptr = &get_cpu_var(clock_sync_word);
  340. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  341. put_cpu_var(clock_sync_word);
  342. return rc;
  343. }
  344. /* Single threaded workqueue used for etr and stp sync events */
  345. static struct workqueue_struct *time_sync_wq;
  346. static void __init time_init_wq(void)
  347. {
  348. if (time_sync_wq)
  349. return;
  350. time_sync_wq = create_singlethread_workqueue("timesync");
  351. }
  352. /*
  353. * External Time Reference (ETR) code.
  354. */
  355. static int etr_port0_online;
  356. static int etr_port1_online;
  357. static int etr_steai_available;
  358. static int __init early_parse_etr(char *p)
  359. {
  360. if (strncmp(p, "off", 3) == 0)
  361. etr_port0_online = etr_port1_online = 0;
  362. else if (strncmp(p, "port0", 5) == 0)
  363. etr_port0_online = 1;
  364. else if (strncmp(p, "port1", 5) == 0)
  365. etr_port1_online = 1;
  366. else if (strncmp(p, "on", 2) == 0)
  367. etr_port0_online = etr_port1_online = 1;
  368. return 0;
  369. }
  370. early_param("etr", early_parse_etr);
  371. enum etr_event {
  372. ETR_EVENT_PORT0_CHANGE,
  373. ETR_EVENT_PORT1_CHANGE,
  374. ETR_EVENT_PORT_ALERT,
  375. ETR_EVENT_SYNC_CHECK,
  376. ETR_EVENT_SWITCH_LOCAL,
  377. ETR_EVENT_UPDATE,
  378. };
  379. /*
  380. * Valid bit combinations of the eacr register are (x = don't care):
  381. * e0 e1 dp p0 p1 ea es sl
  382. * 0 0 x 0 0 0 0 0 initial, disabled state
  383. * 0 0 x 0 1 1 0 0 port 1 online
  384. * 0 0 x 1 0 1 0 0 port 0 online
  385. * 0 0 x 1 1 1 0 0 both ports online
  386. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  387. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  388. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  389. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  390. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  391. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  392. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  393. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  394. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  395. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  396. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  397. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  398. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  399. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  400. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  401. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  402. */
  403. static struct etr_eacr etr_eacr;
  404. static u64 etr_tolec; /* time of last eacr update */
  405. static struct etr_aib etr_port0;
  406. static int etr_port0_uptodate;
  407. static struct etr_aib etr_port1;
  408. static int etr_port1_uptodate;
  409. static unsigned long etr_events;
  410. static struct timer_list etr_timer;
  411. static void etr_timeout(unsigned long dummy);
  412. static void etr_work_fn(struct work_struct *work);
  413. static DEFINE_MUTEX(etr_work_mutex);
  414. static DECLARE_WORK(etr_work, etr_work_fn);
  415. /*
  416. * Reset ETR attachment.
  417. */
  418. static void etr_reset(void)
  419. {
  420. etr_eacr = (struct etr_eacr) {
  421. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  422. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  423. .es = 0, .sl = 0 };
  424. if (etr_setr(&etr_eacr) == 0) {
  425. etr_tolec = get_clock();
  426. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  427. if (etr_port0_online && etr_port1_online)
  428. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  429. } else if (etr_port0_online || etr_port1_online) {
  430. pr_warning("The real or virtual hardware system does "
  431. "not provide an ETR interface\n");
  432. etr_port0_online = etr_port1_online = 0;
  433. }
  434. }
  435. static int __init etr_init(void)
  436. {
  437. struct etr_aib aib;
  438. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  439. return 0;
  440. time_init_wq();
  441. /* Check if this machine has the steai instruction. */
  442. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  443. etr_steai_available = 1;
  444. setup_timer(&etr_timer, etr_timeout, 0UL);
  445. if (etr_port0_online) {
  446. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  447. queue_work(time_sync_wq, &etr_work);
  448. }
  449. if (etr_port1_online) {
  450. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  451. queue_work(time_sync_wq, &etr_work);
  452. }
  453. return 0;
  454. }
  455. arch_initcall(etr_init);
  456. /*
  457. * Two sorts of ETR machine checks. The architecture reads:
  458. * "When a machine-check niterruption occurs and if a switch-to-local or
  459. * ETR-sync-check interrupt request is pending but disabled, this pending
  460. * disabled interruption request is indicated and is cleared".
  461. * Which means that we can get etr_switch_to_local events from the machine
  462. * check handler although the interruption condition is disabled. Lovely..
  463. */
  464. /*
  465. * Switch to local machine check. This is called when the last usable
  466. * ETR port goes inactive. After switch to local the clock is not in sync.
  467. */
  468. void etr_switch_to_local(void)
  469. {
  470. if (!etr_eacr.sl)
  471. return;
  472. disable_sync_clock(NULL);
  473. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  474. etr_eacr.es = etr_eacr.sl = 0;
  475. etr_setr(&etr_eacr);
  476. queue_work(time_sync_wq, &etr_work);
  477. }
  478. }
  479. /*
  480. * ETR sync check machine check. This is called when the ETR OTE and the
  481. * local clock OTE are farther apart than the ETR sync check tolerance.
  482. * After a ETR sync check the clock is not in sync. The machine check
  483. * is broadcasted to all cpus at the same time.
  484. */
  485. void etr_sync_check(void)
  486. {
  487. if (!etr_eacr.es)
  488. return;
  489. disable_sync_clock(NULL);
  490. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  491. etr_eacr.es = 0;
  492. etr_setr(&etr_eacr);
  493. queue_work(time_sync_wq, &etr_work);
  494. }
  495. }
  496. /*
  497. * ETR timing alert. There are two causes:
  498. * 1) port state change, check the usability of the port
  499. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  500. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  501. * or ETR-data word 4 (edf4) has changed.
  502. */
  503. static void etr_timing_alert(struct etr_irq_parm *intparm)
  504. {
  505. if (intparm->pc0)
  506. /* ETR port 0 state change. */
  507. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  508. if (intparm->pc1)
  509. /* ETR port 1 state change. */
  510. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  511. if (intparm->eai)
  512. /*
  513. * ETR port alert on either port 0, 1 or both.
  514. * Both ports are not up-to-date now.
  515. */
  516. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  517. queue_work(time_sync_wq, &etr_work);
  518. }
  519. static void etr_timeout(unsigned long dummy)
  520. {
  521. set_bit(ETR_EVENT_UPDATE, &etr_events);
  522. queue_work(time_sync_wq, &etr_work);
  523. }
  524. /*
  525. * Check if the etr mode is pss.
  526. */
  527. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  528. {
  529. return eacr.es && !eacr.sl;
  530. }
  531. /*
  532. * Check if the etr mode is etr.
  533. */
  534. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  535. {
  536. return eacr.es && eacr.sl;
  537. }
  538. /*
  539. * Check if the port can be used for TOD synchronization.
  540. * For PPS mode the port has to receive OTEs. For ETR mode
  541. * the port has to receive OTEs, the ETR stepping bit has to
  542. * be zero and the validity bits for data frame 1, 2, and 3
  543. * have to be 1.
  544. */
  545. static int etr_port_valid(struct etr_aib *aib, int port)
  546. {
  547. unsigned int psc;
  548. /* Check that this port is receiving OTEs. */
  549. if (aib->tsp == 0)
  550. return 0;
  551. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  552. if (psc == etr_lpsc_pps_mode)
  553. return 1;
  554. if (psc == etr_lpsc_operational_step)
  555. return !aib->esw.y && aib->slsw.v1 &&
  556. aib->slsw.v2 && aib->slsw.v3;
  557. return 0;
  558. }
  559. /*
  560. * Check if two ports are on the same network.
  561. */
  562. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  563. {
  564. // FIXME: any other fields we have to compare?
  565. return aib1->edf1.net_id == aib2->edf1.net_id;
  566. }
  567. /*
  568. * Wrapper for etr_stei that converts physical port states
  569. * to logical port states to be consistent with the output
  570. * of stetr (see etr_psc vs. etr_lpsc).
  571. */
  572. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  573. {
  574. BUG_ON(etr_steai(aib, func) != 0);
  575. /* Convert port state to logical port state. */
  576. if (aib->esw.psc0 == 1)
  577. aib->esw.psc0 = 2;
  578. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  579. aib->esw.psc0 = 1;
  580. if (aib->esw.psc1 == 1)
  581. aib->esw.psc1 = 2;
  582. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  583. aib->esw.psc1 = 1;
  584. }
  585. /*
  586. * Check if the aib a2 is still connected to the same attachment as
  587. * aib a1, the etv values differ by one and a2 is valid.
  588. */
  589. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  590. {
  591. int state_a1, state_a2;
  592. /* Paranoia check: e0/e1 should better be the same. */
  593. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  594. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  595. return 0;
  596. /* Still connected to the same etr ? */
  597. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  598. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  599. if (state_a1 == etr_lpsc_operational_step) {
  600. if (state_a2 != etr_lpsc_operational_step ||
  601. a1->edf1.net_id != a2->edf1.net_id ||
  602. a1->edf1.etr_id != a2->edf1.etr_id ||
  603. a1->edf1.etr_pn != a2->edf1.etr_pn)
  604. return 0;
  605. } else if (state_a2 != etr_lpsc_pps_mode)
  606. return 0;
  607. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  608. if (a1->edf2.etv + 1 != a2->edf2.etv)
  609. return 0;
  610. if (!etr_port_valid(a2, p))
  611. return 0;
  612. return 1;
  613. }
  614. struct clock_sync_data {
  615. atomic_t cpus;
  616. int in_sync;
  617. unsigned long long fixup_cc;
  618. int etr_port;
  619. struct etr_aib *etr_aib;
  620. };
  621. static void clock_sync_cpu(struct clock_sync_data *sync)
  622. {
  623. atomic_dec(&sync->cpus);
  624. enable_sync_clock();
  625. /*
  626. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  627. * is called on all other cpus while the TOD clocks is stopped.
  628. * __udelay will stop the cpu on an enabled wait psw until the
  629. * TOD is running again.
  630. */
  631. while (sync->in_sync == 0) {
  632. __udelay(1);
  633. /*
  634. * A different cpu changes *in_sync. Therefore use
  635. * barrier() to force memory access.
  636. */
  637. barrier();
  638. }
  639. if (sync->in_sync != 1)
  640. /* Didn't work. Clear per-cpu in sync bit again. */
  641. disable_sync_clock(NULL);
  642. /*
  643. * This round of TOD syncing is done. Set the clock comparator
  644. * to the next tick and let the processor continue.
  645. */
  646. fixup_clock_comparator(sync->fixup_cc);
  647. }
  648. /*
  649. * Sync the TOD clock using the port referred to by aibp. This port
  650. * has to be enabled and the other port has to be disabled. The
  651. * last eacr update has to be more than 1.6 seconds in the past.
  652. */
  653. static int etr_sync_clock(void *data)
  654. {
  655. static int first;
  656. unsigned long long clock, old_clock, delay, delta;
  657. struct clock_sync_data *etr_sync;
  658. struct etr_aib *sync_port, *aib;
  659. int port;
  660. int rc;
  661. etr_sync = data;
  662. if (xchg(&first, 1) == 1) {
  663. /* Slave */
  664. clock_sync_cpu(etr_sync);
  665. return 0;
  666. }
  667. /* Wait until all other cpus entered the sync function. */
  668. while (atomic_read(&etr_sync->cpus) != 0)
  669. cpu_relax();
  670. port = etr_sync->etr_port;
  671. aib = etr_sync->etr_aib;
  672. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  673. enable_sync_clock();
  674. /* Set clock to next OTE. */
  675. __ctl_set_bit(14, 21);
  676. __ctl_set_bit(0, 29);
  677. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  678. old_clock = get_clock();
  679. if (set_clock(clock) == 0) {
  680. __udelay(1); /* Wait for the clock to start. */
  681. __ctl_clear_bit(0, 29);
  682. __ctl_clear_bit(14, 21);
  683. etr_stetr(aib);
  684. /* Adjust Linux timing variables. */
  685. delay = (unsigned long long)
  686. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  687. delta = adjust_time(old_clock, clock, delay);
  688. etr_sync->fixup_cc = delta;
  689. fixup_clock_comparator(delta);
  690. /* Verify that the clock is properly set. */
  691. if (!etr_aib_follows(sync_port, aib, port)) {
  692. /* Didn't work. */
  693. disable_sync_clock(NULL);
  694. etr_sync->in_sync = -EAGAIN;
  695. rc = -EAGAIN;
  696. } else {
  697. etr_sync->in_sync = 1;
  698. rc = 0;
  699. }
  700. } else {
  701. /* Could not set the clock ?!? */
  702. __ctl_clear_bit(0, 29);
  703. __ctl_clear_bit(14, 21);
  704. disable_sync_clock(NULL);
  705. etr_sync->in_sync = -EAGAIN;
  706. rc = -EAGAIN;
  707. }
  708. xchg(&first, 0);
  709. return rc;
  710. }
  711. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  712. {
  713. struct clock_sync_data etr_sync;
  714. struct etr_aib *sync_port;
  715. int follows;
  716. int rc;
  717. /* Check if the current aib is adjacent to the sync port aib. */
  718. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  719. follows = etr_aib_follows(sync_port, aib, port);
  720. memcpy(sync_port, aib, sizeof(*aib));
  721. if (!follows)
  722. return -EAGAIN;
  723. memset(&etr_sync, 0, sizeof(etr_sync));
  724. etr_sync.etr_aib = aib;
  725. etr_sync.etr_port = port;
  726. get_online_cpus();
  727. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  728. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  729. put_online_cpus();
  730. return rc;
  731. }
  732. /*
  733. * Handle the immediate effects of the different events.
  734. * The port change event is used for online/offline changes.
  735. */
  736. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  737. {
  738. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  739. eacr.es = 0;
  740. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  741. eacr.es = eacr.sl = 0;
  742. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  743. etr_port0_uptodate = etr_port1_uptodate = 0;
  744. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  745. if (eacr.e0)
  746. /*
  747. * Port change of an enabled port. We have to
  748. * assume that this can have caused an stepping
  749. * port switch.
  750. */
  751. etr_tolec = get_clock();
  752. eacr.p0 = etr_port0_online;
  753. if (!eacr.p0)
  754. eacr.e0 = 0;
  755. etr_port0_uptodate = 0;
  756. }
  757. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  758. if (eacr.e1)
  759. /*
  760. * Port change of an enabled port. We have to
  761. * assume that this can have caused an stepping
  762. * port switch.
  763. */
  764. etr_tolec = get_clock();
  765. eacr.p1 = etr_port1_online;
  766. if (!eacr.p1)
  767. eacr.e1 = 0;
  768. etr_port1_uptodate = 0;
  769. }
  770. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  771. return eacr;
  772. }
  773. /*
  774. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  775. * one of the ports needs an update.
  776. */
  777. static void etr_set_tolec_timeout(unsigned long long now)
  778. {
  779. unsigned long micros;
  780. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  781. (!etr_eacr.p1 || etr_port1_uptodate))
  782. return;
  783. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  784. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  785. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  786. }
  787. /*
  788. * Set up a time that expires after 1/2 second.
  789. */
  790. static void etr_set_sync_timeout(void)
  791. {
  792. mod_timer(&etr_timer, jiffies + HZ/2);
  793. }
  794. /*
  795. * Update the aib information for one or both ports.
  796. */
  797. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  798. struct etr_eacr eacr)
  799. {
  800. /* With both ports disabled the aib information is useless. */
  801. if (!eacr.e0 && !eacr.e1)
  802. return eacr;
  803. /* Update port0 or port1 with aib stored in etr_work_fn. */
  804. if (aib->esw.q == 0) {
  805. /* Information for port 0 stored. */
  806. if (eacr.p0 && !etr_port0_uptodate) {
  807. etr_port0 = *aib;
  808. if (etr_port0_online)
  809. etr_port0_uptodate = 1;
  810. }
  811. } else {
  812. /* Information for port 1 stored. */
  813. if (eacr.p1 && !etr_port1_uptodate) {
  814. etr_port1 = *aib;
  815. if (etr_port0_online)
  816. etr_port1_uptodate = 1;
  817. }
  818. }
  819. /*
  820. * Do not try to get the alternate port aib if the clock
  821. * is not in sync yet.
  822. */
  823. if (!eacr.es || !check_sync_clock())
  824. return eacr;
  825. /*
  826. * If steai is available we can get the information about
  827. * the other port immediately. If only stetr is available the
  828. * data-port bit toggle has to be used.
  829. */
  830. if (etr_steai_available) {
  831. if (eacr.p0 && !etr_port0_uptodate) {
  832. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  833. etr_port0_uptodate = 1;
  834. }
  835. if (eacr.p1 && !etr_port1_uptodate) {
  836. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  837. etr_port1_uptodate = 1;
  838. }
  839. } else {
  840. /*
  841. * One port was updated above, if the other
  842. * port is not uptodate toggle dp bit.
  843. */
  844. if ((eacr.p0 && !etr_port0_uptodate) ||
  845. (eacr.p1 && !etr_port1_uptodate))
  846. eacr.dp ^= 1;
  847. else
  848. eacr.dp = 0;
  849. }
  850. return eacr;
  851. }
  852. /*
  853. * Write new etr control register if it differs from the current one.
  854. * Return 1 if etr_tolec has been updated as well.
  855. */
  856. static void etr_update_eacr(struct etr_eacr eacr)
  857. {
  858. int dp_changed;
  859. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  860. /* No change, return. */
  861. return;
  862. /*
  863. * The disable of an active port of the change of the data port
  864. * bit can/will cause a change in the data port.
  865. */
  866. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  867. (etr_eacr.dp ^ eacr.dp) != 0;
  868. etr_eacr = eacr;
  869. etr_setr(&etr_eacr);
  870. if (dp_changed)
  871. etr_tolec = get_clock();
  872. }
  873. /*
  874. * ETR work. In this function you'll find the main logic. In
  875. * particular this is the only function that calls etr_update_eacr(),
  876. * it "controls" the etr control register.
  877. */
  878. static void etr_work_fn(struct work_struct *work)
  879. {
  880. unsigned long long now;
  881. struct etr_eacr eacr;
  882. struct etr_aib aib;
  883. int sync_port;
  884. /* prevent multiple execution. */
  885. mutex_lock(&etr_work_mutex);
  886. /* Create working copy of etr_eacr. */
  887. eacr = etr_eacr;
  888. /* Check for the different events and their immediate effects. */
  889. eacr = etr_handle_events(eacr);
  890. /* Check if ETR is supposed to be active. */
  891. eacr.ea = eacr.p0 || eacr.p1;
  892. if (!eacr.ea) {
  893. /* Both ports offline. Reset everything. */
  894. eacr.dp = eacr.es = eacr.sl = 0;
  895. on_each_cpu(disable_sync_clock, NULL, 1);
  896. del_timer_sync(&etr_timer);
  897. etr_update_eacr(eacr);
  898. goto out_unlock;
  899. }
  900. /* Store aib to get the current ETR status word. */
  901. BUG_ON(etr_stetr(&aib) != 0);
  902. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  903. now = get_clock();
  904. /*
  905. * Update the port information if the last stepping port change
  906. * or data port change is older than 1.6 seconds.
  907. */
  908. if (now >= etr_tolec + (1600000 << 12))
  909. eacr = etr_handle_update(&aib, eacr);
  910. /*
  911. * Select ports to enable. The preferred synchronization mode is PPS.
  912. * If a port can be enabled depends on a number of things:
  913. * 1) The port needs to be online and uptodate. A port is not
  914. * disabled just because it is not uptodate, but it is only
  915. * enabled if it is uptodate.
  916. * 2) The port needs to have the same mode (pps / etr).
  917. * 3) The port needs to be usable -> etr_port_valid() == 1
  918. * 4) To enable the second port the clock needs to be in sync.
  919. * 5) If both ports are useable and are ETR ports, the network id
  920. * has to be the same.
  921. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  922. */
  923. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  924. eacr.sl = 0;
  925. eacr.e0 = 1;
  926. if (!etr_mode_is_pps(etr_eacr))
  927. eacr.es = 0;
  928. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  929. eacr.e1 = 0;
  930. // FIXME: uptodate checks ?
  931. else if (etr_port0_uptodate && etr_port1_uptodate)
  932. eacr.e1 = 1;
  933. sync_port = (etr_port0_uptodate &&
  934. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  935. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  936. eacr.sl = 0;
  937. eacr.e0 = 0;
  938. eacr.e1 = 1;
  939. if (!etr_mode_is_pps(etr_eacr))
  940. eacr.es = 0;
  941. sync_port = (etr_port1_uptodate &&
  942. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  943. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  944. eacr.sl = 1;
  945. eacr.e0 = 1;
  946. if (!etr_mode_is_etr(etr_eacr))
  947. eacr.es = 0;
  948. if (!eacr.es || !eacr.p1 ||
  949. aib.esw.psc1 != etr_lpsc_operational_alt)
  950. eacr.e1 = 0;
  951. else if (etr_port0_uptodate && etr_port1_uptodate &&
  952. etr_compare_network(&etr_port0, &etr_port1))
  953. eacr.e1 = 1;
  954. sync_port = (etr_port0_uptodate &&
  955. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  956. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  957. eacr.sl = 1;
  958. eacr.e0 = 0;
  959. eacr.e1 = 1;
  960. if (!etr_mode_is_etr(etr_eacr))
  961. eacr.es = 0;
  962. sync_port = (etr_port1_uptodate &&
  963. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  964. } else {
  965. /* Both ports not usable. */
  966. eacr.es = eacr.sl = 0;
  967. sync_port = -1;
  968. }
  969. /*
  970. * If the clock is in sync just update the eacr and return.
  971. * If there is no valid sync port wait for a port update.
  972. */
  973. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  974. etr_update_eacr(eacr);
  975. etr_set_tolec_timeout(now);
  976. goto out_unlock;
  977. }
  978. /*
  979. * Prepare control register for clock syncing
  980. * (reset data port bit, set sync check control.
  981. */
  982. eacr.dp = 0;
  983. eacr.es = 1;
  984. /*
  985. * Update eacr and try to synchronize the clock. If the update
  986. * of eacr caused a stepping port switch (or if we have to
  987. * assume that a stepping port switch has occurred) or the
  988. * clock syncing failed, reset the sync check control bit
  989. * and set up a timer to try again after 0.5 seconds
  990. */
  991. etr_update_eacr(eacr);
  992. if (now < etr_tolec + (1600000 << 12) ||
  993. etr_sync_clock_stop(&aib, sync_port) != 0) {
  994. /* Sync failed. Try again in 1/2 second. */
  995. eacr.es = 0;
  996. etr_update_eacr(eacr);
  997. etr_set_sync_timeout();
  998. } else
  999. etr_set_tolec_timeout(now);
  1000. out_unlock:
  1001. mutex_unlock(&etr_work_mutex);
  1002. }
  1003. /*
  1004. * Sysfs interface functions
  1005. */
  1006. static struct sysdev_class etr_sysclass = {
  1007. .name = "etr",
  1008. };
  1009. static struct sys_device etr_port0_dev = {
  1010. .id = 0,
  1011. .cls = &etr_sysclass,
  1012. };
  1013. static struct sys_device etr_port1_dev = {
  1014. .id = 1,
  1015. .cls = &etr_sysclass,
  1016. };
  1017. /*
  1018. * ETR class attributes
  1019. */
  1020. static ssize_t etr_stepping_port_show(struct sysdev_class *class,
  1021. struct sysdev_class_attribute *attr,
  1022. char *buf)
  1023. {
  1024. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1025. }
  1026. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1027. static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
  1028. struct sysdev_class_attribute *attr,
  1029. char *buf)
  1030. {
  1031. char *mode_str;
  1032. if (etr_mode_is_pps(etr_eacr))
  1033. mode_str = "pps";
  1034. else if (etr_mode_is_etr(etr_eacr))
  1035. mode_str = "etr";
  1036. else
  1037. mode_str = "local";
  1038. return sprintf(buf, "%s\n", mode_str);
  1039. }
  1040. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1041. /*
  1042. * ETR port attributes
  1043. */
  1044. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1045. {
  1046. if (dev == &etr_port0_dev)
  1047. return etr_port0_online ? &etr_port0 : NULL;
  1048. else
  1049. return etr_port1_online ? &etr_port1 : NULL;
  1050. }
  1051. static ssize_t etr_online_show(struct sys_device *dev,
  1052. struct sysdev_attribute *attr,
  1053. char *buf)
  1054. {
  1055. unsigned int online;
  1056. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1057. return sprintf(buf, "%i\n", online);
  1058. }
  1059. static ssize_t etr_online_store(struct sys_device *dev,
  1060. struct sysdev_attribute *attr,
  1061. const char *buf, size_t count)
  1062. {
  1063. unsigned int value;
  1064. value = simple_strtoul(buf, NULL, 0);
  1065. if (value != 0 && value != 1)
  1066. return -EINVAL;
  1067. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1068. return -EOPNOTSUPP;
  1069. mutex_lock(&clock_sync_mutex);
  1070. if (dev == &etr_port0_dev) {
  1071. if (etr_port0_online == value)
  1072. goto out; /* Nothing to do. */
  1073. etr_port0_online = value;
  1074. if (etr_port0_online && etr_port1_online)
  1075. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1076. else
  1077. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1078. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1079. queue_work(time_sync_wq, &etr_work);
  1080. } else {
  1081. if (etr_port1_online == value)
  1082. goto out; /* Nothing to do. */
  1083. etr_port1_online = value;
  1084. if (etr_port0_online && etr_port1_online)
  1085. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1086. else
  1087. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1088. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1089. queue_work(time_sync_wq, &etr_work);
  1090. }
  1091. out:
  1092. mutex_unlock(&clock_sync_mutex);
  1093. return count;
  1094. }
  1095. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1096. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1097. struct sysdev_attribute *attr,
  1098. char *buf)
  1099. {
  1100. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1101. etr_eacr.e0 : etr_eacr.e1);
  1102. }
  1103. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1104. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1105. struct sysdev_attribute *attr, char *buf)
  1106. {
  1107. if (!etr_port0_online && !etr_port1_online)
  1108. /* Status word is not uptodate if both ports are offline. */
  1109. return -ENODATA;
  1110. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1111. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1112. }
  1113. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1114. static ssize_t etr_untuned_show(struct sys_device *dev,
  1115. struct sysdev_attribute *attr, char *buf)
  1116. {
  1117. struct etr_aib *aib = etr_aib_from_dev(dev);
  1118. if (!aib || !aib->slsw.v1)
  1119. return -ENODATA;
  1120. return sprintf(buf, "%i\n", aib->edf1.u);
  1121. }
  1122. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1123. static ssize_t etr_network_id_show(struct sys_device *dev,
  1124. struct sysdev_attribute *attr, char *buf)
  1125. {
  1126. struct etr_aib *aib = etr_aib_from_dev(dev);
  1127. if (!aib || !aib->slsw.v1)
  1128. return -ENODATA;
  1129. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1130. }
  1131. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1132. static ssize_t etr_id_show(struct sys_device *dev,
  1133. struct sysdev_attribute *attr, char *buf)
  1134. {
  1135. struct etr_aib *aib = etr_aib_from_dev(dev);
  1136. if (!aib || !aib->slsw.v1)
  1137. return -ENODATA;
  1138. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1139. }
  1140. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1141. static ssize_t etr_port_number_show(struct sys_device *dev,
  1142. struct sysdev_attribute *attr, char *buf)
  1143. {
  1144. struct etr_aib *aib = etr_aib_from_dev(dev);
  1145. if (!aib || !aib->slsw.v1)
  1146. return -ENODATA;
  1147. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1148. }
  1149. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1150. static ssize_t etr_coupled_show(struct sys_device *dev,
  1151. struct sysdev_attribute *attr, char *buf)
  1152. {
  1153. struct etr_aib *aib = etr_aib_from_dev(dev);
  1154. if (!aib || !aib->slsw.v3)
  1155. return -ENODATA;
  1156. return sprintf(buf, "%i\n", aib->edf3.c);
  1157. }
  1158. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1159. static ssize_t etr_local_time_show(struct sys_device *dev,
  1160. struct sysdev_attribute *attr, char *buf)
  1161. {
  1162. struct etr_aib *aib = etr_aib_from_dev(dev);
  1163. if (!aib || !aib->slsw.v3)
  1164. return -ENODATA;
  1165. return sprintf(buf, "%i\n", aib->edf3.blto);
  1166. }
  1167. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1168. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1169. struct sysdev_attribute *attr, char *buf)
  1170. {
  1171. struct etr_aib *aib = etr_aib_from_dev(dev);
  1172. if (!aib || !aib->slsw.v3)
  1173. return -ENODATA;
  1174. return sprintf(buf, "%i\n", aib->edf3.buo);
  1175. }
  1176. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1177. static struct sysdev_attribute *etr_port_attributes[] = {
  1178. &attr_online,
  1179. &attr_stepping_control,
  1180. &attr_state_code,
  1181. &attr_untuned,
  1182. &attr_network,
  1183. &attr_id,
  1184. &attr_port,
  1185. &attr_coupled,
  1186. &attr_local_time,
  1187. &attr_utc_offset,
  1188. NULL
  1189. };
  1190. static int __init etr_register_port(struct sys_device *dev)
  1191. {
  1192. struct sysdev_attribute **attr;
  1193. int rc;
  1194. rc = sysdev_register(dev);
  1195. if (rc)
  1196. goto out;
  1197. for (attr = etr_port_attributes; *attr; attr++) {
  1198. rc = sysdev_create_file(dev, *attr);
  1199. if (rc)
  1200. goto out_unreg;
  1201. }
  1202. return 0;
  1203. out_unreg:
  1204. for (; attr >= etr_port_attributes; attr--)
  1205. sysdev_remove_file(dev, *attr);
  1206. sysdev_unregister(dev);
  1207. out:
  1208. return rc;
  1209. }
  1210. static void __init etr_unregister_port(struct sys_device *dev)
  1211. {
  1212. struct sysdev_attribute **attr;
  1213. for (attr = etr_port_attributes; *attr; attr++)
  1214. sysdev_remove_file(dev, *attr);
  1215. sysdev_unregister(dev);
  1216. }
  1217. static int __init etr_init_sysfs(void)
  1218. {
  1219. int rc;
  1220. rc = sysdev_class_register(&etr_sysclass);
  1221. if (rc)
  1222. goto out;
  1223. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1224. if (rc)
  1225. goto out_unreg_class;
  1226. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1227. if (rc)
  1228. goto out_remove_stepping_port;
  1229. rc = etr_register_port(&etr_port0_dev);
  1230. if (rc)
  1231. goto out_remove_stepping_mode;
  1232. rc = etr_register_port(&etr_port1_dev);
  1233. if (rc)
  1234. goto out_remove_port0;
  1235. return 0;
  1236. out_remove_port0:
  1237. etr_unregister_port(&etr_port0_dev);
  1238. out_remove_stepping_mode:
  1239. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1240. out_remove_stepping_port:
  1241. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1242. out_unreg_class:
  1243. sysdev_class_unregister(&etr_sysclass);
  1244. out:
  1245. return rc;
  1246. }
  1247. device_initcall(etr_init_sysfs);
  1248. /*
  1249. * Server Time Protocol (STP) code.
  1250. */
  1251. static int stp_online;
  1252. static struct stp_sstpi stp_info;
  1253. static void *stp_page;
  1254. static void stp_work_fn(struct work_struct *work);
  1255. static DEFINE_MUTEX(stp_work_mutex);
  1256. static DECLARE_WORK(stp_work, stp_work_fn);
  1257. static struct timer_list stp_timer;
  1258. static int __init early_parse_stp(char *p)
  1259. {
  1260. if (strncmp(p, "off", 3) == 0)
  1261. stp_online = 0;
  1262. else if (strncmp(p, "on", 2) == 0)
  1263. stp_online = 1;
  1264. return 0;
  1265. }
  1266. early_param("stp", early_parse_stp);
  1267. /*
  1268. * Reset STP attachment.
  1269. */
  1270. static void __init stp_reset(void)
  1271. {
  1272. int rc;
  1273. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1274. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1275. if (rc == 0)
  1276. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1277. else if (stp_online) {
  1278. pr_warning("The real or virtual hardware system does "
  1279. "not provide an STP interface\n");
  1280. free_page((unsigned long) stp_page);
  1281. stp_page = NULL;
  1282. stp_online = 0;
  1283. }
  1284. }
  1285. static void stp_timeout(unsigned long dummy)
  1286. {
  1287. queue_work(time_sync_wq, &stp_work);
  1288. }
  1289. static int __init stp_init(void)
  1290. {
  1291. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1292. return 0;
  1293. setup_timer(&stp_timer, stp_timeout, 0UL);
  1294. time_init_wq();
  1295. if (!stp_online)
  1296. return 0;
  1297. queue_work(time_sync_wq, &stp_work);
  1298. return 0;
  1299. }
  1300. arch_initcall(stp_init);
  1301. /*
  1302. * STP timing alert. There are three causes:
  1303. * 1) timing status change
  1304. * 2) link availability change
  1305. * 3) time control parameter change
  1306. * In all three cases we are only interested in the clock source state.
  1307. * If a STP clock source is now available use it.
  1308. */
  1309. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1310. {
  1311. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1312. queue_work(time_sync_wq, &stp_work);
  1313. }
  1314. /*
  1315. * STP sync check machine check. This is called when the timing state
  1316. * changes from the synchronized state to the unsynchronized state.
  1317. * After a STP sync check the clock is not in sync. The machine check
  1318. * is broadcasted to all cpus at the same time.
  1319. */
  1320. void stp_sync_check(void)
  1321. {
  1322. disable_sync_clock(NULL);
  1323. queue_work(time_sync_wq, &stp_work);
  1324. }
  1325. /*
  1326. * STP island condition machine check. This is called when an attached
  1327. * server attempts to communicate over an STP link and the servers
  1328. * have matching CTN ids and have a valid stratum-1 configuration
  1329. * but the configurations do not match.
  1330. */
  1331. void stp_island_check(void)
  1332. {
  1333. disable_sync_clock(NULL);
  1334. queue_work(time_sync_wq, &stp_work);
  1335. }
  1336. static int stp_sync_clock(void *data)
  1337. {
  1338. static int first;
  1339. unsigned long long old_clock, delta;
  1340. struct clock_sync_data *stp_sync;
  1341. int rc;
  1342. stp_sync = data;
  1343. if (xchg(&first, 1) == 1) {
  1344. /* Slave */
  1345. clock_sync_cpu(stp_sync);
  1346. return 0;
  1347. }
  1348. /* Wait until all other cpus entered the sync function. */
  1349. while (atomic_read(&stp_sync->cpus) != 0)
  1350. cpu_relax();
  1351. enable_sync_clock();
  1352. rc = 0;
  1353. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1354. stp_info.todoff[2] || stp_info.todoff[3] ||
  1355. stp_info.tmd != 2) {
  1356. old_clock = get_clock();
  1357. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1358. if (rc == 0) {
  1359. delta = adjust_time(old_clock, get_clock(), 0);
  1360. fixup_clock_comparator(delta);
  1361. rc = chsc_sstpi(stp_page, &stp_info,
  1362. sizeof(struct stp_sstpi));
  1363. if (rc == 0 && stp_info.tmd != 2)
  1364. rc = -EAGAIN;
  1365. }
  1366. }
  1367. if (rc) {
  1368. disable_sync_clock(NULL);
  1369. stp_sync->in_sync = -EAGAIN;
  1370. } else
  1371. stp_sync->in_sync = 1;
  1372. xchg(&first, 0);
  1373. return 0;
  1374. }
  1375. /*
  1376. * STP work. Check for the STP state and take over the clock
  1377. * synchronization if the STP clock source is usable.
  1378. */
  1379. static void stp_work_fn(struct work_struct *work)
  1380. {
  1381. struct clock_sync_data stp_sync;
  1382. int rc;
  1383. /* prevent multiple execution. */
  1384. mutex_lock(&stp_work_mutex);
  1385. if (!stp_online) {
  1386. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1387. del_timer_sync(&stp_timer);
  1388. goto out_unlock;
  1389. }
  1390. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1391. if (rc)
  1392. goto out_unlock;
  1393. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1394. if (rc || stp_info.c == 0)
  1395. goto out_unlock;
  1396. /* Skip synchronization if the clock is already in sync. */
  1397. if (check_sync_clock())
  1398. goto out_unlock;
  1399. memset(&stp_sync, 0, sizeof(stp_sync));
  1400. get_online_cpus();
  1401. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1402. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1403. put_online_cpus();
  1404. if (!check_sync_clock())
  1405. /*
  1406. * There is a usable clock but the synchonization failed.
  1407. * Retry after a second.
  1408. */
  1409. mod_timer(&stp_timer, jiffies + HZ);
  1410. out_unlock:
  1411. mutex_unlock(&stp_work_mutex);
  1412. }
  1413. /*
  1414. * STP class sysfs interface functions
  1415. */
  1416. static struct sysdev_class stp_sysclass = {
  1417. .name = "stp",
  1418. };
  1419. static ssize_t stp_ctn_id_show(struct sysdev_class *class,
  1420. struct sysdev_class_attribute *attr,
  1421. char *buf)
  1422. {
  1423. if (!stp_online)
  1424. return -ENODATA;
  1425. return sprintf(buf, "%016llx\n",
  1426. *(unsigned long long *) stp_info.ctnid);
  1427. }
  1428. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1429. static ssize_t stp_ctn_type_show(struct sysdev_class *class,
  1430. struct sysdev_class_attribute *attr,
  1431. char *buf)
  1432. {
  1433. if (!stp_online)
  1434. return -ENODATA;
  1435. return sprintf(buf, "%i\n", stp_info.ctn);
  1436. }
  1437. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1438. static ssize_t stp_dst_offset_show(struct sysdev_class *class,
  1439. struct sysdev_class_attribute *attr,
  1440. char *buf)
  1441. {
  1442. if (!stp_online || !(stp_info.vbits & 0x2000))
  1443. return -ENODATA;
  1444. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1445. }
  1446. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1447. static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
  1448. struct sysdev_class_attribute *attr,
  1449. char *buf)
  1450. {
  1451. if (!stp_online || !(stp_info.vbits & 0x8000))
  1452. return -ENODATA;
  1453. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1454. }
  1455. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1456. static ssize_t stp_stratum_show(struct sysdev_class *class,
  1457. struct sysdev_class_attribute *attr,
  1458. char *buf)
  1459. {
  1460. if (!stp_online)
  1461. return -ENODATA;
  1462. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1463. }
  1464. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1465. static ssize_t stp_time_offset_show(struct sysdev_class *class,
  1466. struct sysdev_class_attribute *attr,
  1467. char *buf)
  1468. {
  1469. if (!stp_online || !(stp_info.vbits & 0x0800))
  1470. return -ENODATA;
  1471. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1472. }
  1473. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1474. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
  1475. struct sysdev_class_attribute *attr,
  1476. char *buf)
  1477. {
  1478. if (!stp_online || !(stp_info.vbits & 0x4000))
  1479. return -ENODATA;
  1480. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1481. }
  1482. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1483. stp_time_zone_offset_show, NULL);
  1484. static ssize_t stp_timing_mode_show(struct sysdev_class *class,
  1485. struct sysdev_class_attribute *attr,
  1486. char *buf)
  1487. {
  1488. if (!stp_online)
  1489. return -ENODATA;
  1490. return sprintf(buf, "%i\n", stp_info.tmd);
  1491. }
  1492. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1493. static ssize_t stp_timing_state_show(struct sysdev_class *class,
  1494. struct sysdev_class_attribute *attr,
  1495. char *buf)
  1496. {
  1497. if (!stp_online)
  1498. return -ENODATA;
  1499. return sprintf(buf, "%i\n", stp_info.tst);
  1500. }
  1501. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1502. static ssize_t stp_online_show(struct sysdev_class *class,
  1503. struct sysdev_class_attribute *attr,
  1504. char *buf)
  1505. {
  1506. return sprintf(buf, "%i\n", stp_online);
  1507. }
  1508. static ssize_t stp_online_store(struct sysdev_class *class,
  1509. struct sysdev_class_attribute *attr,
  1510. const char *buf, size_t count)
  1511. {
  1512. unsigned int value;
  1513. value = simple_strtoul(buf, NULL, 0);
  1514. if (value != 0 && value != 1)
  1515. return -EINVAL;
  1516. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1517. return -EOPNOTSUPP;
  1518. mutex_lock(&clock_sync_mutex);
  1519. stp_online = value;
  1520. if (stp_online)
  1521. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1522. else
  1523. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1524. queue_work(time_sync_wq, &stp_work);
  1525. mutex_unlock(&clock_sync_mutex);
  1526. return count;
  1527. }
  1528. /*
  1529. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1530. * stp/online but attr_online already exists in this file ..
  1531. */
  1532. static struct sysdev_class_attribute attr_stp_online = {
  1533. .attr = { .name = "online", .mode = 0600 },
  1534. .show = stp_online_show,
  1535. .store = stp_online_store,
  1536. };
  1537. static struct sysdev_class_attribute *stp_attributes[] = {
  1538. &attr_ctn_id,
  1539. &attr_ctn_type,
  1540. &attr_dst_offset,
  1541. &attr_leap_seconds,
  1542. &attr_stp_online,
  1543. &attr_stratum,
  1544. &attr_time_offset,
  1545. &attr_time_zone_offset,
  1546. &attr_timing_mode,
  1547. &attr_timing_state,
  1548. NULL
  1549. };
  1550. static int __init stp_init_sysfs(void)
  1551. {
  1552. struct sysdev_class_attribute **attr;
  1553. int rc;
  1554. rc = sysdev_class_register(&stp_sysclass);
  1555. if (rc)
  1556. goto out;
  1557. for (attr = stp_attributes; *attr; attr++) {
  1558. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1559. if (rc)
  1560. goto out_unreg;
  1561. }
  1562. return 0;
  1563. out_unreg:
  1564. for (; attr >= stp_attributes; attr--)
  1565. sysdev_class_remove_file(&stp_sysclass, *attr);
  1566. sysdev_class_unregister(&stp_sysclass);
  1567. out:
  1568. return rc;
  1569. }
  1570. device_initcall(stp_init_sysfs);