wm8750.c 35 KB

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  1. /*
  2. * wm8750.c -- WM8750 ALSA SoC audio driver
  3. *
  4. * Copyright 2005 Openedhand Ltd.
  5. *
  6. * Author: Richard Purdie <richard@openedhand.com>
  7. *
  8. * Based on WM8753.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/i2c.h>
  20. #include <linux/platform_device.h>
  21. #include <sound/driver.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include "wm8750.h"
  29. #define AUDIO_NAME "WM8750"
  30. #define WM8750_VERSION "0.11"
  31. /*
  32. * Debug
  33. */
  34. #define WM8750_DEBUG 0
  35. #ifdef WM8750_DEBUG
  36. #define dbg(format, arg...) \
  37. printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
  38. #else
  39. #define dbg(format, arg...) do {} while (0)
  40. #endif
  41. #define err(format, arg...) \
  42. printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
  43. #define info(format, arg...) \
  44. printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
  45. #define warn(format, arg...) \
  46. printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
  47. /*
  48. * wm8750 register cache
  49. * We can't read the WM8750 register space when we
  50. * are using 2 wire for device control, so we cache them instead.
  51. */
  52. static const u16 wm8750_reg[] = {
  53. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  54. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  55. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  56. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  57. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  58. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  59. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  60. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  61. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  62. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  63. 0x0079, 0x0079, 0x0079, /* 40 */
  64. };
  65. #define WM8750_HIFI_DAIFMT \
  66. (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \
  67. SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \
  68. SND_SOC_DAIFMT_IB_IF)
  69. #define WM8750_DIR \
  70. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  71. #define WM8750_HIFI_FSB \
  72. (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \
  73. SND_SOC_FSBD(8) | SND_SOC_FSBD(16))
  74. #define WM8750_HIFI_RATES \
  75. (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
  76. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
  77. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  78. #define WM8750_HIFI_BITS \
  79. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  80. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  81. static struct snd_soc_dai_mode wm8750_modes[] = {
  82. /* common codec frame and clock master modes */
  83. /* 8k */
  84. {
  85. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  86. .pcmfmt = WM8750_HIFI_BITS,
  87. .pcmrate = SNDRV_PCM_RATE_8000,
  88. .pcmdir = WM8750_DIR,
  89. .flags = SND_SOC_DAI_BFS_DIV,
  90. .fs = 1536,
  91. .bfs = WM8750_HIFI_FSB,
  92. },
  93. {
  94. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  95. .pcmfmt = WM8750_HIFI_BITS,
  96. .pcmrate = SNDRV_PCM_RATE_8000,
  97. .pcmdir = WM8750_DIR,
  98. .flags = SND_SOC_DAI_BFS_DIV,
  99. .fs = 1408,
  100. .bfs = WM8750_HIFI_FSB,
  101. },
  102. {
  103. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  104. .pcmfmt = WM8750_HIFI_BITS,
  105. .pcmrate = SNDRV_PCM_RATE_8000,
  106. .pcmdir = WM8750_DIR,
  107. .flags = SND_SOC_DAI_BFS_DIV,
  108. .fs = 2304,
  109. .bfs = WM8750_HIFI_FSB,
  110. },
  111. {
  112. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  113. .pcmfmt = WM8750_HIFI_BITS,
  114. .pcmrate = SNDRV_PCM_RATE_8000,
  115. .pcmdir = WM8750_DIR,
  116. .flags = SND_SOC_DAI_BFS_DIV,
  117. .fs = 2112,
  118. .bfs = WM8750_HIFI_FSB,
  119. },
  120. {
  121. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  122. .pcmfmt = WM8750_HIFI_BITS,
  123. .pcmrate = SNDRV_PCM_RATE_8000,
  124. .pcmdir = WM8750_DIR,
  125. .flags = SND_SOC_DAI_BFS_DIV,
  126. .fs = 1500,
  127. .bfs = WM8750_HIFI_FSB,
  128. },
  129. /* 11.025k */
  130. {
  131. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  132. .pcmfmt = WM8750_HIFI_BITS,
  133. .pcmrate = SNDRV_PCM_RATE_11025,
  134. .pcmdir = WM8750_DIR,
  135. .flags = SND_SOC_DAI_BFS_DIV,
  136. .fs = 1024,
  137. .bfs = WM8750_HIFI_FSB,
  138. },
  139. {
  140. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  141. .pcmfmt = WM8750_HIFI_BITS,
  142. .pcmrate = SNDRV_PCM_RATE_11025,
  143. .pcmdir = WM8750_DIR,
  144. .flags = SND_SOC_DAI_BFS_DIV,
  145. .fs = 1536,
  146. .bfs = WM8750_HIFI_FSB,
  147. },
  148. {
  149. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  150. .pcmfmt = WM8750_HIFI_BITS,
  151. .pcmrate = SNDRV_PCM_RATE_11025,
  152. .pcmdir = WM8750_DIR,
  153. .flags = SND_SOC_DAI_BFS_DIV,
  154. .fs = 1088,
  155. .bfs = WM8750_HIFI_FSB,
  156. },
  157. /* 16k */
  158. {
  159. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  160. .pcmfmt = WM8750_HIFI_BITS,
  161. .pcmrate = SNDRV_PCM_RATE_16000,
  162. .pcmdir = WM8750_DIR,
  163. .flags = SND_SOC_DAI_BFS_DIV,
  164. .fs = 768,
  165. .bfs = WM8750_HIFI_FSB,
  166. },
  167. {
  168. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  169. .pcmfmt = WM8750_HIFI_BITS,
  170. .pcmrate = SNDRV_PCM_RATE_16000,
  171. .pcmdir = WM8750_DIR,
  172. .flags = SND_SOC_DAI_BFS_DIV,
  173. .fs = 1152,
  174. .bfs = WM8750_HIFI_FSB
  175. },
  176. {
  177. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  178. .pcmfmt = WM8750_HIFI_BITS,
  179. .pcmrate = SNDRV_PCM_RATE_16000,
  180. .pcmdir = WM8750_DIR,
  181. .flags = SND_SOC_DAI_BFS_DIV,
  182. .fs = 750,
  183. .bfs = WM8750_HIFI_FSB,
  184. },
  185. /* 22.05k */
  186. {
  187. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  188. .pcmfmt = WM8750_HIFI_BITS,
  189. .pcmrate = SNDRV_PCM_RATE_22050,
  190. .pcmdir = WM8750_DIR,
  191. .flags = SND_SOC_DAI_BFS_DIV,
  192. .fs = 512,
  193. .bfs = WM8750_HIFI_FSB,
  194. },
  195. {
  196. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  197. .pcmfmt = WM8750_HIFI_BITS,
  198. .pcmrate = SNDRV_PCM_RATE_22050,
  199. .pcmdir = WM8750_DIR,
  200. .flags = SND_SOC_DAI_BFS_DIV,
  201. .fs = 768,
  202. .bfs = WM8750_HIFI_FSB,
  203. },
  204. {
  205. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  206. .pcmfmt = WM8750_HIFI_BITS,
  207. .pcmrate = SNDRV_PCM_RATE_22050,
  208. .pcmdir = WM8750_DIR,
  209. .flags = SND_SOC_DAI_BFS_DIV,
  210. .fs = 544,
  211. .bfs = WM8750_HIFI_FSB,
  212. },
  213. /* 32k */
  214. {
  215. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  216. .pcmfmt = WM8750_HIFI_BITS,
  217. .pcmrate = SNDRV_PCM_RATE_32000,
  218. .pcmdir = WM8750_DIR,
  219. .flags = SND_SOC_DAI_BFS_DIV,
  220. .fs = 384,
  221. .bfs = WM8750_HIFI_FSB,
  222. },
  223. {
  224. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  225. .pcmfmt = WM8750_HIFI_BITS,
  226. .pcmrate = SNDRV_PCM_RATE_32000,
  227. .pcmdir = WM8750_DIR,
  228. .flags = SND_SOC_DAI_BFS_DIV,
  229. .fs = 576,
  230. .bfs = WM8750_HIFI_FSB,
  231. },
  232. {
  233. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  234. .pcmfmt = WM8750_HIFI_BITS,
  235. .pcmrate = SNDRV_PCM_RATE_32000,
  236. .pcmdir = WM8750_DIR,
  237. .flags = SND_SOC_DAI_BFS_DIV,
  238. .fs = 375,
  239. .bfs = WM8750_HIFI_FSB,
  240. },
  241. /* 44.1k & 48k */
  242. {
  243. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  244. .pcmfmt = WM8750_HIFI_BITS,
  245. .pcmrate = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  246. .pcmdir = WM8750_DIR,
  247. .flags = SND_SOC_DAI_BFS_DIV,
  248. .fs = 256,
  249. .bfs = WM8750_HIFI_FSB,
  250. },
  251. {
  252. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  253. .pcmfmt = WM8750_HIFI_BITS,
  254. .pcmrate = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  255. .pcmdir = WM8750_DIR,
  256. .flags = SND_SOC_DAI_BFS_DIV,
  257. .fs = 384,
  258. .bfs = WM8750_HIFI_FSB,
  259. },
  260. {
  261. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  262. .pcmfmt = WM8750_HIFI_BITS,
  263. .pcmrate = SNDRV_PCM_RATE_44100,
  264. .pcmdir = WM8750_DIR,
  265. .flags = SND_SOC_DAI_BFS_DIV,
  266. .fs = 272,
  267. .bfs = WM8750_HIFI_FSB,
  268. },
  269. {
  270. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  271. .pcmfmt = WM8750_HIFI_BITS,
  272. .pcmrate = SNDRV_PCM_RATE_48000,
  273. .pcmdir = WM8750_DIR,
  274. .flags = SND_SOC_DAI_BFS_DIV,
  275. .fs = 250,
  276. .bfs = WM8750_HIFI_FSB,
  277. },
  278. /* 88.2k & 96k */
  279. {
  280. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  281. .pcmfmt = WM8750_HIFI_BITS,
  282. .pcmrate = SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
  283. .pcmdir = WM8750_DIR,
  284. .flags = SND_SOC_DAI_BFS_DIV,
  285. .fs = 128,
  286. .bfs = WM8750_HIFI_FSB,
  287. },
  288. {
  289. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  290. .pcmfmt = WM8750_HIFI_BITS,
  291. .pcmrate = SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
  292. .pcmdir = WM8750_DIR,
  293. .flags = SND_SOC_DAI_BFS_DIV,
  294. .fs = 192,
  295. .bfs = WM8750_HIFI_FSB,
  296. },
  297. {
  298. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  299. .pcmfmt = WM8750_HIFI_BITS,
  300. .pcmrate = SNDRV_PCM_RATE_88200,
  301. .pcmdir = WM8750_DIR,
  302. .flags = SND_SOC_DAI_BFS_DIV,
  303. .fs = 136,
  304. .bfs = WM8750_HIFI_FSB,
  305. },
  306. {
  307. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  308. .pcmfmt = WM8750_HIFI_BITS,
  309. .pcmrate = SNDRV_PCM_RATE_96000,
  310. .pcmdir = WM8750_DIR,
  311. .flags = SND_SOC_DAI_BFS_DIV,
  312. .fs = 125,
  313. .bfs = WM8750_HIFI_FSB,
  314. },
  315. /* codec frame and clock slave modes */
  316. {
  317. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBS_CFS,
  318. .pcmfmt = WM8750_HIFI_BITS,
  319. .pcmrate = WM8750_HIFI_RATES,
  320. .pcmdir = WM8750_DIR,
  321. .flags = SND_SOC_DAI_BFS_DIV,
  322. .fs = SND_SOC_FS_ALL,
  323. .bfs = SND_SOC_FSB_ALL,
  324. },
  325. };
  326. /*
  327. * read wm8750 register cache
  328. */
  329. static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
  330. unsigned int reg)
  331. {
  332. u16 *cache = codec->reg_cache;
  333. if (reg > WM8750_CACHE_REGNUM)
  334. return -1;
  335. return cache[reg];
  336. }
  337. /*
  338. * write wm8750 register cache
  339. */
  340. static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
  341. unsigned int reg, unsigned int value)
  342. {
  343. u16 *cache = codec->reg_cache;
  344. if (reg > WM8750_CACHE_REGNUM)
  345. return;
  346. cache[reg] = value;
  347. }
  348. static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
  349. unsigned int value)
  350. {
  351. u8 data[2];
  352. /* data is
  353. * D15..D9 WM8753 register offset
  354. * D8...D0 register data
  355. */
  356. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  357. data[1] = value & 0x00ff;
  358. wm8750_write_reg_cache (codec, reg, value);
  359. if (codec->hw_write(codec->control_data, data, 2) == 2)
  360. return 0;
  361. else
  362. return -EIO;
  363. }
  364. #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
  365. /*
  366. * WM8750 Controls
  367. */
  368. static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  369. static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  370. static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  371. static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  372. static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  373. static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  374. static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  375. static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  376. "Mute ADC Output"};
  377. static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
  378. "Differential"};
  379. static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
  380. "Differential"};
  381. static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
  382. "ROUT1"};
  383. static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
  384. static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
  385. "L + R Invert"};
  386. static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  387. static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
  388. "Mono (Right)", "Digital Mono"};
  389. static const struct soc_enum wm8750_enum[] = {
  390. SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
  391. SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
  392. SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
  393. SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
  394. SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
  395. SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
  396. SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
  397. SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
  398. SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
  399. SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
  400. SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
  401. SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
  402. SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
  403. SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
  404. SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
  405. SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
  406. SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
  407. };
  408. static const struct snd_kcontrol_new wm8750_snd_controls[] = {
  409. SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
  410. SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
  411. SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
  412. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
  413. WM8750_ROUT1V, 7, 1, 0),
  414. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
  415. WM8750_ROUT2V, 7, 1, 0),
  416. SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
  417. SOC_ENUM("Capture Polarity", wm8750_enum[14]),
  418. SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
  419. SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
  420. SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
  421. SOC_ENUM("Bass Boost", wm8750_enum[0]),
  422. SOC_ENUM("Bass Filter", wm8750_enum[1]),
  423. SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
  424. SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 0),
  425. SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
  426. SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
  427. SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
  428. SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
  429. SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
  430. SOC_ENUM("3D Mode", wm8750_enum[5]),
  431. SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
  432. SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
  433. SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
  434. SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
  435. SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
  436. SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
  437. SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
  438. SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
  439. SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
  440. SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
  441. SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
  442. SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
  443. SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
  444. SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
  445. SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
  446. /* Unimplemented */
  447. /* ADCDAC Bit 0 - ADCHPD */
  448. /* ADCDAC Bit 4 - HPOR */
  449. /* ADCTL1 Bit 2,3 - DATSEL */
  450. /* ADCTL1 Bit 4,5 - DMONOMIX */
  451. /* ADCTL1 Bit 6,7 - VSEL */
  452. /* ADCTL2 Bit 2 - LRCM */
  453. /* ADCTL2 Bit 3 - TRI */
  454. /* ADCTL3 Bit 5 - HPFLREN */
  455. /* ADCTL3 Bit 6 - VROI */
  456. /* ADCTL3 Bit 7,8 - ADCLRM */
  457. /* ADCIN Bit 4 - LDCM */
  458. /* ADCIN Bit 5 - RDCM */
  459. SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
  460. SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
  461. WM8750_LOUTM2, 4, 7, 1),
  462. SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
  463. WM8750_ROUTM2, 4, 7, 1),
  464. SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
  465. WM8750_MOUTM2, 4, 7, 1),
  466. SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
  467. SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
  468. 0, 127, 0),
  469. SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
  470. 0, 127, 0),
  471. SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
  472. };
  473. /* add non dapm controls */
  474. static int wm8750_add_controls(struct snd_soc_codec *codec)
  475. {
  476. int err, i;
  477. for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
  478. err = snd_ctl_add(codec->card,
  479. snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL));
  480. if (err < 0)
  481. return err;
  482. }
  483. return 0;
  484. }
  485. /*
  486. * DAPM Controls
  487. */
  488. /* Left Mixer */
  489. static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
  490. SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
  491. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
  492. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
  493. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
  494. };
  495. /* Right Mixer */
  496. static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
  497. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
  498. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
  499. SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
  500. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
  501. };
  502. /* Mono Mixer */
  503. static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
  504. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
  505. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
  506. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
  507. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
  508. };
  509. /* Left Line Mux */
  510. static const struct snd_kcontrol_new wm8750_left_line_controls =
  511. SOC_DAPM_ENUM("Route", wm8750_enum[8]);
  512. /* Right Line Mux */
  513. static const struct snd_kcontrol_new wm8750_right_line_controls =
  514. SOC_DAPM_ENUM("Route", wm8750_enum[9]);
  515. /* Left PGA Mux */
  516. static const struct snd_kcontrol_new wm8750_left_pga_controls =
  517. SOC_DAPM_ENUM("Route", wm8750_enum[10]);
  518. /* Right PGA Mux */
  519. static const struct snd_kcontrol_new wm8750_right_pga_controls =
  520. SOC_DAPM_ENUM("Route", wm8750_enum[11]);
  521. /* Out 3 Mux */
  522. static const struct snd_kcontrol_new wm8750_out3_controls =
  523. SOC_DAPM_ENUM("Route", wm8750_enum[12]);
  524. /* Differential Mux */
  525. static const struct snd_kcontrol_new wm8750_diffmux_controls =
  526. SOC_DAPM_ENUM("Route", wm8750_enum[13]);
  527. /* Mono ADC Mux */
  528. static const struct snd_kcontrol_new wm8750_monomux_controls =
  529. SOC_DAPM_ENUM("Route", wm8750_enum[16]);
  530. static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
  531. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  532. &wm8750_left_mixer_controls[0],
  533. ARRAY_SIZE(wm8750_left_mixer_controls)),
  534. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  535. &wm8750_right_mixer_controls[0],
  536. ARRAY_SIZE(wm8750_right_mixer_controls)),
  537. SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
  538. &wm8750_mono_mixer_controls[0],
  539. ARRAY_SIZE(wm8750_mono_mixer_controls)),
  540. SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
  541. SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
  542. SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
  543. SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
  544. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
  545. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
  546. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
  547. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
  548. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
  549. SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
  550. &wm8750_left_pga_controls),
  551. SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
  552. &wm8750_right_pga_controls),
  553. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  554. &wm8750_left_line_controls),
  555. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  556. &wm8750_right_line_controls),
  557. SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
  558. SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
  559. SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
  560. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  561. &wm8750_diffmux_controls),
  562. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  563. &wm8750_monomux_controls),
  564. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  565. &wm8750_monomux_controls),
  566. SND_SOC_DAPM_OUTPUT("LOUT1"),
  567. SND_SOC_DAPM_OUTPUT("ROUT1"),
  568. SND_SOC_DAPM_OUTPUT("LOUT2"),
  569. SND_SOC_DAPM_OUTPUT("ROUT2"),
  570. SND_SOC_DAPM_OUTPUT("MONO"),
  571. SND_SOC_DAPM_OUTPUT("OUT3"),
  572. SND_SOC_DAPM_INPUT("LINPUT1"),
  573. SND_SOC_DAPM_INPUT("LINPUT2"),
  574. SND_SOC_DAPM_INPUT("LINPUT3"),
  575. SND_SOC_DAPM_INPUT("RINPUT1"),
  576. SND_SOC_DAPM_INPUT("RINPUT2"),
  577. SND_SOC_DAPM_INPUT("RINPUT3"),
  578. };
  579. static const char *audio_map[][3] = {
  580. /* left mixer */
  581. {"Left Mixer", "Playback Switch", "Left DAC"},
  582. {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
  583. {"Left Mixer", "Right Playback Switch", "Right DAC"},
  584. {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
  585. /* right mixer */
  586. {"Right Mixer", "Left Playback Switch", "Left DAC"},
  587. {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
  588. {"Right Mixer", "Playback Switch", "Right DAC"},
  589. {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
  590. /* left out 1 */
  591. {"Left Out 1", NULL, "Left Mixer"},
  592. {"LOUT1", NULL, "Left Out 1"},
  593. /* left out 2 */
  594. {"Left Out 2", NULL, "Left Mixer"},
  595. {"LOUT2", NULL, "Left Out 2"},
  596. /* right out 1 */
  597. {"Right Out 1", NULL, "Right Mixer"},
  598. {"ROUT1", NULL, "Right Out 1"},
  599. /* right out 2 */
  600. {"Right Out 2", NULL, "Right Mixer"},
  601. {"ROUT2", NULL, "Right Out 2"},
  602. /* mono mixer */
  603. {"Mono Mixer", "Left Playback Switch", "Left DAC"},
  604. {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
  605. {"Mono Mixer", "Right Playback Switch", "Right DAC"},
  606. {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
  607. /* mono out */
  608. {"Mono Out 1", NULL, "Mono Mixer"},
  609. {"MONO1", NULL, "Mono Out 1"},
  610. /* out 3 */
  611. {"Out3 Mux", "VREF", "VREF"},
  612. {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
  613. {"Out3 Mux", "ROUT1", "Right Mixer"},
  614. {"Out3 Mux", "MonoOut", "MONO1"},
  615. {"Out 3", NULL, "Out3 Mux"},
  616. {"OUT3", NULL, "Out 3"},
  617. /* Left Line Mux */
  618. {"Left Line Mux", "Line 1", "LINPUT1"},
  619. {"Left Line Mux", "Line 2", "LINPUT2"},
  620. {"Left Line Mux", "Line 3", "LINPUT3"},
  621. {"Left Line Mux", "PGA", "Left PGA Mux"},
  622. {"Left Line Mux", "Differential", "Differential Mux"},
  623. /* Right Line Mux */
  624. {"Right Line Mux", "Line 1", "RINPUT1"},
  625. {"Right Line Mux", "Line 2", "RINPUT2"},
  626. {"Right Line Mux", "Line 3", "RINPUT3"},
  627. {"Right Line Mux", "PGA", "Right PGA Mux"},
  628. {"Right Line Mux", "Differential", "Differential Mux"},
  629. /* Left PGA Mux */
  630. {"Left PGA Mux", "Line 1", "LINPUT1"},
  631. {"Left PGA Mux", "Line 2", "LINPUT2"},
  632. {"Left PGA Mux", "Line 3", "LINPUT3"},
  633. {"Left PGA Mux", "Differential", "Differential Mux"},
  634. /* Right PGA Mux */
  635. {"Right PGA Mux", "Line 1", "RINPUT1"},
  636. {"Right PGA Mux", "Line 2", "RINPUT2"},
  637. {"Right PGA Mux", "Line 3", "RINPUT3"},
  638. {"Right PGA Mux", "Differential", "Differential Mux"},
  639. /* Differential Mux */
  640. {"Differential Mux", "Line 1", "LINPUT1"},
  641. {"Differential Mux", "Line 1", "RINPUT1"},
  642. {"Differential Mux", "Line 2", "LINPUT2"},
  643. {"Differential Mux", "Line 2", "RINPUT2"},
  644. /* Left ADC Mux */
  645. {"Left ADC Mux", "Stereo", "Left PGA Mux"},
  646. {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
  647. {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
  648. /* Right ADC Mux */
  649. {"Right ADC Mux", "Stereo", "Right PGA Mux"},
  650. {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
  651. {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
  652. /* ADC */
  653. {"Left ADC", NULL, "Left ADC Mux"},
  654. {"Right ADC", NULL, "Right ADC Mux"},
  655. /* terminator */
  656. {NULL, NULL, NULL},
  657. };
  658. static int wm8750_add_widgets(struct snd_soc_codec *codec)
  659. {
  660. int i;
  661. for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) {
  662. snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]);
  663. }
  664. /* set up audio path audio_mapnects */
  665. for(i = 0; audio_map[i][0] != NULL; i++) {
  666. snd_soc_dapm_connect_input(codec, audio_map[i][0],
  667. audio_map[i][1], audio_map[i][2]);
  668. }
  669. snd_soc_dapm_new_widgets(codec);
  670. return 0;
  671. }
  672. struct _coeff_div {
  673. u32 mclk;
  674. u32 rate;
  675. u16 fs;
  676. u8 sr:5;
  677. u8 usb:1;
  678. };
  679. /* codec hifi mclk clock divider coefficients */
  680. static const struct _coeff_div coeff_div[] = {
  681. /* 8k */
  682. {12288000, 8000, 1536, 0x6, 0x0},
  683. {11289600, 8000, 1408, 0x16, 0x0},
  684. {18432000, 8000, 2304, 0x7, 0x0},
  685. {16934400, 8000, 2112, 0x17, 0x0},
  686. {12000000, 8000, 1500, 0x6, 0x1},
  687. /* 11.025k */
  688. {11289600, 11025, 1024, 0x18, 0x0},
  689. {16934400, 11025, 1536, 0x19, 0x0},
  690. {12000000, 11025, 1088, 0x19, 0x1},
  691. /* 16k */
  692. {12288000, 16000, 768, 0xa, 0x0},
  693. {18432000, 16000, 1152, 0xb, 0x0},
  694. {12000000, 16000, 750, 0xa, 0x1},
  695. /* 22.05k */
  696. {11289600, 22050, 512, 0x1a, 0x0},
  697. {16934400, 22050, 768, 0x1b, 0x0},
  698. {12000000, 22050, 544, 0x1b, 0x1},
  699. /* 32k */
  700. {12288000, 32000, 384, 0xc, 0x0},
  701. {18432000, 32000, 576, 0xd, 0x0},
  702. {12000000, 32000, 375, 0xa, 0x1},
  703. /* 44.1k */
  704. {11289600, 44100, 256, 0x10, 0x0},
  705. {16934400, 44100, 384, 0x11, 0x0},
  706. {12000000, 44100, 272, 0x11, 0x1},
  707. /* 48k */
  708. {12288000, 48000, 256, 0x0, 0x0},
  709. {18432000, 48000, 384, 0x1, 0x0},
  710. {12000000, 48000, 250, 0x0, 0x1},
  711. /* 88.2k */
  712. {11289600, 88200, 128, 0x1e, 0x0},
  713. {16934400, 88200, 192, 0x1f, 0x0},
  714. {12000000, 88200, 136, 0x1f, 0x1},
  715. /* 96k */
  716. {12288000, 96000, 128, 0xe, 0x0},
  717. {18432000, 96000, 192, 0xf, 0x0},
  718. {12000000, 96000, 125, 0xe, 0x1},
  719. };
  720. static inline int get_coeff(int mclk, int rate)
  721. {
  722. int i;
  723. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  724. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  725. return i;
  726. }
  727. printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
  728. mclk, rate);
  729. return -EINVAL;
  730. }
  731. /* WM8750 supports numerous input clocks per sample rate */
  732. static unsigned int wm8750_config_sysclk(struct snd_soc_codec_dai *dai,
  733. struct snd_soc_clock_info *info, unsigned int clk)
  734. {
  735. dai->mclk = clk;
  736. return dai->mclk;
  737. }
  738. static int wm8750_pcm_prepare(struct snd_pcm_substream *substream)
  739. {
  740. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  741. struct snd_soc_device *socdev = rtd->socdev;
  742. struct snd_soc_codec *codec = socdev->codec;
  743. u16 iface = 0, bfs, srate = 0;
  744. int i = get_coeff(rtd->codec_dai->mclk,
  745. snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate));
  746. /* is coefficient valid ? */
  747. if (i < 0)
  748. return i;
  749. bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs);
  750. /* set master/slave audio interface */
  751. switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
  752. case SND_SOC_DAIFMT_CBM_CFM:
  753. iface = 0x0040;
  754. break;
  755. case SND_SOC_DAIFMT_CBS_CFS:
  756. break;
  757. }
  758. /* interface format */
  759. switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  760. case SND_SOC_DAIFMT_I2S:
  761. iface |= 0x0002;
  762. break;
  763. case SND_SOC_DAIFMT_RIGHT_J:
  764. break;
  765. case SND_SOC_DAIFMT_LEFT_J:
  766. iface |= 0x0001;
  767. break;
  768. case SND_SOC_DAIFMT_DSP_A:
  769. iface |= 0x0003;
  770. break;
  771. case SND_SOC_DAIFMT_DSP_B:
  772. iface |= 0x0013;
  773. break;
  774. }
  775. /* bit size */
  776. switch (rtd->codec_dai->dai_runtime.pcmfmt) {
  777. case SNDRV_PCM_FMTBIT_S16_LE:
  778. break;
  779. case SNDRV_PCM_FMTBIT_S20_3LE:
  780. iface |= 0x0004;
  781. break;
  782. case SNDRV_PCM_FMTBIT_S24_LE:
  783. iface |= 0x0008;
  784. break;
  785. case SNDRV_PCM_FMTBIT_S32_LE:
  786. iface |= 0x000c;
  787. break;
  788. }
  789. /* clock inversion */
  790. switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) {
  791. case SND_SOC_DAIFMT_NB_NF:
  792. break;
  793. case SND_SOC_DAIFMT_IB_IF:
  794. iface |= 0x0090;
  795. break;
  796. case SND_SOC_DAIFMT_IB_NF:
  797. iface |= 0x0080;
  798. break;
  799. case SND_SOC_DAIFMT_NB_IF:
  800. iface |= 0x0010;
  801. break;
  802. }
  803. /* set bclk divisor rate */
  804. switch (bfs) {
  805. case 1:
  806. break;
  807. case 4:
  808. srate |= (0x1 << 7);
  809. break;
  810. case 8:
  811. srate |= (0x2 << 7);
  812. break;
  813. case 16:
  814. srate |= (0x3 << 7);
  815. break;
  816. }
  817. /* set iface & srate */
  818. wm8750_write(codec, WM8750_IFACE, iface);
  819. wm8750_write(codec, WM8750_SRATE, srate |
  820. (coeff_div[i].sr << 1) | coeff_div[i].usb);
  821. return 0;
  822. }
  823. static int wm8750_mute(struct snd_soc_codec *codec,
  824. struct snd_soc_codec_dai *dai, int mute)
  825. {
  826. u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
  827. if (mute)
  828. wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
  829. else
  830. wm8750_write(codec, WM8750_ADCDAC, mute_reg);
  831. return 0;
  832. }
  833. static int wm8750_dapm_event(struct snd_soc_codec *codec, int event)
  834. {
  835. u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
  836. switch (event) {
  837. case SNDRV_CTL_POWER_D0: /* full On */
  838. /* set vmid to 50k and unmute dac */
  839. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
  840. break;
  841. case SNDRV_CTL_POWER_D1: /* partial On */
  842. case SNDRV_CTL_POWER_D2: /* partial On */
  843. /* set vmid to 5k for quick power up */
  844. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
  845. break;
  846. case SNDRV_CTL_POWER_D3hot: /* Off, with power */
  847. /* mute dac and set vmid to 500k, enable VREF */
  848. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
  849. break;
  850. case SNDRV_CTL_POWER_D3cold: /* Off, without power */
  851. wm8750_write(codec, WM8750_PWR1, 0x0001);
  852. break;
  853. }
  854. codec->dapm_state = event;
  855. return 0;
  856. }
  857. struct snd_soc_codec_dai wm8750_dai = {
  858. .name = "WM8750",
  859. .playback = {
  860. .stream_name = "Playback",
  861. .channels_min = 1,
  862. .channels_max = 2,
  863. },
  864. .capture = {
  865. .stream_name = "Capture",
  866. .channels_min = 1,
  867. .channels_max = 2,
  868. },
  869. .config_sysclk = wm8750_config_sysclk,
  870. .digital_mute = wm8750_mute,
  871. .ops = {
  872. .prepare = wm8750_pcm_prepare,
  873. },
  874. .caps = {
  875. .num_modes = ARRAY_SIZE(wm8750_modes),
  876. .mode = wm8750_modes,
  877. },
  878. };
  879. EXPORT_SYMBOL_GPL(wm8750_dai);
  880. static void wm8750_work(struct work_struct *work)
  881. {
  882. struct snd_soc_codec *codec =
  883. container_of(work, struct snd_soc_codec, delayed_work.work);
  884. wm8750_dapm_event(codec, codec->dapm_state);
  885. }
  886. static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
  887. {
  888. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  889. struct snd_soc_codec *codec = socdev->codec;
  890. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  891. return 0;
  892. }
  893. static int wm8750_resume(struct platform_device *pdev)
  894. {
  895. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  896. struct snd_soc_codec *codec = socdev->codec;
  897. int i;
  898. u8 data[2];
  899. u16 *cache = codec->reg_cache;
  900. /* Sync reg_cache with the hardware */
  901. for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
  902. if (i == WM8750_RESET)
  903. continue;
  904. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  905. data[1] = cache[i] & 0x00ff;
  906. codec->hw_write(codec->control_data, data, 2);
  907. }
  908. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
  909. /* charge wm8750 caps */
  910. if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) {
  911. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  912. codec->dapm_state = SNDRV_CTL_POWER_D0;
  913. schedule_delayed_work(&codec->delayed_work,
  914. msecs_to_jiffies(1000));
  915. }
  916. return 0;
  917. }
  918. /*
  919. * initialise the WM8750 driver
  920. * register the mixer and dsp interfaces with the kernel
  921. */
  922. static int wm8750_init(struct snd_soc_device *socdev)
  923. {
  924. struct snd_soc_codec *codec = socdev->codec;
  925. int reg, ret = 0;
  926. codec->name = "WM8750";
  927. codec->owner = THIS_MODULE;
  928. codec->read = wm8750_read_reg_cache;
  929. codec->write = wm8750_write;
  930. codec->dapm_event = wm8750_dapm_event;
  931. codec->dai = &wm8750_dai;
  932. codec->num_dai = 1;
  933. codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
  934. codec->reg_cache =
  935. kzalloc(sizeof(u16) * ARRAY_SIZE(wm8750_reg), GFP_KERNEL);
  936. if (codec->reg_cache == NULL)
  937. return -ENOMEM;
  938. memcpy(codec->reg_cache, wm8750_reg,
  939. sizeof(u16) * ARRAY_SIZE(wm8750_reg));
  940. codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8750_reg);
  941. wm8750_reset(codec);
  942. /* register pcms */
  943. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  944. if (ret < 0) {
  945. printk(KERN_ERR "wm8750: failed to create pcms\n");
  946. goto pcm_err;
  947. }
  948. /* charge output caps */
  949. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  950. codec->dapm_state = SNDRV_CTL_POWER_D3hot;
  951. schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
  952. /* set the update bits */
  953. reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
  954. wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
  955. reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
  956. wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
  957. reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
  958. wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
  959. reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
  960. wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
  961. reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
  962. wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
  963. reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
  964. wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
  965. reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
  966. wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
  967. reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
  968. wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
  969. wm8750_add_controls(codec);
  970. wm8750_add_widgets(codec);
  971. ret = snd_soc_register_card(socdev);
  972. if (ret < 0) {
  973. printk(KERN_ERR "wm8750: failed to register card\n");
  974. goto card_err;
  975. }
  976. return ret;
  977. card_err:
  978. snd_soc_free_pcms(socdev);
  979. snd_soc_dapm_free(socdev);
  980. pcm_err:
  981. kfree(codec->reg_cache);
  982. return ret;
  983. }
  984. /* If the i2c layer weren't so broken, we could pass this kind of data
  985. around */
  986. static struct snd_soc_device *wm8750_socdev;
  987. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  988. /*
  989. * WM8731 2 wire address is determined by GPIO5
  990. * state during powerup.
  991. * low = 0x1a
  992. * high = 0x1b
  993. */
  994. static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
  995. /* Magic definition of all other variables and things */
  996. I2C_CLIENT_INSMOD;
  997. static struct i2c_driver wm8750_i2c_driver;
  998. static struct i2c_client client_template;
  999. static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
  1000. {
  1001. struct snd_soc_device *socdev = wm8750_socdev;
  1002. struct wm8750_setup_data *setup = socdev->codec_data;
  1003. struct snd_soc_codec *codec = socdev->codec;
  1004. struct i2c_client *i2c;
  1005. int ret;
  1006. if (addr != setup->i2c_address)
  1007. return -ENODEV;
  1008. client_template.adapter = adap;
  1009. client_template.addr = addr;
  1010. i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  1011. if (i2c == NULL) {
  1012. kfree(codec);
  1013. return -ENOMEM;
  1014. }
  1015. memcpy(i2c, &client_template, sizeof(struct i2c_client));
  1016. i2c_set_clientdata(i2c, codec);
  1017. codec->control_data = i2c;
  1018. ret = i2c_attach_client(i2c);
  1019. if (ret < 0) {
  1020. err("failed to attach codec at addr %x\n", addr);
  1021. goto err;
  1022. }
  1023. ret = wm8750_init(socdev);
  1024. if (ret < 0) {
  1025. err("failed to initialise WM8750\n");
  1026. goto err;
  1027. }
  1028. return ret;
  1029. err:
  1030. kfree(codec);
  1031. kfree(i2c);
  1032. return ret;
  1033. }
  1034. static int wm8750_i2c_detach(struct i2c_client *client)
  1035. {
  1036. struct snd_soc_codec *codec = i2c_get_clientdata(client);
  1037. i2c_detach_client(client);
  1038. kfree(codec->reg_cache);
  1039. kfree(client);
  1040. return 0;
  1041. }
  1042. static int wm8750_i2c_attach(struct i2c_adapter *adap)
  1043. {
  1044. return i2c_probe(adap, &addr_data, wm8750_codec_probe);
  1045. }
  1046. /* corgi i2c codec control layer */
  1047. static struct i2c_driver wm8750_i2c_driver = {
  1048. .driver = {
  1049. .name = "WM8750 I2C Codec",
  1050. .owner = THIS_MODULE,
  1051. },
  1052. .id = I2C_DRIVERID_WM8750,
  1053. .attach_adapter = wm8750_i2c_attach,
  1054. .detach_client = wm8750_i2c_detach,
  1055. .command = NULL,
  1056. };
  1057. static struct i2c_client client_template = {
  1058. .name = "WM8750",
  1059. .driver = &wm8750_i2c_driver,
  1060. };
  1061. #endif
  1062. static int wm8750_probe(struct platform_device *pdev)
  1063. {
  1064. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1065. struct wm8750_setup_data *setup = socdev->codec_data;
  1066. struct snd_soc_codec *codec;
  1067. int ret = 0;
  1068. info("WM8750 Audio Codec %s", WM8750_VERSION);
  1069. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  1070. if (codec == NULL)
  1071. return -ENOMEM;
  1072. socdev->codec = codec;
  1073. mutex_init(&codec->mutex);
  1074. INIT_LIST_HEAD(&codec->dapm_widgets);
  1075. INIT_LIST_HEAD(&codec->dapm_paths);
  1076. wm8750_socdev = socdev;
  1077. INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
  1078. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  1079. if (setup->i2c_address) {
  1080. normal_i2c[0] = setup->i2c_address;
  1081. codec->hw_write = (hw_write_t)i2c_master_send;
  1082. ret = i2c_add_driver(&wm8750_i2c_driver);
  1083. if (ret != 0)
  1084. printk(KERN_ERR "can't add i2c driver");
  1085. }
  1086. #else
  1087. /* Add other interfaces here */
  1088. #endif
  1089. return ret;
  1090. }
  1091. /* power down chip */
  1092. static int wm8750_remove(struct platform_device *pdev)
  1093. {
  1094. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1095. struct snd_soc_codec *codec = socdev->codec;
  1096. if (codec->control_data)
  1097. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  1098. flush_scheduled_work();
  1099. snd_soc_free_pcms(socdev);
  1100. snd_soc_dapm_free(socdev);
  1101. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  1102. i2c_del_driver(&wm8750_i2c_driver);
  1103. #endif
  1104. kfree(codec);
  1105. return 0;
  1106. }
  1107. struct snd_soc_codec_device soc_codec_dev_wm8750 = {
  1108. .probe = wm8750_probe,
  1109. .remove = wm8750_remove,
  1110. .suspend = wm8750_suspend,
  1111. .resume = wm8750_resume,
  1112. };
  1113. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
  1114. MODULE_DESCRIPTION("ASoC WM8750 driver");
  1115. MODULE_AUTHOR("Liam Girdwood");
  1116. MODULE_LICENSE("GPL");