fsl_soc.c 33 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/phy_fixed.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/fsl_devices.h>
  29. #include <linux/fs_enet_pd.h>
  30. #include <linux/fs_uart_pd.h>
  31. #include <asm/system.h>
  32. #include <asm/atomic.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/time.h>
  36. #include <asm/prom.h>
  37. #include <sysdev/fsl_soc.h>
  38. #include <mm/mmu_decl.h>
  39. #include <asm/cpm2.h>
  40. extern void init_fcc_ioports(struct fs_platform_info*);
  41. extern void init_fec_ioports(struct fs_platform_info*);
  42. extern void init_smc_ioports(struct fs_uart_platform_info*);
  43. static phys_addr_t immrbase = -1;
  44. phys_addr_t get_immrbase(void)
  45. {
  46. struct device_node *soc;
  47. if (immrbase != -1)
  48. return immrbase;
  49. soc = of_find_node_by_type(NULL, "soc");
  50. if (soc) {
  51. int size;
  52. u32 naddr;
  53. const u32 *prop = of_get_property(soc, "#address-cells", &size);
  54. if (prop && size == 4)
  55. naddr = *prop;
  56. else
  57. naddr = 2;
  58. prop = of_get_property(soc, "ranges", &size);
  59. if (prop)
  60. immrbase = of_translate_address(soc, prop + naddr);
  61. of_node_put(soc);
  62. }
  63. return immrbase;
  64. }
  65. EXPORT_SYMBOL(get_immrbase);
  66. #if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
  67. static u32 brgfreq = -1;
  68. u32 get_brgfreq(void)
  69. {
  70. struct device_node *node;
  71. const unsigned int *prop;
  72. int size;
  73. if (brgfreq != -1)
  74. return brgfreq;
  75. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  76. if (node) {
  77. prop = of_get_property(node, "clock-frequency", &size);
  78. if (prop && size == 4)
  79. brgfreq = *prop;
  80. of_node_put(node);
  81. return brgfreq;
  82. }
  83. /* Legacy device binding -- will go away when no users are left. */
  84. node = of_find_node_by_type(NULL, "cpm");
  85. if (!node)
  86. node = of_find_compatible_node(NULL, NULL, "fsl,qe");
  87. if (!node)
  88. node = of_find_node_by_type(NULL, "qe");
  89. if (node) {
  90. prop = of_get_property(node, "brg-frequency", &size);
  91. if (prop && size == 4)
  92. brgfreq = *prop;
  93. if (brgfreq == -1 || brgfreq == 0) {
  94. prop = of_get_property(node, "bus-frequency", &size);
  95. if (prop && size == 4)
  96. brgfreq = *prop / 2;
  97. }
  98. of_node_put(node);
  99. }
  100. return brgfreq;
  101. }
  102. EXPORT_SYMBOL(get_brgfreq);
  103. static u32 fs_baudrate = -1;
  104. u32 get_baudrate(void)
  105. {
  106. struct device_node *node;
  107. if (fs_baudrate != -1)
  108. return fs_baudrate;
  109. node = of_find_node_by_type(NULL, "serial");
  110. if (node) {
  111. int size;
  112. const unsigned int *prop = of_get_property(node,
  113. "current-speed", &size);
  114. if (prop)
  115. fs_baudrate = *prop;
  116. of_node_put(node);
  117. }
  118. return fs_baudrate;
  119. }
  120. EXPORT_SYMBOL(get_baudrate);
  121. #endif /* CONFIG_CPM2 */
  122. #ifdef CONFIG_FIXED_PHY
  123. static int __init of_add_fixed_phys(void)
  124. {
  125. int ret;
  126. struct device_node *np;
  127. u32 *fixed_link;
  128. struct fixed_phy_status status = {};
  129. for_each_node_by_name(np, "ethernet") {
  130. fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
  131. if (!fixed_link)
  132. continue;
  133. status.link = 1;
  134. status.duplex = fixed_link[1];
  135. status.speed = fixed_link[2];
  136. status.pause = fixed_link[3];
  137. status.asym_pause = fixed_link[4];
  138. ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
  139. if (ret) {
  140. of_node_put(np);
  141. return ret;
  142. }
  143. }
  144. return 0;
  145. }
  146. arch_initcall(of_add_fixed_phys);
  147. #endif /* CONFIG_FIXED_PHY */
  148. static int __init gfar_mdio_of_init(void)
  149. {
  150. struct device_node *np = NULL;
  151. struct platform_device *mdio_dev;
  152. struct resource res;
  153. int ret;
  154. np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
  155. /* try the deprecated version */
  156. if (!np)
  157. np = of_find_compatible_node(np, "mdio", "gianfar");
  158. if (np) {
  159. int k;
  160. struct device_node *child = NULL;
  161. struct gianfar_mdio_data mdio_data;
  162. memset(&res, 0, sizeof(res));
  163. memset(&mdio_data, 0, sizeof(mdio_data));
  164. ret = of_address_to_resource(np, 0, &res);
  165. if (ret)
  166. goto err;
  167. mdio_dev =
  168. platform_device_register_simple("fsl-gianfar_mdio",
  169. res.start, &res, 1);
  170. if (IS_ERR(mdio_dev)) {
  171. ret = PTR_ERR(mdio_dev);
  172. goto err;
  173. }
  174. for (k = 0; k < 32; k++)
  175. mdio_data.irq[k] = PHY_POLL;
  176. while ((child = of_get_next_child(np, child)) != NULL) {
  177. int irq = irq_of_parse_and_map(child, 0);
  178. if (irq != NO_IRQ) {
  179. const u32 *id = of_get_property(child,
  180. "reg", NULL);
  181. mdio_data.irq[*id] = irq;
  182. }
  183. }
  184. ret =
  185. platform_device_add_data(mdio_dev, &mdio_data,
  186. sizeof(struct gianfar_mdio_data));
  187. if (ret)
  188. goto unreg;
  189. }
  190. of_node_put(np);
  191. return 0;
  192. unreg:
  193. platform_device_unregister(mdio_dev);
  194. err:
  195. of_node_put(np);
  196. return ret;
  197. }
  198. arch_initcall(gfar_mdio_of_init);
  199. static const char *gfar_tx_intr = "tx";
  200. static const char *gfar_rx_intr = "rx";
  201. static const char *gfar_err_intr = "error";
  202. static int __init gfar_of_init(void)
  203. {
  204. struct device_node *np;
  205. unsigned int i;
  206. struct platform_device *gfar_dev;
  207. struct resource res;
  208. int ret;
  209. for (np = NULL, i = 0;
  210. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  211. i++) {
  212. struct resource r[4];
  213. struct device_node *phy, *mdio;
  214. struct gianfar_platform_data gfar_data;
  215. const unsigned int *id;
  216. const char *model;
  217. const char *ctype;
  218. const void *mac_addr;
  219. const phandle *ph;
  220. int n_res = 2;
  221. memset(r, 0, sizeof(r));
  222. memset(&gfar_data, 0, sizeof(gfar_data));
  223. ret = of_address_to_resource(np, 0, &r[0]);
  224. if (ret)
  225. goto err;
  226. of_irq_to_resource(np, 0, &r[1]);
  227. model = of_get_property(np, "model", NULL);
  228. /* If we aren't the FEC we have multiple interrupts */
  229. if (model && strcasecmp(model, "FEC")) {
  230. r[1].name = gfar_tx_intr;
  231. r[2].name = gfar_rx_intr;
  232. of_irq_to_resource(np, 1, &r[2]);
  233. r[3].name = gfar_err_intr;
  234. of_irq_to_resource(np, 2, &r[3]);
  235. n_res += 2;
  236. }
  237. gfar_dev =
  238. platform_device_register_simple("fsl-gianfar", i, &r[0],
  239. n_res);
  240. if (IS_ERR(gfar_dev)) {
  241. ret = PTR_ERR(gfar_dev);
  242. goto err;
  243. }
  244. mac_addr = of_get_mac_address(np);
  245. if (mac_addr)
  246. memcpy(gfar_data.mac_addr, mac_addr, 6);
  247. if (model && !strcasecmp(model, "TSEC"))
  248. gfar_data.device_flags =
  249. FSL_GIANFAR_DEV_HAS_GIGABIT |
  250. FSL_GIANFAR_DEV_HAS_COALESCE |
  251. FSL_GIANFAR_DEV_HAS_RMON |
  252. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  253. if (model && !strcasecmp(model, "eTSEC"))
  254. gfar_data.device_flags =
  255. FSL_GIANFAR_DEV_HAS_GIGABIT |
  256. FSL_GIANFAR_DEV_HAS_COALESCE |
  257. FSL_GIANFAR_DEV_HAS_RMON |
  258. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  259. FSL_GIANFAR_DEV_HAS_CSUM |
  260. FSL_GIANFAR_DEV_HAS_VLAN |
  261. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  262. ctype = of_get_property(np, "phy-connection-type", NULL);
  263. /* We only care about rgmii-id. The rest are autodetected */
  264. if (ctype && !strcmp(ctype, "rgmii-id"))
  265. gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
  266. else
  267. gfar_data.interface = PHY_INTERFACE_MODE_MII;
  268. ph = of_get_property(np, "phy-handle", NULL);
  269. if (ph == NULL) {
  270. u32 *fixed_link;
  271. fixed_link = (u32 *)of_get_property(np, "fixed-link",
  272. NULL);
  273. if (!fixed_link) {
  274. ret = -ENODEV;
  275. goto unreg;
  276. }
  277. snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
  278. gfar_data.phy_id = fixed_link[0];
  279. } else {
  280. phy = of_find_node_by_phandle(*ph);
  281. if (phy == NULL) {
  282. ret = -ENODEV;
  283. goto unreg;
  284. }
  285. mdio = of_get_parent(phy);
  286. id = of_get_property(phy, "reg", NULL);
  287. ret = of_address_to_resource(mdio, 0, &res);
  288. if (ret) {
  289. of_node_put(phy);
  290. of_node_put(mdio);
  291. goto unreg;
  292. }
  293. gfar_data.phy_id = *id;
  294. snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%x",
  295. res.start);
  296. of_node_put(phy);
  297. of_node_put(mdio);
  298. }
  299. ret =
  300. platform_device_add_data(gfar_dev, &gfar_data,
  301. sizeof(struct
  302. gianfar_platform_data));
  303. if (ret)
  304. goto unreg;
  305. }
  306. return 0;
  307. unreg:
  308. platform_device_unregister(gfar_dev);
  309. err:
  310. return ret;
  311. }
  312. arch_initcall(gfar_of_init);
  313. #ifdef CONFIG_I2C_BOARDINFO
  314. #include <linux/i2c.h>
  315. struct i2c_driver_device {
  316. char *of_device;
  317. char *i2c_driver;
  318. char *i2c_type;
  319. };
  320. static struct i2c_driver_device i2c_devices[] __initdata = {
  321. {"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",},
  322. {"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",},
  323. {"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",},
  324. {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
  325. {"dallas,ds1307", "rtc-ds1307", "ds1307",},
  326. {"dallas,ds1337", "rtc-ds1307", "ds1337",},
  327. {"dallas,ds1338", "rtc-ds1307", "ds1338",},
  328. {"dallas,ds1339", "rtc-ds1307", "ds1339",},
  329. {"dallas,ds1340", "rtc-ds1307", "ds1340",},
  330. {"stm,m41t00", "rtc-ds1307", "m41t00"},
  331. {"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
  332. };
  333. static int __init of_find_i2c_driver(struct device_node *node,
  334. struct i2c_board_info *info)
  335. {
  336. int i;
  337. for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
  338. if (!of_device_is_compatible(node, i2c_devices[i].of_device))
  339. continue;
  340. if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver,
  341. KOBJ_NAME_LEN) >= KOBJ_NAME_LEN ||
  342. strlcpy(info->type, i2c_devices[i].i2c_type,
  343. I2C_NAME_SIZE) >= I2C_NAME_SIZE)
  344. return -ENOMEM;
  345. return 0;
  346. }
  347. return -ENODEV;
  348. }
  349. static void __init of_register_i2c_devices(struct device_node *adap_node,
  350. int bus_num)
  351. {
  352. struct device_node *node = NULL;
  353. while ((node = of_get_next_child(adap_node, node))) {
  354. struct i2c_board_info info = {};
  355. const u32 *addr;
  356. int len;
  357. addr = of_get_property(node, "reg", &len);
  358. if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
  359. printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
  360. continue;
  361. }
  362. info.irq = irq_of_parse_and_map(node, 0);
  363. if (info.irq == NO_IRQ)
  364. info.irq = -1;
  365. if (of_find_i2c_driver(node, &info) < 0)
  366. continue;
  367. info.addr = *addr;
  368. i2c_register_board_info(bus_num, &info, 1);
  369. }
  370. }
  371. static int __init fsl_i2c_of_init(void)
  372. {
  373. struct device_node *np;
  374. unsigned int i = 0;
  375. struct platform_device *i2c_dev;
  376. int ret;
  377. for_each_compatible_node(np, NULL, "fsl-i2c") {
  378. struct resource r[2];
  379. struct fsl_i2c_platform_data i2c_data;
  380. const unsigned char *flags = NULL;
  381. memset(&r, 0, sizeof(r));
  382. memset(&i2c_data, 0, sizeof(i2c_data));
  383. ret = of_address_to_resource(np, 0, &r[0]);
  384. if (ret)
  385. goto err;
  386. of_irq_to_resource(np, 0, &r[1]);
  387. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  388. if (IS_ERR(i2c_dev)) {
  389. ret = PTR_ERR(i2c_dev);
  390. goto err;
  391. }
  392. i2c_data.device_flags = 0;
  393. flags = of_get_property(np, "dfsrr", NULL);
  394. if (flags)
  395. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  396. flags = of_get_property(np, "fsl5200-clocking", NULL);
  397. if (flags)
  398. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  399. ret =
  400. platform_device_add_data(i2c_dev, &i2c_data,
  401. sizeof(struct
  402. fsl_i2c_platform_data));
  403. if (ret)
  404. goto unreg;
  405. of_register_i2c_devices(np, i++);
  406. }
  407. return 0;
  408. unreg:
  409. platform_device_unregister(i2c_dev);
  410. err:
  411. return ret;
  412. }
  413. arch_initcall(fsl_i2c_of_init);
  414. #endif
  415. #ifdef CONFIG_PPC_83xx
  416. static int __init mpc83xx_wdt_init(void)
  417. {
  418. struct resource r;
  419. struct device_node *soc, *np;
  420. struct platform_device *dev;
  421. const unsigned int *freq;
  422. int ret;
  423. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  424. if (!np) {
  425. ret = -ENODEV;
  426. goto nodev;
  427. }
  428. soc = of_find_node_by_type(NULL, "soc");
  429. if (!soc) {
  430. ret = -ENODEV;
  431. goto nosoc;
  432. }
  433. freq = of_get_property(soc, "bus-frequency", NULL);
  434. if (!freq) {
  435. ret = -ENODEV;
  436. goto err;
  437. }
  438. memset(&r, 0, sizeof(r));
  439. ret = of_address_to_resource(np, 0, &r);
  440. if (ret)
  441. goto err;
  442. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  443. if (IS_ERR(dev)) {
  444. ret = PTR_ERR(dev);
  445. goto err;
  446. }
  447. ret = platform_device_add_data(dev, freq, sizeof(int));
  448. if (ret)
  449. goto unreg;
  450. of_node_put(soc);
  451. of_node_put(np);
  452. return 0;
  453. unreg:
  454. platform_device_unregister(dev);
  455. err:
  456. of_node_put(soc);
  457. nosoc:
  458. of_node_put(np);
  459. nodev:
  460. return ret;
  461. }
  462. arch_initcall(mpc83xx_wdt_init);
  463. #endif
  464. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  465. {
  466. if (!phy_type)
  467. return FSL_USB2_PHY_NONE;
  468. if (!strcasecmp(phy_type, "ulpi"))
  469. return FSL_USB2_PHY_ULPI;
  470. if (!strcasecmp(phy_type, "utmi"))
  471. return FSL_USB2_PHY_UTMI;
  472. if (!strcasecmp(phy_type, "utmi_wide"))
  473. return FSL_USB2_PHY_UTMI_WIDE;
  474. if (!strcasecmp(phy_type, "serial"))
  475. return FSL_USB2_PHY_SERIAL;
  476. return FSL_USB2_PHY_NONE;
  477. }
  478. static int __init fsl_usb_of_init(void)
  479. {
  480. struct device_node *np;
  481. unsigned int i = 0;
  482. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  483. *usb_dev_dr_client = NULL;
  484. int ret;
  485. for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
  486. struct resource r[2];
  487. struct fsl_usb2_platform_data usb_data;
  488. const unsigned char *prop = NULL;
  489. memset(&r, 0, sizeof(r));
  490. memset(&usb_data, 0, sizeof(usb_data));
  491. ret = of_address_to_resource(np, 0, &r[0]);
  492. if (ret)
  493. goto err;
  494. of_irq_to_resource(np, 0, &r[1]);
  495. usb_dev_mph =
  496. platform_device_register_simple("fsl-ehci", i, r, 2);
  497. if (IS_ERR(usb_dev_mph)) {
  498. ret = PTR_ERR(usb_dev_mph);
  499. goto err;
  500. }
  501. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  502. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  503. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  504. prop = of_get_property(np, "port0", NULL);
  505. if (prop)
  506. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  507. prop = of_get_property(np, "port1", NULL);
  508. if (prop)
  509. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  510. prop = of_get_property(np, "phy_type", NULL);
  511. usb_data.phy_mode = determine_usb_phy(prop);
  512. ret =
  513. platform_device_add_data(usb_dev_mph, &usb_data,
  514. sizeof(struct
  515. fsl_usb2_platform_data));
  516. if (ret)
  517. goto unreg_mph;
  518. i++;
  519. }
  520. for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
  521. struct resource r[2];
  522. struct fsl_usb2_platform_data usb_data;
  523. const unsigned char *prop = NULL;
  524. memset(&r, 0, sizeof(r));
  525. memset(&usb_data, 0, sizeof(usb_data));
  526. ret = of_address_to_resource(np, 0, &r[0]);
  527. if (ret)
  528. goto unreg_mph;
  529. of_irq_to_resource(np, 0, &r[1]);
  530. prop = of_get_property(np, "dr_mode", NULL);
  531. if (!prop || !strcmp(prop, "host")) {
  532. usb_data.operating_mode = FSL_USB2_DR_HOST;
  533. usb_dev_dr_host = platform_device_register_simple(
  534. "fsl-ehci", i, r, 2);
  535. if (IS_ERR(usb_dev_dr_host)) {
  536. ret = PTR_ERR(usb_dev_dr_host);
  537. goto err;
  538. }
  539. } else if (prop && !strcmp(prop, "peripheral")) {
  540. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  541. usb_dev_dr_client = platform_device_register_simple(
  542. "fsl-usb2-udc", i, r, 2);
  543. if (IS_ERR(usb_dev_dr_client)) {
  544. ret = PTR_ERR(usb_dev_dr_client);
  545. goto err;
  546. }
  547. } else if (prop && !strcmp(prop, "otg")) {
  548. usb_data.operating_mode = FSL_USB2_DR_OTG;
  549. usb_dev_dr_host = platform_device_register_simple(
  550. "fsl-ehci", i, r, 2);
  551. if (IS_ERR(usb_dev_dr_host)) {
  552. ret = PTR_ERR(usb_dev_dr_host);
  553. goto err;
  554. }
  555. usb_dev_dr_client = platform_device_register_simple(
  556. "fsl-usb2-udc", i, r, 2);
  557. if (IS_ERR(usb_dev_dr_client)) {
  558. ret = PTR_ERR(usb_dev_dr_client);
  559. goto err;
  560. }
  561. } else {
  562. ret = -EINVAL;
  563. goto err;
  564. }
  565. prop = of_get_property(np, "phy_type", NULL);
  566. usb_data.phy_mode = determine_usb_phy(prop);
  567. if (usb_dev_dr_host) {
  568. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  569. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  570. dev.coherent_dma_mask;
  571. if ((ret = platform_device_add_data(usb_dev_dr_host,
  572. &usb_data, sizeof(struct
  573. fsl_usb2_platform_data))))
  574. goto unreg_dr;
  575. }
  576. if (usb_dev_dr_client) {
  577. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  578. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  579. dev.coherent_dma_mask;
  580. if ((ret = platform_device_add_data(usb_dev_dr_client,
  581. &usb_data, sizeof(struct
  582. fsl_usb2_platform_data))))
  583. goto unreg_dr;
  584. }
  585. i++;
  586. }
  587. return 0;
  588. unreg_dr:
  589. if (usb_dev_dr_host)
  590. platform_device_unregister(usb_dev_dr_host);
  591. if (usb_dev_dr_client)
  592. platform_device_unregister(usb_dev_dr_client);
  593. unreg_mph:
  594. if (usb_dev_mph)
  595. platform_device_unregister(usb_dev_mph);
  596. err:
  597. return ret;
  598. }
  599. arch_initcall(fsl_usb_of_init);
  600. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  601. #ifdef CONFIG_CPM2
  602. extern void init_scc_ioports(struct fs_uart_platform_info*);
  603. static const char fcc_regs[] = "fcc_regs";
  604. static const char fcc_regs_c[] = "fcc_regs_c";
  605. static const char fcc_pram[] = "fcc_pram";
  606. static char bus_id[9][BUS_ID_SIZE];
  607. static int __init fs_enet_of_init(void)
  608. {
  609. struct device_node *np;
  610. unsigned int i;
  611. struct platform_device *fs_enet_dev;
  612. struct resource res;
  613. int ret;
  614. for (np = NULL, i = 0;
  615. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  616. i++) {
  617. struct resource r[4];
  618. struct device_node *phy, *mdio;
  619. struct fs_platform_info fs_enet_data;
  620. const unsigned int *id, *phy_addr, *phy_irq;
  621. const void *mac_addr;
  622. const phandle *ph;
  623. const char *model;
  624. memset(r, 0, sizeof(r));
  625. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  626. ret = of_address_to_resource(np, 0, &r[0]);
  627. if (ret)
  628. goto err;
  629. r[0].name = fcc_regs;
  630. ret = of_address_to_resource(np, 1, &r[1]);
  631. if (ret)
  632. goto err;
  633. r[1].name = fcc_pram;
  634. ret = of_address_to_resource(np, 2, &r[2]);
  635. if (ret)
  636. goto err;
  637. r[2].name = fcc_regs_c;
  638. fs_enet_data.fcc_regs_c = r[2].start;
  639. of_irq_to_resource(np, 0, &r[3]);
  640. fs_enet_dev =
  641. platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
  642. if (IS_ERR(fs_enet_dev)) {
  643. ret = PTR_ERR(fs_enet_dev);
  644. goto err;
  645. }
  646. model = of_get_property(np, "model", NULL);
  647. if (model == NULL) {
  648. ret = -ENODEV;
  649. goto unreg;
  650. }
  651. mac_addr = of_get_mac_address(np);
  652. if (mac_addr)
  653. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  654. ph = of_get_property(np, "phy-handle", NULL);
  655. phy = of_find_node_by_phandle(*ph);
  656. if (phy == NULL) {
  657. ret = -ENODEV;
  658. goto unreg;
  659. }
  660. phy_addr = of_get_property(phy, "reg", NULL);
  661. fs_enet_data.phy_addr = *phy_addr;
  662. phy_irq = of_get_property(phy, "interrupts", NULL);
  663. id = of_get_property(np, "device-id", NULL);
  664. fs_enet_data.fs_no = *id;
  665. strcpy(fs_enet_data.fs_type, model);
  666. mdio = of_get_parent(phy);
  667. ret = of_address_to_resource(mdio, 0, &res);
  668. if (ret) {
  669. of_node_put(phy);
  670. of_node_put(mdio);
  671. goto unreg;
  672. }
  673. fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
  674. "rx-clock", NULL));
  675. fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
  676. "tx-clock", NULL));
  677. if (strstr(model, "FCC")) {
  678. int fcc_index = *id - 1;
  679. const unsigned char *mdio_bb_prop;
  680. fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
  681. fs_enet_data.rx_ring = 32;
  682. fs_enet_data.tx_ring = 32;
  683. fs_enet_data.rx_copybreak = 240;
  684. fs_enet_data.use_napi = 0;
  685. fs_enet_data.napi_weight = 17;
  686. fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
  687. fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
  688. fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
  689. snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
  690. (u32)res.start, fs_enet_data.phy_addr);
  691. fs_enet_data.bus_id = (char*)&bus_id[(*id)];
  692. fs_enet_data.init_ioports = init_fcc_ioports;
  693. mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
  694. if (mdio_bb_prop) {
  695. struct platform_device *fs_enet_mdio_bb_dev;
  696. struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
  697. fs_enet_mdio_bb_dev =
  698. platform_device_register_simple("fsl-bb-mdio",
  699. i, NULL, 0);
  700. memset(&fs_enet_mdio_bb_data, 0,
  701. sizeof(struct fs_mii_bb_platform_info));
  702. fs_enet_mdio_bb_data.mdio_dat.bit =
  703. mdio_bb_prop[0];
  704. fs_enet_mdio_bb_data.mdio_dir.bit =
  705. mdio_bb_prop[1];
  706. fs_enet_mdio_bb_data.mdc_dat.bit =
  707. mdio_bb_prop[2];
  708. fs_enet_mdio_bb_data.mdio_port =
  709. mdio_bb_prop[3];
  710. fs_enet_mdio_bb_data.mdc_port =
  711. mdio_bb_prop[4];
  712. fs_enet_mdio_bb_data.delay =
  713. mdio_bb_prop[5];
  714. fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
  715. fs_enet_mdio_bb_data.irq[1] = -1;
  716. fs_enet_mdio_bb_data.irq[2] = -1;
  717. fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
  718. fs_enet_mdio_bb_data.irq[31] = -1;
  719. fs_enet_mdio_bb_data.mdio_dat.offset =
  720. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  721. fs_enet_mdio_bb_data.mdio_dir.offset =
  722. (u32)&cpm2_immr->im_ioport.iop_pdirc;
  723. fs_enet_mdio_bb_data.mdc_dat.offset =
  724. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  725. ret = platform_device_add_data(
  726. fs_enet_mdio_bb_dev,
  727. &fs_enet_mdio_bb_data,
  728. sizeof(struct fs_mii_bb_platform_info));
  729. if (ret)
  730. goto unreg;
  731. }
  732. of_node_put(phy);
  733. of_node_put(mdio);
  734. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  735. sizeof(struct
  736. fs_platform_info));
  737. if (ret)
  738. goto unreg;
  739. }
  740. }
  741. return 0;
  742. unreg:
  743. platform_device_unregister(fs_enet_dev);
  744. err:
  745. return ret;
  746. }
  747. arch_initcall(fs_enet_of_init);
  748. static const char scc_regs[] = "regs";
  749. static const char scc_pram[] = "pram";
  750. static int __init cpm_uart_of_init(void)
  751. {
  752. struct device_node *np;
  753. unsigned int i;
  754. struct platform_device *cpm_uart_dev;
  755. int ret;
  756. for (np = NULL, i = 0;
  757. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  758. i++) {
  759. struct resource r[3];
  760. struct fs_uart_platform_info cpm_uart_data;
  761. const int *id;
  762. const char *model;
  763. memset(r, 0, sizeof(r));
  764. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  765. ret = of_address_to_resource(np, 0, &r[0]);
  766. if (ret)
  767. goto err;
  768. r[0].name = scc_regs;
  769. ret = of_address_to_resource(np, 1, &r[1]);
  770. if (ret)
  771. goto err;
  772. r[1].name = scc_pram;
  773. of_irq_to_resource(np, 0, &r[2]);
  774. cpm_uart_dev =
  775. platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
  776. if (IS_ERR(cpm_uart_dev)) {
  777. ret = PTR_ERR(cpm_uart_dev);
  778. goto err;
  779. }
  780. id = of_get_property(np, "device-id", NULL);
  781. cpm_uart_data.fs_no = *id;
  782. model = of_get_property(np, "model", NULL);
  783. strcpy(cpm_uart_data.fs_type, model);
  784. cpm_uart_data.uart_clk = ppc_proc_freq;
  785. cpm_uart_data.tx_num_fifo = 4;
  786. cpm_uart_data.tx_buf_size = 32;
  787. cpm_uart_data.rx_num_fifo = 4;
  788. cpm_uart_data.rx_buf_size = 32;
  789. cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
  790. "rx-clock", NULL));
  791. cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
  792. "tx-clock", NULL));
  793. ret =
  794. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  795. sizeof(struct
  796. fs_uart_platform_info));
  797. if (ret)
  798. goto unreg;
  799. }
  800. return 0;
  801. unreg:
  802. platform_device_unregister(cpm_uart_dev);
  803. err:
  804. return ret;
  805. }
  806. arch_initcall(cpm_uart_of_init);
  807. #endif /* CONFIG_CPM2 */
  808. #ifdef CONFIG_8xx
  809. extern void init_scc_ioports(struct fs_platform_info*);
  810. extern int platform_device_skip(const char *model, int id);
  811. static int __init fs_enet_mdio_of_init(void)
  812. {
  813. struct device_node *np;
  814. unsigned int i;
  815. struct platform_device *mdio_dev;
  816. struct resource res;
  817. int ret;
  818. for (np = NULL, i = 0;
  819. (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
  820. i++) {
  821. struct fs_mii_fec_platform_info mdio_data;
  822. memset(&res, 0, sizeof(res));
  823. memset(&mdio_data, 0, sizeof(mdio_data));
  824. ret = of_address_to_resource(np, 0, &res);
  825. if (ret)
  826. goto err;
  827. mdio_dev =
  828. platform_device_register_simple("fsl-cpm-fec-mdio",
  829. res.start, &res, 1);
  830. if (IS_ERR(mdio_dev)) {
  831. ret = PTR_ERR(mdio_dev);
  832. goto err;
  833. }
  834. mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
  835. ret =
  836. platform_device_add_data(mdio_dev, &mdio_data,
  837. sizeof(struct fs_mii_fec_platform_info));
  838. if (ret)
  839. goto unreg;
  840. }
  841. return 0;
  842. unreg:
  843. platform_device_unregister(mdio_dev);
  844. err:
  845. return ret;
  846. }
  847. arch_initcall(fs_enet_mdio_of_init);
  848. static const char *enet_regs = "regs";
  849. static const char *enet_pram = "pram";
  850. static const char *enet_irq = "interrupt";
  851. static char bus_id[9][BUS_ID_SIZE];
  852. static int __init fs_enet_of_init(void)
  853. {
  854. struct device_node *np;
  855. unsigned int i;
  856. struct platform_device *fs_enet_dev = NULL;
  857. struct resource res;
  858. int ret;
  859. for (np = NULL, i = 0;
  860. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  861. i++) {
  862. struct resource r[4];
  863. struct device_node *phy = NULL, *mdio = NULL;
  864. struct fs_platform_info fs_enet_data;
  865. const unsigned int *id;
  866. const unsigned int *phy_addr;
  867. const void *mac_addr;
  868. const phandle *ph;
  869. const char *model;
  870. memset(r, 0, sizeof(r));
  871. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  872. model = of_get_property(np, "model", NULL);
  873. if (model == NULL) {
  874. ret = -ENODEV;
  875. goto unreg;
  876. }
  877. id = of_get_property(np, "device-id", NULL);
  878. fs_enet_data.fs_no = *id;
  879. if (platform_device_skip(model, *id))
  880. continue;
  881. ret = of_address_to_resource(np, 0, &r[0]);
  882. if (ret)
  883. goto err;
  884. r[0].name = enet_regs;
  885. mac_addr = of_get_mac_address(np);
  886. if (mac_addr)
  887. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  888. ph = of_get_property(np, "phy-handle", NULL);
  889. if (ph != NULL)
  890. phy = of_find_node_by_phandle(*ph);
  891. if (phy != NULL) {
  892. phy_addr = of_get_property(phy, "reg", NULL);
  893. fs_enet_data.phy_addr = *phy_addr;
  894. fs_enet_data.has_phy = 1;
  895. mdio = of_get_parent(phy);
  896. ret = of_address_to_resource(mdio, 0, &res);
  897. if (ret) {
  898. of_node_put(phy);
  899. of_node_put(mdio);
  900. goto unreg;
  901. }
  902. }
  903. model = of_get_property(np, "model", NULL);
  904. strcpy(fs_enet_data.fs_type, model);
  905. if (strstr(model, "FEC")) {
  906. r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
  907. r[1].flags = IORESOURCE_IRQ;
  908. r[1].name = enet_irq;
  909. fs_enet_dev =
  910. platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
  911. if (IS_ERR(fs_enet_dev)) {
  912. ret = PTR_ERR(fs_enet_dev);
  913. goto err;
  914. }
  915. fs_enet_data.rx_ring = 128;
  916. fs_enet_data.tx_ring = 16;
  917. fs_enet_data.rx_copybreak = 240;
  918. fs_enet_data.use_napi = 1;
  919. fs_enet_data.napi_weight = 17;
  920. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
  921. (u32)res.start, fs_enet_data.phy_addr);
  922. fs_enet_data.bus_id = (char*)&bus_id[i];
  923. fs_enet_data.init_ioports = init_fec_ioports;
  924. }
  925. if (strstr(model, "SCC")) {
  926. ret = of_address_to_resource(np, 1, &r[1]);
  927. if (ret)
  928. goto err;
  929. r[1].name = enet_pram;
  930. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  931. r[2].flags = IORESOURCE_IRQ;
  932. r[2].name = enet_irq;
  933. fs_enet_dev =
  934. platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
  935. if (IS_ERR(fs_enet_dev)) {
  936. ret = PTR_ERR(fs_enet_dev);
  937. goto err;
  938. }
  939. fs_enet_data.rx_ring = 64;
  940. fs_enet_data.tx_ring = 8;
  941. fs_enet_data.rx_copybreak = 240;
  942. fs_enet_data.use_napi = 1;
  943. fs_enet_data.napi_weight = 17;
  944. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
  945. fs_enet_data.bus_id = (char*)&bus_id[i];
  946. fs_enet_data.init_ioports = init_scc_ioports;
  947. }
  948. of_node_put(phy);
  949. of_node_put(mdio);
  950. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  951. sizeof(struct
  952. fs_platform_info));
  953. if (ret)
  954. goto unreg;
  955. }
  956. return 0;
  957. unreg:
  958. platform_device_unregister(fs_enet_dev);
  959. err:
  960. return ret;
  961. }
  962. arch_initcall(fs_enet_of_init);
  963. static int __init fsl_pcmcia_of_init(void)
  964. {
  965. struct device_node *np;
  966. /*
  967. * Register all the devices which type is "pcmcia"
  968. */
  969. for_each_compatible_node(np, "pcmcia", "fsl,pq-pcmcia")
  970. of_platform_device_create(np, "m8xx-pcmcia", NULL);
  971. return 0;
  972. }
  973. arch_initcall(fsl_pcmcia_of_init);
  974. static const char *smc_regs = "regs";
  975. static const char *smc_pram = "pram";
  976. static int __init cpm_smc_uart_of_init(void)
  977. {
  978. struct device_node *np;
  979. unsigned int i;
  980. struct platform_device *cpm_uart_dev;
  981. int ret;
  982. for (np = NULL, i = 0;
  983. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  984. i++) {
  985. struct resource r[3];
  986. struct fs_uart_platform_info cpm_uart_data;
  987. const int *id;
  988. const char *model;
  989. memset(r, 0, sizeof(r));
  990. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  991. ret = of_address_to_resource(np, 0, &r[0]);
  992. if (ret)
  993. goto err;
  994. r[0].name = smc_regs;
  995. ret = of_address_to_resource(np, 1, &r[1]);
  996. if (ret)
  997. goto err;
  998. r[1].name = smc_pram;
  999. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  1000. r[2].flags = IORESOURCE_IRQ;
  1001. cpm_uart_dev =
  1002. platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
  1003. if (IS_ERR(cpm_uart_dev)) {
  1004. ret = PTR_ERR(cpm_uart_dev);
  1005. goto err;
  1006. }
  1007. model = of_get_property(np, "model", NULL);
  1008. strcpy(cpm_uart_data.fs_type, model);
  1009. id = of_get_property(np, "device-id", NULL);
  1010. cpm_uart_data.fs_no = *id;
  1011. cpm_uart_data.uart_clk = ppc_proc_freq;
  1012. cpm_uart_data.tx_num_fifo = 4;
  1013. cpm_uart_data.tx_buf_size = 32;
  1014. cpm_uart_data.rx_num_fifo = 4;
  1015. cpm_uart_data.rx_buf_size = 32;
  1016. ret =
  1017. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  1018. sizeof(struct
  1019. fs_uart_platform_info));
  1020. if (ret)
  1021. goto unreg;
  1022. }
  1023. return 0;
  1024. unreg:
  1025. platform_device_unregister(cpm_uart_dev);
  1026. err:
  1027. return ret;
  1028. }
  1029. arch_initcall(cpm_smc_uart_of_init);
  1030. #endif /* CONFIG_8xx */
  1031. #endif /* CONFIG_PPC_CPM_NEW_BINDING */
  1032. static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
  1033. struct spi_board_info *board_infos,
  1034. unsigned int num_board_infos,
  1035. void (*activate_cs)(u8 cs, u8 polarity),
  1036. void (*deactivate_cs)(u8 cs, u8 polarity))
  1037. {
  1038. struct device_node *np;
  1039. unsigned int i = 0;
  1040. for_each_compatible_node(np, type, compatible) {
  1041. int ret;
  1042. unsigned int j;
  1043. const void *prop;
  1044. struct resource res[2];
  1045. struct platform_device *pdev;
  1046. struct fsl_spi_platform_data pdata = {
  1047. .activate_cs = activate_cs,
  1048. .deactivate_cs = deactivate_cs,
  1049. };
  1050. memset(res, 0, sizeof(res));
  1051. pdata.sysclk = sysclk;
  1052. prop = of_get_property(np, "reg", NULL);
  1053. if (!prop)
  1054. goto err;
  1055. pdata.bus_num = *(u32 *)prop;
  1056. prop = of_get_property(np, "cell-index", NULL);
  1057. if (prop)
  1058. i = *(u32 *)prop;
  1059. prop = of_get_property(np, "mode", NULL);
  1060. if (prop && !strcmp(prop, "cpu-qe"))
  1061. pdata.qe_mode = 1;
  1062. for (j = 0; j < num_board_infos; j++) {
  1063. if (board_infos[j].bus_num == pdata.bus_num)
  1064. pdata.max_chipselect++;
  1065. }
  1066. if (!pdata.max_chipselect)
  1067. continue;
  1068. ret = of_address_to_resource(np, 0, &res[0]);
  1069. if (ret)
  1070. goto err;
  1071. ret = of_irq_to_resource(np, 0, &res[1]);
  1072. if (ret == NO_IRQ)
  1073. goto err;
  1074. pdev = platform_device_alloc("mpc83xx_spi", i);
  1075. if (!pdev)
  1076. goto err;
  1077. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  1078. if (ret)
  1079. goto unreg;
  1080. ret = platform_device_add_resources(pdev, res,
  1081. ARRAY_SIZE(res));
  1082. if (ret)
  1083. goto unreg;
  1084. ret = platform_device_add(pdev);
  1085. if (ret)
  1086. goto unreg;
  1087. goto next;
  1088. unreg:
  1089. platform_device_del(pdev);
  1090. err:
  1091. pr_err("%s: registration failed\n", np->full_name);
  1092. next:
  1093. i++;
  1094. }
  1095. return i;
  1096. }
  1097. int __init fsl_spi_init(struct spi_board_info *board_infos,
  1098. unsigned int num_board_infos,
  1099. void (*activate_cs)(u8 cs, u8 polarity),
  1100. void (*deactivate_cs)(u8 cs, u8 polarity))
  1101. {
  1102. u32 sysclk = -1;
  1103. int ret;
  1104. #ifdef CONFIG_QUICC_ENGINE
  1105. /* SPI controller is either clocked from QE or SoC clock */
  1106. sysclk = get_brgfreq();
  1107. #endif
  1108. if (sysclk == -1) {
  1109. struct device_node *np;
  1110. const u32 *freq;
  1111. int size;
  1112. np = of_find_node_by_type(NULL, "soc");
  1113. if (!np)
  1114. return -ENODEV;
  1115. freq = of_get_property(np, "clock-frequency", &size);
  1116. if (!freq || size != sizeof(*freq) || *freq == 0) {
  1117. freq = of_get_property(np, "bus-frequency", &size);
  1118. if (!freq || size != sizeof(*freq) || *freq == 0) {
  1119. of_node_put(np);
  1120. return -ENODEV;
  1121. }
  1122. }
  1123. sysclk = *freq;
  1124. of_node_put(np);
  1125. }
  1126. ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
  1127. num_board_infos, activate_cs, deactivate_cs);
  1128. if (!ret)
  1129. of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
  1130. num_board_infos, activate_cs, deactivate_cs);
  1131. return spi_register_board_info(board_infos, num_board_infos);
  1132. }
  1133. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  1134. static __be32 __iomem *rstcr;
  1135. static int __init setup_rstcr(void)
  1136. {
  1137. struct device_node *np;
  1138. np = of_find_node_by_name(NULL, "global-utilities");
  1139. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  1140. const u32 *prop = of_get_property(np, "reg", NULL);
  1141. if (prop) {
  1142. /* map reset control register
  1143. * 0xE00B0 is offset of reset control register
  1144. */
  1145. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  1146. if (!rstcr)
  1147. printk (KERN_EMERG "Error: reset control "
  1148. "register not mapped!\n");
  1149. }
  1150. } else
  1151. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  1152. if (np)
  1153. of_node_put(np);
  1154. return 0;
  1155. }
  1156. arch_initcall(setup_rstcr);
  1157. void fsl_rstcr_restart(char *cmd)
  1158. {
  1159. local_irq_disable();
  1160. if (rstcr)
  1161. /* set reset control register */
  1162. out_be32(rstcr, 0x2); /* HRESET_REQ */
  1163. while (1) ;
  1164. }
  1165. #endif