libata-core.c 149 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/kernel.h>
  35. #include <linux/module.h>
  36. #include <linux/pci.h>
  37. #include <linux/init.h>
  38. #include <linux/list.h>
  39. #include <linux/mm.h>
  40. #include <linux/highmem.h>
  41. #include <linux/spinlock.h>
  42. #include <linux/blkdev.h>
  43. #include <linux/delay.h>
  44. #include <linux/timer.h>
  45. #include <linux/interrupt.h>
  46. #include <linux/completion.h>
  47. #include <linux/suspend.h>
  48. #include <linux/workqueue.h>
  49. #include <linux/jiffies.h>
  50. #include <linux/scatterlist.h>
  51. #include <scsi/scsi.h>
  52. #include <scsi/scsi_cmnd.h>
  53. #include <scsi/scsi_host.h>
  54. #include <linux/libata.h>
  55. #include <asm/io.h>
  56. #include <asm/semaphore.h>
  57. #include <asm/byteorder.h>
  58. #include "libata.h"
  59. /* debounce timing parameters in msecs { interval, duration, timeout } */
  60. const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
  61. const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
  62. const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
  63. static unsigned int ata_dev_init_params(struct ata_device *dev,
  64. u16 heads, u16 sectors);
  65. static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
  66. static void ata_dev_xfermask(struct ata_device *dev);
  67. static unsigned int ata_unique_id = 1;
  68. static struct workqueue_struct *ata_wq;
  69. struct workqueue_struct *ata_aux_wq;
  70. int atapi_enabled = 1;
  71. module_param(atapi_enabled, int, 0444);
  72. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  73. int atapi_dmadir = 0;
  74. module_param(atapi_dmadir, int, 0444);
  75. MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
  76. int libata_fua = 0;
  77. module_param_named(fua, libata_fua, int, 0444);
  78. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  79. static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
  80. module_param(ata_probe_timeout, int, 0444);
  81. MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
  82. MODULE_AUTHOR("Jeff Garzik");
  83. MODULE_DESCRIPTION("Library module for ATA devices");
  84. MODULE_LICENSE("GPL");
  85. MODULE_VERSION(DRV_VERSION);
  86. /**
  87. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  88. * @tf: Taskfile to convert
  89. * @fis: Buffer into which data will output
  90. * @pmp: Port multiplier port
  91. *
  92. * Converts a standard ATA taskfile to a Serial ATA
  93. * FIS structure (Register - Host to Device).
  94. *
  95. * LOCKING:
  96. * Inherited from caller.
  97. */
  98. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  99. {
  100. fis[0] = 0x27; /* Register - Host to Device FIS */
  101. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  102. bit 7 indicates Command FIS */
  103. fis[2] = tf->command;
  104. fis[3] = tf->feature;
  105. fis[4] = tf->lbal;
  106. fis[5] = tf->lbam;
  107. fis[6] = tf->lbah;
  108. fis[7] = tf->device;
  109. fis[8] = tf->hob_lbal;
  110. fis[9] = tf->hob_lbam;
  111. fis[10] = tf->hob_lbah;
  112. fis[11] = tf->hob_feature;
  113. fis[12] = tf->nsect;
  114. fis[13] = tf->hob_nsect;
  115. fis[14] = 0;
  116. fis[15] = tf->ctl;
  117. fis[16] = 0;
  118. fis[17] = 0;
  119. fis[18] = 0;
  120. fis[19] = 0;
  121. }
  122. /**
  123. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  124. * @fis: Buffer from which data will be input
  125. * @tf: Taskfile to output
  126. *
  127. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  128. *
  129. * LOCKING:
  130. * Inherited from caller.
  131. */
  132. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  133. {
  134. tf->command = fis[2]; /* status */
  135. tf->feature = fis[3]; /* error */
  136. tf->lbal = fis[4];
  137. tf->lbam = fis[5];
  138. tf->lbah = fis[6];
  139. tf->device = fis[7];
  140. tf->hob_lbal = fis[8];
  141. tf->hob_lbam = fis[9];
  142. tf->hob_lbah = fis[10];
  143. tf->nsect = fis[12];
  144. tf->hob_nsect = fis[13];
  145. }
  146. static const u8 ata_rw_cmds[] = {
  147. /* pio multi */
  148. ATA_CMD_READ_MULTI,
  149. ATA_CMD_WRITE_MULTI,
  150. ATA_CMD_READ_MULTI_EXT,
  151. ATA_CMD_WRITE_MULTI_EXT,
  152. 0,
  153. 0,
  154. 0,
  155. ATA_CMD_WRITE_MULTI_FUA_EXT,
  156. /* pio */
  157. ATA_CMD_PIO_READ,
  158. ATA_CMD_PIO_WRITE,
  159. ATA_CMD_PIO_READ_EXT,
  160. ATA_CMD_PIO_WRITE_EXT,
  161. 0,
  162. 0,
  163. 0,
  164. 0,
  165. /* dma */
  166. ATA_CMD_READ,
  167. ATA_CMD_WRITE,
  168. ATA_CMD_READ_EXT,
  169. ATA_CMD_WRITE_EXT,
  170. 0,
  171. 0,
  172. 0,
  173. ATA_CMD_WRITE_FUA_EXT
  174. };
  175. /**
  176. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  177. * @qc: command to examine and configure
  178. *
  179. * Examine the device configuration and tf->flags to calculate
  180. * the proper read/write commands and protocol to use.
  181. *
  182. * LOCKING:
  183. * caller.
  184. */
  185. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  186. {
  187. struct ata_taskfile *tf = &qc->tf;
  188. struct ata_device *dev = qc->dev;
  189. u8 cmd;
  190. int index, fua, lba48, write;
  191. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  192. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  193. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  194. if (dev->flags & ATA_DFLAG_PIO) {
  195. tf->protocol = ATA_PROT_PIO;
  196. index = dev->multi_count ? 0 : 8;
  197. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  198. /* Unable to use DMA due to host limitation */
  199. tf->protocol = ATA_PROT_PIO;
  200. index = dev->multi_count ? 0 : 8;
  201. } else {
  202. tf->protocol = ATA_PROT_DMA;
  203. index = 16;
  204. }
  205. cmd = ata_rw_cmds[index + fua + lba48 + write];
  206. if (cmd) {
  207. tf->command = cmd;
  208. return 0;
  209. }
  210. return -1;
  211. }
  212. /**
  213. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  214. * @pio_mask: pio_mask
  215. * @mwdma_mask: mwdma_mask
  216. * @udma_mask: udma_mask
  217. *
  218. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  219. * unsigned int xfer_mask.
  220. *
  221. * LOCKING:
  222. * None.
  223. *
  224. * RETURNS:
  225. * Packed xfer_mask.
  226. */
  227. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  228. unsigned int mwdma_mask,
  229. unsigned int udma_mask)
  230. {
  231. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  232. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  233. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  234. }
  235. /**
  236. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  237. * @xfer_mask: xfer_mask to unpack
  238. * @pio_mask: resulting pio_mask
  239. * @mwdma_mask: resulting mwdma_mask
  240. * @udma_mask: resulting udma_mask
  241. *
  242. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  243. * Any NULL distination masks will be ignored.
  244. */
  245. static void ata_unpack_xfermask(unsigned int xfer_mask,
  246. unsigned int *pio_mask,
  247. unsigned int *mwdma_mask,
  248. unsigned int *udma_mask)
  249. {
  250. if (pio_mask)
  251. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  252. if (mwdma_mask)
  253. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  254. if (udma_mask)
  255. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  256. }
  257. static const struct ata_xfer_ent {
  258. int shift, bits;
  259. u8 base;
  260. } ata_xfer_tbl[] = {
  261. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  262. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  263. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  264. { -1, },
  265. };
  266. /**
  267. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  268. * @xfer_mask: xfer_mask of interest
  269. *
  270. * Return matching XFER_* value for @xfer_mask. Only the highest
  271. * bit of @xfer_mask is considered.
  272. *
  273. * LOCKING:
  274. * None.
  275. *
  276. * RETURNS:
  277. * Matching XFER_* value, 0 if no match found.
  278. */
  279. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  280. {
  281. int highbit = fls(xfer_mask) - 1;
  282. const struct ata_xfer_ent *ent;
  283. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  284. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  285. return ent->base + highbit - ent->shift;
  286. return 0;
  287. }
  288. /**
  289. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  290. * @xfer_mode: XFER_* of interest
  291. *
  292. * Return matching xfer_mask for @xfer_mode.
  293. *
  294. * LOCKING:
  295. * None.
  296. *
  297. * RETURNS:
  298. * Matching xfer_mask, 0 if no match found.
  299. */
  300. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  301. {
  302. const struct ata_xfer_ent *ent;
  303. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  304. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  305. return 1 << (ent->shift + xfer_mode - ent->base);
  306. return 0;
  307. }
  308. /**
  309. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  310. * @xfer_mode: XFER_* of interest
  311. *
  312. * Return matching xfer_shift for @xfer_mode.
  313. *
  314. * LOCKING:
  315. * None.
  316. *
  317. * RETURNS:
  318. * Matching xfer_shift, -1 if no match found.
  319. */
  320. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  321. {
  322. const struct ata_xfer_ent *ent;
  323. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  324. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  325. return ent->shift;
  326. return -1;
  327. }
  328. /**
  329. * ata_mode_string - convert xfer_mask to string
  330. * @xfer_mask: mask of bits supported; only highest bit counts.
  331. *
  332. * Determine string which represents the highest speed
  333. * (highest bit in @modemask).
  334. *
  335. * LOCKING:
  336. * None.
  337. *
  338. * RETURNS:
  339. * Constant C string representing highest speed listed in
  340. * @mode_mask, or the constant C string "<n/a>".
  341. */
  342. static const char *ata_mode_string(unsigned int xfer_mask)
  343. {
  344. static const char * const xfer_mode_str[] = {
  345. "PIO0",
  346. "PIO1",
  347. "PIO2",
  348. "PIO3",
  349. "PIO4",
  350. "PIO5",
  351. "PIO6",
  352. "MWDMA0",
  353. "MWDMA1",
  354. "MWDMA2",
  355. "MWDMA3",
  356. "MWDMA4",
  357. "UDMA/16",
  358. "UDMA/25",
  359. "UDMA/33",
  360. "UDMA/44",
  361. "UDMA/66",
  362. "UDMA/100",
  363. "UDMA/133",
  364. "UDMA7",
  365. };
  366. int highbit;
  367. highbit = fls(xfer_mask) - 1;
  368. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  369. return xfer_mode_str[highbit];
  370. return "<n/a>";
  371. }
  372. static const char *sata_spd_string(unsigned int spd)
  373. {
  374. static const char * const spd_str[] = {
  375. "1.5 Gbps",
  376. "3.0 Gbps",
  377. };
  378. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  379. return "<unknown>";
  380. return spd_str[spd - 1];
  381. }
  382. void ata_dev_disable(struct ata_device *dev)
  383. {
  384. if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
  385. ata_dev_printk(dev, KERN_WARNING, "disabled\n");
  386. dev->class++;
  387. }
  388. }
  389. /**
  390. * ata_pio_devchk - PATA device presence detection
  391. * @ap: ATA channel to examine
  392. * @device: Device to examine (starting at zero)
  393. *
  394. * This technique was originally described in
  395. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  396. * later found its way into the ATA/ATAPI spec.
  397. *
  398. * Write a pattern to the ATA shadow registers,
  399. * and if a device is present, it will respond by
  400. * correctly storing and echoing back the
  401. * ATA shadow register contents.
  402. *
  403. * LOCKING:
  404. * caller.
  405. */
  406. static unsigned int ata_pio_devchk(struct ata_port *ap,
  407. unsigned int device)
  408. {
  409. struct ata_ioports *ioaddr = &ap->ioaddr;
  410. u8 nsect, lbal;
  411. ap->ops->dev_select(ap, device);
  412. outb(0x55, ioaddr->nsect_addr);
  413. outb(0xaa, ioaddr->lbal_addr);
  414. outb(0xaa, ioaddr->nsect_addr);
  415. outb(0x55, ioaddr->lbal_addr);
  416. outb(0x55, ioaddr->nsect_addr);
  417. outb(0xaa, ioaddr->lbal_addr);
  418. nsect = inb(ioaddr->nsect_addr);
  419. lbal = inb(ioaddr->lbal_addr);
  420. if ((nsect == 0x55) && (lbal == 0xaa))
  421. return 1; /* we found a device */
  422. return 0; /* nothing found */
  423. }
  424. /**
  425. * ata_mmio_devchk - PATA device presence detection
  426. * @ap: ATA channel to examine
  427. * @device: Device to examine (starting at zero)
  428. *
  429. * This technique was originally described in
  430. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  431. * later found its way into the ATA/ATAPI spec.
  432. *
  433. * Write a pattern to the ATA shadow registers,
  434. * and if a device is present, it will respond by
  435. * correctly storing and echoing back the
  436. * ATA shadow register contents.
  437. *
  438. * LOCKING:
  439. * caller.
  440. */
  441. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  442. unsigned int device)
  443. {
  444. struct ata_ioports *ioaddr = &ap->ioaddr;
  445. u8 nsect, lbal;
  446. ap->ops->dev_select(ap, device);
  447. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  448. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  449. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  450. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  451. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  452. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  453. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  454. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  455. if ((nsect == 0x55) && (lbal == 0xaa))
  456. return 1; /* we found a device */
  457. return 0; /* nothing found */
  458. }
  459. /**
  460. * ata_devchk - PATA device presence detection
  461. * @ap: ATA channel to examine
  462. * @device: Device to examine (starting at zero)
  463. *
  464. * Dispatch ATA device presence detection, depending
  465. * on whether we are using PIO or MMIO to talk to the
  466. * ATA shadow registers.
  467. *
  468. * LOCKING:
  469. * caller.
  470. */
  471. static unsigned int ata_devchk(struct ata_port *ap,
  472. unsigned int device)
  473. {
  474. if (ap->flags & ATA_FLAG_MMIO)
  475. return ata_mmio_devchk(ap, device);
  476. return ata_pio_devchk(ap, device);
  477. }
  478. /**
  479. * ata_dev_classify - determine device type based on ATA-spec signature
  480. * @tf: ATA taskfile register set for device to be identified
  481. *
  482. * Determine from taskfile register contents whether a device is
  483. * ATA or ATAPI, as per "Signature and persistence" section
  484. * of ATA/PI spec (volume 1, sect 5.14).
  485. *
  486. * LOCKING:
  487. * None.
  488. *
  489. * RETURNS:
  490. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  491. * the event of failure.
  492. */
  493. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  494. {
  495. /* Apple's open source Darwin code hints that some devices only
  496. * put a proper signature into the LBA mid/high registers,
  497. * So, we only check those. It's sufficient for uniqueness.
  498. */
  499. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  500. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  501. DPRINTK("found ATA device by sig\n");
  502. return ATA_DEV_ATA;
  503. }
  504. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  505. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  506. DPRINTK("found ATAPI device by sig\n");
  507. return ATA_DEV_ATAPI;
  508. }
  509. DPRINTK("unknown device\n");
  510. return ATA_DEV_UNKNOWN;
  511. }
  512. /**
  513. * ata_dev_try_classify - Parse returned ATA device signature
  514. * @ap: ATA channel to examine
  515. * @device: Device to examine (starting at zero)
  516. * @r_err: Value of error register on completion
  517. *
  518. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  519. * an ATA/ATAPI-defined set of values is placed in the ATA
  520. * shadow registers, indicating the results of device detection
  521. * and diagnostics.
  522. *
  523. * Select the ATA device, and read the values from the ATA shadow
  524. * registers. Then parse according to the Error register value,
  525. * and the spec-defined values examined by ata_dev_classify().
  526. *
  527. * LOCKING:
  528. * caller.
  529. *
  530. * RETURNS:
  531. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  532. */
  533. static unsigned int
  534. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  535. {
  536. struct ata_taskfile tf;
  537. unsigned int class;
  538. u8 err;
  539. ap->ops->dev_select(ap, device);
  540. memset(&tf, 0, sizeof(tf));
  541. ap->ops->tf_read(ap, &tf);
  542. err = tf.feature;
  543. if (r_err)
  544. *r_err = err;
  545. /* see if device passed diags: if master then continue and warn later */
  546. if (err == 0 && device == 0)
  547. /* diagnostic fail : do nothing _YET_ */
  548. ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
  549. else if (err == 1)
  550. /* do nothing */ ;
  551. else if ((device == 0) && (err == 0x81))
  552. /* do nothing */ ;
  553. else
  554. return ATA_DEV_NONE;
  555. /* determine if device is ATA or ATAPI */
  556. class = ata_dev_classify(&tf);
  557. if (class == ATA_DEV_UNKNOWN)
  558. return ATA_DEV_NONE;
  559. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  560. return ATA_DEV_NONE;
  561. return class;
  562. }
  563. /**
  564. * ata_id_string - Convert IDENTIFY DEVICE page into string
  565. * @id: IDENTIFY DEVICE results we will examine
  566. * @s: string into which data is output
  567. * @ofs: offset into identify device page
  568. * @len: length of string to return. must be an even number.
  569. *
  570. * The strings in the IDENTIFY DEVICE page are broken up into
  571. * 16-bit chunks. Run through the string, and output each
  572. * 8-bit chunk linearly, regardless of platform.
  573. *
  574. * LOCKING:
  575. * caller.
  576. */
  577. void ata_id_string(const u16 *id, unsigned char *s,
  578. unsigned int ofs, unsigned int len)
  579. {
  580. unsigned int c;
  581. while (len > 0) {
  582. c = id[ofs] >> 8;
  583. *s = c;
  584. s++;
  585. c = id[ofs] & 0xff;
  586. *s = c;
  587. s++;
  588. ofs++;
  589. len -= 2;
  590. }
  591. }
  592. /**
  593. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  594. * @id: IDENTIFY DEVICE results we will examine
  595. * @s: string into which data is output
  596. * @ofs: offset into identify device page
  597. * @len: length of string to return. must be an odd number.
  598. *
  599. * This function is identical to ata_id_string except that it
  600. * trims trailing spaces and terminates the resulting string with
  601. * null. @len must be actual maximum length (even number) + 1.
  602. *
  603. * LOCKING:
  604. * caller.
  605. */
  606. void ata_id_c_string(const u16 *id, unsigned char *s,
  607. unsigned int ofs, unsigned int len)
  608. {
  609. unsigned char *p;
  610. WARN_ON(!(len & 1));
  611. ata_id_string(id, s, ofs, len - 1);
  612. p = s + strnlen(s, len - 1);
  613. while (p > s && p[-1] == ' ')
  614. p--;
  615. *p = '\0';
  616. }
  617. static u64 ata_id_n_sectors(const u16 *id)
  618. {
  619. if (ata_id_has_lba(id)) {
  620. if (ata_id_has_lba48(id))
  621. return ata_id_u64(id, 100);
  622. else
  623. return ata_id_u32(id, 60);
  624. } else {
  625. if (ata_id_current_chs_valid(id))
  626. return ata_id_u32(id, 57);
  627. else
  628. return id[1] * id[3] * id[6];
  629. }
  630. }
  631. /**
  632. * ata_noop_dev_select - Select device 0/1 on ATA bus
  633. * @ap: ATA channel to manipulate
  634. * @device: ATA device (numbered from zero) to select
  635. *
  636. * This function performs no actual function.
  637. *
  638. * May be used as the dev_select() entry in ata_port_operations.
  639. *
  640. * LOCKING:
  641. * caller.
  642. */
  643. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  644. {
  645. }
  646. /**
  647. * ata_std_dev_select - Select device 0/1 on ATA bus
  648. * @ap: ATA channel to manipulate
  649. * @device: ATA device (numbered from zero) to select
  650. *
  651. * Use the method defined in the ATA specification to
  652. * make either device 0, or device 1, active on the
  653. * ATA channel. Works with both PIO and MMIO.
  654. *
  655. * May be used as the dev_select() entry in ata_port_operations.
  656. *
  657. * LOCKING:
  658. * caller.
  659. */
  660. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  661. {
  662. u8 tmp;
  663. if (device == 0)
  664. tmp = ATA_DEVICE_OBS;
  665. else
  666. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  667. if (ap->flags & ATA_FLAG_MMIO) {
  668. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  669. } else {
  670. outb(tmp, ap->ioaddr.device_addr);
  671. }
  672. ata_pause(ap); /* needed; also flushes, for mmio */
  673. }
  674. /**
  675. * ata_dev_select - Select device 0/1 on ATA bus
  676. * @ap: ATA channel to manipulate
  677. * @device: ATA device (numbered from zero) to select
  678. * @wait: non-zero to wait for Status register BSY bit to clear
  679. * @can_sleep: non-zero if context allows sleeping
  680. *
  681. * Use the method defined in the ATA specification to
  682. * make either device 0, or device 1, active on the
  683. * ATA channel.
  684. *
  685. * This is a high-level version of ata_std_dev_select(),
  686. * which additionally provides the services of inserting
  687. * the proper pauses and status polling, where needed.
  688. *
  689. * LOCKING:
  690. * caller.
  691. */
  692. void ata_dev_select(struct ata_port *ap, unsigned int device,
  693. unsigned int wait, unsigned int can_sleep)
  694. {
  695. if (ata_msg_probe(ap))
  696. ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
  697. "device %u, wait %u\n", ap->id, device, wait);
  698. if (wait)
  699. ata_wait_idle(ap);
  700. ap->ops->dev_select(ap, device);
  701. if (wait) {
  702. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  703. msleep(150);
  704. ata_wait_idle(ap);
  705. }
  706. }
  707. /**
  708. * ata_dump_id - IDENTIFY DEVICE info debugging output
  709. * @id: IDENTIFY DEVICE page to dump
  710. *
  711. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  712. * page.
  713. *
  714. * LOCKING:
  715. * caller.
  716. */
  717. static inline void ata_dump_id(const u16 *id)
  718. {
  719. DPRINTK("49==0x%04x "
  720. "53==0x%04x "
  721. "63==0x%04x "
  722. "64==0x%04x "
  723. "75==0x%04x \n",
  724. id[49],
  725. id[53],
  726. id[63],
  727. id[64],
  728. id[75]);
  729. DPRINTK("80==0x%04x "
  730. "81==0x%04x "
  731. "82==0x%04x "
  732. "83==0x%04x "
  733. "84==0x%04x \n",
  734. id[80],
  735. id[81],
  736. id[82],
  737. id[83],
  738. id[84]);
  739. DPRINTK("88==0x%04x "
  740. "93==0x%04x\n",
  741. id[88],
  742. id[93]);
  743. }
  744. /**
  745. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  746. * @id: IDENTIFY data to compute xfer mask from
  747. *
  748. * Compute the xfermask for this device. This is not as trivial
  749. * as it seems if we must consider early devices correctly.
  750. *
  751. * FIXME: pre IDE drive timing (do we care ?).
  752. *
  753. * LOCKING:
  754. * None.
  755. *
  756. * RETURNS:
  757. * Computed xfermask
  758. */
  759. static unsigned int ata_id_xfermask(const u16 *id)
  760. {
  761. unsigned int pio_mask, mwdma_mask, udma_mask;
  762. /* Usual case. Word 53 indicates word 64 is valid */
  763. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  764. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  765. pio_mask <<= 3;
  766. pio_mask |= 0x7;
  767. } else {
  768. /* If word 64 isn't valid then Word 51 high byte holds
  769. * the PIO timing number for the maximum. Turn it into
  770. * a mask.
  771. */
  772. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  773. /* But wait.. there's more. Design your standards by
  774. * committee and you too can get a free iordy field to
  775. * process. However its the speeds not the modes that
  776. * are supported... Note drivers using the timing API
  777. * will get this right anyway
  778. */
  779. }
  780. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  781. if (ata_id_is_cfa(id)) {
  782. /*
  783. * Process compact flash extended modes
  784. */
  785. int pio = id[163] & 0x7;
  786. int dma = (id[163] >> 3) & 7;
  787. if (pio)
  788. pio_mask |= (1 << 5);
  789. if (pio > 1)
  790. pio_mask |= (1 << 6);
  791. if (dma)
  792. mwdma_mask |= (1 << 3);
  793. if (dma > 1)
  794. mwdma_mask |= (1 << 4);
  795. }
  796. udma_mask = 0;
  797. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  798. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  799. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  800. }
  801. /**
  802. * ata_port_queue_task - Queue port_task
  803. * @ap: The ata_port to queue port_task for
  804. * @fn: workqueue function to be scheduled
  805. * @data: data value to pass to workqueue function
  806. * @delay: delay time for workqueue function
  807. *
  808. * Schedule @fn(@data) for execution after @delay jiffies using
  809. * port_task. There is one port_task per port and it's the
  810. * user(low level driver)'s responsibility to make sure that only
  811. * one task is active at any given time.
  812. *
  813. * libata core layer takes care of synchronization between
  814. * port_task and EH. ata_port_queue_task() may be ignored for EH
  815. * synchronization.
  816. *
  817. * LOCKING:
  818. * Inherited from caller.
  819. */
  820. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  821. unsigned long delay)
  822. {
  823. int rc;
  824. if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
  825. return;
  826. PREPARE_WORK(&ap->port_task, fn, data);
  827. if (!delay)
  828. rc = queue_work(ata_wq, &ap->port_task);
  829. else
  830. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  831. /* rc == 0 means that another user is using port task */
  832. WARN_ON(rc == 0);
  833. }
  834. /**
  835. * ata_port_flush_task - Flush port_task
  836. * @ap: The ata_port to flush port_task for
  837. *
  838. * After this function completes, port_task is guranteed not to
  839. * be running or scheduled.
  840. *
  841. * LOCKING:
  842. * Kernel thread context (may sleep)
  843. */
  844. void ata_port_flush_task(struct ata_port *ap)
  845. {
  846. unsigned long flags;
  847. DPRINTK("ENTER\n");
  848. spin_lock_irqsave(ap->lock, flags);
  849. ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
  850. spin_unlock_irqrestore(ap->lock, flags);
  851. DPRINTK("flush #1\n");
  852. flush_workqueue(ata_wq);
  853. /*
  854. * At this point, if a task is running, it's guaranteed to see
  855. * the FLUSH flag; thus, it will never queue pio tasks again.
  856. * Cancel and flush.
  857. */
  858. if (!cancel_delayed_work(&ap->port_task)) {
  859. if (ata_msg_ctl(ap))
  860. ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
  861. __FUNCTION__);
  862. flush_workqueue(ata_wq);
  863. }
  864. spin_lock_irqsave(ap->lock, flags);
  865. ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
  866. spin_unlock_irqrestore(ap->lock, flags);
  867. if (ata_msg_ctl(ap))
  868. ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
  869. }
  870. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  871. {
  872. struct completion *waiting = qc->private_data;
  873. complete(waiting);
  874. }
  875. /**
  876. * ata_exec_internal - execute libata internal command
  877. * @dev: Device to which the command is sent
  878. * @tf: Taskfile registers for the command and the result
  879. * @cdb: CDB for packet command
  880. * @dma_dir: Data tranfer direction of the command
  881. * @buf: Data buffer of the command
  882. * @buflen: Length of data buffer
  883. *
  884. * Executes libata internal command with timeout. @tf contains
  885. * command on entry and result on return. Timeout and error
  886. * conditions are reported via return value. No recovery action
  887. * is taken after a command times out. It's caller's duty to
  888. * clean up after timeout.
  889. *
  890. * LOCKING:
  891. * None. Should be called with kernel context, might sleep.
  892. *
  893. * RETURNS:
  894. * Zero on success, AC_ERR_* mask on failure
  895. */
  896. unsigned ata_exec_internal(struct ata_device *dev,
  897. struct ata_taskfile *tf, const u8 *cdb,
  898. int dma_dir, void *buf, unsigned int buflen)
  899. {
  900. struct ata_port *ap = dev->ap;
  901. u8 command = tf->command;
  902. struct ata_queued_cmd *qc;
  903. unsigned int tag, preempted_tag;
  904. u32 preempted_sactive, preempted_qc_active;
  905. DECLARE_COMPLETION_ONSTACK(wait);
  906. unsigned long flags;
  907. unsigned int err_mask;
  908. int rc;
  909. spin_lock_irqsave(ap->lock, flags);
  910. /* no internal command while frozen */
  911. if (ap->pflags & ATA_PFLAG_FROZEN) {
  912. spin_unlock_irqrestore(ap->lock, flags);
  913. return AC_ERR_SYSTEM;
  914. }
  915. /* initialize internal qc */
  916. /* XXX: Tag 0 is used for drivers with legacy EH as some
  917. * drivers choke if any other tag is given. This breaks
  918. * ata_tag_internal() test for those drivers. Don't use new
  919. * EH stuff without converting to it.
  920. */
  921. if (ap->ops->error_handler)
  922. tag = ATA_TAG_INTERNAL;
  923. else
  924. tag = 0;
  925. if (test_and_set_bit(tag, &ap->qc_allocated))
  926. BUG();
  927. qc = __ata_qc_from_tag(ap, tag);
  928. qc->tag = tag;
  929. qc->scsicmd = NULL;
  930. qc->ap = ap;
  931. qc->dev = dev;
  932. ata_qc_reinit(qc);
  933. preempted_tag = ap->active_tag;
  934. preempted_sactive = ap->sactive;
  935. preempted_qc_active = ap->qc_active;
  936. ap->active_tag = ATA_TAG_POISON;
  937. ap->sactive = 0;
  938. ap->qc_active = 0;
  939. /* prepare & issue qc */
  940. qc->tf = *tf;
  941. if (cdb)
  942. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  943. qc->flags |= ATA_QCFLAG_RESULT_TF;
  944. qc->dma_dir = dma_dir;
  945. if (dma_dir != DMA_NONE) {
  946. ata_sg_init_one(qc, buf, buflen);
  947. qc->nsect = buflen / ATA_SECT_SIZE;
  948. }
  949. qc->private_data = &wait;
  950. qc->complete_fn = ata_qc_complete_internal;
  951. ata_qc_issue(qc);
  952. spin_unlock_irqrestore(ap->lock, flags);
  953. rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
  954. ata_port_flush_task(ap);
  955. if (!rc) {
  956. spin_lock_irqsave(ap->lock, flags);
  957. /* We're racing with irq here. If we lose, the
  958. * following test prevents us from completing the qc
  959. * twice. If we win, the port is frozen and will be
  960. * cleaned up by ->post_internal_cmd().
  961. */
  962. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  963. qc->err_mask |= AC_ERR_TIMEOUT;
  964. if (ap->ops->error_handler)
  965. ata_port_freeze(ap);
  966. else
  967. ata_qc_complete(qc);
  968. if (ata_msg_warn(ap))
  969. ata_dev_printk(dev, KERN_WARNING,
  970. "qc timeout (cmd 0x%x)\n", command);
  971. }
  972. spin_unlock_irqrestore(ap->lock, flags);
  973. }
  974. /* do post_internal_cmd */
  975. if (ap->ops->post_internal_cmd)
  976. ap->ops->post_internal_cmd(qc);
  977. if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
  978. if (ata_msg_warn(ap))
  979. ata_dev_printk(dev, KERN_WARNING,
  980. "zero err_mask for failed "
  981. "internal command, assuming AC_ERR_OTHER\n");
  982. qc->err_mask |= AC_ERR_OTHER;
  983. }
  984. /* finish up */
  985. spin_lock_irqsave(ap->lock, flags);
  986. *tf = qc->result_tf;
  987. err_mask = qc->err_mask;
  988. ata_qc_free(qc);
  989. ap->active_tag = preempted_tag;
  990. ap->sactive = preempted_sactive;
  991. ap->qc_active = preempted_qc_active;
  992. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  993. * Until those drivers are fixed, we detect the condition
  994. * here, fail the command with AC_ERR_SYSTEM and reenable the
  995. * port.
  996. *
  997. * Note that this doesn't change any behavior as internal
  998. * command failure results in disabling the device in the
  999. * higher layer for LLDDs without new reset/EH callbacks.
  1000. *
  1001. * Kill the following code as soon as those drivers are fixed.
  1002. */
  1003. if (ap->flags & ATA_FLAG_DISABLED) {
  1004. err_mask |= AC_ERR_SYSTEM;
  1005. ata_port_probe(ap);
  1006. }
  1007. spin_unlock_irqrestore(ap->lock, flags);
  1008. return err_mask;
  1009. }
  1010. /**
  1011. * ata_do_simple_cmd - execute simple internal command
  1012. * @dev: Device to which the command is sent
  1013. * @cmd: Opcode to execute
  1014. *
  1015. * Execute a 'simple' command, that only consists of the opcode
  1016. * 'cmd' itself, without filling any other registers
  1017. *
  1018. * LOCKING:
  1019. * Kernel thread context (may sleep).
  1020. *
  1021. * RETURNS:
  1022. * Zero on success, AC_ERR_* mask on failure
  1023. */
  1024. unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
  1025. {
  1026. struct ata_taskfile tf;
  1027. ata_tf_init(dev, &tf);
  1028. tf.command = cmd;
  1029. tf.flags |= ATA_TFLAG_DEVICE;
  1030. tf.protocol = ATA_PROT_NODATA;
  1031. return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  1032. }
  1033. /**
  1034. * ata_pio_need_iordy - check if iordy needed
  1035. * @adev: ATA device
  1036. *
  1037. * Check if the current speed of the device requires IORDY. Used
  1038. * by various controllers for chip configuration.
  1039. */
  1040. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  1041. {
  1042. int pio;
  1043. int speed = adev->pio_mode - XFER_PIO_0;
  1044. if (speed < 2)
  1045. return 0;
  1046. if (speed > 2)
  1047. return 1;
  1048. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  1049. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  1050. pio = adev->id[ATA_ID_EIDE_PIO];
  1051. /* Is the speed faster than the drive allows non IORDY ? */
  1052. if (pio) {
  1053. /* This is cycle times not frequency - watch the logic! */
  1054. if (pio > 240) /* PIO2 is 240nS per cycle */
  1055. return 1;
  1056. return 0;
  1057. }
  1058. }
  1059. return 0;
  1060. }
  1061. /**
  1062. * ata_dev_read_id - Read ID data from the specified device
  1063. * @dev: target device
  1064. * @p_class: pointer to class of the target device (may be changed)
  1065. * @post_reset: is this read ID post-reset?
  1066. * @id: buffer to read IDENTIFY data into
  1067. *
  1068. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  1069. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  1070. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  1071. * for pre-ATA4 drives.
  1072. *
  1073. * LOCKING:
  1074. * Kernel thread context (may sleep)
  1075. *
  1076. * RETURNS:
  1077. * 0 on success, -errno otherwise.
  1078. */
  1079. int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
  1080. int post_reset, u16 *id)
  1081. {
  1082. struct ata_port *ap = dev->ap;
  1083. unsigned int class = *p_class;
  1084. struct ata_taskfile tf;
  1085. unsigned int err_mask = 0;
  1086. const char *reason;
  1087. int rc;
  1088. if (ata_msg_ctl(ap))
  1089. ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
  1090. __FUNCTION__, ap->id, dev->devno);
  1091. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  1092. retry:
  1093. ata_tf_init(dev, &tf);
  1094. switch (class) {
  1095. case ATA_DEV_ATA:
  1096. tf.command = ATA_CMD_ID_ATA;
  1097. break;
  1098. case ATA_DEV_ATAPI:
  1099. tf.command = ATA_CMD_ID_ATAPI;
  1100. break;
  1101. default:
  1102. rc = -ENODEV;
  1103. reason = "unsupported class";
  1104. goto err_out;
  1105. }
  1106. tf.protocol = ATA_PROT_PIO;
  1107. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
  1108. id, sizeof(id[0]) * ATA_ID_WORDS);
  1109. if (err_mask) {
  1110. rc = -EIO;
  1111. reason = "I/O error";
  1112. goto err_out;
  1113. }
  1114. swap_buf_le16(id, ATA_ID_WORDS);
  1115. /* sanity check */
  1116. rc = -EINVAL;
  1117. reason = "device reports illegal type";
  1118. if (class == ATA_DEV_ATA) {
  1119. if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
  1120. goto err_out;
  1121. } else {
  1122. if (ata_id_is_ata(id))
  1123. goto err_out;
  1124. }
  1125. if (post_reset && class == ATA_DEV_ATA) {
  1126. /*
  1127. * The exact sequence expected by certain pre-ATA4 drives is:
  1128. * SRST RESET
  1129. * IDENTIFY
  1130. * INITIALIZE DEVICE PARAMETERS
  1131. * anything else..
  1132. * Some drives were very specific about that exact sequence.
  1133. */
  1134. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1135. err_mask = ata_dev_init_params(dev, id[3], id[6]);
  1136. if (err_mask) {
  1137. rc = -EIO;
  1138. reason = "INIT_DEV_PARAMS failed";
  1139. goto err_out;
  1140. }
  1141. /* current CHS translation info (id[53-58]) might be
  1142. * changed. reread the identify device info.
  1143. */
  1144. post_reset = 0;
  1145. goto retry;
  1146. }
  1147. }
  1148. *p_class = class;
  1149. return 0;
  1150. err_out:
  1151. if (ata_msg_warn(ap))
  1152. ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
  1153. "(%s, err_mask=0x%x)\n", reason, err_mask);
  1154. return rc;
  1155. }
  1156. static inline u8 ata_dev_knobble(struct ata_device *dev)
  1157. {
  1158. return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1159. }
  1160. static void ata_dev_config_ncq(struct ata_device *dev,
  1161. char *desc, size_t desc_sz)
  1162. {
  1163. struct ata_port *ap = dev->ap;
  1164. int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
  1165. if (!ata_id_has_ncq(dev->id)) {
  1166. desc[0] = '\0';
  1167. return;
  1168. }
  1169. if (ap->flags & ATA_FLAG_NCQ) {
  1170. hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
  1171. dev->flags |= ATA_DFLAG_NCQ;
  1172. }
  1173. if (hdepth >= ddepth)
  1174. snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
  1175. else
  1176. snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
  1177. }
  1178. static void ata_set_port_max_cmd_len(struct ata_port *ap)
  1179. {
  1180. int i;
  1181. if (ap->scsi_host) {
  1182. unsigned int len = 0;
  1183. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1184. len = max(len, ap->device[i].cdb_len);
  1185. ap->scsi_host->max_cmd_len = len;
  1186. }
  1187. }
  1188. /**
  1189. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1190. * @dev: Target device to configure
  1191. * @print_info: Enable device info printout
  1192. *
  1193. * Configure @dev according to @dev->id. Generic and low-level
  1194. * driver specific fixups are also applied.
  1195. *
  1196. * LOCKING:
  1197. * Kernel thread context (may sleep)
  1198. *
  1199. * RETURNS:
  1200. * 0 on success, -errno otherwise
  1201. */
  1202. int ata_dev_configure(struct ata_device *dev, int print_info)
  1203. {
  1204. struct ata_port *ap = dev->ap;
  1205. const u16 *id = dev->id;
  1206. unsigned int xfer_mask;
  1207. char revbuf[7]; /* XYZ-99\0 */
  1208. int rc;
  1209. if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
  1210. ata_dev_printk(dev, KERN_INFO,
  1211. "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1212. __FUNCTION__, ap->id, dev->devno);
  1213. return 0;
  1214. }
  1215. if (ata_msg_probe(ap))
  1216. ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
  1217. __FUNCTION__, ap->id, dev->devno);
  1218. /* print device capabilities */
  1219. if (ata_msg_probe(ap))
  1220. ata_dev_printk(dev, KERN_DEBUG,
  1221. "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
  1222. "85:%04x 86:%04x 87:%04x 88:%04x\n",
  1223. __FUNCTION__,
  1224. id[49], id[82], id[83], id[84],
  1225. id[85], id[86], id[87], id[88]);
  1226. /* initialize to-be-configured parameters */
  1227. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1228. dev->max_sectors = 0;
  1229. dev->cdb_len = 0;
  1230. dev->n_sectors = 0;
  1231. dev->cylinders = 0;
  1232. dev->heads = 0;
  1233. dev->sectors = 0;
  1234. /*
  1235. * common ATA, ATAPI feature tests
  1236. */
  1237. /* find max transfer mode; for printk only */
  1238. xfer_mask = ata_id_xfermask(id);
  1239. if (ata_msg_probe(ap))
  1240. ata_dump_id(id);
  1241. /* ATA-specific feature tests */
  1242. if (dev->class == ATA_DEV_ATA) {
  1243. if (ata_id_is_cfa(id)) {
  1244. if (id[162] & 1) /* CPRM may make this media unusable */
  1245. ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
  1246. ap->id, dev->devno);
  1247. snprintf(revbuf, 7, "CFA");
  1248. }
  1249. else
  1250. snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
  1251. dev->n_sectors = ata_id_n_sectors(id);
  1252. if (ata_id_has_lba(id)) {
  1253. const char *lba_desc;
  1254. char ncq_desc[20];
  1255. lba_desc = "LBA";
  1256. dev->flags |= ATA_DFLAG_LBA;
  1257. if (ata_id_has_lba48(id)) {
  1258. dev->flags |= ATA_DFLAG_LBA48;
  1259. lba_desc = "LBA48";
  1260. }
  1261. /* config NCQ */
  1262. ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
  1263. /* print device info to dmesg */
  1264. if (ata_msg_drv(ap) && print_info)
  1265. ata_dev_printk(dev, KERN_INFO, "%s, "
  1266. "max %s, %Lu sectors: %s %s\n",
  1267. revbuf,
  1268. ata_mode_string(xfer_mask),
  1269. (unsigned long long)dev->n_sectors,
  1270. lba_desc, ncq_desc);
  1271. } else {
  1272. /* CHS */
  1273. /* Default translation */
  1274. dev->cylinders = id[1];
  1275. dev->heads = id[3];
  1276. dev->sectors = id[6];
  1277. if (ata_id_current_chs_valid(id)) {
  1278. /* Current CHS translation is valid. */
  1279. dev->cylinders = id[54];
  1280. dev->heads = id[55];
  1281. dev->sectors = id[56];
  1282. }
  1283. /* print device info to dmesg */
  1284. if (ata_msg_drv(ap) && print_info)
  1285. ata_dev_printk(dev, KERN_INFO, "%s, "
  1286. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1287. revbuf,
  1288. ata_mode_string(xfer_mask),
  1289. (unsigned long long)dev->n_sectors,
  1290. dev->cylinders, dev->heads,
  1291. dev->sectors);
  1292. }
  1293. if (dev->id[59] & 0x100) {
  1294. dev->multi_count = dev->id[59] & 0xff;
  1295. if (ata_msg_drv(ap) && print_info)
  1296. ata_dev_printk(dev, KERN_INFO,
  1297. "ata%u: dev %u multi count %u\n",
  1298. ap->id, dev->devno, dev->multi_count);
  1299. }
  1300. dev->cdb_len = 16;
  1301. }
  1302. /* ATAPI-specific feature tests */
  1303. else if (dev->class == ATA_DEV_ATAPI) {
  1304. char *cdb_intr_string = "";
  1305. rc = atapi_cdb_len(id);
  1306. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1307. if (ata_msg_warn(ap))
  1308. ata_dev_printk(dev, KERN_WARNING,
  1309. "unsupported CDB len\n");
  1310. rc = -EINVAL;
  1311. goto err_out_nosup;
  1312. }
  1313. dev->cdb_len = (unsigned int) rc;
  1314. if (ata_id_cdb_intr(dev->id)) {
  1315. dev->flags |= ATA_DFLAG_CDB_INTR;
  1316. cdb_intr_string = ", CDB intr";
  1317. }
  1318. /* print device info to dmesg */
  1319. if (ata_msg_drv(ap) && print_info)
  1320. ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
  1321. ata_mode_string(xfer_mask),
  1322. cdb_intr_string);
  1323. }
  1324. if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
  1325. /* Let the user know. We don't want to disallow opens for
  1326. rescue purposes, or in case the vendor is just a blithering
  1327. idiot */
  1328. if (print_info) {
  1329. ata_dev_printk(dev, KERN_WARNING,
  1330. "Drive reports diagnostics failure. This may indicate a drive\n");
  1331. ata_dev_printk(dev, KERN_WARNING,
  1332. "fault or invalid emulation. Contact drive vendor for information.\n");
  1333. }
  1334. }
  1335. ata_set_port_max_cmd_len(ap);
  1336. /* limit bridge transfers to udma5, 200 sectors */
  1337. if (ata_dev_knobble(dev)) {
  1338. if (ata_msg_drv(ap) && print_info)
  1339. ata_dev_printk(dev, KERN_INFO,
  1340. "applying bridge limits\n");
  1341. dev->udma_mask &= ATA_UDMA5;
  1342. dev->max_sectors = ATA_MAX_SECTORS;
  1343. }
  1344. if (ap->ops->dev_config)
  1345. ap->ops->dev_config(ap, dev);
  1346. if (ata_msg_probe(ap))
  1347. ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
  1348. __FUNCTION__, ata_chk_status(ap));
  1349. return 0;
  1350. err_out_nosup:
  1351. if (ata_msg_probe(ap))
  1352. ata_dev_printk(dev, KERN_DEBUG,
  1353. "%s: EXIT, err\n", __FUNCTION__);
  1354. return rc;
  1355. }
  1356. /**
  1357. * ata_bus_probe - Reset and probe ATA bus
  1358. * @ap: Bus to probe
  1359. *
  1360. * Master ATA bus probing function. Initiates a hardware-dependent
  1361. * bus reset, then attempts to identify any devices found on
  1362. * the bus.
  1363. *
  1364. * LOCKING:
  1365. * PCI/etc. bus probe sem.
  1366. *
  1367. * RETURNS:
  1368. * Zero on success, negative errno otherwise.
  1369. */
  1370. int ata_bus_probe(struct ata_port *ap)
  1371. {
  1372. unsigned int classes[ATA_MAX_DEVICES];
  1373. int tries[ATA_MAX_DEVICES];
  1374. int i, rc, down_xfermask;
  1375. struct ata_device *dev;
  1376. ata_port_probe(ap);
  1377. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1378. tries[i] = ATA_PROBE_MAX_TRIES;
  1379. retry:
  1380. down_xfermask = 0;
  1381. /* reset and determine device classes */
  1382. ap->ops->phy_reset(ap);
  1383. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1384. dev = &ap->device[i];
  1385. if (!(ap->flags & ATA_FLAG_DISABLED) &&
  1386. dev->class != ATA_DEV_UNKNOWN)
  1387. classes[dev->devno] = dev->class;
  1388. else
  1389. classes[dev->devno] = ATA_DEV_NONE;
  1390. dev->class = ATA_DEV_UNKNOWN;
  1391. }
  1392. ata_port_probe(ap);
  1393. /* after the reset the device state is PIO 0 and the controller
  1394. state is undefined. Record the mode */
  1395. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1396. ap->device[i].pio_mode = XFER_PIO_0;
  1397. /* read IDENTIFY page and configure devices */
  1398. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1399. dev = &ap->device[i];
  1400. if (tries[i])
  1401. dev->class = classes[i];
  1402. if (!ata_dev_enabled(dev))
  1403. continue;
  1404. rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
  1405. if (rc)
  1406. goto fail;
  1407. rc = ata_dev_configure(dev, 1);
  1408. if (rc)
  1409. goto fail;
  1410. }
  1411. /* configure transfer mode */
  1412. rc = ata_set_mode(ap, &dev);
  1413. if (rc) {
  1414. down_xfermask = 1;
  1415. goto fail;
  1416. }
  1417. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1418. if (ata_dev_enabled(&ap->device[i]))
  1419. return 0;
  1420. /* no device present, disable port */
  1421. ata_port_disable(ap);
  1422. ap->ops->port_disable(ap);
  1423. return -ENODEV;
  1424. fail:
  1425. switch (rc) {
  1426. case -EINVAL:
  1427. case -ENODEV:
  1428. tries[dev->devno] = 0;
  1429. break;
  1430. case -EIO:
  1431. sata_down_spd_limit(ap);
  1432. /* fall through */
  1433. default:
  1434. tries[dev->devno]--;
  1435. if (down_xfermask &&
  1436. ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
  1437. tries[dev->devno] = 0;
  1438. }
  1439. if (!tries[dev->devno]) {
  1440. ata_down_xfermask_limit(dev, 1);
  1441. ata_dev_disable(dev);
  1442. }
  1443. goto retry;
  1444. }
  1445. /**
  1446. * ata_port_probe - Mark port as enabled
  1447. * @ap: Port for which we indicate enablement
  1448. *
  1449. * Modify @ap data structure such that the system
  1450. * thinks that the entire port is enabled.
  1451. *
  1452. * LOCKING: host lock, or some other form of
  1453. * serialization.
  1454. */
  1455. void ata_port_probe(struct ata_port *ap)
  1456. {
  1457. ap->flags &= ~ATA_FLAG_DISABLED;
  1458. }
  1459. /**
  1460. * sata_print_link_status - Print SATA link status
  1461. * @ap: SATA port to printk link status about
  1462. *
  1463. * This function prints link speed and status of a SATA link.
  1464. *
  1465. * LOCKING:
  1466. * None.
  1467. */
  1468. static void sata_print_link_status(struct ata_port *ap)
  1469. {
  1470. u32 sstatus, scontrol, tmp;
  1471. if (sata_scr_read(ap, SCR_STATUS, &sstatus))
  1472. return;
  1473. sata_scr_read(ap, SCR_CONTROL, &scontrol);
  1474. if (ata_port_online(ap)) {
  1475. tmp = (sstatus >> 4) & 0xf;
  1476. ata_port_printk(ap, KERN_INFO,
  1477. "SATA link up %s (SStatus %X SControl %X)\n",
  1478. sata_spd_string(tmp), sstatus, scontrol);
  1479. } else {
  1480. ata_port_printk(ap, KERN_INFO,
  1481. "SATA link down (SStatus %X SControl %X)\n",
  1482. sstatus, scontrol);
  1483. }
  1484. }
  1485. /**
  1486. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1487. * @ap: SATA port associated with target SATA PHY.
  1488. *
  1489. * This function issues commands to standard SATA Sxxx
  1490. * PHY registers, to wake up the phy (and device), and
  1491. * clear any reset condition.
  1492. *
  1493. * LOCKING:
  1494. * PCI/etc. bus probe sem.
  1495. *
  1496. */
  1497. void __sata_phy_reset(struct ata_port *ap)
  1498. {
  1499. u32 sstatus;
  1500. unsigned long timeout = jiffies + (HZ * 5);
  1501. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1502. /* issue phy wake/reset */
  1503. sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
  1504. /* Couldn't find anything in SATA I/II specs, but
  1505. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1506. mdelay(1);
  1507. }
  1508. /* phy wake/clear reset */
  1509. sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
  1510. /* wait for phy to become ready, if necessary */
  1511. do {
  1512. msleep(200);
  1513. sata_scr_read(ap, SCR_STATUS, &sstatus);
  1514. if ((sstatus & 0xf) != 1)
  1515. break;
  1516. } while (time_before(jiffies, timeout));
  1517. /* print link status */
  1518. sata_print_link_status(ap);
  1519. /* TODO: phy layer with polling, timeouts, etc. */
  1520. if (!ata_port_offline(ap))
  1521. ata_port_probe(ap);
  1522. else
  1523. ata_port_disable(ap);
  1524. if (ap->flags & ATA_FLAG_DISABLED)
  1525. return;
  1526. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1527. ata_port_disable(ap);
  1528. return;
  1529. }
  1530. ap->cbl = ATA_CBL_SATA;
  1531. }
  1532. /**
  1533. * sata_phy_reset - Reset SATA bus.
  1534. * @ap: SATA port associated with target SATA PHY.
  1535. *
  1536. * This function resets the SATA bus, and then probes
  1537. * the bus for devices.
  1538. *
  1539. * LOCKING:
  1540. * PCI/etc. bus probe sem.
  1541. *
  1542. */
  1543. void sata_phy_reset(struct ata_port *ap)
  1544. {
  1545. __sata_phy_reset(ap);
  1546. if (ap->flags & ATA_FLAG_DISABLED)
  1547. return;
  1548. ata_bus_reset(ap);
  1549. }
  1550. /**
  1551. * ata_dev_pair - return other device on cable
  1552. * @adev: device
  1553. *
  1554. * Obtain the other device on the same cable, or if none is
  1555. * present NULL is returned
  1556. */
  1557. struct ata_device *ata_dev_pair(struct ata_device *adev)
  1558. {
  1559. struct ata_port *ap = adev->ap;
  1560. struct ata_device *pair = &ap->device[1 - adev->devno];
  1561. if (!ata_dev_enabled(pair))
  1562. return NULL;
  1563. return pair;
  1564. }
  1565. /**
  1566. * ata_port_disable - Disable port.
  1567. * @ap: Port to be disabled.
  1568. *
  1569. * Modify @ap data structure such that the system
  1570. * thinks that the entire port is disabled, and should
  1571. * never attempt to probe or communicate with devices
  1572. * on this port.
  1573. *
  1574. * LOCKING: host lock, or some other form of
  1575. * serialization.
  1576. */
  1577. void ata_port_disable(struct ata_port *ap)
  1578. {
  1579. ap->device[0].class = ATA_DEV_NONE;
  1580. ap->device[1].class = ATA_DEV_NONE;
  1581. ap->flags |= ATA_FLAG_DISABLED;
  1582. }
  1583. /**
  1584. * sata_down_spd_limit - adjust SATA spd limit downward
  1585. * @ap: Port to adjust SATA spd limit for
  1586. *
  1587. * Adjust SATA spd limit of @ap downward. Note that this
  1588. * function only adjusts the limit. The change must be applied
  1589. * using sata_set_spd().
  1590. *
  1591. * LOCKING:
  1592. * Inherited from caller.
  1593. *
  1594. * RETURNS:
  1595. * 0 on success, negative errno on failure
  1596. */
  1597. int sata_down_spd_limit(struct ata_port *ap)
  1598. {
  1599. u32 sstatus, spd, mask;
  1600. int rc, highbit;
  1601. rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
  1602. if (rc)
  1603. return rc;
  1604. mask = ap->sata_spd_limit;
  1605. if (mask <= 1)
  1606. return -EINVAL;
  1607. highbit = fls(mask) - 1;
  1608. mask &= ~(1 << highbit);
  1609. spd = (sstatus >> 4) & 0xf;
  1610. if (spd <= 1)
  1611. return -EINVAL;
  1612. spd--;
  1613. mask &= (1 << spd) - 1;
  1614. if (!mask)
  1615. return -EINVAL;
  1616. ap->sata_spd_limit = mask;
  1617. ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
  1618. sata_spd_string(fls(mask)));
  1619. return 0;
  1620. }
  1621. static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
  1622. {
  1623. u32 spd, limit;
  1624. if (ap->sata_spd_limit == UINT_MAX)
  1625. limit = 0;
  1626. else
  1627. limit = fls(ap->sata_spd_limit);
  1628. spd = (*scontrol >> 4) & 0xf;
  1629. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1630. return spd != limit;
  1631. }
  1632. /**
  1633. * sata_set_spd_needed - is SATA spd configuration needed
  1634. * @ap: Port in question
  1635. *
  1636. * Test whether the spd limit in SControl matches
  1637. * @ap->sata_spd_limit. This function is used to determine
  1638. * whether hardreset is necessary to apply SATA spd
  1639. * configuration.
  1640. *
  1641. * LOCKING:
  1642. * Inherited from caller.
  1643. *
  1644. * RETURNS:
  1645. * 1 if SATA spd configuration is needed, 0 otherwise.
  1646. */
  1647. int sata_set_spd_needed(struct ata_port *ap)
  1648. {
  1649. u32 scontrol;
  1650. if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
  1651. return 0;
  1652. return __sata_set_spd_needed(ap, &scontrol);
  1653. }
  1654. /**
  1655. * sata_set_spd - set SATA spd according to spd limit
  1656. * @ap: Port to set SATA spd for
  1657. *
  1658. * Set SATA spd of @ap according to sata_spd_limit.
  1659. *
  1660. * LOCKING:
  1661. * Inherited from caller.
  1662. *
  1663. * RETURNS:
  1664. * 0 if spd doesn't need to be changed, 1 if spd has been
  1665. * changed. Negative errno if SCR registers are inaccessible.
  1666. */
  1667. int sata_set_spd(struct ata_port *ap)
  1668. {
  1669. u32 scontrol;
  1670. int rc;
  1671. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  1672. return rc;
  1673. if (!__sata_set_spd_needed(ap, &scontrol))
  1674. return 0;
  1675. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  1676. return rc;
  1677. return 1;
  1678. }
  1679. /*
  1680. * This mode timing computation functionality is ported over from
  1681. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1682. */
  1683. /*
  1684. * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1685. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1686. * for UDMA6, which is currently supported only by Maxtor drives.
  1687. *
  1688. * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
  1689. */
  1690. static const struct ata_timing ata_timing[] = {
  1691. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1692. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1693. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1694. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1695. { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
  1696. { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
  1697. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1698. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1699. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1700. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1701. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1702. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1703. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1704. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1705. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1706. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1707. { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
  1708. { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
  1709. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1710. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1711. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1712. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1713. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1714. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1715. { 0xFF }
  1716. };
  1717. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1718. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1719. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1720. {
  1721. q->setup = EZ(t->setup * 1000, T);
  1722. q->act8b = EZ(t->act8b * 1000, T);
  1723. q->rec8b = EZ(t->rec8b * 1000, T);
  1724. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1725. q->active = EZ(t->active * 1000, T);
  1726. q->recover = EZ(t->recover * 1000, T);
  1727. q->cycle = EZ(t->cycle * 1000, T);
  1728. q->udma = EZ(t->udma * 1000, UT);
  1729. }
  1730. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1731. struct ata_timing *m, unsigned int what)
  1732. {
  1733. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1734. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1735. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1736. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1737. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1738. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1739. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1740. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1741. }
  1742. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1743. {
  1744. const struct ata_timing *t;
  1745. for (t = ata_timing; t->mode != speed; t++)
  1746. if (t->mode == 0xFF)
  1747. return NULL;
  1748. return t;
  1749. }
  1750. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1751. struct ata_timing *t, int T, int UT)
  1752. {
  1753. const struct ata_timing *s;
  1754. struct ata_timing p;
  1755. /*
  1756. * Find the mode.
  1757. */
  1758. if (!(s = ata_timing_find_mode(speed)))
  1759. return -EINVAL;
  1760. memcpy(t, s, sizeof(*s));
  1761. /*
  1762. * If the drive is an EIDE drive, it can tell us it needs extended
  1763. * PIO/MW_DMA cycle timing.
  1764. */
  1765. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1766. memset(&p, 0, sizeof(p));
  1767. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1768. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1769. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1770. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1771. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1772. }
  1773. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1774. }
  1775. /*
  1776. * Convert the timing to bus clock counts.
  1777. */
  1778. ata_timing_quantize(t, t, T, UT);
  1779. /*
  1780. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1781. * S.M.A.R.T * and some other commands. We have to ensure that the
  1782. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1783. */
  1784. if (speed > XFER_PIO_4) {
  1785. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1786. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1787. }
  1788. /*
  1789. * Lengthen active & recovery time so that cycle time is correct.
  1790. */
  1791. if (t->act8b + t->rec8b < t->cyc8b) {
  1792. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1793. t->rec8b = t->cyc8b - t->act8b;
  1794. }
  1795. if (t->active + t->recover < t->cycle) {
  1796. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1797. t->recover = t->cycle - t->active;
  1798. }
  1799. return 0;
  1800. }
  1801. /**
  1802. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1803. * @dev: Device to adjust xfer masks
  1804. * @force_pio0: Force PIO0
  1805. *
  1806. * Adjust xfer masks of @dev downward. Note that this function
  1807. * does not apply the change. Invoking ata_set_mode() afterwards
  1808. * will apply the limit.
  1809. *
  1810. * LOCKING:
  1811. * Inherited from caller.
  1812. *
  1813. * RETURNS:
  1814. * 0 on success, negative errno on failure
  1815. */
  1816. int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
  1817. {
  1818. unsigned long xfer_mask;
  1819. int highbit;
  1820. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1821. dev->udma_mask);
  1822. if (!xfer_mask)
  1823. goto fail;
  1824. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1825. if (xfer_mask & ATA_MASK_UDMA)
  1826. xfer_mask &= ~ATA_MASK_MWDMA;
  1827. highbit = fls(xfer_mask) - 1;
  1828. xfer_mask &= ~(1 << highbit);
  1829. if (force_pio0)
  1830. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1831. if (!xfer_mask)
  1832. goto fail;
  1833. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1834. &dev->udma_mask);
  1835. ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
  1836. ata_mode_string(xfer_mask));
  1837. return 0;
  1838. fail:
  1839. return -EINVAL;
  1840. }
  1841. static int ata_dev_set_mode(struct ata_device *dev)
  1842. {
  1843. unsigned int err_mask;
  1844. int rc;
  1845. dev->flags &= ~ATA_DFLAG_PIO;
  1846. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1847. dev->flags |= ATA_DFLAG_PIO;
  1848. err_mask = ata_dev_set_xfermode(dev);
  1849. if (err_mask) {
  1850. ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
  1851. "(err_mask=0x%x)\n", err_mask);
  1852. return -EIO;
  1853. }
  1854. rc = ata_dev_revalidate(dev, 0);
  1855. if (rc)
  1856. return rc;
  1857. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1858. dev->xfer_shift, (int)dev->xfer_mode);
  1859. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  1860. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1861. return 0;
  1862. }
  1863. /**
  1864. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1865. * @ap: port on which timings will be programmed
  1866. * @r_failed_dev: out paramter for failed device
  1867. *
  1868. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1869. * ata_set_mode() fails, pointer to the failing device is
  1870. * returned in @r_failed_dev.
  1871. *
  1872. * LOCKING:
  1873. * PCI/etc. bus probe sem.
  1874. *
  1875. * RETURNS:
  1876. * 0 on success, negative errno otherwise
  1877. */
  1878. int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1879. {
  1880. struct ata_device *dev;
  1881. int i, rc = 0, used_dma = 0, found = 0;
  1882. /* has private set_mode? */
  1883. if (ap->ops->set_mode) {
  1884. /* FIXME: make ->set_mode handle no device case and
  1885. * return error code and failing device on failure.
  1886. */
  1887. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1888. if (ata_dev_ready(&ap->device[i])) {
  1889. ap->ops->set_mode(ap);
  1890. break;
  1891. }
  1892. }
  1893. return 0;
  1894. }
  1895. /* step 1: calculate xfer_mask */
  1896. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1897. unsigned int pio_mask, dma_mask;
  1898. dev = &ap->device[i];
  1899. if (!ata_dev_enabled(dev))
  1900. continue;
  1901. ata_dev_xfermask(dev);
  1902. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1903. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1904. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1905. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1906. found = 1;
  1907. if (dev->dma_mode)
  1908. used_dma = 1;
  1909. }
  1910. if (!found)
  1911. goto out;
  1912. /* step 2: always set host PIO timings */
  1913. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1914. dev = &ap->device[i];
  1915. if (!ata_dev_enabled(dev))
  1916. continue;
  1917. if (!dev->pio_mode) {
  1918. ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
  1919. rc = -EINVAL;
  1920. goto out;
  1921. }
  1922. dev->xfer_mode = dev->pio_mode;
  1923. dev->xfer_shift = ATA_SHIFT_PIO;
  1924. if (ap->ops->set_piomode)
  1925. ap->ops->set_piomode(ap, dev);
  1926. }
  1927. /* step 3: set host DMA timings */
  1928. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1929. dev = &ap->device[i];
  1930. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1931. continue;
  1932. dev->xfer_mode = dev->dma_mode;
  1933. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1934. if (ap->ops->set_dmamode)
  1935. ap->ops->set_dmamode(ap, dev);
  1936. }
  1937. /* step 4: update devices' xfer mode */
  1938. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1939. dev = &ap->device[i];
  1940. /* don't udpate suspended devices' xfer mode */
  1941. if (!ata_dev_ready(dev))
  1942. continue;
  1943. rc = ata_dev_set_mode(dev);
  1944. if (rc)
  1945. goto out;
  1946. }
  1947. /* Record simplex status. If we selected DMA then the other
  1948. * host channels are not permitted to do so.
  1949. */
  1950. if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
  1951. ap->host->simplex_claimed = 1;
  1952. /* step5: chip specific finalisation */
  1953. if (ap->ops->post_set_mode)
  1954. ap->ops->post_set_mode(ap);
  1955. out:
  1956. if (rc)
  1957. *r_failed_dev = dev;
  1958. return rc;
  1959. }
  1960. /**
  1961. * ata_tf_to_host - issue ATA taskfile to host controller
  1962. * @ap: port to which command is being issued
  1963. * @tf: ATA taskfile register set
  1964. *
  1965. * Issues ATA taskfile register set to ATA host controller,
  1966. * with proper synchronization with interrupt handler and
  1967. * other threads.
  1968. *
  1969. * LOCKING:
  1970. * spin_lock_irqsave(host lock)
  1971. */
  1972. static inline void ata_tf_to_host(struct ata_port *ap,
  1973. const struct ata_taskfile *tf)
  1974. {
  1975. ap->ops->tf_load(ap, tf);
  1976. ap->ops->exec_command(ap, tf);
  1977. }
  1978. /**
  1979. * ata_busy_sleep - sleep until BSY clears, or timeout
  1980. * @ap: port containing status register to be polled
  1981. * @tmout_pat: impatience timeout
  1982. * @tmout: overall timeout
  1983. *
  1984. * Sleep until ATA Status register bit BSY clears,
  1985. * or a timeout occurs.
  1986. *
  1987. * LOCKING: None.
  1988. */
  1989. unsigned int ata_busy_sleep (struct ata_port *ap,
  1990. unsigned long tmout_pat, unsigned long tmout)
  1991. {
  1992. unsigned long timer_start, timeout;
  1993. u8 status;
  1994. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1995. timer_start = jiffies;
  1996. timeout = timer_start + tmout_pat;
  1997. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1998. msleep(50);
  1999. status = ata_busy_wait(ap, ATA_BUSY, 3);
  2000. }
  2001. if (status & ATA_BUSY)
  2002. ata_port_printk(ap, KERN_WARNING,
  2003. "port is slow to respond, please be patient "
  2004. "(Status 0x%x)\n", status);
  2005. timeout = timer_start + tmout;
  2006. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  2007. msleep(50);
  2008. status = ata_chk_status(ap);
  2009. }
  2010. if (status & ATA_BUSY) {
  2011. ata_port_printk(ap, KERN_ERR, "port failed to respond "
  2012. "(%lu secs, Status 0x%x)\n",
  2013. tmout / HZ, status);
  2014. return 1;
  2015. }
  2016. return 0;
  2017. }
  2018. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  2019. {
  2020. struct ata_ioports *ioaddr = &ap->ioaddr;
  2021. unsigned int dev0 = devmask & (1 << 0);
  2022. unsigned int dev1 = devmask & (1 << 1);
  2023. unsigned long timeout;
  2024. /* if device 0 was found in ata_devchk, wait for its
  2025. * BSY bit to clear
  2026. */
  2027. if (dev0)
  2028. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2029. /* if device 1 was found in ata_devchk, wait for
  2030. * register access, then wait for BSY to clear
  2031. */
  2032. timeout = jiffies + ATA_TMOUT_BOOT;
  2033. while (dev1) {
  2034. u8 nsect, lbal;
  2035. ap->ops->dev_select(ap, 1);
  2036. if (ap->flags & ATA_FLAG_MMIO) {
  2037. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  2038. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  2039. } else {
  2040. nsect = inb(ioaddr->nsect_addr);
  2041. lbal = inb(ioaddr->lbal_addr);
  2042. }
  2043. if ((nsect == 1) && (lbal == 1))
  2044. break;
  2045. if (time_after(jiffies, timeout)) {
  2046. dev1 = 0;
  2047. break;
  2048. }
  2049. msleep(50); /* give drive a breather */
  2050. }
  2051. if (dev1)
  2052. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2053. /* is all this really necessary? */
  2054. ap->ops->dev_select(ap, 0);
  2055. if (dev1)
  2056. ap->ops->dev_select(ap, 1);
  2057. if (dev0)
  2058. ap->ops->dev_select(ap, 0);
  2059. }
  2060. static unsigned int ata_bus_softreset(struct ata_port *ap,
  2061. unsigned int devmask)
  2062. {
  2063. struct ata_ioports *ioaddr = &ap->ioaddr;
  2064. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  2065. /* software reset. causes dev0 to be selected */
  2066. if (ap->flags & ATA_FLAG_MMIO) {
  2067. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  2068. udelay(20); /* FIXME: flush */
  2069. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  2070. udelay(20); /* FIXME: flush */
  2071. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  2072. } else {
  2073. outb(ap->ctl, ioaddr->ctl_addr);
  2074. udelay(10);
  2075. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  2076. udelay(10);
  2077. outb(ap->ctl, ioaddr->ctl_addr);
  2078. }
  2079. /* spec mandates ">= 2ms" before checking status.
  2080. * We wait 150ms, because that was the magic delay used for
  2081. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  2082. * between when the ATA command register is written, and then
  2083. * status is checked. Because waiting for "a while" before
  2084. * checking status is fine, post SRST, we perform this magic
  2085. * delay here as well.
  2086. *
  2087. * Old drivers/ide uses the 2mS rule and then waits for ready
  2088. */
  2089. msleep(150);
  2090. /* Before we perform post reset processing we want to see if
  2091. * the bus shows 0xFF because the odd clown forgets the D7
  2092. * pulldown resistor.
  2093. */
  2094. if (ata_check_status(ap) == 0xFF) {
  2095. ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
  2096. return AC_ERR_OTHER;
  2097. }
  2098. ata_bus_post_reset(ap, devmask);
  2099. return 0;
  2100. }
  2101. /**
  2102. * ata_bus_reset - reset host port and associated ATA channel
  2103. * @ap: port to reset
  2104. *
  2105. * This is typically the first time we actually start issuing
  2106. * commands to the ATA channel. We wait for BSY to clear, then
  2107. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  2108. * result. Determine what devices, if any, are on the channel
  2109. * by looking at the device 0/1 error register. Look at the signature
  2110. * stored in each device's taskfile registers, to determine if
  2111. * the device is ATA or ATAPI.
  2112. *
  2113. * LOCKING:
  2114. * PCI/etc. bus probe sem.
  2115. * Obtains host lock.
  2116. *
  2117. * SIDE EFFECTS:
  2118. * Sets ATA_FLAG_DISABLED if bus reset fails.
  2119. */
  2120. void ata_bus_reset(struct ata_port *ap)
  2121. {
  2122. struct ata_ioports *ioaddr = &ap->ioaddr;
  2123. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2124. u8 err;
  2125. unsigned int dev0, dev1 = 0, devmask = 0;
  2126. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  2127. /* determine if device 0/1 are present */
  2128. if (ap->flags & ATA_FLAG_SATA_RESET)
  2129. dev0 = 1;
  2130. else {
  2131. dev0 = ata_devchk(ap, 0);
  2132. if (slave_possible)
  2133. dev1 = ata_devchk(ap, 1);
  2134. }
  2135. if (dev0)
  2136. devmask |= (1 << 0);
  2137. if (dev1)
  2138. devmask |= (1 << 1);
  2139. /* select device 0 again */
  2140. ap->ops->dev_select(ap, 0);
  2141. /* issue bus reset */
  2142. if (ap->flags & ATA_FLAG_SRST)
  2143. if (ata_bus_softreset(ap, devmask))
  2144. goto err_out;
  2145. /*
  2146. * determine by signature whether we have ATA or ATAPI devices
  2147. */
  2148. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  2149. if ((slave_possible) && (err != 0x81))
  2150. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  2151. /* re-enable interrupts */
  2152. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2153. ata_irq_on(ap);
  2154. /* is double-select really necessary? */
  2155. if (ap->device[1].class != ATA_DEV_NONE)
  2156. ap->ops->dev_select(ap, 1);
  2157. if (ap->device[0].class != ATA_DEV_NONE)
  2158. ap->ops->dev_select(ap, 0);
  2159. /* if no devices were detected, disable this port */
  2160. if ((ap->device[0].class == ATA_DEV_NONE) &&
  2161. (ap->device[1].class == ATA_DEV_NONE))
  2162. goto err_out;
  2163. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  2164. /* set up device control for ATA_FLAG_SATA_RESET */
  2165. if (ap->flags & ATA_FLAG_MMIO)
  2166. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  2167. else
  2168. outb(ap->ctl, ioaddr->ctl_addr);
  2169. }
  2170. DPRINTK("EXIT\n");
  2171. return;
  2172. err_out:
  2173. ata_port_printk(ap, KERN_ERR, "disabling port\n");
  2174. ap->ops->port_disable(ap);
  2175. DPRINTK("EXIT\n");
  2176. }
  2177. /**
  2178. * sata_phy_debounce - debounce SATA phy status
  2179. * @ap: ATA port to debounce SATA phy status for
  2180. * @params: timing parameters { interval, duratinon, timeout } in msec
  2181. *
  2182. * Make sure SStatus of @ap reaches stable state, determined by
  2183. * holding the same value where DET is not 1 for @duration polled
  2184. * every @interval, before @timeout. Timeout constraints the
  2185. * beginning of the stable state. Because, after hot unplugging,
  2186. * DET gets stuck at 1 on some controllers, this functions waits
  2187. * until timeout then returns 0 if DET is stable at 1.
  2188. *
  2189. * LOCKING:
  2190. * Kernel thread context (may sleep)
  2191. *
  2192. * RETURNS:
  2193. * 0 on success, -errno on failure.
  2194. */
  2195. int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
  2196. {
  2197. unsigned long interval_msec = params[0];
  2198. unsigned long duration = params[1] * HZ / 1000;
  2199. unsigned long timeout = jiffies + params[2] * HZ / 1000;
  2200. unsigned long last_jiffies;
  2201. u32 last, cur;
  2202. int rc;
  2203. if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
  2204. return rc;
  2205. cur &= 0xf;
  2206. last = cur;
  2207. last_jiffies = jiffies;
  2208. while (1) {
  2209. msleep(interval_msec);
  2210. if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
  2211. return rc;
  2212. cur &= 0xf;
  2213. /* DET stable? */
  2214. if (cur == last) {
  2215. if (cur == 1 && time_before(jiffies, timeout))
  2216. continue;
  2217. if (time_after(jiffies, last_jiffies + duration))
  2218. return 0;
  2219. continue;
  2220. }
  2221. /* unstable, start over */
  2222. last = cur;
  2223. last_jiffies = jiffies;
  2224. /* check timeout */
  2225. if (time_after(jiffies, timeout))
  2226. return -EBUSY;
  2227. }
  2228. }
  2229. /**
  2230. * sata_phy_resume - resume SATA phy
  2231. * @ap: ATA port to resume SATA phy for
  2232. * @params: timing parameters { interval, duratinon, timeout } in msec
  2233. *
  2234. * Resume SATA phy of @ap and debounce it.
  2235. *
  2236. * LOCKING:
  2237. * Kernel thread context (may sleep)
  2238. *
  2239. * RETURNS:
  2240. * 0 on success, -errno on failure.
  2241. */
  2242. int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
  2243. {
  2244. u32 scontrol;
  2245. int rc;
  2246. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2247. return rc;
  2248. scontrol = (scontrol & 0x0f0) | 0x300;
  2249. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2250. return rc;
  2251. /* Some PHYs react badly if SStatus is pounded immediately
  2252. * after resuming. Delay 200ms before debouncing.
  2253. */
  2254. msleep(200);
  2255. return sata_phy_debounce(ap, params);
  2256. }
  2257. static void ata_wait_spinup(struct ata_port *ap)
  2258. {
  2259. struct ata_eh_context *ehc = &ap->eh_context;
  2260. unsigned long end, secs;
  2261. int rc;
  2262. /* first, debounce phy if SATA */
  2263. if (ap->cbl == ATA_CBL_SATA) {
  2264. rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
  2265. /* if debounced successfully and offline, no need to wait */
  2266. if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
  2267. return;
  2268. }
  2269. /* okay, let's give the drive time to spin up */
  2270. end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
  2271. secs = ((end - jiffies) + HZ - 1) / HZ;
  2272. if (time_after(jiffies, end))
  2273. return;
  2274. if (secs > 5)
  2275. ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
  2276. "(%lu secs)\n", secs);
  2277. schedule_timeout_uninterruptible(end - jiffies);
  2278. }
  2279. /**
  2280. * ata_std_prereset - prepare for reset
  2281. * @ap: ATA port to be reset
  2282. *
  2283. * @ap is about to be reset. Initialize it.
  2284. *
  2285. * LOCKING:
  2286. * Kernel thread context (may sleep)
  2287. *
  2288. * RETURNS:
  2289. * 0 on success, -errno otherwise.
  2290. */
  2291. int ata_std_prereset(struct ata_port *ap)
  2292. {
  2293. struct ata_eh_context *ehc = &ap->eh_context;
  2294. const unsigned long *timing = sata_ehc_deb_timing(ehc);
  2295. int rc;
  2296. /* handle link resume & hotplug spinup */
  2297. if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
  2298. (ap->flags & ATA_FLAG_HRST_TO_RESUME))
  2299. ehc->i.action |= ATA_EH_HARDRESET;
  2300. if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
  2301. (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
  2302. ata_wait_spinup(ap);
  2303. /* if we're about to do hardreset, nothing more to do */
  2304. if (ehc->i.action & ATA_EH_HARDRESET)
  2305. return 0;
  2306. /* if SATA, resume phy */
  2307. if (ap->cbl == ATA_CBL_SATA) {
  2308. rc = sata_phy_resume(ap, timing);
  2309. if (rc && rc != -EOPNOTSUPP) {
  2310. /* phy resume failed */
  2311. ata_port_printk(ap, KERN_WARNING, "failed to resume "
  2312. "link for reset (errno=%d)\n", rc);
  2313. return rc;
  2314. }
  2315. }
  2316. /* Wait for !BSY if the controller can wait for the first D2H
  2317. * Reg FIS and we don't know that no device is attached.
  2318. */
  2319. if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
  2320. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2321. return 0;
  2322. }
  2323. /**
  2324. * ata_std_softreset - reset host port via ATA SRST
  2325. * @ap: port to reset
  2326. * @classes: resulting classes of attached devices
  2327. *
  2328. * Reset host port using ATA SRST.
  2329. *
  2330. * LOCKING:
  2331. * Kernel thread context (may sleep)
  2332. *
  2333. * RETURNS:
  2334. * 0 on success, -errno otherwise.
  2335. */
  2336. int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
  2337. {
  2338. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2339. unsigned int devmask = 0, err_mask;
  2340. u8 err;
  2341. DPRINTK("ENTER\n");
  2342. if (ata_port_offline(ap)) {
  2343. classes[0] = ATA_DEV_NONE;
  2344. goto out;
  2345. }
  2346. /* determine if device 0/1 are present */
  2347. if (ata_devchk(ap, 0))
  2348. devmask |= (1 << 0);
  2349. if (slave_possible && ata_devchk(ap, 1))
  2350. devmask |= (1 << 1);
  2351. /* select device 0 again */
  2352. ap->ops->dev_select(ap, 0);
  2353. /* issue bus reset */
  2354. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2355. err_mask = ata_bus_softreset(ap, devmask);
  2356. if (err_mask) {
  2357. ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
  2358. err_mask);
  2359. return -EIO;
  2360. }
  2361. /* determine by signature whether we have ATA or ATAPI devices */
  2362. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2363. if (slave_possible && err != 0x81)
  2364. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2365. out:
  2366. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2367. return 0;
  2368. }
  2369. /**
  2370. * sata_std_hardreset - reset host port via SATA phy reset
  2371. * @ap: port to reset
  2372. * @class: resulting class of attached device
  2373. *
  2374. * SATA phy-reset host port using DET bits of SControl register.
  2375. *
  2376. * LOCKING:
  2377. * Kernel thread context (may sleep)
  2378. *
  2379. * RETURNS:
  2380. * 0 on success, -errno otherwise.
  2381. */
  2382. int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
  2383. {
  2384. struct ata_eh_context *ehc = &ap->eh_context;
  2385. const unsigned long *timing = sata_ehc_deb_timing(ehc);
  2386. u32 scontrol;
  2387. int rc;
  2388. DPRINTK("ENTER\n");
  2389. if (sata_set_spd_needed(ap)) {
  2390. /* SATA spec says nothing about how to reconfigure
  2391. * spd. To be on the safe side, turn off phy during
  2392. * reconfiguration. This works for at least ICH7 AHCI
  2393. * and Sil3124.
  2394. */
  2395. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2396. return rc;
  2397. scontrol = (scontrol & 0x0f0) | 0x304;
  2398. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2399. return rc;
  2400. sata_set_spd(ap);
  2401. }
  2402. /* issue phy wake/reset */
  2403. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2404. return rc;
  2405. scontrol = (scontrol & 0x0f0) | 0x301;
  2406. if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
  2407. return rc;
  2408. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2409. * 10.4.2 says at least 1 ms.
  2410. */
  2411. msleep(1);
  2412. /* bring phy back */
  2413. sata_phy_resume(ap, timing);
  2414. /* TODO: phy layer with polling, timeouts, etc. */
  2415. if (ata_port_offline(ap)) {
  2416. *class = ATA_DEV_NONE;
  2417. DPRINTK("EXIT, link offline\n");
  2418. return 0;
  2419. }
  2420. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2421. ata_port_printk(ap, KERN_ERR,
  2422. "COMRESET failed (device not ready)\n");
  2423. return -EIO;
  2424. }
  2425. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2426. *class = ata_dev_try_classify(ap, 0, NULL);
  2427. DPRINTK("EXIT, class=%u\n", *class);
  2428. return 0;
  2429. }
  2430. /**
  2431. * ata_std_postreset - standard postreset callback
  2432. * @ap: the target ata_port
  2433. * @classes: classes of attached devices
  2434. *
  2435. * This function is invoked after a successful reset. Note that
  2436. * the device might have been reset more than once using
  2437. * different reset methods before postreset is invoked.
  2438. *
  2439. * LOCKING:
  2440. * Kernel thread context (may sleep)
  2441. */
  2442. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2443. {
  2444. u32 serror;
  2445. DPRINTK("ENTER\n");
  2446. /* print link status */
  2447. sata_print_link_status(ap);
  2448. /* clear SError */
  2449. if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
  2450. sata_scr_write(ap, SCR_ERROR, serror);
  2451. /* re-enable interrupts */
  2452. if (!ap->ops->error_handler) {
  2453. /* FIXME: hack. create a hook instead */
  2454. if (ap->ioaddr.ctl_addr)
  2455. ata_irq_on(ap);
  2456. }
  2457. /* is double-select really necessary? */
  2458. if (classes[0] != ATA_DEV_NONE)
  2459. ap->ops->dev_select(ap, 1);
  2460. if (classes[1] != ATA_DEV_NONE)
  2461. ap->ops->dev_select(ap, 0);
  2462. /* bail out if no device is present */
  2463. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2464. DPRINTK("EXIT, no device\n");
  2465. return;
  2466. }
  2467. /* set up device control */
  2468. if (ap->ioaddr.ctl_addr) {
  2469. if (ap->flags & ATA_FLAG_MMIO)
  2470. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2471. else
  2472. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2473. }
  2474. DPRINTK("EXIT\n");
  2475. }
  2476. /**
  2477. * ata_dev_same_device - Determine whether new ID matches configured device
  2478. * @dev: device to compare against
  2479. * @new_class: class of the new device
  2480. * @new_id: IDENTIFY page of the new device
  2481. *
  2482. * Compare @new_class and @new_id against @dev and determine
  2483. * whether @dev is the device indicated by @new_class and
  2484. * @new_id.
  2485. *
  2486. * LOCKING:
  2487. * None.
  2488. *
  2489. * RETURNS:
  2490. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2491. */
  2492. static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
  2493. const u16 *new_id)
  2494. {
  2495. const u16 *old_id = dev->id;
  2496. unsigned char model[2][41], serial[2][21];
  2497. u64 new_n_sectors;
  2498. if (dev->class != new_class) {
  2499. ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
  2500. dev->class, new_class);
  2501. return 0;
  2502. }
  2503. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2504. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2505. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2506. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2507. new_n_sectors = ata_id_n_sectors(new_id);
  2508. if (strcmp(model[0], model[1])) {
  2509. ata_dev_printk(dev, KERN_INFO, "model number mismatch "
  2510. "'%s' != '%s'\n", model[0], model[1]);
  2511. return 0;
  2512. }
  2513. if (strcmp(serial[0], serial[1])) {
  2514. ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
  2515. "'%s' != '%s'\n", serial[0], serial[1]);
  2516. return 0;
  2517. }
  2518. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2519. ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
  2520. "%llu != %llu\n",
  2521. (unsigned long long)dev->n_sectors,
  2522. (unsigned long long)new_n_sectors);
  2523. return 0;
  2524. }
  2525. return 1;
  2526. }
  2527. /**
  2528. * ata_dev_revalidate - Revalidate ATA device
  2529. * @dev: device to revalidate
  2530. * @post_reset: is this revalidation after reset?
  2531. *
  2532. * Re-read IDENTIFY page and make sure @dev is still attached to
  2533. * the port.
  2534. *
  2535. * LOCKING:
  2536. * Kernel thread context (may sleep)
  2537. *
  2538. * RETURNS:
  2539. * 0 on success, negative errno otherwise
  2540. */
  2541. int ata_dev_revalidate(struct ata_device *dev, int post_reset)
  2542. {
  2543. unsigned int class = dev->class;
  2544. u16 *id = (void *)dev->ap->sector_buf;
  2545. int rc;
  2546. if (!ata_dev_enabled(dev)) {
  2547. rc = -ENODEV;
  2548. goto fail;
  2549. }
  2550. /* read ID data */
  2551. rc = ata_dev_read_id(dev, &class, post_reset, id);
  2552. if (rc)
  2553. goto fail;
  2554. /* is the device still there? */
  2555. if (!ata_dev_same_device(dev, class, id)) {
  2556. rc = -ENODEV;
  2557. goto fail;
  2558. }
  2559. memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
  2560. /* configure device according to the new ID */
  2561. rc = ata_dev_configure(dev, 0);
  2562. if (rc == 0)
  2563. return 0;
  2564. fail:
  2565. ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
  2566. return rc;
  2567. }
  2568. static const char * const ata_dma_blacklist [] = {
  2569. "WDC AC11000H", NULL,
  2570. "WDC AC22100H", NULL,
  2571. "WDC AC32500H", NULL,
  2572. "WDC AC33100H", NULL,
  2573. "WDC AC31600H", NULL,
  2574. "WDC AC32100H", "24.09P07",
  2575. "WDC AC23200L", "21.10N21",
  2576. "Compaq CRD-8241B", NULL,
  2577. "CRD-8400B", NULL,
  2578. "CRD-8480B", NULL,
  2579. "CRD-8482B", NULL,
  2580. "CRD-84", NULL,
  2581. "SanDisk SDP3B", NULL,
  2582. "SanDisk SDP3B-64", NULL,
  2583. "SANYO CD-ROM CRD", NULL,
  2584. "HITACHI CDR-8", NULL,
  2585. "HITACHI CDR-8335", NULL,
  2586. "HITACHI CDR-8435", NULL,
  2587. "Toshiba CD-ROM XM-6202B", NULL,
  2588. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2589. "CD-532E-A", NULL,
  2590. "E-IDE CD-ROM CR-840", NULL,
  2591. "CD-ROM Drive/F5A", NULL,
  2592. "WPI CDD-820", NULL,
  2593. "SAMSUNG CD-ROM SC-148C", NULL,
  2594. "SAMSUNG CD-ROM SC", NULL,
  2595. "SanDisk SDP3B-64", NULL,
  2596. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2597. "_NEC DV5800A", NULL,
  2598. "SAMSUNG CD-ROM SN-124", "N001"
  2599. };
  2600. static int ata_strim(char *s, size_t len)
  2601. {
  2602. len = strnlen(s, len);
  2603. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2604. while ((len > 0) && (s[len - 1] == ' ')) {
  2605. len--;
  2606. s[len] = 0;
  2607. }
  2608. return len;
  2609. }
  2610. static int ata_dma_blacklisted(const struct ata_device *dev)
  2611. {
  2612. unsigned char model_num[40];
  2613. unsigned char model_rev[16];
  2614. unsigned int nlen, rlen;
  2615. int i;
  2616. /* We don't support polling DMA.
  2617. * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
  2618. * if the LLDD handles only interrupts in the HSM_ST_LAST state.
  2619. */
  2620. if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
  2621. (dev->flags & ATA_DFLAG_CDB_INTR))
  2622. return 1;
  2623. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2624. sizeof(model_num));
  2625. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2626. sizeof(model_rev));
  2627. nlen = ata_strim(model_num, sizeof(model_num));
  2628. rlen = ata_strim(model_rev, sizeof(model_rev));
  2629. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2630. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2631. if (ata_dma_blacklist[i+1] == NULL)
  2632. return 1;
  2633. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2634. return 1;
  2635. }
  2636. }
  2637. return 0;
  2638. }
  2639. /**
  2640. * ata_dev_xfermask - Compute supported xfermask of the given device
  2641. * @dev: Device to compute xfermask for
  2642. *
  2643. * Compute supported xfermask of @dev and store it in
  2644. * dev->*_mask. This function is responsible for applying all
  2645. * known limits including host controller limits, device
  2646. * blacklist, etc...
  2647. *
  2648. * LOCKING:
  2649. * None.
  2650. */
  2651. static void ata_dev_xfermask(struct ata_device *dev)
  2652. {
  2653. struct ata_port *ap = dev->ap;
  2654. struct ata_host *host = ap->host;
  2655. unsigned long xfer_mask;
  2656. /* controller modes available */
  2657. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2658. ap->mwdma_mask, ap->udma_mask);
  2659. /* Apply cable rule here. Don't apply it early because when
  2660. * we handle hot plug the cable type can itself change.
  2661. */
  2662. if (ap->cbl == ATA_CBL_PATA40)
  2663. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2664. xfer_mask &= ata_pack_xfermask(dev->pio_mask,
  2665. dev->mwdma_mask, dev->udma_mask);
  2666. xfer_mask &= ata_id_xfermask(dev->id);
  2667. /*
  2668. * CFA Advanced TrueIDE timings are not allowed on a shared
  2669. * cable
  2670. */
  2671. if (ata_dev_pair(dev)) {
  2672. /* No PIO5 or PIO6 */
  2673. xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
  2674. /* No MWDMA3 or MWDMA 4 */
  2675. xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
  2676. }
  2677. if (ata_dma_blacklisted(dev)) {
  2678. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2679. ata_dev_printk(dev, KERN_WARNING,
  2680. "device is on DMA blacklist, disabling DMA\n");
  2681. }
  2682. if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
  2683. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2684. ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
  2685. "other device, disabling DMA\n");
  2686. }
  2687. if (ap->ops->mode_filter)
  2688. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2689. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2690. &dev->mwdma_mask, &dev->udma_mask);
  2691. }
  2692. /**
  2693. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2694. * @dev: Device to which command will be sent
  2695. *
  2696. * Issue SET FEATURES - XFER MODE command to device @dev
  2697. * on port @ap.
  2698. *
  2699. * LOCKING:
  2700. * PCI/etc. bus probe sem.
  2701. *
  2702. * RETURNS:
  2703. * 0 on success, AC_ERR_* mask otherwise.
  2704. */
  2705. static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
  2706. {
  2707. struct ata_taskfile tf;
  2708. unsigned int err_mask;
  2709. /* set up set-features taskfile */
  2710. DPRINTK("set features - xfer mode\n");
  2711. ata_tf_init(dev, &tf);
  2712. tf.command = ATA_CMD_SET_FEATURES;
  2713. tf.feature = SETFEATURES_XFER;
  2714. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2715. tf.protocol = ATA_PROT_NODATA;
  2716. tf.nsect = dev->xfer_mode;
  2717. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2718. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2719. return err_mask;
  2720. }
  2721. /**
  2722. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2723. * @dev: Device to which command will be sent
  2724. * @heads: Number of heads (taskfile parameter)
  2725. * @sectors: Number of sectors (taskfile parameter)
  2726. *
  2727. * LOCKING:
  2728. * Kernel thread context (may sleep)
  2729. *
  2730. * RETURNS:
  2731. * 0 on success, AC_ERR_* mask otherwise.
  2732. */
  2733. static unsigned int ata_dev_init_params(struct ata_device *dev,
  2734. u16 heads, u16 sectors)
  2735. {
  2736. struct ata_taskfile tf;
  2737. unsigned int err_mask;
  2738. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2739. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2740. return AC_ERR_INVALID;
  2741. /* set up init dev params taskfile */
  2742. DPRINTK("init dev params \n");
  2743. ata_tf_init(dev, &tf);
  2744. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2745. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2746. tf.protocol = ATA_PROT_NODATA;
  2747. tf.nsect = sectors;
  2748. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2749. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2750. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2751. return err_mask;
  2752. }
  2753. /**
  2754. * ata_sg_clean - Unmap DMA memory associated with command
  2755. * @qc: Command containing DMA memory to be released
  2756. *
  2757. * Unmap all mapped DMA memory associated with this command.
  2758. *
  2759. * LOCKING:
  2760. * spin_lock_irqsave(host lock)
  2761. */
  2762. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2763. {
  2764. struct ata_port *ap = qc->ap;
  2765. struct scatterlist *sg = qc->__sg;
  2766. int dir = qc->dma_dir;
  2767. void *pad_buf = NULL;
  2768. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2769. WARN_ON(sg == NULL);
  2770. if (qc->flags & ATA_QCFLAG_SINGLE)
  2771. WARN_ON(qc->n_elem > 1);
  2772. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2773. /* if we padded the buffer out to 32-bit bound, and data
  2774. * xfer direction is from-device, we must copy from the
  2775. * pad buffer back into the supplied buffer
  2776. */
  2777. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2778. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2779. if (qc->flags & ATA_QCFLAG_SG) {
  2780. if (qc->n_elem)
  2781. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2782. /* restore last sg */
  2783. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2784. if (pad_buf) {
  2785. struct scatterlist *psg = &qc->pad_sgent;
  2786. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2787. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2788. kunmap_atomic(addr, KM_IRQ0);
  2789. }
  2790. } else {
  2791. if (qc->n_elem)
  2792. dma_unmap_single(ap->dev,
  2793. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2794. dir);
  2795. /* restore sg */
  2796. sg->length += qc->pad_len;
  2797. if (pad_buf)
  2798. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2799. pad_buf, qc->pad_len);
  2800. }
  2801. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2802. qc->__sg = NULL;
  2803. }
  2804. /**
  2805. * ata_fill_sg - Fill PCI IDE PRD table
  2806. * @qc: Metadata associated with taskfile to be transferred
  2807. *
  2808. * Fill PCI IDE PRD (scatter-gather) table with segments
  2809. * associated with the current disk command.
  2810. *
  2811. * LOCKING:
  2812. * spin_lock_irqsave(host lock)
  2813. *
  2814. */
  2815. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2816. {
  2817. struct ata_port *ap = qc->ap;
  2818. struct scatterlist *sg;
  2819. unsigned int idx;
  2820. WARN_ON(qc->__sg == NULL);
  2821. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2822. idx = 0;
  2823. ata_for_each_sg(sg, qc) {
  2824. u32 addr, offset;
  2825. u32 sg_len, len;
  2826. /* determine if physical DMA addr spans 64K boundary.
  2827. * Note h/w doesn't support 64-bit, so we unconditionally
  2828. * truncate dma_addr_t to u32.
  2829. */
  2830. addr = (u32) sg_dma_address(sg);
  2831. sg_len = sg_dma_len(sg);
  2832. while (sg_len) {
  2833. offset = addr & 0xffff;
  2834. len = sg_len;
  2835. if ((offset + sg_len) > 0x10000)
  2836. len = 0x10000 - offset;
  2837. ap->prd[idx].addr = cpu_to_le32(addr);
  2838. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2839. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2840. idx++;
  2841. sg_len -= len;
  2842. addr += len;
  2843. }
  2844. }
  2845. if (idx)
  2846. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2847. }
  2848. /**
  2849. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2850. * @qc: Metadata associated with taskfile to check
  2851. *
  2852. * Allow low-level driver to filter ATA PACKET commands, returning
  2853. * a status indicating whether or not it is OK to use DMA for the
  2854. * supplied PACKET command.
  2855. *
  2856. * LOCKING:
  2857. * spin_lock_irqsave(host lock)
  2858. *
  2859. * RETURNS: 0 when ATAPI DMA can be used
  2860. * nonzero otherwise
  2861. */
  2862. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2863. {
  2864. struct ata_port *ap = qc->ap;
  2865. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2866. if (ap->ops->check_atapi_dma)
  2867. rc = ap->ops->check_atapi_dma(qc);
  2868. return rc;
  2869. }
  2870. /**
  2871. * ata_qc_prep - Prepare taskfile for submission
  2872. * @qc: Metadata associated with taskfile to be prepared
  2873. *
  2874. * Prepare ATA taskfile for submission.
  2875. *
  2876. * LOCKING:
  2877. * spin_lock_irqsave(host lock)
  2878. */
  2879. void ata_qc_prep(struct ata_queued_cmd *qc)
  2880. {
  2881. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2882. return;
  2883. ata_fill_sg(qc);
  2884. }
  2885. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2886. /**
  2887. * ata_sg_init_one - Associate command with memory buffer
  2888. * @qc: Command to be associated
  2889. * @buf: Memory buffer
  2890. * @buflen: Length of memory buffer, in bytes.
  2891. *
  2892. * Initialize the data-related elements of queued_cmd @qc
  2893. * to point to a single memory buffer, @buf of byte length @buflen.
  2894. *
  2895. * LOCKING:
  2896. * spin_lock_irqsave(host lock)
  2897. */
  2898. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2899. {
  2900. struct scatterlist *sg;
  2901. qc->flags |= ATA_QCFLAG_SINGLE;
  2902. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2903. qc->__sg = &qc->sgent;
  2904. qc->n_elem = 1;
  2905. qc->orig_n_elem = 1;
  2906. qc->buf_virt = buf;
  2907. qc->nbytes = buflen;
  2908. sg = qc->__sg;
  2909. sg_init_one(sg, buf, buflen);
  2910. }
  2911. /**
  2912. * ata_sg_init - Associate command with scatter-gather table.
  2913. * @qc: Command to be associated
  2914. * @sg: Scatter-gather table.
  2915. * @n_elem: Number of elements in s/g table.
  2916. *
  2917. * Initialize the data-related elements of queued_cmd @qc
  2918. * to point to a scatter-gather table @sg, containing @n_elem
  2919. * elements.
  2920. *
  2921. * LOCKING:
  2922. * spin_lock_irqsave(host lock)
  2923. */
  2924. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2925. unsigned int n_elem)
  2926. {
  2927. qc->flags |= ATA_QCFLAG_SG;
  2928. qc->__sg = sg;
  2929. qc->n_elem = n_elem;
  2930. qc->orig_n_elem = n_elem;
  2931. }
  2932. /**
  2933. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2934. * @qc: Command with memory buffer to be mapped.
  2935. *
  2936. * DMA-map the memory buffer associated with queued_cmd @qc.
  2937. *
  2938. * LOCKING:
  2939. * spin_lock_irqsave(host lock)
  2940. *
  2941. * RETURNS:
  2942. * Zero on success, negative on error.
  2943. */
  2944. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2945. {
  2946. struct ata_port *ap = qc->ap;
  2947. int dir = qc->dma_dir;
  2948. struct scatterlist *sg = qc->__sg;
  2949. dma_addr_t dma_address;
  2950. int trim_sg = 0;
  2951. /* we must lengthen transfers to end on a 32-bit boundary */
  2952. qc->pad_len = sg->length & 3;
  2953. if (qc->pad_len) {
  2954. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2955. struct scatterlist *psg = &qc->pad_sgent;
  2956. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2957. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2958. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2959. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2960. qc->pad_len);
  2961. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2962. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2963. /* trim sg */
  2964. sg->length -= qc->pad_len;
  2965. if (sg->length == 0)
  2966. trim_sg = 1;
  2967. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2968. sg->length, qc->pad_len);
  2969. }
  2970. if (trim_sg) {
  2971. qc->n_elem--;
  2972. goto skip_map;
  2973. }
  2974. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2975. sg->length, dir);
  2976. if (dma_mapping_error(dma_address)) {
  2977. /* restore sg */
  2978. sg->length += qc->pad_len;
  2979. return -1;
  2980. }
  2981. sg_dma_address(sg) = dma_address;
  2982. sg_dma_len(sg) = sg->length;
  2983. skip_map:
  2984. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2985. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2986. return 0;
  2987. }
  2988. /**
  2989. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2990. * @qc: Command with scatter-gather table to be mapped.
  2991. *
  2992. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2993. *
  2994. * LOCKING:
  2995. * spin_lock_irqsave(host lock)
  2996. *
  2997. * RETURNS:
  2998. * Zero on success, negative on error.
  2999. *
  3000. */
  3001. static int ata_sg_setup(struct ata_queued_cmd *qc)
  3002. {
  3003. struct ata_port *ap = qc->ap;
  3004. struct scatterlist *sg = qc->__sg;
  3005. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  3006. int n_elem, pre_n_elem, dir, trim_sg = 0;
  3007. VPRINTK("ENTER, ata%u\n", ap->id);
  3008. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  3009. /* we must lengthen transfers to end on a 32-bit boundary */
  3010. qc->pad_len = lsg->length & 3;
  3011. if (qc->pad_len) {
  3012. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  3013. struct scatterlist *psg = &qc->pad_sgent;
  3014. unsigned int offset;
  3015. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  3016. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  3017. /*
  3018. * psg->page/offset are used to copy to-be-written
  3019. * data in this function or read data in ata_sg_clean.
  3020. */
  3021. offset = lsg->offset + lsg->length - qc->pad_len;
  3022. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  3023. psg->offset = offset_in_page(offset);
  3024. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3025. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  3026. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  3027. kunmap_atomic(addr, KM_IRQ0);
  3028. }
  3029. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  3030. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  3031. /* trim last sg */
  3032. lsg->length -= qc->pad_len;
  3033. if (lsg->length == 0)
  3034. trim_sg = 1;
  3035. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  3036. qc->n_elem - 1, lsg->length, qc->pad_len);
  3037. }
  3038. pre_n_elem = qc->n_elem;
  3039. if (trim_sg && pre_n_elem)
  3040. pre_n_elem--;
  3041. if (!pre_n_elem) {
  3042. n_elem = 0;
  3043. goto skip_map;
  3044. }
  3045. dir = qc->dma_dir;
  3046. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  3047. if (n_elem < 1) {
  3048. /* restore last sg */
  3049. lsg->length += qc->pad_len;
  3050. return -1;
  3051. }
  3052. DPRINTK("%d sg elements mapped\n", n_elem);
  3053. skip_map:
  3054. qc->n_elem = n_elem;
  3055. return 0;
  3056. }
  3057. /**
  3058. * swap_buf_le16 - swap halves of 16-bit words in place
  3059. * @buf: Buffer to swap
  3060. * @buf_words: Number of 16-bit words in buffer.
  3061. *
  3062. * Swap halves of 16-bit words if needed to convert from
  3063. * little-endian byte order to native cpu byte order, or
  3064. * vice-versa.
  3065. *
  3066. * LOCKING:
  3067. * Inherited from caller.
  3068. */
  3069. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  3070. {
  3071. #ifdef __BIG_ENDIAN
  3072. unsigned int i;
  3073. for (i = 0; i < buf_words; i++)
  3074. buf[i] = le16_to_cpu(buf[i]);
  3075. #endif /* __BIG_ENDIAN */
  3076. }
  3077. /**
  3078. * ata_mmio_data_xfer - Transfer data by MMIO
  3079. * @adev: device for this I/O
  3080. * @buf: data buffer
  3081. * @buflen: buffer length
  3082. * @write_data: read/write
  3083. *
  3084. * Transfer data from/to the device data register by MMIO.
  3085. *
  3086. * LOCKING:
  3087. * Inherited from caller.
  3088. */
  3089. void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
  3090. unsigned int buflen, int write_data)
  3091. {
  3092. struct ata_port *ap = adev->ap;
  3093. unsigned int i;
  3094. unsigned int words = buflen >> 1;
  3095. u16 *buf16 = (u16 *) buf;
  3096. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  3097. /* Transfer multiple of 2 bytes */
  3098. if (write_data) {
  3099. for (i = 0; i < words; i++)
  3100. writew(le16_to_cpu(buf16[i]), mmio);
  3101. } else {
  3102. for (i = 0; i < words; i++)
  3103. buf16[i] = cpu_to_le16(readw(mmio));
  3104. }
  3105. /* Transfer trailing 1 byte, if any. */
  3106. if (unlikely(buflen & 0x01)) {
  3107. u16 align_buf[1] = { 0 };
  3108. unsigned char *trailing_buf = buf + buflen - 1;
  3109. if (write_data) {
  3110. memcpy(align_buf, trailing_buf, 1);
  3111. writew(le16_to_cpu(align_buf[0]), mmio);
  3112. } else {
  3113. align_buf[0] = cpu_to_le16(readw(mmio));
  3114. memcpy(trailing_buf, align_buf, 1);
  3115. }
  3116. }
  3117. }
  3118. /**
  3119. * ata_pio_data_xfer - Transfer data by PIO
  3120. * @adev: device to target
  3121. * @buf: data buffer
  3122. * @buflen: buffer length
  3123. * @write_data: read/write
  3124. *
  3125. * Transfer data from/to the device data register by PIO.
  3126. *
  3127. * LOCKING:
  3128. * Inherited from caller.
  3129. */
  3130. void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
  3131. unsigned int buflen, int write_data)
  3132. {
  3133. struct ata_port *ap = adev->ap;
  3134. unsigned int words = buflen >> 1;
  3135. /* Transfer multiple of 2 bytes */
  3136. if (write_data)
  3137. outsw(ap->ioaddr.data_addr, buf, words);
  3138. else
  3139. insw(ap->ioaddr.data_addr, buf, words);
  3140. /* Transfer trailing 1 byte, if any. */
  3141. if (unlikely(buflen & 0x01)) {
  3142. u16 align_buf[1] = { 0 };
  3143. unsigned char *trailing_buf = buf + buflen - 1;
  3144. if (write_data) {
  3145. memcpy(align_buf, trailing_buf, 1);
  3146. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3147. } else {
  3148. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3149. memcpy(trailing_buf, align_buf, 1);
  3150. }
  3151. }
  3152. }
  3153. /**
  3154. * ata_pio_data_xfer_noirq - Transfer data by PIO
  3155. * @adev: device to target
  3156. * @buf: data buffer
  3157. * @buflen: buffer length
  3158. * @write_data: read/write
  3159. *
  3160. * Transfer data from/to the device data register by PIO. Do the
  3161. * transfer with interrupts disabled.
  3162. *
  3163. * LOCKING:
  3164. * Inherited from caller.
  3165. */
  3166. void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
  3167. unsigned int buflen, int write_data)
  3168. {
  3169. unsigned long flags;
  3170. local_irq_save(flags);
  3171. ata_pio_data_xfer(adev, buf, buflen, write_data);
  3172. local_irq_restore(flags);
  3173. }
  3174. /**
  3175. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3176. * @qc: Command on going
  3177. *
  3178. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3179. *
  3180. * LOCKING:
  3181. * Inherited from caller.
  3182. */
  3183. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3184. {
  3185. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3186. struct scatterlist *sg = qc->__sg;
  3187. struct ata_port *ap = qc->ap;
  3188. struct page *page;
  3189. unsigned int offset;
  3190. unsigned char *buf;
  3191. if (qc->cursect == (qc->nsect - 1))
  3192. ap->hsm_task_state = HSM_ST_LAST;
  3193. page = sg[qc->cursg].page;
  3194. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3195. /* get the current page and offset */
  3196. page = nth_page(page, (offset >> PAGE_SHIFT));
  3197. offset %= PAGE_SIZE;
  3198. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3199. if (PageHighMem(page)) {
  3200. unsigned long flags;
  3201. /* FIXME: use a bounce buffer */
  3202. local_irq_save(flags);
  3203. buf = kmap_atomic(page, KM_IRQ0);
  3204. /* do the actual data transfer */
  3205. ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
  3206. kunmap_atomic(buf, KM_IRQ0);
  3207. local_irq_restore(flags);
  3208. } else {
  3209. buf = page_address(page);
  3210. ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
  3211. }
  3212. qc->cursect++;
  3213. qc->cursg_ofs++;
  3214. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3215. qc->cursg++;
  3216. qc->cursg_ofs = 0;
  3217. }
  3218. }
  3219. /**
  3220. * ata_pio_sectors - Transfer one or many 512-byte sectors.
  3221. * @qc: Command on going
  3222. *
  3223. * Transfer one or many ATA_SECT_SIZE of data from/to the
  3224. * ATA device for the DRQ request.
  3225. *
  3226. * LOCKING:
  3227. * Inherited from caller.
  3228. */
  3229. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  3230. {
  3231. if (is_multi_taskfile(&qc->tf)) {
  3232. /* READ/WRITE MULTIPLE */
  3233. unsigned int nsect;
  3234. WARN_ON(qc->dev->multi_count == 0);
  3235. nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
  3236. while (nsect--)
  3237. ata_pio_sector(qc);
  3238. } else
  3239. ata_pio_sector(qc);
  3240. }
  3241. /**
  3242. * atapi_send_cdb - Write CDB bytes to hardware
  3243. * @ap: Port to which ATAPI device is attached.
  3244. * @qc: Taskfile currently active
  3245. *
  3246. * When device has indicated its readiness to accept
  3247. * a CDB, this function is called. Send the CDB.
  3248. *
  3249. * LOCKING:
  3250. * caller.
  3251. */
  3252. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  3253. {
  3254. /* send SCSI cdb */
  3255. DPRINTK("send cdb\n");
  3256. WARN_ON(qc->dev->cdb_len < 12);
  3257. ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
  3258. ata_altstatus(ap); /* flush */
  3259. switch (qc->tf.protocol) {
  3260. case ATA_PROT_ATAPI:
  3261. ap->hsm_task_state = HSM_ST;
  3262. break;
  3263. case ATA_PROT_ATAPI_NODATA:
  3264. ap->hsm_task_state = HSM_ST_LAST;
  3265. break;
  3266. case ATA_PROT_ATAPI_DMA:
  3267. ap->hsm_task_state = HSM_ST_LAST;
  3268. /* initiate bmdma */
  3269. ap->ops->bmdma_start(qc);
  3270. break;
  3271. }
  3272. }
  3273. /**
  3274. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3275. * @qc: Command on going
  3276. * @bytes: number of bytes
  3277. *
  3278. * Transfer Transfer data from/to the ATAPI device.
  3279. *
  3280. * LOCKING:
  3281. * Inherited from caller.
  3282. *
  3283. */
  3284. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3285. {
  3286. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3287. struct scatterlist *sg = qc->__sg;
  3288. struct ata_port *ap = qc->ap;
  3289. struct page *page;
  3290. unsigned char *buf;
  3291. unsigned int offset, count;
  3292. if (qc->curbytes + bytes >= qc->nbytes)
  3293. ap->hsm_task_state = HSM_ST_LAST;
  3294. next_sg:
  3295. if (unlikely(qc->cursg >= qc->n_elem)) {
  3296. /*
  3297. * The end of qc->sg is reached and the device expects
  3298. * more data to transfer. In order not to overrun qc->sg
  3299. * and fulfill length specified in the byte count register,
  3300. * - for read case, discard trailing data from the device
  3301. * - for write case, padding zero data to the device
  3302. */
  3303. u16 pad_buf[1] = { 0 };
  3304. unsigned int words = bytes >> 1;
  3305. unsigned int i;
  3306. if (words) /* warning if bytes > 1 */
  3307. ata_dev_printk(qc->dev, KERN_WARNING,
  3308. "%u bytes trailing data\n", bytes);
  3309. for (i = 0; i < words; i++)
  3310. ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
  3311. ap->hsm_task_state = HSM_ST_LAST;
  3312. return;
  3313. }
  3314. sg = &qc->__sg[qc->cursg];
  3315. page = sg->page;
  3316. offset = sg->offset + qc->cursg_ofs;
  3317. /* get the current page and offset */
  3318. page = nth_page(page, (offset >> PAGE_SHIFT));
  3319. offset %= PAGE_SIZE;
  3320. /* don't overrun current sg */
  3321. count = min(sg->length - qc->cursg_ofs, bytes);
  3322. /* don't cross page boundaries */
  3323. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3324. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3325. if (PageHighMem(page)) {
  3326. unsigned long flags;
  3327. /* FIXME: use bounce buffer */
  3328. local_irq_save(flags);
  3329. buf = kmap_atomic(page, KM_IRQ0);
  3330. /* do the actual data transfer */
  3331. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  3332. kunmap_atomic(buf, KM_IRQ0);
  3333. local_irq_restore(flags);
  3334. } else {
  3335. buf = page_address(page);
  3336. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  3337. }
  3338. bytes -= count;
  3339. qc->curbytes += count;
  3340. qc->cursg_ofs += count;
  3341. if (qc->cursg_ofs == sg->length) {
  3342. qc->cursg++;
  3343. qc->cursg_ofs = 0;
  3344. }
  3345. if (bytes)
  3346. goto next_sg;
  3347. }
  3348. /**
  3349. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3350. * @qc: Command on going
  3351. *
  3352. * Transfer Transfer data from/to the ATAPI device.
  3353. *
  3354. * LOCKING:
  3355. * Inherited from caller.
  3356. */
  3357. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3358. {
  3359. struct ata_port *ap = qc->ap;
  3360. struct ata_device *dev = qc->dev;
  3361. unsigned int ireason, bc_lo, bc_hi, bytes;
  3362. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3363. /* Abuse qc->result_tf for temp storage of intermediate TF
  3364. * here to save some kernel stack usage.
  3365. * For normal completion, qc->result_tf is not relevant. For
  3366. * error, qc->result_tf is later overwritten by ata_qc_complete().
  3367. * So, the correctness of qc->result_tf is not affected.
  3368. */
  3369. ap->ops->tf_read(ap, &qc->result_tf);
  3370. ireason = qc->result_tf.nsect;
  3371. bc_lo = qc->result_tf.lbam;
  3372. bc_hi = qc->result_tf.lbah;
  3373. bytes = (bc_hi << 8) | bc_lo;
  3374. /* shall be cleared to zero, indicating xfer of data */
  3375. if (ireason & (1 << 0))
  3376. goto err_out;
  3377. /* make sure transfer direction matches expected */
  3378. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3379. if (do_write != i_write)
  3380. goto err_out;
  3381. VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
  3382. __atapi_pio_bytes(qc, bytes);
  3383. return;
  3384. err_out:
  3385. ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
  3386. qc->err_mask |= AC_ERR_HSM;
  3387. ap->hsm_task_state = HSM_ST_ERR;
  3388. }
  3389. /**
  3390. * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
  3391. * @ap: the target ata_port
  3392. * @qc: qc on going
  3393. *
  3394. * RETURNS:
  3395. * 1 if ok in workqueue, 0 otherwise.
  3396. */
  3397. static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
  3398. {
  3399. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3400. return 1;
  3401. if (ap->hsm_task_state == HSM_ST_FIRST) {
  3402. if (qc->tf.protocol == ATA_PROT_PIO &&
  3403. (qc->tf.flags & ATA_TFLAG_WRITE))
  3404. return 1;
  3405. if (is_atapi_taskfile(&qc->tf) &&
  3406. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3407. return 1;
  3408. }
  3409. return 0;
  3410. }
  3411. /**
  3412. * ata_hsm_qc_complete - finish a qc running on standard HSM
  3413. * @qc: Command to complete
  3414. * @in_wq: 1 if called from workqueue, 0 otherwise
  3415. *
  3416. * Finish @qc which is running on standard HSM.
  3417. *
  3418. * LOCKING:
  3419. * If @in_wq is zero, spin_lock_irqsave(host lock).
  3420. * Otherwise, none on entry and grabs host lock.
  3421. */
  3422. static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
  3423. {
  3424. struct ata_port *ap = qc->ap;
  3425. unsigned long flags;
  3426. if (ap->ops->error_handler) {
  3427. if (in_wq) {
  3428. spin_lock_irqsave(ap->lock, flags);
  3429. /* EH might have kicked in while host lock is
  3430. * released.
  3431. */
  3432. qc = ata_qc_from_tag(ap, qc->tag);
  3433. if (qc) {
  3434. if (likely(!(qc->err_mask & AC_ERR_HSM))) {
  3435. ata_irq_on(ap);
  3436. ata_qc_complete(qc);
  3437. } else
  3438. ata_port_freeze(ap);
  3439. }
  3440. spin_unlock_irqrestore(ap->lock, flags);
  3441. } else {
  3442. if (likely(!(qc->err_mask & AC_ERR_HSM)))
  3443. ata_qc_complete(qc);
  3444. else
  3445. ata_port_freeze(ap);
  3446. }
  3447. } else {
  3448. if (in_wq) {
  3449. spin_lock_irqsave(ap->lock, flags);
  3450. ata_irq_on(ap);
  3451. ata_qc_complete(qc);
  3452. spin_unlock_irqrestore(ap->lock, flags);
  3453. } else
  3454. ata_qc_complete(qc);
  3455. }
  3456. ata_altstatus(ap); /* flush */
  3457. }
  3458. /**
  3459. * ata_hsm_move - move the HSM to the next state.
  3460. * @ap: the target ata_port
  3461. * @qc: qc on going
  3462. * @status: current device status
  3463. * @in_wq: 1 if called from workqueue, 0 otherwise
  3464. *
  3465. * RETURNS:
  3466. * 1 when poll next status needed, 0 otherwise.
  3467. */
  3468. int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  3469. u8 status, int in_wq)
  3470. {
  3471. unsigned long flags = 0;
  3472. int poll_next;
  3473. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3474. /* Make sure ata_qc_issue_prot() does not throw things
  3475. * like DMA polling into the workqueue. Notice that
  3476. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  3477. */
  3478. WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
  3479. fsm_start:
  3480. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  3481. ap->id, qc->tf.protocol, ap->hsm_task_state, status);
  3482. switch (ap->hsm_task_state) {
  3483. case HSM_ST_FIRST:
  3484. /* Send first data block or PACKET CDB */
  3485. /* If polling, we will stay in the work queue after
  3486. * sending the data. Otherwise, interrupt handler
  3487. * takes over after sending the data.
  3488. */
  3489. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3490. /* check device status */
  3491. if (unlikely((status & ATA_DRQ) == 0)) {
  3492. /* handle BSY=0, DRQ=0 as error */
  3493. if (likely(status & (ATA_ERR | ATA_DF)))
  3494. /* device stops HSM for abort/error */
  3495. qc->err_mask |= AC_ERR_DEV;
  3496. else
  3497. /* HSM violation. Let EH handle this */
  3498. qc->err_mask |= AC_ERR_HSM;
  3499. ap->hsm_task_state = HSM_ST_ERR;
  3500. goto fsm_start;
  3501. }
  3502. /* Device should not ask for data transfer (DRQ=1)
  3503. * when it finds something wrong.
  3504. * We ignore DRQ here and stop the HSM by
  3505. * changing hsm_task_state to HSM_ST_ERR and
  3506. * let the EH abort the command or reset the device.
  3507. */
  3508. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3509. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3510. ap->id, status);
  3511. qc->err_mask |= AC_ERR_HSM;
  3512. ap->hsm_task_state = HSM_ST_ERR;
  3513. goto fsm_start;
  3514. }
  3515. /* Send the CDB (atapi) or the first data block (ata pio out).
  3516. * During the state transition, interrupt handler shouldn't
  3517. * be invoked before the data transfer is complete and
  3518. * hsm_task_state is changed. Hence, the following locking.
  3519. */
  3520. if (in_wq)
  3521. spin_lock_irqsave(ap->lock, flags);
  3522. if (qc->tf.protocol == ATA_PROT_PIO) {
  3523. /* PIO data out protocol.
  3524. * send first data block.
  3525. */
  3526. /* ata_pio_sectors() might change the state
  3527. * to HSM_ST_LAST. so, the state is changed here
  3528. * before ata_pio_sectors().
  3529. */
  3530. ap->hsm_task_state = HSM_ST;
  3531. ata_pio_sectors(qc);
  3532. ata_altstatus(ap); /* flush */
  3533. } else
  3534. /* send CDB */
  3535. atapi_send_cdb(ap, qc);
  3536. if (in_wq)
  3537. spin_unlock_irqrestore(ap->lock, flags);
  3538. /* if polling, ata_pio_task() handles the rest.
  3539. * otherwise, interrupt handler takes over from here.
  3540. */
  3541. break;
  3542. case HSM_ST:
  3543. /* complete command or read/write the data register */
  3544. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  3545. /* ATAPI PIO protocol */
  3546. if ((status & ATA_DRQ) == 0) {
  3547. /* No more data to transfer or device error.
  3548. * Device error will be tagged in HSM_ST_LAST.
  3549. */
  3550. ap->hsm_task_state = HSM_ST_LAST;
  3551. goto fsm_start;
  3552. }
  3553. /* Device should not ask for data transfer (DRQ=1)
  3554. * when it finds something wrong.
  3555. * We ignore DRQ here and stop the HSM by
  3556. * changing hsm_task_state to HSM_ST_ERR and
  3557. * let the EH abort the command or reset the device.
  3558. */
  3559. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3560. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3561. ap->id, status);
  3562. qc->err_mask |= AC_ERR_HSM;
  3563. ap->hsm_task_state = HSM_ST_ERR;
  3564. goto fsm_start;
  3565. }
  3566. atapi_pio_bytes(qc);
  3567. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  3568. /* bad ireason reported by device */
  3569. goto fsm_start;
  3570. } else {
  3571. /* ATA PIO protocol */
  3572. if (unlikely((status & ATA_DRQ) == 0)) {
  3573. /* handle BSY=0, DRQ=0 as error */
  3574. if (likely(status & (ATA_ERR | ATA_DF)))
  3575. /* device stops HSM for abort/error */
  3576. qc->err_mask |= AC_ERR_DEV;
  3577. else
  3578. /* HSM violation. Let EH handle this */
  3579. qc->err_mask |= AC_ERR_HSM;
  3580. ap->hsm_task_state = HSM_ST_ERR;
  3581. goto fsm_start;
  3582. }
  3583. /* For PIO reads, some devices may ask for
  3584. * data transfer (DRQ=1) alone with ERR=1.
  3585. * We respect DRQ here and transfer one
  3586. * block of junk data before changing the
  3587. * hsm_task_state to HSM_ST_ERR.
  3588. *
  3589. * For PIO writes, ERR=1 DRQ=1 doesn't make
  3590. * sense since the data block has been
  3591. * transferred to the device.
  3592. */
  3593. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3594. /* data might be corrputed */
  3595. qc->err_mask |= AC_ERR_DEV;
  3596. if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
  3597. ata_pio_sectors(qc);
  3598. ata_altstatus(ap);
  3599. status = ata_wait_idle(ap);
  3600. }
  3601. if (status & (ATA_BUSY | ATA_DRQ))
  3602. qc->err_mask |= AC_ERR_HSM;
  3603. /* ata_pio_sectors() might change the
  3604. * state to HSM_ST_LAST. so, the state
  3605. * is changed after ata_pio_sectors().
  3606. */
  3607. ap->hsm_task_state = HSM_ST_ERR;
  3608. goto fsm_start;
  3609. }
  3610. ata_pio_sectors(qc);
  3611. if (ap->hsm_task_state == HSM_ST_LAST &&
  3612. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  3613. /* all data read */
  3614. ata_altstatus(ap);
  3615. status = ata_wait_idle(ap);
  3616. goto fsm_start;
  3617. }
  3618. }
  3619. ata_altstatus(ap); /* flush */
  3620. poll_next = 1;
  3621. break;
  3622. case HSM_ST_LAST:
  3623. if (unlikely(!ata_ok(status))) {
  3624. qc->err_mask |= __ac_err_mask(status);
  3625. ap->hsm_task_state = HSM_ST_ERR;
  3626. goto fsm_start;
  3627. }
  3628. /* no more data to transfer */
  3629. DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
  3630. ap->id, qc->dev->devno, status);
  3631. WARN_ON(qc->err_mask);
  3632. ap->hsm_task_state = HSM_ST_IDLE;
  3633. /* complete taskfile transaction */
  3634. ata_hsm_qc_complete(qc, in_wq);
  3635. poll_next = 0;
  3636. break;
  3637. case HSM_ST_ERR:
  3638. /* make sure qc->err_mask is available to
  3639. * know what's wrong and recover
  3640. */
  3641. WARN_ON(qc->err_mask == 0);
  3642. ap->hsm_task_state = HSM_ST_IDLE;
  3643. /* complete taskfile transaction */
  3644. ata_hsm_qc_complete(qc, in_wq);
  3645. poll_next = 0;
  3646. break;
  3647. default:
  3648. poll_next = 0;
  3649. BUG();
  3650. }
  3651. return poll_next;
  3652. }
  3653. static void ata_pio_task(void *_data)
  3654. {
  3655. struct ata_queued_cmd *qc = _data;
  3656. struct ata_port *ap = qc->ap;
  3657. u8 status;
  3658. int poll_next;
  3659. fsm_start:
  3660. WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
  3661. /*
  3662. * This is purely heuristic. This is a fast path.
  3663. * Sometimes when we enter, BSY will be cleared in
  3664. * a chk-status or two. If not, the drive is probably seeking
  3665. * or something. Snooze for a couple msecs, then
  3666. * chk-status again. If still busy, queue delayed work.
  3667. */
  3668. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3669. if (status & ATA_BUSY) {
  3670. msleep(2);
  3671. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3672. if (status & ATA_BUSY) {
  3673. ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
  3674. return;
  3675. }
  3676. }
  3677. /* move the HSM */
  3678. poll_next = ata_hsm_move(ap, qc, status, 1);
  3679. /* another command or interrupt handler
  3680. * may be running at this point.
  3681. */
  3682. if (poll_next)
  3683. goto fsm_start;
  3684. }
  3685. /**
  3686. * ata_qc_new - Request an available ATA command, for queueing
  3687. * @ap: Port associated with device @dev
  3688. * @dev: Device from whom we request an available command structure
  3689. *
  3690. * LOCKING:
  3691. * None.
  3692. */
  3693. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3694. {
  3695. struct ata_queued_cmd *qc = NULL;
  3696. unsigned int i;
  3697. /* no command while frozen */
  3698. if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
  3699. return NULL;
  3700. /* the last tag is reserved for internal command. */
  3701. for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
  3702. if (!test_and_set_bit(i, &ap->qc_allocated)) {
  3703. qc = __ata_qc_from_tag(ap, i);
  3704. break;
  3705. }
  3706. if (qc)
  3707. qc->tag = i;
  3708. return qc;
  3709. }
  3710. /**
  3711. * ata_qc_new_init - Request an available ATA command, and initialize it
  3712. * @dev: Device from whom we request an available command structure
  3713. *
  3714. * LOCKING:
  3715. * None.
  3716. */
  3717. struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
  3718. {
  3719. struct ata_port *ap = dev->ap;
  3720. struct ata_queued_cmd *qc;
  3721. qc = ata_qc_new(ap);
  3722. if (qc) {
  3723. qc->scsicmd = NULL;
  3724. qc->ap = ap;
  3725. qc->dev = dev;
  3726. ata_qc_reinit(qc);
  3727. }
  3728. return qc;
  3729. }
  3730. /**
  3731. * ata_qc_free - free unused ata_queued_cmd
  3732. * @qc: Command to complete
  3733. *
  3734. * Designed to free unused ata_queued_cmd object
  3735. * in case something prevents using it.
  3736. *
  3737. * LOCKING:
  3738. * spin_lock_irqsave(host lock)
  3739. */
  3740. void ata_qc_free(struct ata_queued_cmd *qc)
  3741. {
  3742. struct ata_port *ap = qc->ap;
  3743. unsigned int tag;
  3744. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3745. qc->flags = 0;
  3746. tag = qc->tag;
  3747. if (likely(ata_tag_valid(tag))) {
  3748. qc->tag = ATA_TAG_POISON;
  3749. clear_bit(tag, &ap->qc_allocated);
  3750. }
  3751. }
  3752. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3753. {
  3754. struct ata_port *ap = qc->ap;
  3755. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3756. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3757. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3758. ata_sg_clean(qc);
  3759. /* command should be marked inactive atomically with qc completion */
  3760. if (qc->tf.protocol == ATA_PROT_NCQ)
  3761. ap->sactive &= ~(1 << qc->tag);
  3762. else
  3763. ap->active_tag = ATA_TAG_POISON;
  3764. /* atapi: mark qc as inactive to prevent the interrupt handler
  3765. * from completing the command twice later, before the error handler
  3766. * is called. (when rc != 0 and atapi request sense is needed)
  3767. */
  3768. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3769. ap->qc_active &= ~(1 << qc->tag);
  3770. /* call completion callback */
  3771. qc->complete_fn(qc);
  3772. }
  3773. /**
  3774. * ata_qc_complete - Complete an active ATA command
  3775. * @qc: Command to complete
  3776. * @err_mask: ATA Status register contents
  3777. *
  3778. * Indicate to the mid and upper layers that an ATA
  3779. * command has completed, with either an ok or not-ok status.
  3780. *
  3781. * LOCKING:
  3782. * spin_lock_irqsave(host lock)
  3783. */
  3784. void ata_qc_complete(struct ata_queued_cmd *qc)
  3785. {
  3786. struct ata_port *ap = qc->ap;
  3787. /* XXX: New EH and old EH use different mechanisms to
  3788. * synchronize EH with regular execution path.
  3789. *
  3790. * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
  3791. * Normal execution path is responsible for not accessing a
  3792. * failed qc. libata core enforces the rule by returning NULL
  3793. * from ata_qc_from_tag() for failed qcs.
  3794. *
  3795. * Old EH depends on ata_qc_complete() nullifying completion
  3796. * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
  3797. * not synchronize with interrupt handler. Only PIO task is
  3798. * taken care of.
  3799. */
  3800. if (ap->ops->error_handler) {
  3801. WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
  3802. if (unlikely(qc->err_mask))
  3803. qc->flags |= ATA_QCFLAG_FAILED;
  3804. if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
  3805. if (!ata_tag_internal(qc->tag)) {
  3806. /* always fill result TF for failed qc */
  3807. ap->ops->tf_read(ap, &qc->result_tf);
  3808. ata_qc_schedule_eh(qc);
  3809. return;
  3810. }
  3811. }
  3812. /* read result TF if requested */
  3813. if (qc->flags & ATA_QCFLAG_RESULT_TF)
  3814. ap->ops->tf_read(ap, &qc->result_tf);
  3815. __ata_qc_complete(qc);
  3816. } else {
  3817. if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
  3818. return;
  3819. /* read result TF if failed or requested */
  3820. if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
  3821. ap->ops->tf_read(ap, &qc->result_tf);
  3822. __ata_qc_complete(qc);
  3823. }
  3824. }
  3825. /**
  3826. * ata_qc_complete_multiple - Complete multiple qcs successfully
  3827. * @ap: port in question
  3828. * @qc_active: new qc_active mask
  3829. * @finish_qc: LLDD callback invoked before completing a qc
  3830. *
  3831. * Complete in-flight commands. This functions is meant to be
  3832. * called from low-level driver's interrupt routine to complete
  3833. * requests normally. ap->qc_active and @qc_active is compared
  3834. * and commands are completed accordingly.
  3835. *
  3836. * LOCKING:
  3837. * spin_lock_irqsave(host lock)
  3838. *
  3839. * RETURNS:
  3840. * Number of completed commands on success, -errno otherwise.
  3841. */
  3842. int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
  3843. void (*finish_qc)(struct ata_queued_cmd *))
  3844. {
  3845. int nr_done = 0;
  3846. u32 done_mask;
  3847. int i;
  3848. done_mask = ap->qc_active ^ qc_active;
  3849. if (unlikely(done_mask & qc_active)) {
  3850. ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
  3851. "(%08x->%08x)\n", ap->qc_active, qc_active);
  3852. return -EINVAL;
  3853. }
  3854. for (i = 0; i < ATA_MAX_QUEUE; i++) {
  3855. struct ata_queued_cmd *qc;
  3856. if (!(done_mask & (1 << i)))
  3857. continue;
  3858. if ((qc = ata_qc_from_tag(ap, i))) {
  3859. if (finish_qc)
  3860. finish_qc(qc);
  3861. ata_qc_complete(qc);
  3862. nr_done++;
  3863. }
  3864. }
  3865. return nr_done;
  3866. }
  3867. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3868. {
  3869. struct ata_port *ap = qc->ap;
  3870. switch (qc->tf.protocol) {
  3871. case ATA_PROT_NCQ:
  3872. case ATA_PROT_DMA:
  3873. case ATA_PROT_ATAPI_DMA:
  3874. return 1;
  3875. case ATA_PROT_ATAPI:
  3876. case ATA_PROT_PIO:
  3877. if (ap->flags & ATA_FLAG_PIO_DMA)
  3878. return 1;
  3879. /* fall through */
  3880. default:
  3881. return 0;
  3882. }
  3883. /* never reached */
  3884. }
  3885. /**
  3886. * ata_qc_issue - issue taskfile to device
  3887. * @qc: command to issue to device
  3888. *
  3889. * Prepare an ATA command to submission to device.
  3890. * This includes mapping the data into a DMA-able
  3891. * area, filling in the S/G table, and finally
  3892. * writing the taskfile to hardware, starting the command.
  3893. *
  3894. * LOCKING:
  3895. * spin_lock_irqsave(host lock)
  3896. */
  3897. void ata_qc_issue(struct ata_queued_cmd *qc)
  3898. {
  3899. struct ata_port *ap = qc->ap;
  3900. /* Make sure only one non-NCQ command is outstanding. The
  3901. * check is skipped for old EH because it reuses active qc to
  3902. * request ATAPI sense.
  3903. */
  3904. WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
  3905. if (qc->tf.protocol == ATA_PROT_NCQ) {
  3906. WARN_ON(ap->sactive & (1 << qc->tag));
  3907. ap->sactive |= 1 << qc->tag;
  3908. } else {
  3909. WARN_ON(ap->sactive);
  3910. ap->active_tag = qc->tag;
  3911. }
  3912. qc->flags |= ATA_QCFLAG_ACTIVE;
  3913. ap->qc_active |= 1 << qc->tag;
  3914. if (ata_should_dma_map(qc)) {
  3915. if (qc->flags & ATA_QCFLAG_SG) {
  3916. if (ata_sg_setup(qc))
  3917. goto sg_err;
  3918. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3919. if (ata_sg_setup_one(qc))
  3920. goto sg_err;
  3921. }
  3922. } else {
  3923. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3924. }
  3925. ap->ops->qc_prep(qc);
  3926. qc->err_mask |= ap->ops->qc_issue(qc);
  3927. if (unlikely(qc->err_mask))
  3928. goto err;
  3929. return;
  3930. sg_err:
  3931. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3932. qc->err_mask |= AC_ERR_SYSTEM;
  3933. err:
  3934. ata_qc_complete(qc);
  3935. }
  3936. /**
  3937. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3938. * @qc: command to issue to device
  3939. *
  3940. * Using various libata functions and hooks, this function
  3941. * starts an ATA command. ATA commands are grouped into
  3942. * classes called "protocols", and issuing each type of protocol
  3943. * is slightly different.
  3944. *
  3945. * May be used as the qc_issue() entry in ata_port_operations.
  3946. *
  3947. * LOCKING:
  3948. * spin_lock_irqsave(host lock)
  3949. *
  3950. * RETURNS:
  3951. * Zero on success, AC_ERR_* mask on failure
  3952. */
  3953. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3954. {
  3955. struct ata_port *ap = qc->ap;
  3956. /* Use polling pio if the LLD doesn't handle
  3957. * interrupt driven pio and atapi CDB interrupt.
  3958. */
  3959. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  3960. switch (qc->tf.protocol) {
  3961. case ATA_PROT_PIO:
  3962. case ATA_PROT_ATAPI:
  3963. case ATA_PROT_ATAPI_NODATA:
  3964. qc->tf.flags |= ATA_TFLAG_POLLING;
  3965. break;
  3966. case ATA_PROT_ATAPI_DMA:
  3967. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  3968. /* see ata_dma_blacklisted() */
  3969. BUG();
  3970. break;
  3971. default:
  3972. break;
  3973. }
  3974. }
  3975. /* select the device */
  3976. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3977. /* start the command */
  3978. switch (qc->tf.protocol) {
  3979. case ATA_PROT_NODATA:
  3980. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3981. ata_qc_set_polling(qc);
  3982. ata_tf_to_host(ap, &qc->tf);
  3983. ap->hsm_task_state = HSM_ST_LAST;
  3984. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3985. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3986. break;
  3987. case ATA_PROT_DMA:
  3988. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3989. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3990. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3991. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3992. ap->hsm_task_state = HSM_ST_LAST;
  3993. break;
  3994. case ATA_PROT_PIO:
  3995. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3996. ata_qc_set_polling(qc);
  3997. ata_tf_to_host(ap, &qc->tf);
  3998. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3999. /* PIO data out protocol */
  4000. ap->hsm_task_state = HSM_ST_FIRST;
  4001. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  4002. /* always send first data block using
  4003. * the ata_pio_task() codepath.
  4004. */
  4005. } else {
  4006. /* PIO data in protocol */
  4007. ap->hsm_task_state = HSM_ST;
  4008. if (qc->tf.flags & ATA_TFLAG_POLLING)
  4009. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  4010. /* if polling, ata_pio_task() handles the rest.
  4011. * otherwise, interrupt handler takes over from here.
  4012. */
  4013. }
  4014. break;
  4015. case ATA_PROT_ATAPI:
  4016. case ATA_PROT_ATAPI_NODATA:
  4017. if (qc->tf.flags & ATA_TFLAG_POLLING)
  4018. ata_qc_set_polling(qc);
  4019. ata_tf_to_host(ap, &qc->tf);
  4020. ap->hsm_task_state = HSM_ST_FIRST;
  4021. /* send cdb by polling if no cdb interrupt */
  4022. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  4023. (qc->tf.flags & ATA_TFLAG_POLLING))
  4024. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  4025. break;
  4026. case ATA_PROT_ATAPI_DMA:
  4027. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  4028. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  4029. ap->ops->bmdma_setup(qc); /* set up bmdma */
  4030. ap->hsm_task_state = HSM_ST_FIRST;
  4031. /* send cdb by polling if no cdb interrupt */
  4032. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  4033. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  4034. break;
  4035. default:
  4036. WARN_ON(1);
  4037. return AC_ERR_SYSTEM;
  4038. }
  4039. return 0;
  4040. }
  4041. /**
  4042. * ata_host_intr - Handle host interrupt for given (port, task)
  4043. * @ap: Port on which interrupt arrived (possibly...)
  4044. * @qc: Taskfile currently active in engine
  4045. *
  4046. * Handle host interrupt for given queued command. Currently,
  4047. * only DMA interrupts are handled. All other commands are
  4048. * handled via polling with interrupts disabled (nIEN bit).
  4049. *
  4050. * LOCKING:
  4051. * spin_lock_irqsave(host lock)
  4052. *
  4053. * RETURNS:
  4054. * One if interrupt was handled, zero if not (shared irq).
  4055. */
  4056. inline unsigned int ata_host_intr (struct ata_port *ap,
  4057. struct ata_queued_cmd *qc)
  4058. {
  4059. u8 status, host_stat = 0;
  4060. VPRINTK("ata%u: protocol %d task_state %d\n",
  4061. ap->id, qc->tf.protocol, ap->hsm_task_state);
  4062. /* Check whether we are expecting interrupt in this state */
  4063. switch (ap->hsm_task_state) {
  4064. case HSM_ST_FIRST:
  4065. /* Some pre-ATAPI-4 devices assert INTRQ
  4066. * at this state when ready to receive CDB.
  4067. */
  4068. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  4069. * The flag was turned on only for atapi devices.
  4070. * No need to check is_atapi_taskfile(&qc->tf) again.
  4071. */
  4072. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  4073. goto idle_irq;
  4074. break;
  4075. case HSM_ST_LAST:
  4076. if (qc->tf.protocol == ATA_PROT_DMA ||
  4077. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  4078. /* check status of DMA engine */
  4079. host_stat = ap->ops->bmdma_status(ap);
  4080. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  4081. /* if it's not our irq... */
  4082. if (!(host_stat & ATA_DMA_INTR))
  4083. goto idle_irq;
  4084. /* before we do anything else, clear DMA-Start bit */
  4085. ap->ops->bmdma_stop(qc);
  4086. if (unlikely(host_stat & ATA_DMA_ERR)) {
  4087. /* error when transfering data to/from memory */
  4088. qc->err_mask |= AC_ERR_HOST_BUS;
  4089. ap->hsm_task_state = HSM_ST_ERR;
  4090. }
  4091. }
  4092. break;
  4093. case HSM_ST:
  4094. break;
  4095. default:
  4096. goto idle_irq;
  4097. }
  4098. /* check altstatus */
  4099. status = ata_altstatus(ap);
  4100. if (status & ATA_BUSY)
  4101. goto idle_irq;
  4102. /* check main status, clearing INTRQ */
  4103. status = ata_chk_status(ap);
  4104. if (unlikely(status & ATA_BUSY))
  4105. goto idle_irq;
  4106. /* ack bmdma irq events */
  4107. ap->ops->irq_clear(ap);
  4108. ata_hsm_move(ap, qc, status, 0);
  4109. return 1; /* irq handled */
  4110. idle_irq:
  4111. ap->stats.idle_irq++;
  4112. #ifdef ATA_IRQ_TRAP
  4113. if ((ap->stats.idle_irq % 1000) == 0) {
  4114. ata_irq_ack(ap, 0); /* debug trap */
  4115. ata_port_printk(ap, KERN_WARNING, "irq trap\n");
  4116. return 1;
  4117. }
  4118. #endif
  4119. return 0; /* irq not handled */
  4120. }
  4121. /**
  4122. * ata_interrupt - Default ATA host interrupt handler
  4123. * @irq: irq line (unused)
  4124. * @dev_instance: pointer to our ata_host information structure
  4125. * @regs: unused
  4126. *
  4127. * Default interrupt handler for PCI IDE devices. Calls
  4128. * ata_host_intr() for each port that is not disabled.
  4129. *
  4130. * LOCKING:
  4131. * Obtains host lock during operation.
  4132. *
  4133. * RETURNS:
  4134. * IRQ_NONE or IRQ_HANDLED.
  4135. */
  4136. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  4137. {
  4138. struct ata_host *host = dev_instance;
  4139. unsigned int i;
  4140. unsigned int handled = 0;
  4141. unsigned long flags;
  4142. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  4143. spin_lock_irqsave(&host->lock, flags);
  4144. for (i = 0; i < host->n_ports; i++) {
  4145. struct ata_port *ap;
  4146. ap = host->ports[i];
  4147. if (ap &&
  4148. !(ap->flags & ATA_FLAG_DISABLED)) {
  4149. struct ata_queued_cmd *qc;
  4150. qc = ata_qc_from_tag(ap, ap->active_tag);
  4151. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  4152. (qc->flags & ATA_QCFLAG_ACTIVE))
  4153. handled |= ata_host_intr(ap, qc);
  4154. }
  4155. }
  4156. spin_unlock_irqrestore(&host->lock, flags);
  4157. return IRQ_RETVAL(handled);
  4158. }
  4159. /**
  4160. * sata_scr_valid - test whether SCRs are accessible
  4161. * @ap: ATA port to test SCR accessibility for
  4162. *
  4163. * Test whether SCRs are accessible for @ap.
  4164. *
  4165. * LOCKING:
  4166. * None.
  4167. *
  4168. * RETURNS:
  4169. * 1 if SCRs are accessible, 0 otherwise.
  4170. */
  4171. int sata_scr_valid(struct ata_port *ap)
  4172. {
  4173. return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
  4174. }
  4175. /**
  4176. * sata_scr_read - read SCR register of the specified port
  4177. * @ap: ATA port to read SCR for
  4178. * @reg: SCR to read
  4179. * @val: Place to store read value
  4180. *
  4181. * Read SCR register @reg of @ap into *@val. This function is
  4182. * guaranteed to succeed if the cable type of the port is SATA
  4183. * and the port implements ->scr_read.
  4184. *
  4185. * LOCKING:
  4186. * None.
  4187. *
  4188. * RETURNS:
  4189. * 0 on success, negative errno on failure.
  4190. */
  4191. int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
  4192. {
  4193. if (sata_scr_valid(ap)) {
  4194. *val = ap->ops->scr_read(ap, reg);
  4195. return 0;
  4196. }
  4197. return -EOPNOTSUPP;
  4198. }
  4199. /**
  4200. * sata_scr_write - write SCR register of the specified port
  4201. * @ap: ATA port to write SCR for
  4202. * @reg: SCR to write
  4203. * @val: value to write
  4204. *
  4205. * Write @val to SCR register @reg of @ap. This function is
  4206. * guaranteed to succeed if the cable type of the port is SATA
  4207. * and the port implements ->scr_read.
  4208. *
  4209. * LOCKING:
  4210. * None.
  4211. *
  4212. * RETURNS:
  4213. * 0 on success, negative errno on failure.
  4214. */
  4215. int sata_scr_write(struct ata_port *ap, int reg, u32 val)
  4216. {
  4217. if (sata_scr_valid(ap)) {
  4218. ap->ops->scr_write(ap, reg, val);
  4219. return 0;
  4220. }
  4221. return -EOPNOTSUPP;
  4222. }
  4223. /**
  4224. * sata_scr_write_flush - write SCR register of the specified port and flush
  4225. * @ap: ATA port to write SCR for
  4226. * @reg: SCR to write
  4227. * @val: value to write
  4228. *
  4229. * This function is identical to sata_scr_write() except that this
  4230. * function performs flush after writing to the register.
  4231. *
  4232. * LOCKING:
  4233. * None.
  4234. *
  4235. * RETURNS:
  4236. * 0 on success, negative errno on failure.
  4237. */
  4238. int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
  4239. {
  4240. if (sata_scr_valid(ap)) {
  4241. ap->ops->scr_write(ap, reg, val);
  4242. ap->ops->scr_read(ap, reg);
  4243. return 0;
  4244. }
  4245. return -EOPNOTSUPP;
  4246. }
  4247. /**
  4248. * ata_port_online - test whether the given port is online
  4249. * @ap: ATA port to test
  4250. *
  4251. * Test whether @ap is online. Note that this function returns 0
  4252. * if online status of @ap cannot be obtained, so
  4253. * ata_port_online(ap) != !ata_port_offline(ap).
  4254. *
  4255. * LOCKING:
  4256. * None.
  4257. *
  4258. * RETURNS:
  4259. * 1 if the port online status is available and online.
  4260. */
  4261. int ata_port_online(struct ata_port *ap)
  4262. {
  4263. u32 sstatus;
  4264. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
  4265. return 1;
  4266. return 0;
  4267. }
  4268. /**
  4269. * ata_port_offline - test whether the given port is offline
  4270. * @ap: ATA port to test
  4271. *
  4272. * Test whether @ap is offline. Note that this function returns
  4273. * 0 if offline status of @ap cannot be obtained, so
  4274. * ata_port_online(ap) != !ata_port_offline(ap).
  4275. *
  4276. * LOCKING:
  4277. * None.
  4278. *
  4279. * RETURNS:
  4280. * 1 if the port offline status is available and offline.
  4281. */
  4282. int ata_port_offline(struct ata_port *ap)
  4283. {
  4284. u32 sstatus;
  4285. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
  4286. return 1;
  4287. return 0;
  4288. }
  4289. int ata_flush_cache(struct ata_device *dev)
  4290. {
  4291. unsigned int err_mask;
  4292. u8 cmd;
  4293. if (!ata_try_flush_cache(dev))
  4294. return 0;
  4295. if (ata_id_has_flush_ext(dev->id))
  4296. cmd = ATA_CMD_FLUSH_EXT;
  4297. else
  4298. cmd = ATA_CMD_FLUSH;
  4299. err_mask = ata_do_simple_cmd(dev, cmd);
  4300. if (err_mask) {
  4301. ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
  4302. return -EIO;
  4303. }
  4304. return 0;
  4305. }
  4306. static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
  4307. unsigned int action, unsigned int ehi_flags,
  4308. int wait)
  4309. {
  4310. unsigned long flags;
  4311. int i, rc;
  4312. for (i = 0; i < host->n_ports; i++) {
  4313. struct ata_port *ap = host->ports[i];
  4314. /* Previous resume operation might still be in
  4315. * progress. Wait for PM_PENDING to clear.
  4316. */
  4317. if (ap->pflags & ATA_PFLAG_PM_PENDING) {
  4318. ata_port_wait_eh(ap);
  4319. WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
  4320. }
  4321. /* request PM ops to EH */
  4322. spin_lock_irqsave(ap->lock, flags);
  4323. ap->pm_mesg = mesg;
  4324. if (wait) {
  4325. rc = 0;
  4326. ap->pm_result = &rc;
  4327. }
  4328. ap->pflags |= ATA_PFLAG_PM_PENDING;
  4329. ap->eh_info.action |= action;
  4330. ap->eh_info.flags |= ehi_flags;
  4331. ata_port_schedule_eh(ap);
  4332. spin_unlock_irqrestore(ap->lock, flags);
  4333. /* wait and check result */
  4334. if (wait) {
  4335. ata_port_wait_eh(ap);
  4336. WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
  4337. if (rc)
  4338. return rc;
  4339. }
  4340. }
  4341. return 0;
  4342. }
  4343. /**
  4344. * ata_host_suspend - suspend host
  4345. * @host: host to suspend
  4346. * @mesg: PM message
  4347. *
  4348. * Suspend @host. Actual operation is performed by EH. This
  4349. * function requests EH to perform PM operations and waits for EH
  4350. * to finish.
  4351. *
  4352. * LOCKING:
  4353. * Kernel thread context (may sleep).
  4354. *
  4355. * RETURNS:
  4356. * 0 on success, -errno on failure.
  4357. */
  4358. int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
  4359. {
  4360. int i, j, rc;
  4361. rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
  4362. if (rc)
  4363. goto fail;
  4364. /* EH is quiescent now. Fail if we have any ready device.
  4365. * This happens if hotplug occurs between completion of device
  4366. * suspension and here.
  4367. */
  4368. for (i = 0; i < host->n_ports; i++) {
  4369. struct ata_port *ap = host->ports[i];
  4370. for (j = 0; j < ATA_MAX_DEVICES; j++) {
  4371. struct ata_device *dev = &ap->device[j];
  4372. if (ata_dev_ready(dev)) {
  4373. ata_port_printk(ap, KERN_WARNING,
  4374. "suspend failed, device %d "
  4375. "still active\n", dev->devno);
  4376. rc = -EBUSY;
  4377. goto fail;
  4378. }
  4379. }
  4380. }
  4381. host->dev->power.power_state = mesg;
  4382. return 0;
  4383. fail:
  4384. ata_host_resume(host);
  4385. return rc;
  4386. }
  4387. /**
  4388. * ata_host_resume - resume host
  4389. * @host: host to resume
  4390. *
  4391. * Resume @host. Actual operation is performed by EH. This
  4392. * function requests EH to perform PM operations and returns.
  4393. * Note that all resume operations are performed parallely.
  4394. *
  4395. * LOCKING:
  4396. * Kernel thread context (may sleep).
  4397. */
  4398. void ata_host_resume(struct ata_host *host)
  4399. {
  4400. ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
  4401. ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
  4402. host->dev->power.power_state = PMSG_ON;
  4403. }
  4404. /**
  4405. * ata_port_start - Set port up for dma.
  4406. * @ap: Port to initialize
  4407. *
  4408. * Called just after data structures for each port are
  4409. * initialized. Allocates space for PRD table.
  4410. *
  4411. * May be used as the port_start() entry in ata_port_operations.
  4412. *
  4413. * LOCKING:
  4414. * Inherited from caller.
  4415. */
  4416. int ata_port_start (struct ata_port *ap)
  4417. {
  4418. struct device *dev = ap->dev;
  4419. int rc;
  4420. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  4421. if (!ap->prd)
  4422. return -ENOMEM;
  4423. rc = ata_pad_alloc(ap, dev);
  4424. if (rc) {
  4425. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4426. return rc;
  4427. }
  4428. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  4429. return 0;
  4430. }
  4431. /**
  4432. * ata_port_stop - Undo ata_port_start()
  4433. * @ap: Port to shut down
  4434. *
  4435. * Frees the PRD table.
  4436. *
  4437. * May be used as the port_stop() entry in ata_port_operations.
  4438. *
  4439. * LOCKING:
  4440. * Inherited from caller.
  4441. */
  4442. void ata_port_stop (struct ata_port *ap)
  4443. {
  4444. struct device *dev = ap->dev;
  4445. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4446. ata_pad_free(ap, dev);
  4447. }
  4448. void ata_host_stop (struct ata_host *host)
  4449. {
  4450. if (host->mmio_base)
  4451. iounmap(host->mmio_base);
  4452. }
  4453. /**
  4454. * ata_dev_init - Initialize an ata_device structure
  4455. * @dev: Device structure to initialize
  4456. *
  4457. * Initialize @dev in preparation for probing.
  4458. *
  4459. * LOCKING:
  4460. * Inherited from caller.
  4461. */
  4462. void ata_dev_init(struct ata_device *dev)
  4463. {
  4464. struct ata_port *ap = dev->ap;
  4465. unsigned long flags;
  4466. /* SATA spd limit is bound to the first device */
  4467. ap->sata_spd_limit = ap->hw_sata_spd_limit;
  4468. /* High bits of dev->flags are used to record warm plug
  4469. * requests which occur asynchronously. Synchronize using
  4470. * host lock.
  4471. */
  4472. spin_lock_irqsave(ap->lock, flags);
  4473. dev->flags &= ~ATA_DFLAG_INIT_MASK;
  4474. spin_unlock_irqrestore(ap->lock, flags);
  4475. memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
  4476. sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
  4477. dev->pio_mask = UINT_MAX;
  4478. dev->mwdma_mask = UINT_MAX;
  4479. dev->udma_mask = UINT_MAX;
  4480. }
  4481. /**
  4482. * ata_port_init - Initialize an ata_port structure
  4483. * @ap: Structure to initialize
  4484. * @host: Collection of hosts to which @ap belongs
  4485. * @ent: Probe information provided by low-level driver
  4486. * @port_no: Port number associated with this ata_port
  4487. *
  4488. * Initialize a new ata_port structure.
  4489. *
  4490. * LOCKING:
  4491. * Inherited from caller.
  4492. */
  4493. void ata_port_init(struct ata_port *ap, struct ata_host *host,
  4494. const struct ata_probe_ent *ent, unsigned int port_no)
  4495. {
  4496. unsigned int i;
  4497. ap->lock = &host->lock;
  4498. ap->flags = ATA_FLAG_DISABLED;
  4499. ap->id = ata_unique_id++;
  4500. ap->ctl = ATA_DEVCTL_OBS;
  4501. ap->host = host;
  4502. ap->dev = ent->dev;
  4503. ap->port_no = port_no;
  4504. if (port_no == 1 && ent->pinfo2) {
  4505. ap->pio_mask = ent->pinfo2->pio_mask;
  4506. ap->mwdma_mask = ent->pinfo2->mwdma_mask;
  4507. ap->udma_mask = ent->pinfo2->udma_mask;
  4508. ap->flags |= ent->pinfo2->flags;
  4509. ap->ops = ent->pinfo2->port_ops;
  4510. } else {
  4511. ap->pio_mask = ent->pio_mask;
  4512. ap->mwdma_mask = ent->mwdma_mask;
  4513. ap->udma_mask = ent->udma_mask;
  4514. ap->flags |= ent->port_flags;
  4515. ap->ops = ent->port_ops;
  4516. }
  4517. ap->hw_sata_spd_limit = UINT_MAX;
  4518. ap->active_tag = ATA_TAG_POISON;
  4519. ap->last_ctl = 0xFF;
  4520. #if defined(ATA_VERBOSE_DEBUG)
  4521. /* turn on all debugging levels */
  4522. ap->msg_enable = 0x00FF;
  4523. #elif defined(ATA_DEBUG)
  4524. ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
  4525. #else
  4526. ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
  4527. #endif
  4528. INIT_WORK(&ap->port_task, NULL, NULL);
  4529. INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
  4530. INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
  4531. INIT_LIST_HEAD(&ap->eh_done_q);
  4532. init_waitqueue_head(&ap->eh_wait_q);
  4533. /* set cable type */
  4534. ap->cbl = ATA_CBL_NONE;
  4535. if (ap->flags & ATA_FLAG_SATA)
  4536. ap->cbl = ATA_CBL_SATA;
  4537. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  4538. struct ata_device *dev = &ap->device[i];
  4539. dev->ap = ap;
  4540. dev->devno = i;
  4541. ata_dev_init(dev);
  4542. }
  4543. #ifdef ATA_IRQ_TRAP
  4544. ap->stats.unhandled_irq = 1;
  4545. ap->stats.idle_irq = 1;
  4546. #endif
  4547. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4548. }
  4549. /**
  4550. * ata_port_init_shost - Initialize SCSI host associated with ATA port
  4551. * @ap: ATA port to initialize SCSI host for
  4552. * @shost: SCSI host associated with @ap
  4553. *
  4554. * Initialize SCSI host @shost associated with ATA port @ap.
  4555. *
  4556. * LOCKING:
  4557. * Inherited from caller.
  4558. */
  4559. static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
  4560. {
  4561. ap->scsi_host = shost;
  4562. shost->unique_id = ap->id;
  4563. shost->max_id = 16;
  4564. shost->max_lun = 1;
  4565. shost->max_channel = 1;
  4566. shost->max_cmd_len = 12;
  4567. }
  4568. /**
  4569. * ata_port_add - Attach low-level ATA driver to system
  4570. * @ent: Information provided by low-level driver
  4571. * @host: Collections of ports to which we add
  4572. * @port_no: Port number associated with this host
  4573. *
  4574. * Attach low-level ATA driver to system.
  4575. *
  4576. * LOCKING:
  4577. * PCI/etc. bus probe sem.
  4578. *
  4579. * RETURNS:
  4580. * New ata_port on success, for NULL on error.
  4581. */
  4582. static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
  4583. struct ata_host *host,
  4584. unsigned int port_no)
  4585. {
  4586. struct Scsi_Host *shost;
  4587. struct ata_port *ap;
  4588. DPRINTK("ENTER\n");
  4589. if (!ent->port_ops->error_handler &&
  4590. !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4591. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4592. port_no);
  4593. return NULL;
  4594. }
  4595. shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4596. if (!shost)
  4597. return NULL;
  4598. shost->transportt = &ata_scsi_transport_template;
  4599. ap = ata_shost_to_port(shost);
  4600. ata_port_init(ap, host, ent, port_no);
  4601. ata_port_init_shost(ap, shost);
  4602. return ap;
  4603. }
  4604. /**
  4605. * ata_sas_host_init - Initialize a host struct
  4606. * @host: host to initialize
  4607. * @dev: device host is attached to
  4608. * @flags: host flags
  4609. * @ops: port_ops
  4610. *
  4611. * LOCKING:
  4612. * PCI/etc. bus probe sem.
  4613. *
  4614. */
  4615. void ata_host_init(struct ata_host *host, struct device *dev,
  4616. unsigned long flags, const struct ata_port_operations *ops)
  4617. {
  4618. spin_lock_init(&host->lock);
  4619. host->dev = dev;
  4620. host->flags = flags;
  4621. host->ops = ops;
  4622. }
  4623. /**
  4624. * ata_device_add - Register hardware device with ATA and SCSI layers
  4625. * @ent: Probe information describing hardware device to be registered
  4626. *
  4627. * This function processes the information provided in the probe
  4628. * information struct @ent, allocates the necessary ATA and SCSI
  4629. * host information structures, initializes them, and registers
  4630. * everything with requisite kernel subsystems.
  4631. *
  4632. * This function requests irqs, probes the ATA bus, and probes
  4633. * the SCSI bus.
  4634. *
  4635. * LOCKING:
  4636. * PCI/etc. bus probe sem.
  4637. *
  4638. * RETURNS:
  4639. * Number of ports registered. Zero on error (no ports registered).
  4640. */
  4641. int ata_device_add(const struct ata_probe_ent *ent)
  4642. {
  4643. unsigned int i;
  4644. struct device *dev = ent->dev;
  4645. struct ata_host *host;
  4646. int rc;
  4647. DPRINTK("ENTER\n");
  4648. if (ent->irq == 0) {
  4649. dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
  4650. return 0;
  4651. }
  4652. /* alloc a container for our list of ATA ports (buses) */
  4653. host = kzalloc(sizeof(struct ata_host) +
  4654. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4655. if (!host)
  4656. return 0;
  4657. ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
  4658. host->n_ports = ent->n_ports;
  4659. host->irq = ent->irq;
  4660. host->irq2 = ent->irq2;
  4661. host->mmio_base = ent->mmio_base;
  4662. host->private_data = ent->private_data;
  4663. /* register each port bound to this device */
  4664. for (i = 0; i < host->n_ports; i++) {
  4665. struct ata_port *ap;
  4666. unsigned long xfer_mode_mask;
  4667. int irq_line = ent->irq;
  4668. ap = ata_port_add(ent, host, i);
  4669. host->ports[i] = ap;
  4670. if (!ap)
  4671. goto err_out;
  4672. /* dummy? */
  4673. if (ent->dummy_port_mask & (1 << i)) {
  4674. ata_port_printk(ap, KERN_INFO, "DUMMY\n");
  4675. ap->ops = &ata_dummy_port_ops;
  4676. continue;
  4677. }
  4678. /* start port */
  4679. rc = ap->ops->port_start(ap);
  4680. if (rc) {
  4681. host->ports[i] = NULL;
  4682. scsi_host_put(ap->scsi_host);
  4683. goto err_out;
  4684. }
  4685. /* Report the secondary IRQ for second channel legacy */
  4686. if (i == 1 && ent->irq2)
  4687. irq_line = ent->irq2;
  4688. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4689. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4690. (ap->pio_mask << ATA_SHIFT_PIO);
  4691. /* print per-port info to dmesg */
  4692. ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
  4693. "ctl 0x%lX bmdma 0x%lX irq %d\n",
  4694. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4695. ata_mode_string(xfer_mode_mask),
  4696. ap->ioaddr.cmd_addr,
  4697. ap->ioaddr.ctl_addr,
  4698. ap->ioaddr.bmdma_addr,
  4699. irq_line);
  4700. ata_chk_status(ap);
  4701. host->ops->irq_clear(ap);
  4702. ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
  4703. }
  4704. /* obtain irq, that may be shared between channels */
  4705. rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4706. DRV_NAME, host);
  4707. if (rc) {
  4708. dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
  4709. ent->irq, rc);
  4710. goto err_out;
  4711. }
  4712. /* do we have a second IRQ for the other channel, eg legacy mode */
  4713. if (ent->irq2) {
  4714. /* We will get weird core code crashes later if this is true
  4715. so trap it now */
  4716. BUG_ON(ent->irq == ent->irq2);
  4717. rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
  4718. DRV_NAME, host);
  4719. if (rc) {
  4720. dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
  4721. ent->irq2, rc);
  4722. goto err_out_free_irq;
  4723. }
  4724. }
  4725. /* perform each probe synchronously */
  4726. DPRINTK("probe begin\n");
  4727. for (i = 0; i < host->n_ports; i++) {
  4728. struct ata_port *ap = host->ports[i];
  4729. u32 scontrol;
  4730. int rc;
  4731. /* init sata_spd_limit to the current value */
  4732. if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
  4733. int spd = (scontrol >> 4) & 0xf;
  4734. ap->hw_sata_spd_limit &= (1 << spd) - 1;
  4735. }
  4736. ap->sata_spd_limit = ap->hw_sata_spd_limit;
  4737. rc = scsi_add_host(ap->scsi_host, dev);
  4738. if (rc) {
  4739. ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
  4740. /* FIXME: do something useful here */
  4741. /* FIXME: handle unconditional calls to
  4742. * scsi_scan_host and ata_host_remove, below,
  4743. * at the very least
  4744. */
  4745. }
  4746. if (ap->ops->error_handler) {
  4747. struct ata_eh_info *ehi = &ap->eh_info;
  4748. unsigned long flags;
  4749. ata_port_probe(ap);
  4750. /* kick EH for boot probing */
  4751. spin_lock_irqsave(ap->lock, flags);
  4752. ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
  4753. ehi->action |= ATA_EH_SOFTRESET;
  4754. ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
  4755. ap->pflags |= ATA_PFLAG_LOADING;
  4756. ata_port_schedule_eh(ap);
  4757. spin_unlock_irqrestore(ap->lock, flags);
  4758. /* wait for EH to finish */
  4759. ata_port_wait_eh(ap);
  4760. } else {
  4761. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4762. rc = ata_bus_probe(ap);
  4763. DPRINTK("ata%u: bus probe end\n", ap->id);
  4764. if (rc) {
  4765. /* FIXME: do something useful here?
  4766. * Current libata behavior will
  4767. * tear down everything when
  4768. * the module is removed
  4769. * or the h/w is unplugged.
  4770. */
  4771. }
  4772. }
  4773. }
  4774. /* probes are done, now scan each port's disk(s) */
  4775. DPRINTK("host probe begin\n");
  4776. for (i = 0; i < host->n_ports; i++) {
  4777. struct ata_port *ap = host->ports[i];
  4778. ata_scsi_scan_host(ap);
  4779. }
  4780. dev_set_drvdata(dev, host);
  4781. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4782. return ent->n_ports; /* success */
  4783. err_out_free_irq:
  4784. free_irq(ent->irq, host);
  4785. err_out:
  4786. for (i = 0; i < host->n_ports; i++) {
  4787. struct ata_port *ap = host->ports[i];
  4788. if (ap) {
  4789. ap->ops->port_stop(ap);
  4790. scsi_host_put(ap->scsi_host);
  4791. }
  4792. }
  4793. kfree(host);
  4794. VPRINTK("EXIT, returning 0\n");
  4795. return 0;
  4796. }
  4797. /**
  4798. * ata_port_detach - Detach ATA port in prepration of device removal
  4799. * @ap: ATA port to be detached
  4800. *
  4801. * Detach all ATA devices and the associated SCSI devices of @ap;
  4802. * then, remove the associated SCSI host. @ap is guaranteed to
  4803. * be quiescent on return from this function.
  4804. *
  4805. * LOCKING:
  4806. * Kernel thread context (may sleep).
  4807. */
  4808. void ata_port_detach(struct ata_port *ap)
  4809. {
  4810. unsigned long flags;
  4811. int i;
  4812. if (!ap->ops->error_handler)
  4813. goto skip_eh;
  4814. /* tell EH we're leaving & flush EH */
  4815. spin_lock_irqsave(ap->lock, flags);
  4816. ap->pflags |= ATA_PFLAG_UNLOADING;
  4817. spin_unlock_irqrestore(ap->lock, flags);
  4818. ata_port_wait_eh(ap);
  4819. /* EH is now guaranteed to see UNLOADING, so no new device
  4820. * will be attached. Disable all existing devices.
  4821. */
  4822. spin_lock_irqsave(ap->lock, flags);
  4823. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4824. ata_dev_disable(&ap->device[i]);
  4825. spin_unlock_irqrestore(ap->lock, flags);
  4826. /* Final freeze & EH. All in-flight commands are aborted. EH
  4827. * will be skipped and retrials will be terminated with bad
  4828. * target.
  4829. */
  4830. spin_lock_irqsave(ap->lock, flags);
  4831. ata_port_freeze(ap); /* won't be thawed */
  4832. spin_unlock_irqrestore(ap->lock, flags);
  4833. ata_port_wait_eh(ap);
  4834. /* Flush hotplug task. The sequence is similar to
  4835. * ata_port_flush_task().
  4836. */
  4837. flush_workqueue(ata_aux_wq);
  4838. cancel_delayed_work(&ap->hotplug_task);
  4839. flush_workqueue(ata_aux_wq);
  4840. skip_eh:
  4841. /* remove the associated SCSI host */
  4842. scsi_remove_host(ap->scsi_host);
  4843. }
  4844. /**
  4845. * ata_host_remove - PCI layer callback for device removal
  4846. * @host: ATA host set that was removed
  4847. *
  4848. * Unregister all objects associated with this host set. Free those
  4849. * objects.
  4850. *
  4851. * LOCKING:
  4852. * Inherited from calling layer (may sleep).
  4853. */
  4854. void ata_host_remove(struct ata_host *host)
  4855. {
  4856. unsigned int i;
  4857. for (i = 0; i < host->n_ports; i++)
  4858. ata_port_detach(host->ports[i]);
  4859. free_irq(host->irq, host);
  4860. if (host->irq2)
  4861. free_irq(host->irq2, host);
  4862. for (i = 0; i < host->n_ports; i++) {
  4863. struct ata_port *ap = host->ports[i];
  4864. ata_scsi_release(ap->scsi_host);
  4865. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4866. struct ata_ioports *ioaddr = &ap->ioaddr;
  4867. /* FIXME: Add -ac IDE pci mods to remove these special cases */
  4868. if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
  4869. release_region(ATA_PRIMARY_CMD, 8);
  4870. else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
  4871. release_region(ATA_SECONDARY_CMD, 8);
  4872. }
  4873. scsi_host_put(ap->scsi_host);
  4874. }
  4875. if (host->ops->host_stop)
  4876. host->ops->host_stop(host);
  4877. kfree(host);
  4878. }
  4879. /**
  4880. * ata_scsi_release - SCSI layer callback hook for host unload
  4881. * @shost: libata host to be unloaded
  4882. *
  4883. * Performs all duties necessary to shut down a libata port...
  4884. * Kill port kthread, disable port, and release resources.
  4885. *
  4886. * LOCKING:
  4887. * Inherited from SCSI layer.
  4888. *
  4889. * RETURNS:
  4890. * One.
  4891. */
  4892. int ata_scsi_release(struct Scsi_Host *shost)
  4893. {
  4894. struct ata_port *ap = ata_shost_to_port(shost);
  4895. DPRINTK("ENTER\n");
  4896. ap->ops->port_disable(ap);
  4897. ap->ops->port_stop(ap);
  4898. DPRINTK("EXIT\n");
  4899. return 1;
  4900. }
  4901. struct ata_probe_ent *
  4902. ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
  4903. {
  4904. struct ata_probe_ent *probe_ent;
  4905. probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
  4906. if (!probe_ent) {
  4907. printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
  4908. kobject_name(&(dev->kobj)));
  4909. return NULL;
  4910. }
  4911. INIT_LIST_HEAD(&probe_ent->node);
  4912. probe_ent->dev = dev;
  4913. probe_ent->sht = port->sht;
  4914. probe_ent->port_flags = port->flags;
  4915. probe_ent->pio_mask = port->pio_mask;
  4916. probe_ent->mwdma_mask = port->mwdma_mask;
  4917. probe_ent->udma_mask = port->udma_mask;
  4918. probe_ent->port_ops = port->port_ops;
  4919. probe_ent->private_data = port->private_data;
  4920. return probe_ent;
  4921. }
  4922. /**
  4923. * ata_std_ports - initialize ioaddr with standard port offsets.
  4924. * @ioaddr: IO address structure to be initialized
  4925. *
  4926. * Utility function which initializes data_addr, error_addr,
  4927. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4928. * device_addr, status_addr, and command_addr to standard offsets
  4929. * relative to cmd_addr.
  4930. *
  4931. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4932. */
  4933. void ata_std_ports(struct ata_ioports *ioaddr)
  4934. {
  4935. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4936. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4937. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4938. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4939. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4940. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4941. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4942. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4943. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4944. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4945. }
  4946. #ifdef CONFIG_PCI
  4947. void ata_pci_host_stop (struct ata_host *host)
  4948. {
  4949. struct pci_dev *pdev = to_pci_dev(host->dev);
  4950. pci_iounmap(pdev, host->mmio_base);
  4951. }
  4952. /**
  4953. * ata_pci_remove_one - PCI layer callback for device removal
  4954. * @pdev: PCI device that was removed
  4955. *
  4956. * PCI layer indicates to libata via this hook that
  4957. * hot-unplug or module unload event has occurred.
  4958. * Handle this by unregistering all objects associated
  4959. * with this PCI device. Free those objects. Then finally
  4960. * release PCI resources and disable device.
  4961. *
  4962. * LOCKING:
  4963. * Inherited from PCI layer (may sleep).
  4964. */
  4965. void ata_pci_remove_one (struct pci_dev *pdev)
  4966. {
  4967. struct device *dev = pci_dev_to_dev(pdev);
  4968. struct ata_host *host = dev_get_drvdata(dev);
  4969. ata_host_remove(host);
  4970. pci_release_regions(pdev);
  4971. pci_disable_device(pdev);
  4972. dev_set_drvdata(dev, NULL);
  4973. }
  4974. /* move to PCI subsystem */
  4975. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4976. {
  4977. unsigned long tmp = 0;
  4978. switch (bits->width) {
  4979. case 1: {
  4980. u8 tmp8 = 0;
  4981. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4982. tmp = tmp8;
  4983. break;
  4984. }
  4985. case 2: {
  4986. u16 tmp16 = 0;
  4987. pci_read_config_word(pdev, bits->reg, &tmp16);
  4988. tmp = tmp16;
  4989. break;
  4990. }
  4991. case 4: {
  4992. u32 tmp32 = 0;
  4993. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4994. tmp = tmp32;
  4995. break;
  4996. }
  4997. default:
  4998. return -EINVAL;
  4999. }
  5000. tmp &= bits->mask;
  5001. return (tmp == bits->val) ? 1 : 0;
  5002. }
  5003. void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
  5004. {
  5005. pci_save_state(pdev);
  5006. if (mesg.event == PM_EVENT_SUSPEND) {
  5007. pci_disable_device(pdev);
  5008. pci_set_power_state(pdev, PCI_D3hot);
  5009. }
  5010. }
  5011. void ata_pci_device_do_resume(struct pci_dev *pdev)
  5012. {
  5013. pci_set_power_state(pdev, PCI_D0);
  5014. pci_restore_state(pdev);
  5015. pci_enable_device(pdev);
  5016. pci_set_master(pdev);
  5017. }
  5018. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
  5019. {
  5020. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  5021. int rc = 0;
  5022. rc = ata_host_suspend(host, mesg);
  5023. if (rc)
  5024. return rc;
  5025. ata_pci_device_do_suspend(pdev, mesg);
  5026. return 0;
  5027. }
  5028. int ata_pci_device_resume(struct pci_dev *pdev)
  5029. {
  5030. struct ata_host *host = dev_get_drvdata(&pdev->dev);
  5031. ata_pci_device_do_resume(pdev);
  5032. ata_host_resume(host);
  5033. return 0;
  5034. }
  5035. #endif /* CONFIG_PCI */
  5036. static int __init ata_init(void)
  5037. {
  5038. ata_probe_timeout *= HZ;
  5039. ata_wq = create_workqueue("ata");
  5040. if (!ata_wq)
  5041. return -ENOMEM;
  5042. ata_aux_wq = create_singlethread_workqueue("ata_aux");
  5043. if (!ata_aux_wq) {
  5044. destroy_workqueue(ata_wq);
  5045. return -ENOMEM;
  5046. }
  5047. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  5048. return 0;
  5049. }
  5050. static void __exit ata_exit(void)
  5051. {
  5052. destroy_workqueue(ata_wq);
  5053. destroy_workqueue(ata_aux_wq);
  5054. }
  5055. module_init(ata_init);
  5056. module_exit(ata_exit);
  5057. static unsigned long ratelimit_time;
  5058. static DEFINE_SPINLOCK(ata_ratelimit_lock);
  5059. int ata_ratelimit(void)
  5060. {
  5061. int rc;
  5062. unsigned long flags;
  5063. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  5064. if (time_after(jiffies, ratelimit_time)) {
  5065. rc = 1;
  5066. ratelimit_time = jiffies + (HZ/5);
  5067. } else
  5068. rc = 0;
  5069. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  5070. return rc;
  5071. }
  5072. /**
  5073. * ata_wait_register - wait until register value changes
  5074. * @reg: IO-mapped register
  5075. * @mask: Mask to apply to read register value
  5076. * @val: Wait condition
  5077. * @interval_msec: polling interval in milliseconds
  5078. * @timeout_msec: timeout in milliseconds
  5079. *
  5080. * Waiting for some bits of register to change is a common
  5081. * operation for ATA controllers. This function reads 32bit LE
  5082. * IO-mapped register @reg and tests for the following condition.
  5083. *
  5084. * (*@reg & mask) != val
  5085. *
  5086. * If the condition is met, it returns; otherwise, the process is
  5087. * repeated after @interval_msec until timeout.
  5088. *
  5089. * LOCKING:
  5090. * Kernel thread context (may sleep)
  5091. *
  5092. * RETURNS:
  5093. * The final register value.
  5094. */
  5095. u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
  5096. unsigned long interval_msec,
  5097. unsigned long timeout_msec)
  5098. {
  5099. unsigned long timeout;
  5100. u32 tmp;
  5101. tmp = ioread32(reg);
  5102. /* Calculate timeout _after_ the first read to make sure
  5103. * preceding writes reach the controller before starting to
  5104. * eat away the timeout.
  5105. */
  5106. timeout = jiffies + (timeout_msec * HZ) / 1000;
  5107. while ((tmp & mask) == val && time_before(jiffies, timeout)) {
  5108. msleep(interval_msec);
  5109. tmp = ioread32(reg);
  5110. }
  5111. return tmp;
  5112. }
  5113. /*
  5114. * Dummy port_ops
  5115. */
  5116. static void ata_dummy_noret(struct ata_port *ap) { }
  5117. static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
  5118. static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
  5119. static u8 ata_dummy_check_status(struct ata_port *ap)
  5120. {
  5121. return ATA_DRDY;
  5122. }
  5123. static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
  5124. {
  5125. return AC_ERR_SYSTEM;
  5126. }
  5127. const struct ata_port_operations ata_dummy_port_ops = {
  5128. .port_disable = ata_port_disable,
  5129. .check_status = ata_dummy_check_status,
  5130. .check_altstatus = ata_dummy_check_status,
  5131. .dev_select = ata_noop_dev_select,
  5132. .qc_prep = ata_noop_qc_prep,
  5133. .qc_issue = ata_dummy_qc_issue,
  5134. .freeze = ata_dummy_noret,
  5135. .thaw = ata_dummy_noret,
  5136. .error_handler = ata_dummy_noret,
  5137. .post_internal_cmd = ata_dummy_qc_noret,
  5138. .irq_clear = ata_dummy_noret,
  5139. .port_start = ata_dummy_ret0,
  5140. .port_stop = ata_dummy_noret,
  5141. };
  5142. /*
  5143. * libata is essentially a library of internal helper functions for
  5144. * low-level ATA host controller drivers. As such, the API/ABI is
  5145. * likely to change as new drivers are added and updated.
  5146. * Do not depend on ABI/API stability.
  5147. */
  5148. EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
  5149. EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
  5150. EXPORT_SYMBOL_GPL(sata_deb_timing_long);
  5151. EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
  5152. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  5153. EXPORT_SYMBOL_GPL(ata_std_ports);
  5154. EXPORT_SYMBOL_GPL(ata_host_init);
  5155. EXPORT_SYMBOL_GPL(ata_device_add);
  5156. EXPORT_SYMBOL_GPL(ata_port_detach);
  5157. EXPORT_SYMBOL_GPL(ata_host_remove);
  5158. EXPORT_SYMBOL_GPL(ata_sg_init);
  5159. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  5160. EXPORT_SYMBOL_GPL(ata_hsm_move);
  5161. EXPORT_SYMBOL_GPL(ata_qc_complete);
  5162. EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
  5163. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  5164. EXPORT_SYMBOL_GPL(ata_tf_load);
  5165. EXPORT_SYMBOL_GPL(ata_tf_read);
  5166. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  5167. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  5168. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  5169. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  5170. EXPORT_SYMBOL_GPL(ata_check_status);
  5171. EXPORT_SYMBOL_GPL(ata_altstatus);
  5172. EXPORT_SYMBOL_GPL(ata_exec_command);
  5173. EXPORT_SYMBOL_GPL(ata_port_start);
  5174. EXPORT_SYMBOL_GPL(ata_port_stop);
  5175. EXPORT_SYMBOL_GPL(ata_host_stop);
  5176. EXPORT_SYMBOL_GPL(ata_interrupt);
  5177. EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
  5178. EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
  5179. EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
  5180. EXPORT_SYMBOL_GPL(ata_qc_prep);
  5181. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  5182. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  5183. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  5184. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  5185. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  5186. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  5187. EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
  5188. EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
  5189. EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
  5190. EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
  5191. EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
  5192. EXPORT_SYMBOL_GPL(ata_port_probe);
  5193. EXPORT_SYMBOL_GPL(sata_set_spd);
  5194. EXPORT_SYMBOL_GPL(sata_phy_debounce);
  5195. EXPORT_SYMBOL_GPL(sata_phy_resume);
  5196. EXPORT_SYMBOL_GPL(sata_phy_reset);
  5197. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  5198. EXPORT_SYMBOL_GPL(ata_bus_reset);
  5199. EXPORT_SYMBOL_GPL(ata_std_prereset);
  5200. EXPORT_SYMBOL_GPL(ata_std_softreset);
  5201. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  5202. EXPORT_SYMBOL_GPL(ata_std_postreset);
  5203. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  5204. EXPORT_SYMBOL_GPL(ata_dev_classify);
  5205. EXPORT_SYMBOL_GPL(ata_dev_pair);
  5206. EXPORT_SYMBOL_GPL(ata_port_disable);
  5207. EXPORT_SYMBOL_GPL(ata_ratelimit);
  5208. EXPORT_SYMBOL_GPL(ata_wait_register);
  5209. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  5210. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  5211. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  5212. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  5213. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  5214. EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
  5215. EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
  5216. EXPORT_SYMBOL_GPL(ata_scsi_release);
  5217. EXPORT_SYMBOL_GPL(ata_host_intr);
  5218. EXPORT_SYMBOL_GPL(sata_scr_valid);
  5219. EXPORT_SYMBOL_GPL(sata_scr_read);
  5220. EXPORT_SYMBOL_GPL(sata_scr_write);
  5221. EXPORT_SYMBOL_GPL(sata_scr_write_flush);
  5222. EXPORT_SYMBOL_GPL(ata_port_online);
  5223. EXPORT_SYMBOL_GPL(ata_port_offline);
  5224. EXPORT_SYMBOL_GPL(ata_host_suspend);
  5225. EXPORT_SYMBOL_GPL(ata_host_resume);
  5226. EXPORT_SYMBOL_GPL(ata_id_string);
  5227. EXPORT_SYMBOL_GPL(ata_id_c_string);
  5228. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  5229. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  5230. EXPORT_SYMBOL_GPL(ata_timing_compute);
  5231. EXPORT_SYMBOL_GPL(ata_timing_merge);
  5232. #ifdef CONFIG_PCI
  5233. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  5234. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  5235. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  5236. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  5237. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  5238. EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
  5239. EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
  5240. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  5241. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  5242. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  5243. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  5244. #endif /* CONFIG_PCI */
  5245. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  5246. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
  5247. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  5248. EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
  5249. EXPORT_SYMBOL_GPL(ata_port_abort);
  5250. EXPORT_SYMBOL_GPL(ata_port_freeze);
  5251. EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
  5252. EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
  5253. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  5254. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  5255. EXPORT_SYMBOL_GPL(ata_do_eh);