gpio-tnetv107x.c 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206
  1. /*
  2. * Texas Instruments TNETV107X GPIO Controller
  3. *
  4. * Copyright (C) 2010 Texas Instruments
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/gpio.h>
  18. #include <linux/platform_data/gpio-davinci.h>
  19. #include <mach/common.h>
  20. #include <mach/tnetv107x.h>
  21. struct tnetv107x_gpio_regs {
  22. u32 idver;
  23. u32 data_in[3];
  24. u32 data_out[3];
  25. u32 direction[3];
  26. u32 enable[3];
  27. };
  28. #define gpio_reg_index(gpio) ((gpio) >> 5)
  29. #define gpio_reg_bit(gpio) BIT((gpio) & 0x1f)
  30. #define gpio_reg_rmw(reg, mask, val) \
  31. __raw_writel((__raw_readl(reg) & ~(mask)) | (val), (reg))
  32. #define gpio_reg_set_bit(reg, gpio) \
  33. gpio_reg_rmw((reg) + gpio_reg_index(gpio), 0, gpio_reg_bit(gpio))
  34. #define gpio_reg_clear_bit(reg, gpio) \
  35. gpio_reg_rmw((reg) + gpio_reg_index(gpio), gpio_reg_bit(gpio), 0)
  36. #define gpio_reg_get_bit(reg, gpio) \
  37. (__raw_readl((reg) + gpio_reg_index(gpio)) & gpio_reg_bit(gpio))
  38. #define chip2controller(chip) \
  39. container_of(chip, struct davinci_gpio_controller, chip)
  40. #define TNETV107X_GPIO_CTLRS DIV_ROUND_UP(TNETV107X_N_GPIO, 32)
  41. static struct davinci_gpio_controller chips[TNETV107X_GPIO_CTLRS];
  42. static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset)
  43. {
  44. struct davinci_gpio_controller *ctlr = chip2controller(chip);
  45. struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
  46. unsigned gpio = chip->base + offset;
  47. unsigned long flags;
  48. spin_lock_irqsave(&ctlr->lock, flags);
  49. gpio_reg_set_bit(regs->enable, gpio);
  50. spin_unlock_irqrestore(&ctlr->lock, flags);
  51. return 0;
  52. }
  53. static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset)
  54. {
  55. struct davinci_gpio_controller *ctlr = chip2controller(chip);
  56. struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
  57. unsigned gpio = chip->base + offset;
  58. unsigned long flags;
  59. spin_lock_irqsave(&ctlr->lock, flags);
  60. gpio_reg_clear_bit(regs->enable, gpio);
  61. spin_unlock_irqrestore(&ctlr->lock, flags);
  62. }
  63. static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
  64. {
  65. struct davinci_gpio_controller *ctlr = chip2controller(chip);
  66. struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
  67. unsigned gpio = chip->base + offset;
  68. unsigned long flags;
  69. spin_lock_irqsave(&ctlr->lock, flags);
  70. gpio_reg_set_bit(regs->direction, gpio);
  71. spin_unlock_irqrestore(&ctlr->lock, flags);
  72. return 0;
  73. }
  74. static int tnetv107x_gpio_dir_out(struct gpio_chip *chip,
  75. unsigned offset, int value)
  76. {
  77. struct davinci_gpio_controller *ctlr = chip2controller(chip);
  78. struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
  79. unsigned gpio = chip->base + offset;
  80. unsigned long flags;
  81. spin_lock_irqsave(&ctlr->lock, flags);
  82. if (value)
  83. gpio_reg_set_bit(regs->data_out, gpio);
  84. else
  85. gpio_reg_clear_bit(regs->data_out, gpio);
  86. gpio_reg_clear_bit(regs->direction, gpio);
  87. spin_unlock_irqrestore(&ctlr->lock, flags);
  88. return 0;
  89. }
  90. static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset)
  91. {
  92. struct davinci_gpio_controller *ctlr = chip2controller(chip);
  93. struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
  94. unsigned gpio = chip->base + offset;
  95. int ret;
  96. ret = gpio_reg_get_bit(regs->data_in, gpio);
  97. return ret ? 1 : 0;
  98. }
  99. static void tnetv107x_gpio_set(struct gpio_chip *chip,
  100. unsigned offset, int value)
  101. {
  102. struct davinci_gpio_controller *ctlr = chip2controller(chip);
  103. struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
  104. unsigned gpio = chip->base + offset;
  105. unsigned long flags;
  106. spin_lock_irqsave(&ctlr->lock, flags);
  107. if (value)
  108. gpio_reg_set_bit(regs->data_out, gpio);
  109. else
  110. gpio_reg_clear_bit(regs->data_out, gpio);
  111. spin_unlock_irqrestore(&ctlr->lock, flags);
  112. }
  113. static int __init tnetv107x_gpio_setup(void)
  114. {
  115. int i, base;
  116. unsigned ngpio;
  117. struct davinci_soc_info *soc_info = &davinci_soc_info;
  118. struct tnetv107x_gpio_regs *regs;
  119. struct davinci_gpio_controller *ctlr;
  120. if (soc_info->gpio_type != GPIO_TYPE_TNETV107X)
  121. return 0;
  122. ngpio = soc_info->gpio_num;
  123. if (ngpio == 0) {
  124. pr_err("GPIO setup: how many GPIOs?\n");
  125. return -EINVAL;
  126. }
  127. if (WARN_ON(TNETV107X_N_GPIO < ngpio))
  128. ngpio = TNETV107X_N_GPIO;
  129. regs = ioremap(soc_info->gpio_base, SZ_4K);
  130. if (WARN_ON(!regs))
  131. return -EINVAL;
  132. for (i = 0, base = 0; base < ngpio; i++, base += 32) {
  133. ctlr = &chips[i];
  134. ctlr->chip.label = "tnetv107x";
  135. ctlr->chip.can_sleep = 0;
  136. ctlr->chip.base = base;
  137. ctlr->chip.ngpio = ngpio - base;
  138. if (ctlr->chip.ngpio > 32)
  139. ctlr->chip.ngpio = 32;
  140. ctlr->chip.request = tnetv107x_gpio_request;
  141. ctlr->chip.free = tnetv107x_gpio_free;
  142. ctlr->chip.direction_input = tnetv107x_gpio_dir_in;
  143. ctlr->chip.get = tnetv107x_gpio_get;
  144. ctlr->chip.direction_output = tnetv107x_gpio_dir_out;
  145. ctlr->chip.set = tnetv107x_gpio_set;
  146. spin_lock_init(&ctlr->lock);
  147. ctlr->regs = regs;
  148. ctlr->set_data = &regs->data_out[i];
  149. ctlr->clr_data = &regs->data_out[i];
  150. ctlr->in_data = &regs->data_in[i];
  151. gpiochip_add(&ctlr->chip);
  152. }
  153. soc_info->gpio_ctlrs = chips;
  154. soc_info->gpio_ctlrs_num = DIV_ROUND_UP(ngpio, 32);
  155. return 0;
  156. }
  157. pure_initcall(tnetv107x_gpio_setup);