init.c 39 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644
  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/of.h>
  18. #include <linux/mmc/sdio_func.h>
  19. #include "core.h"
  20. #include "cfg80211.h"
  21. #include "target.h"
  22. #include "debug.h"
  23. #include "hif-ops.h"
  24. unsigned int debug_mask;
  25. static unsigned int testmode;
  26. module_param(debug_mask, uint, 0644);
  27. module_param(testmode, uint, 0644);
  28. /*
  29. * Include definitions here that can be used to tune the WLAN module
  30. * behavior. Different customers can tune the behavior as per their needs,
  31. * here.
  32. */
  33. /*
  34. * This configuration item enable/disable keepalive support.
  35. * Keepalive support: In the absence of any data traffic to AP, null
  36. * frames will be sent to the AP at periodic interval, to keep the association
  37. * active. This configuration item defines the periodic interval.
  38. * Use value of zero to disable keepalive support
  39. * Default: 60 seconds
  40. */
  41. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  42. /*
  43. * This configuration item sets the value of disconnect timeout
  44. * Firmware delays sending the disconnec event to the host for this
  45. * timeout after is gets disconnected from the current AP.
  46. * If the firmware successly roams within the disconnect timeout
  47. * it sends a new connect event
  48. */
  49. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  50. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  51. #define ATH6KL_DATA_OFFSET 64
  52. struct sk_buff *ath6kl_buf_alloc(int size)
  53. {
  54. struct sk_buff *skb;
  55. u16 reserved;
  56. /* Add chacheline space at front and back of buffer */
  57. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  58. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  59. skb = dev_alloc_skb(size + reserved);
  60. if (skb)
  61. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  62. return skb;
  63. }
  64. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  65. {
  66. vif->ssid_len = 0;
  67. memset(vif->ssid, 0, sizeof(vif->ssid));
  68. vif->dot11_auth_mode = OPEN_AUTH;
  69. vif->auth_mode = NONE_AUTH;
  70. vif->prwise_crypto = NONE_CRYPT;
  71. vif->prwise_crypto_len = 0;
  72. vif->grp_crypto = NONE_CRYPT;
  73. vif->grp_crypto_len = 0;
  74. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  75. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  76. memset(vif->bssid, 0, sizeof(vif->bssid));
  77. vif->bss_ch = 0;
  78. vif->nw_type = vif->next_mode = INFRA_NETWORK;
  79. }
  80. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  81. {
  82. u32 address, data;
  83. struct host_app_area host_app_area;
  84. /* Fetch the address of the host_app_area_s
  85. * instance in the host interest area */
  86. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  87. address = TARG_VTOP(ar->target_type, address);
  88. if (ath6kl_diag_read32(ar, address, &data))
  89. return -EIO;
  90. address = TARG_VTOP(ar->target_type, data);
  91. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  92. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  93. sizeof(struct host_app_area)))
  94. return -EIO;
  95. return 0;
  96. }
  97. static inline void set_ac2_ep_map(struct ath6kl *ar,
  98. u8 ac,
  99. enum htc_endpoint_id ep)
  100. {
  101. ar->ac2ep_map[ac] = ep;
  102. ar->ep2ac_map[ep] = ac;
  103. }
  104. /* connect to a service */
  105. static int ath6kl_connectservice(struct ath6kl *ar,
  106. struct htc_service_connect_req *con_req,
  107. char *desc)
  108. {
  109. int status;
  110. struct htc_service_connect_resp response;
  111. memset(&response, 0, sizeof(response));
  112. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  113. if (status) {
  114. ath6kl_err("failed to connect to %s service status:%d\n",
  115. desc, status);
  116. return status;
  117. }
  118. switch (con_req->svc_id) {
  119. case WMI_CONTROL_SVC:
  120. if (test_bit(WMI_ENABLED, &ar->flag))
  121. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  122. ar->ctrl_ep = response.endpoint;
  123. break;
  124. case WMI_DATA_BE_SVC:
  125. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  126. break;
  127. case WMI_DATA_BK_SVC:
  128. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  129. break;
  130. case WMI_DATA_VI_SVC:
  131. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  132. break;
  133. case WMI_DATA_VO_SVC:
  134. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  135. break;
  136. default:
  137. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  138. return -EINVAL;
  139. }
  140. return 0;
  141. }
  142. static int ath6kl_init_service_ep(struct ath6kl *ar)
  143. {
  144. struct htc_service_connect_req connect;
  145. memset(&connect, 0, sizeof(connect));
  146. /* these fields are the same for all service endpoints */
  147. connect.ep_cb.rx = ath6kl_rx;
  148. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  149. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  150. /*
  151. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  152. * gets called.
  153. */
  154. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  155. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  156. if (!connect.ep_cb.rx_refill_thresh)
  157. connect.ep_cb.rx_refill_thresh++;
  158. /* connect to control service */
  159. connect.svc_id = WMI_CONTROL_SVC;
  160. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  161. return -EIO;
  162. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  163. /*
  164. * Limit the HTC message size on the send path, although e can
  165. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  166. * (802.3) frames on the send path.
  167. */
  168. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  169. /*
  170. * To reduce the amount of committed memory for larger A_MSDU
  171. * frames, use the recv-alloc threshold mechanism for larger
  172. * packets.
  173. */
  174. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  175. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  176. /*
  177. * For the remaining data services set the connection flag to
  178. * reduce dribbling, if configured to do so.
  179. */
  180. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  181. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  182. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  183. connect.svc_id = WMI_DATA_BE_SVC;
  184. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  185. return -EIO;
  186. /* connect to back-ground map this to WMI LOW_PRI */
  187. connect.svc_id = WMI_DATA_BK_SVC;
  188. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  189. return -EIO;
  190. /* connect to Video service, map this to to HI PRI */
  191. connect.svc_id = WMI_DATA_VI_SVC;
  192. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  193. return -EIO;
  194. /*
  195. * Connect to VO service, this is currently not mapped to a WMI
  196. * priority stream due to historical reasons. WMI originally
  197. * defined 3 priorities over 3 mailboxes We can change this when
  198. * WMI is reworked so that priorities are not dependent on
  199. * mailboxes.
  200. */
  201. connect.svc_id = WMI_DATA_VO_SVC;
  202. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  203. return -EIO;
  204. return 0;
  205. }
  206. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  207. {
  208. ath6kl_init_profile_info(vif);
  209. vif->def_txkey_index = 0;
  210. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  211. vif->ch_hint = 0;
  212. }
  213. /*
  214. * Set HTC/Mbox operational parameters, this can only be called when the
  215. * target is in the BMI phase.
  216. */
  217. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  218. u8 htc_ctrl_buf)
  219. {
  220. int status;
  221. u32 blk_size;
  222. blk_size = ar->mbox_info.block_size;
  223. if (htc_ctrl_buf)
  224. blk_size |= ((u32)htc_ctrl_buf) << 16;
  225. /* set the host interest area for the block size */
  226. status = ath6kl_bmi_write(ar,
  227. ath6kl_get_hi_item_addr(ar,
  228. HI_ITEM(hi_mbox_io_block_sz)),
  229. (u8 *)&blk_size,
  230. 4);
  231. if (status) {
  232. ath6kl_err("bmi_write_memory for IO block size failed\n");
  233. goto out;
  234. }
  235. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  236. blk_size,
  237. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  238. if (mbox_isr_yield_val) {
  239. /* set the host interest area for the mbox ISR yield limit */
  240. status = ath6kl_bmi_write(ar,
  241. ath6kl_get_hi_item_addr(ar,
  242. HI_ITEM(hi_mbox_isr_yield_limit)),
  243. (u8 *)&mbox_isr_yield_val,
  244. 4);
  245. if (status) {
  246. ath6kl_err("bmi_write_memory for yield limit failed\n");
  247. goto out;
  248. }
  249. }
  250. out:
  251. return status;
  252. }
  253. #define REG_DUMP_COUNT_AR6003 60
  254. #define REGISTER_DUMP_LEN_MAX 60
  255. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  256. {
  257. u32 address;
  258. u32 regdump_loc = 0;
  259. int status;
  260. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  261. u32 i;
  262. if (ar->target_type != TARGET_TYPE_AR6003)
  263. return;
  264. /* the reg dump pointer is copied to the host interest area */
  265. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  266. address = TARG_VTOP(ar->target_type, address);
  267. /* read RAM location through diagnostic window */
  268. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  269. if (status || !regdump_loc) {
  270. ath6kl_err("failed to get ptr to register dump area\n");
  271. return;
  272. }
  273. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  274. regdump_loc);
  275. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  276. /* fetch register dump data */
  277. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  278. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  279. if (status) {
  280. ath6kl_err("failed to get register dump\n");
  281. return;
  282. }
  283. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  284. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  285. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  286. i, regdump_val[i]);
  287. }
  288. void ath6kl_target_failure(struct ath6kl *ar)
  289. {
  290. ath6kl_err("target asserted\n");
  291. /* try dumping target assertion information (if any) */
  292. ath6kl_dump_target_assert_info(ar);
  293. }
  294. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  295. {
  296. int status = 0;
  297. int ret;
  298. /*
  299. * Configure the device for rx dot11 header rules. "0,0" are the
  300. * default values. Required if checksum offload is needed. Set
  301. * RxMetaVersion to 2.
  302. */
  303. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  304. ar->rx_meta_ver, 0, 0)) {
  305. ath6kl_err("unable to set the rx frame format\n");
  306. status = -EIO;
  307. }
  308. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  309. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  310. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  311. ath6kl_err("unable to set power save fail event policy\n");
  312. status = -EIO;
  313. }
  314. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  315. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  316. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  317. ath6kl_err("unable to set barker preamble policy\n");
  318. status = -EIO;
  319. }
  320. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  321. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  322. ath6kl_err("unable to set keep alive interval\n");
  323. status = -EIO;
  324. }
  325. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  326. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  327. ath6kl_err("unable to set disconnect timeout\n");
  328. status = -EIO;
  329. }
  330. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  331. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  332. ath6kl_err("unable to set txop bursting\n");
  333. status = -EIO;
  334. }
  335. if (ar->p2p) {
  336. ret = ath6kl_wmi_info_req_cmd(ar->wmi,
  337. P2P_FLAG_CAPABILITIES_REQ |
  338. P2P_FLAG_MACADDR_REQ |
  339. P2P_FLAG_HMODEL_REQ);
  340. if (ret) {
  341. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  342. "capabilities (%d) - assuming P2P not "
  343. "supported\n", ret);
  344. ar->p2p = 0;
  345. }
  346. }
  347. if (ar->p2p) {
  348. /* Enable Probe Request reporting for P2P */
  349. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
  350. if (ret) {
  351. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  352. "Request reporting (%d)\n", ret);
  353. }
  354. }
  355. return status;
  356. }
  357. int ath6kl_configure_target(struct ath6kl *ar)
  358. {
  359. u32 param, ram_reserved_size;
  360. u8 fw_iftype;
  361. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  362. /* Tell target which HTC version it is used*/
  363. param = HTC_PROTOCOL_VERSION;
  364. if (ath6kl_bmi_write(ar,
  365. ath6kl_get_hi_item_addr(ar,
  366. HI_ITEM(hi_app_host_interest)),
  367. (u8 *)&param, 4) != 0) {
  368. ath6kl_err("bmi_write_memory for htc version failed\n");
  369. return -EIO;
  370. }
  371. /* set the firmware mode to STA/IBSS/AP */
  372. param = 0;
  373. if (ath6kl_bmi_read(ar,
  374. ath6kl_get_hi_item_addr(ar,
  375. HI_ITEM(hi_option_flag)),
  376. (u8 *)&param, 4) != 0) {
  377. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  378. return -EIO;
  379. }
  380. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  381. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  382. if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) {
  383. param |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  384. HI_OPTION_FW_SUBMODE_SHIFT;
  385. }
  386. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  387. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  388. if (ath6kl_bmi_write(ar,
  389. ath6kl_get_hi_item_addr(ar,
  390. HI_ITEM(hi_option_flag)),
  391. (u8 *)&param,
  392. 4) != 0) {
  393. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  394. return -EIO;
  395. }
  396. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  397. /*
  398. * Hardcode the address use for the extended board data
  399. * Ideally this should be pre-allocate by the OS at boot time
  400. * But since it is a new feature and board data is loaded
  401. * at init time, we have to workaround this from host.
  402. * It is difficult to patch the firmware boot code,
  403. * but possible in theory.
  404. */
  405. param = ar->hw.board_ext_data_addr;
  406. ram_reserved_size = ar->hw.reserved_ram_size;
  407. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  408. HI_ITEM(hi_board_ext_data)),
  409. (u8 *)&param, 4) != 0) {
  410. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  411. return -EIO;
  412. }
  413. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  414. HI_ITEM(hi_end_ram_reserve_sz)),
  415. (u8 *)&ram_reserved_size, 4) != 0) {
  416. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  417. return -EIO;
  418. }
  419. /* set the block size for the target */
  420. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  421. /* use default number of control buffers */
  422. return -EIO;
  423. return 0;
  424. }
  425. void ath6kl_core_free(struct ath6kl *ar)
  426. {
  427. wiphy_free(ar->wiphy);
  428. }
  429. int ath6kl_unavail_ev(struct ath6kl *ar)
  430. {
  431. ath6kl_destroy(ar->vif->ndev, 1);
  432. return 0;
  433. }
  434. /* firmware upload */
  435. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  436. u8 **fw, size_t *fw_len)
  437. {
  438. const struct firmware *fw_entry;
  439. int ret;
  440. ret = request_firmware(&fw_entry, filename, ar->dev);
  441. if (ret)
  442. return ret;
  443. *fw_len = fw_entry->size;
  444. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  445. if (*fw == NULL)
  446. ret = -ENOMEM;
  447. release_firmware(fw_entry);
  448. return ret;
  449. }
  450. #ifdef CONFIG_OF
  451. static const char *get_target_ver_dir(const struct ath6kl *ar)
  452. {
  453. switch (ar->version.target_ver) {
  454. case AR6003_REV1_VERSION:
  455. return "ath6k/AR6003/hw1.0";
  456. case AR6003_REV2_VERSION:
  457. return "ath6k/AR6003/hw2.0";
  458. case AR6003_REV3_VERSION:
  459. return "ath6k/AR6003/hw2.1.1";
  460. }
  461. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  462. ar->version.target_ver);
  463. return NULL;
  464. }
  465. /*
  466. * Check the device tree for a board-id and use it to construct
  467. * the pathname to the firmware file. Used (for now) to find a
  468. * fallback to the "bdata.bin" file--typically a symlink to the
  469. * appropriate board-specific file.
  470. */
  471. static bool check_device_tree(struct ath6kl *ar)
  472. {
  473. static const char *board_id_prop = "atheros,board-id";
  474. struct device_node *node;
  475. char board_filename[64];
  476. const char *board_id;
  477. int ret;
  478. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  479. board_id = of_get_property(node, board_id_prop, NULL);
  480. if (board_id == NULL) {
  481. ath6kl_warn("No \"%s\" property on %s node.\n",
  482. board_id_prop, node->name);
  483. continue;
  484. }
  485. snprintf(board_filename, sizeof(board_filename),
  486. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  487. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  488. &ar->fw_board_len);
  489. if (ret) {
  490. ath6kl_err("Failed to get DT board file %s: %d\n",
  491. board_filename, ret);
  492. continue;
  493. }
  494. return true;
  495. }
  496. return false;
  497. }
  498. #else
  499. static bool check_device_tree(struct ath6kl *ar)
  500. {
  501. return false;
  502. }
  503. #endif /* CONFIG_OF */
  504. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  505. {
  506. const char *filename;
  507. int ret;
  508. if (ar->fw_board != NULL)
  509. return 0;
  510. switch (ar->version.target_ver) {
  511. case AR6003_REV2_VERSION:
  512. filename = AR6003_REV2_BOARD_DATA_FILE;
  513. break;
  514. case AR6004_REV1_VERSION:
  515. filename = AR6004_REV1_BOARD_DATA_FILE;
  516. break;
  517. default:
  518. filename = AR6003_REV3_BOARD_DATA_FILE;
  519. break;
  520. }
  521. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  522. &ar->fw_board_len);
  523. if (ret == 0) {
  524. /* managed to get proper board file */
  525. return 0;
  526. }
  527. if (check_device_tree(ar)) {
  528. /* got board file from device tree */
  529. return 0;
  530. }
  531. /* there was no proper board file, try to use default instead */
  532. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  533. filename, ret);
  534. switch (ar->version.target_ver) {
  535. case AR6003_REV2_VERSION:
  536. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  537. break;
  538. case AR6004_REV1_VERSION:
  539. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  540. break;
  541. default:
  542. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  543. break;
  544. }
  545. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  546. &ar->fw_board_len);
  547. if (ret) {
  548. ath6kl_err("Failed to get default board file %s: %d\n",
  549. filename, ret);
  550. return ret;
  551. }
  552. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  553. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  554. return 0;
  555. }
  556. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  557. {
  558. const char *filename;
  559. int ret;
  560. if (ar->fw_otp != NULL)
  561. return 0;
  562. switch (ar->version.target_ver) {
  563. case AR6003_REV2_VERSION:
  564. filename = AR6003_REV2_OTP_FILE;
  565. break;
  566. case AR6004_REV1_VERSION:
  567. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  568. return 0;
  569. break;
  570. default:
  571. filename = AR6003_REV3_OTP_FILE;
  572. break;
  573. }
  574. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  575. &ar->fw_otp_len);
  576. if (ret) {
  577. ath6kl_err("Failed to get OTP file %s: %d\n",
  578. filename, ret);
  579. return ret;
  580. }
  581. return 0;
  582. }
  583. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  584. {
  585. const char *filename;
  586. int ret;
  587. if (ar->fw != NULL)
  588. return 0;
  589. if (testmode) {
  590. switch (ar->version.target_ver) {
  591. case AR6003_REV2_VERSION:
  592. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  593. break;
  594. case AR6003_REV3_VERSION:
  595. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  596. break;
  597. case AR6004_REV1_VERSION:
  598. ath6kl_warn("testmode not supported with ar6004\n");
  599. return -EOPNOTSUPP;
  600. default:
  601. ath6kl_warn("unknown target version: 0x%x\n",
  602. ar->version.target_ver);
  603. return -EINVAL;
  604. }
  605. set_bit(TESTMODE, &ar->flag);
  606. goto get_fw;
  607. }
  608. switch (ar->version.target_ver) {
  609. case AR6003_REV2_VERSION:
  610. filename = AR6003_REV2_FIRMWARE_FILE;
  611. break;
  612. case AR6004_REV1_VERSION:
  613. filename = AR6004_REV1_FIRMWARE_FILE;
  614. break;
  615. default:
  616. filename = AR6003_REV3_FIRMWARE_FILE;
  617. break;
  618. }
  619. get_fw:
  620. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  621. if (ret) {
  622. ath6kl_err("Failed to get firmware file %s: %d\n",
  623. filename, ret);
  624. return ret;
  625. }
  626. return 0;
  627. }
  628. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  629. {
  630. const char *filename;
  631. int ret;
  632. switch (ar->version.target_ver) {
  633. case AR6003_REV2_VERSION:
  634. filename = AR6003_REV2_PATCH_FILE;
  635. break;
  636. case AR6004_REV1_VERSION:
  637. /* FIXME: implement for AR6004 */
  638. return 0;
  639. break;
  640. default:
  641. filename = AR6003_REV3_PATCH_FILE;
  642. break;
  643. }
  644. if (ar->fw_patch == NULL) {
  645. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  646. &ar->fw_patch_len);
  647. if (ret) {
  648. ath6kl_err("Failed to get patch file %s: %d\n",
  649. filename, ret);
  650. return ret;
  651. }
  652. }
  653. return 0;
  654. }
  655. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  656. {
  657. int ret;
  658. ret = ath6kl_fetch_otp_file(ar);
  659. if (ret)
  660. return ret;
  661. ret = ath6kl_fetch_fw_file(ar);
  662. if (ret)
  663. return ret;
  664. ret = ath6kl_fetch_patch_file(ar);
  665. if (ret)
  666. return ret;
  667. return 0;
  668. }
  669. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  670. {
  671. size_t magic_len, len, ie_len;
  672. const struct firmware *fw;
  673. struct ath6kl_fw_ie *hdr;
  674. const char *filename;
  675. const u8 *data;
  676. int ret, ie_id, i, index, bit;
  677. __le32 *val;
  678. switch (ar->version.target_ver) {
  679. case AR6003_REV2_VERSION:
  680. filename = AR6003_REV2_FIRMWARE_2_FILE;
  681. break;
  682. case AR6003_REV3_VERSION:
  683. filename = AR6003_REV3_FIRMWARE_2_FILE;
  684. break;
  685. case AR6004_REV1_VERSION:
  686. filename = AR6004_REV1_FIRMWARE_2_FILE;
  687. break;
  688. default:
  689. return -EOPNOTSUPP;
  690. }
  691. ret = request_firmware(&fw, filename, ar->dev);
  692. if (ret)
  693. return ret;
  694. data = fw->data;
  695. len = fw->size;
  696. /* magic also includes the null byte, check that as well */
  697. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  698. if (len < magic_len) {
  699. ret = -EINVAL;
  700. goto out;
  701. }
  702. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  703. ret = -EINVAL;
  704. goto out;
  705. }
  706. len -= magic_len;
  707. data += magic_len;
  708. /* loop elements */
  709. while (len > sizeof(struct ath6kl_fw_ie)) {
  710. /* hdr is unaligned! */
  711. hdr = (struct ath6kl_fw_ie *) data;
  712. ie_id = le32_to_cpup(&hdr->id);
  713. ie_len = le32_to_cpup(&hdr->len);
  714. len -= sizeof(*hdr);
  715. data += sizeof(*hdr);
  716. if (len < ie_len) {
  717. ret = -EINVAL;
  718. goto out;
  719. }
  720. switch (ie_id) {
  721. case ATH6KL_FW_IE_OTP_IMAGE:
  722. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  723. ie_len);
  724. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  725. if (ar->fw_otp == NULL) {
  726. ret = -ENOMEM;
  727. goto out;
  728. }
  729. ar->fw_otp_len = ie_len;
  730. break;
  731. case ATH6KL_FW_IE_FW_IMAGE:
  732. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  733. ie_len);
  734. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  735. if (ar->fw == NULL) {
  736. ret = -ENOMEM;
  737. goto out;
  738. }
  739. ar->fw_len = ie_len;
  740. break;
  741. case ATH6KL_FW_IE_PATCH_IMAGE:
  742. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  743. ie_len);
  744. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  745. if (ar->fw_patch == NULL) {
  746. ret = -ENOMEM;
  747. goto out;
  748. }
  749. ar->fw_patch_len = ie_len;
  750. break;
  751. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  752. val = (__le32 *) data;
  753. ar->hw.reserved_ram_size = le32_to_cpup(val);
  754. ath6kl_dbg(ATH6KL_DBG_BOOT,
  755. "found reserved ram size ie 0x%d\n",
  756. ar->hw.reserved_ram_size);
  757. break;
  758. case ATH6KL_FW_IE_CAPABILITIES:
  759. ath6kl_dbg(ATH6KL_DBG_BOOT,
  760. "found firmware capabilities ie (%zd B)\n",
  761. ie_len);
  762. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  763. index = ALIGN(i, 8) / 8;
  764. bit = i % 8;
  765. if (data[index] & (1 << bit))
  766. __set_bit(i, ar->fw_capabilities);
  767. }
  768. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  769. ar->fw_capabilities,
  770. sizeof(ar->fw_capabilities));
  771. break;
  772. case ATH6KL_FW_IE_PATCH_ADDR:
  773. if (ie_len != sizeof(*val))
  774. break;
  775. val = (__le32 *) data;
  776. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  777. ath6kl_dbg(ATH6KL_DBG_BOOT,
  778. "found patch address ie 0x%d\n",
  779. ar->hw.dataset_patch_addr);
  780. break;
  781. default:
  782. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  783. le32_to_cpup(&hdr->id));
  784. break;
  785. }
  786. len -= ie_len;
  787. data += ie_len;
  788. };
  789. ret = 0;
  790. out:
  791. release_firmware(fw);
  792. return ret;
  793. }
  794. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  795. {
  796. int ret;
  797. ret = ath6kl_fetch_board_file(ar);
  798. if (ret)
  799. return ret;
  800. ret = ath6kl_fetch_fw_api2(ar);
  801. if (ret == 0) {
  802. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  803. return 0;
  804. }
  805. ret = ath6kl_fetch_fw_api1(ar);
  806. if (ret)
  807. return ret;
  808. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  809. return 0;
  810. }
  811. static int ath6kl_upload_board_file(struct ath6kl *ar)
  812. {
  813. u32 board_address, board_ext_address, param;
  814. u32 board_data_size, board_ext_data_size;
  815. int ret;
  816. if (WARN_ON(ar->fw_board == NULL))
  817. return -ENOENT;
  818. /*
  819. * Determine where in Target RAM to write Board Data.
  820. * For AR6004, host determine Target RAM address for
  821. * writing board data.
  822. */
  823. if (ar->target_type == TARGET_TYPE_AR6004) {
  824. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  825. ath6kl_bmi_write(ar,
  826. ath6kl_get_hi_item_addr(ar,
  827. HI_ITEM(hi_board_data)),
  828. (u8 *) &board_address, 4);
  829. } else {
  830. ath6kl_bmi_read(ar,
  831. ath6kl_get_hi_item_addr(ar,
  832. HI_ITEM(hi_board_data)),
  833. (u8 *) &board_address, 4);
  834. }
  835. /* determine where in target ram to write extended board data */
  836. ath6kl_bmi_read(ar,
  837. ath6kl_get_hi_item_addr(ar,
  838. HI_ITEM(hi_board_ext_data)),
  839. (u8 *) &board_ext_address, 4);
  840. if (board_ext_address == 0) {
  841. ath6kl_err("Failed to get board file target address.\n");
  842. return -EINVAL;
  843. }
  844. switch (ar->target_type) {
  845. case TARGET_TYPE_AR6003:
  846. board_data_size = AR6003_BOARD_DATA_SZ;
  847. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  848. break;
  849. case TARGET_TYPE_AR6004:
  850. board_data_size = AR6004_BOARD_DATA_SZ;
  851. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  852. break;
  853. default:
  854. WARN_ON(1);
  855. return -EINVAL;
  856. break;
  857. }
  858. if (ar->fw_board_len == (board_data_size +
  859. board_ext_data_size)) {
  860. /* write extended board data */
  861. ath6kl_dbg(ATH6KL_DBG_BOOT,
  862. "writing extended board data to 0x%x (%d B)\n",
  863. board_ext_address, board_ext_data_size);
  864. ret = ath6kl_bmi_write(ar, board_ext_address,
  865. ar->fw_board + board_data_size,
  866. board_ext_data_size);
  867. if (ret) {
  868. ath6kl_err("Failed to write extended board data: %d\n",
  869. ret);
  870. return ret;
  871. }
  872. /* record that extended board data is initialized */
  873. param = (board_ext_data_size << 16) | 1;
  874. ath6kl_bmi_write(ar,
  875. ath6kl_get_hi_item_addr(ar,
  876. HI_ITEM(hi_board_ext_data_config)),
  877. (unsigned char *) &param, 4);
  878. }
  879. if (ar->fw_board_len < board_data_size) {
  880. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  881. ret = -EINVAL;
  882. return ret;
  883. }
  884. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  885. board_address, board_data_size);
  886. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  887. board_data_size);
  888. if (ret) {
  889. ath6kl_err("Board file bmi write failed: %d\n", ret);
  890. return ret;
  891. }
  892. /* record the fact that Board Data IS initialized */
  893. param = 1;
  894. ath6kl_bmi_write(ar,
  895. ath6kl_get_hi_item_addr(ar,
  896. HI_ITEM(hi_board_data_initialized)),
  897. (u8 *)&param, 4);
  898. return ret;
  899. }
  900. static int ath6kl_upload_otp(struct ath6kl *ar)
  901. {
  902. u32 address, param;
  903. bool from_hw = false;
  904. int ret;
  905. if (WARN_ON(ar->fw_otp == NULL))
  906. return -ENOENT;
  907. address = ar->hw.app_load_addr;
  908. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  909. ar->fw_otp_len);
  910. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  911. ar->fw_otp_len);
  912. if (ret) {
  913. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  914. return ret;
  915. }
  916. /* read firmware start address */
  917. ret = ath6kl_bmi_read(ar,
  918. ath6kl_get_hi_item_addr(ar,
  919. HI_ITEM(hi_app_start)),
  920. (u8 *) &address, sizeof(address));
  921. if (ret) {
  922. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  923. return ret;
  924. }
  925. if (ar->hw.app_start_override_addr == 0) {
  926. ar->hw.app_start_override_addr = address;
  927. from_hw = true;
  928. }
  929. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  930. from_hw ? " (from hw)" : "",
  931. ar->hw.app_start_override_addr);
  932. /* execute the OTP code */
  933. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  934. ar->hw.app_start_override_addr);
  935. param = 0;
  936. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  937. return ret;
  938. }
  939. static int ath6kl_upload_firmware(struct ath6kl *ar)
  940. {
  941. u32 address;
  942. int ret;
  943. if (WARN_ON(ar->fw == NULL))
  944. return -ENOENT;
  945. address = ar->hw.app_load_addr;
  946. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  947. address, ar->fw_len);
  948. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  949. if (ret) {
  950. ath6kl_err("Failed to write firmware: %d\n", ret);
  951. return ret;
  952. }
  953. /*
  954. * Set starting address for firmware
  955. * Don't need to setup app_start override addr on AR6004
  956. */
  957. if (ar->target_type != TARGET_TYPE_AR6004) {
  958. address = ar->hw.app_start_override_addr;
  959. ath6kl_bmi_set_app_start(ar, address);
  960. }
  961. return ret;
  962. }
  963. static int ath6kl_upload_patch(struct ath6kl *ar)
  964. {
  965. u32 address, param;
  966. int ret;
  967. if (WARN_ON(ar->fw_patch == NULL))
  968. return -ENOENT;
  969. address = ar->hw.dataset_patch_addr;
  970. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  971. address, ar->fw_patch_len);
  972. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  973. if (ret) {
  974. ath6kl_err("Failed to write patch file: %d\n", ret);
  975. return ret;
  976. }
  977. param = address;
  978. ath6kl_bmi_write(ar,
  979. ath6kl_get_hi_item_addr(ar,
  980. HI_ITEM(hi_dset_list_head)),
  981. (unsigned char *) &param, 4);
  982. return 0;
  983. }
  984. static int ath6kl_init_upload(struct ath6kl *ar)
  985. {
  986. u32 param, options, sleep, address;
  987. int status = 0;
  988. if (ar->target_type != TARGET_TYPE_AR6003 &&
  989. ar->target_type != TARGET_TYPE_AR6004)
  990. return -EINVAL;
  991. /* temporarily disable system sleep */
  992. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  993. status = ath6kl_bmi_reg_read(ar, address, &param);
  994. if (status)
  995. return status;
  996. options = param;
  997. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  998. status = ath6kl_bmi_reg_write(ar, address, param);
  999. if (status)
  1000. return status;
  1001. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1002. status = ath6kl_bmi_reg_read(ar, address, &param);
  1003. if (status)
  1004. return status;
  1005. sleep = param;
  1006. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1007. status = ath6kl_bmi_reg_write(ar, address, param);
  1008. if (status)
  1009. return status;
  1010. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1011. options, sleep);
  1012. /* program analog PLL register */
  1013. /* no need to control 40/44MHz clock on AR6004 */
  1014. if (ar->target_type != TARGET_TYPE_AR6004) {
  1015. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1016. 0xF9104001);
  1017. if (status)
  1018. return status;
  1019. /* Run at 80/88MHz by default */
  1020. param = SM(CPU_CLOCK_STANDARD, 1);
  1021. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1022. status = ath6kl_bmi_reg_write(ar, address, param);
  1023. if (status)
  1024. return status;
  1025. }
  1026. param = 0;
  1027. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1028. param = SM(LPO_CAL_ENABLE, 1);
  1029. status = ath6kl_bmi_reg_write(ar, address, param);
  1030. if (status)
  1031. return status;
  1032. /* WAR to avoid SDIO CRC err */
  1033. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1034. ath6kl_err("temporary war to avoid sdio crc error\n");
  1035. param = 0x20;
  1036. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1037. status = ath6kl_bmi_reg_write(ar, address, param);
  1038. if (status)
  1039. return status;
  1040. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1041. status = ath6kl_bmi_reg_write(ar, address, param);
  1042. if (status)
  1043. return status;
  1044. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1045. status = ath6kl_bmi_reg_write(ar, address, param);
  1046. if (status)
  1047. return status;
  1048. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1049. status = ath6kl_bmi_reg_write(ar, address, param);
  1050. if (status)
  1051. return status;
  1052. }
  1053. /* write EEPROM data to Target RAM */
  1054. status = ath6kl_upload_board_file(ar);
  1055. if (status)
  1056. return status;
  1057. /* transfer One time Programmable data */
  1058. status = ath6kl_upload_otp(ar);
  1059. if (status)
  1060. return status;
  1061. /* Download Target firmware */
  1062. status = ath6kl_upload_firmware(ar);
  1063. if (status)
  1064. return status;
  1065. status = ath6kl_upload_patch(ar);
  1066. if (status)
  1067. return status;
  1068. /* Restore system sleep */
  1069. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1070. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1071. if (status)
  1072. return status;
  1073. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1074. param = options | 0x20;
  1075. status = ath6kl_bmi_reg_write(ar, address, param);
  1076. if (status)
  1077. return status;
  1078. /* Configure GPIO AR6003 UART */
  1079. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1080. status = ath6kl_bmi_write(ar,
  1081. ath6kl_get_hi_item_addr(ar,
  1082. HI_ITEM(hi_dbg_uart_txpin)),
  1083. (u8 *)&param, 4);
  1084. return status;
  1085. }
  1086. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1087. {
  1088. switch (ar->version.target_ver) {
  1089. case AR6003_REV2_VERSION:
  1090. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1091. ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
  1092. ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  1093. ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
  1094. /* hw2.0 needs override address hardcoded */
  1095. ar->hw.app_start_override_addr = 0x944C00;
  1096. break;
  1097. case AR6003_REV3_VERSION:
  1098. ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
  1099. ar->hw.app_load_addr = 0x1234;
  1100. ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  1101. ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
  1102. break;
  1103. case AR6004_REV1_VERSION:
  1104. ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
  1105. ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
  1106. ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  1107. ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
  1108. break;
  1109. default:
  1110. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1111. ar->version.target_ver);
  1112. return -EINVAL;
  1113. }
  1114. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1115. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1116. ar->version.target_ver, ar->target_type,
  1117. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1118. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1119. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1120. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1121. ar->hw.reserved_ram_size);
  1122. return 0;
  1123. }
  1124. static int ath6kl_init(struct ath6kl *ar)
  1125. {
  1126. int status = 0;
  1127. s32 timeleft;
  1128. struct net_device *ndev;
  1129. if (!ar)
  1130. return -EIO;
  1131. /* Do we need to finish the BMI phase */
  1132. if (ath6kl_bmi_done(ar)) {
  1133. status = -EIO;
  1134. goto ath6kl_init_done;
  1135. }
  1136. /* Indicate that WMI is enabled (although not ready yet) */
  1137. set_bit(WMI_ENABLED, &ar->flag);
  1138. ar->wmi = ath6kl_wmi_init(ar);
  1139. if (!ar->wmi) {
  1140. ath6kl_err("failed to initialize wmi\n");
  1141. status = -EIO;
  1142. goto ath6kl_init_done;
  1143. }
  1144. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1145. status = ath6kl_register_ieee80211_hw(ar);
  1146. if (status)
  1147. goto err_node_cleanup;
  1148. status = ath6kl_debug_init(ar);
  1149. if (status) {
  1150. wiphy_unregister(ar->wiphy);
  1151. goto err_node_cleanup;
  1152. }
  1153. /* Add an initial station interface */
  1154. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0);
  1155. if (!ndev) {
  1156. ath6kl_err("Failed to instantiate a network device\n");
  1157. status = -ENOMEM;
  1158. wiphy_unregister(ar->wiphy);
  1159. goto err_debug_init;
  1160. }
  1161. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1162. __func__, ndev->name, ndev, ar);
  1163. /*
  1164. * The reason we have to wait for the target here is that the
  1165. * driver layer has to init BMI in order to set the host block
  1166. * size.
  1167. */
  1168. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1169. status = -EIO;
  1170. goto err_if_deinit;
  1171. }
  1172. if (ath6kl_init_service_ep(ar)) {
  1173. status = -EIO;
  1174. goto err_cleanup_scatter;
  1175. }
  1176. /* setup access class priority mappings */
  1177. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1178. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1179. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1180. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1181. /* give our connected endpoints some buffers */
  1182. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1183. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1184. /* allocate some buffers that handle larger AMSDU frames */
  1185. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1186. /* setup credit distribution */
  1187. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  1188. ath6kl_cookie_init(ar);
  1189. /* start HTC */
  1190. status = ath6kl_htc_start(ar->htc_target);
  1191. if (status) {
  1192. ath6kl_cookie_cleanup(ar);
  1193. goto err_rxbuf_cleanup;
  1194. }
  1195. /* Wait for Wmi event to be ready */
  1196. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1197. test_bit(WMI_READY,
  1198. &ar->flag),
  1199. WMI_TIMEOUT);
  1200. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1201. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1202. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1203. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1204. status = -EIO;
  1205. goto err_htc_stop;
  1206. }
  1207. if (!timeleft || signal_pending(current)) {
  1208. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1209. status = -EIO;
  1210. goto err_htc_stop;
  1211. }
  1212. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1213. /* communicate the wmi protocol verision to the target */
  1214. if ((ath6kl_set_host_app_area(ar)) != 0)
  1215. ath6kl_err("unable to set the host app area\n");
  1216. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1217. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1218. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1219. WIPHY_FLAG_HAVE_AP_SME;
  1220. status = ath6kl_target_config_wlan_params(ar);
  1221. if (!status)
  1222. goto ath6kl_init_done;
  1223. err_htc_stop:
  1224. ath6kl_htc_stop(ar->htc_target);
  1225. err_rxbuf_cleanup:
  1226. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1227. ath6kl_cleanup_amsdu_rxbufs(ar);
  1228. err_cleanup_scatter:
  1229. ath6kl_hif_cleanup_scatter(ar);
  1230. err_if_deinit:
  1231. ath6kl_deinit_if_data(netdev_priv(ndev));
  1232. wiphy_unregister(ar->wiphy);
  1233. err_debug_init:
  1234. ath6kl_debug_cleanup(ar);
  1235. err_node_cleanup:
  1236. ath6kl_wmi_shutdown(ar->wmi);
  1237. clear_bit(WMI_ENABLED, &ar->flag);
  1238. ar->wmi = NULL;
  1239. ath6kl_init_done:
  1240. return status;
  1241. }
  1242. int ath6kl_core_init(struct ath6kl *ar)
  1243. {
  1244. int ret = 0;
  1245. struct ath6kl_bmi_target_info targ_info;
  1246. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1247. if (!ar->ath6kl_wq)
  1248. return -ENOMEM;
  1249. ret = ath6kl_bmi_init(ar);
  1250. if (ret)
  1251. goto err_wq;
  1252. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1253. if (ret)
  1254. goto err_bmi_cleanup;
  1255. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1256. ar->target_type = le32_to_cpu(targ_info.type);
  1257. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1258. ret = ath6kl_init_hw_params(ar);
  1259. if (ret)
  1260. goto err_bmi_cleanup;
  1261. ret = ath6kl_configure_target(ar);
  1262. if (ret)
  1263. goto err_bmi_cleanup;
  1264. ar->htc_target = ath6kl_htc_create(ar);
  1265. if (!ar->htc_target) {
  1266. ret = -ENOMEM;
  1267. goto err_bmi_cleanup;
  1268. }
  1269. ret = ath6kl_fetch_firmwares(ar);
  1270. if (ret)
  1271. goto err_htc_cleanup;
  1272. ret = ath6kl_init_upload(ar);
  1273. if (ret)
  1274. goto err_htc_cleanup;
  1275. ret = ath6kl_init(ar);
  1276. if (ret)
  1277. goto err_htc_cleanup;
  1278. return ret;
  1279. err_htc_cleanup:
  1280. ath6kl_htc_cleanup(ar->htc_target);
  1281. err_bmi_cleanup:
  1282. ath6kl_bmi_cleanup(ar);
  1283. err_wq:
  1284. destroy_workqueue(ar->ath6kl_wq);
  1285. return ret;
  1286. }
  1287. void ath6kl_stop_txrx(struct ath6kl *ar)
  1288. {
  1289. struct ath6kl_vif *vif = ar->vif;
  1290. struct net_device *ndev = vif->ndev;
  1291. if (!ndev)
  1292. return;
  1293. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1294. if (down_interruptible(&ar->sem)) {
  1295. ath6kl_err("down_interruptible failed\n");
  1296. return;
  1297. }
  1298. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1299. ath6kl_stop_endpoint(ndev, false, true);
  1300. clear_bit(WLAN_ENABLED, &vif->flags);
  1301. }
  1302. /*
  1303. * We need to differentiate between the surprise and planned removal of the
  1304. * device because of the following consideration:
  1305. *
  1306. * - In case of surprise removal, the hcd already frees up the pending
  1307. * for the device and hence there is no need to unregister the function
  1308. * driver inorder to get these requests. For planned removal, the function
  1309. * driver has to explicitly unregister itself to have the hcd return all the
  1310. * pending requests before the data structures for the devices are freed up.
  1311. * Note that as per the current implementation, the function driver will
  1312. * end up releasing all the devices since there is no API to selectively
  1313. * release a particular device.
  1314. *
  1315. * - Certain commands issued to the target can be skipped for surprise
  1316. * removal since they will anyway not go through.
  1317. */
  1318. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1319. {
  1320. struct ath6kl *ar;
  1321. if (!dev || !ath6kl_priv(dev)) {
  1322. ath6kl_err("failed to get device structure\n");
  1323. return;
  1324. }
  1325. ar = ath6kl_priv(dev);
  1326. destroy_workqueue(ar->ath6kl_wq);
  1327. if (ar->htc_target)
  1328. ath6kl_htc_cleanup(ar->htc_target);
  1329. ath6kl_cookie_cleanup(ar);
  1330. ath6kl_cleanup_amsdu_rxbufs(ar);
  1331. ath6kl_bmi_cleanup(ar);
  1332. ath6kl_debug_cleanup(ar);
  1333. ath6kl_deinit_if_data(netdev_priv(dev));
  1334. kfree(ar->fw_board);
  1335. kfree(ar->fw_otp);
  1336. kfree(ar->fw);
  1337. kfree(ar->fw_patch);
  1338. ath6kl_deinit_ieee80211_hw(ar);
  1339. }