events.c 34 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  54. /* IRQ <-> VIRQ mapping. */
  55. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  56. /* IRQ <-> IPI mapping */
  57. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  58. /* Interrupt types. */
  59. enum xen_irq_type {
  60. IRQT_UNBOUND = 0,
  61. IRQT_PIRQ,
  62. IRQT_VIRQ,
  63. IRQT_IPI,
  64. IRQT_EVTCHN
  65. };
  66. /*
  67. * Packed IRQ information:
  68. * type - enum xen_irq_type
  69. * event channel - irq->event channel mapping
  70. * cpu - cpu this event channel is bound to
  71. * index - type-specific information:
  72. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  73. * guest, or GSI (real passthrough IRQ) of the device.
  74. * VIRQ - virq number
  75. * IPI - IPI vector
  76. * EVTCHN -
  77. */
  78. struct irq_info
  79. {
  80. enum xen_irq_type type; /* type */
  81. unsigned short evtchn; /* event channel */
  82. unsigned short cpu; /* cpu bound */
  83. union {
  84. unsigned short virq;
  85. enum ipi_vector ipi;
  86. struct {
  87. unsigned short pirq;
  88. unsigned short gsi;
  89. unsigned char vector;
  90. unsigned char flags;
  91. } pirq;
  92. } u;
  93. };
  94. #define PIRQ_NEEDS_EOI (1 << 0)
  95. #define PIRQ_SHAREABLE (1 << 1)
  96. static struct irq_info *irq_info;
  97. static int *pirq_to_irq;
  98. static int nr_pirqs;
  99. static int *evtchn_to_irq;
  100. struct cpu_evtchn_s {
  101. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  102. };
  103. static __initdata struct cpu_evtchn_s init_evtchn_mask = {
  104. .bits[0 ... (NR_EVENT_CHANNELS/BITS_PER_LONG)-1] = ~0ul,
  105. };
  106. static struct cpu_evtchn_s *cpu_evtchn_mask_p = &init_evtchn_mask;
  107. static inline unsigned long *cpu_evtchn_mask(int cpu)
  108. {
  109. return cpu_evtchn_mask_p[cpu].bits;
  110. }
  111. /* Xen will never allocate port zero for any purpose. */
  112. #define VALID_EVTCHN(chn) ((chn) != 0)
  113. static struct irq_chip xen_dynamic_chip;
  114. static struct irq_chip xen_percpu_chip;
  115. static struct irq_chip xen_pirq_chip;
  116. /* Constructor for packed IRQ information. */
  117. static struct irq_info mk_unbound_info(void)
  118. {
  119. return (struct irq_info) { .type = IRQT_UNBOUND };
  120. }
  121. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  122. {
  123. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  124. .cpu = 0 };
  125. }
  126. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  127. {
  128. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  129. .cpu = 0, .u.ipi = ipi };
  130. }
  131. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  132. {
  133. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  134. .cpu = 0, .u.virq = virq };
  135. }
  136. static struct irq_info mk_pirq_info(unsigned short evtchn, unsigned short pirq,
  137. unsigned short gsi, unsigned short vector)
  138. {
  139. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  140. .cpu = 0,
  141. .u.pirq = { .pirq = pirq, .gsi = gsi, .vector = vector } };
  142. }
  143. /*
  144. * Accessors for packed IRQ information.
  145. */
  146. static struct irq_info *info_for_irq(unsigned irq)
  147. {
  148. return &irq_info[irq];
  149. }
  150. static unsigned int evtchn_from_irq(unsigned irq)
  151. {
  152. return info_for_irq(irq)->evtchn;
  153. }
  154. unsigned irq_from_evtchn(unsigned int evtchn)
  155. {
  156. return evtchn_to_irq[evtchn];
  157. }
  158. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  159. static enum ipi_vector ipi_from_irq(unsigned irq)
  160. {
  161. struct irq_info *info = info_for_irq(irq);
  162. BUG_ON(info == NULL);
  163. BUG_ON(info->type != IRQT_IPI);
  164. return info->u.ipi;
  165. }
  166. static unsigned virq_from_irq(unsigned irq)
  167. {
  168. struct irq_info *info = info_for_irq(irq);
  169. BUG_ON(info == NULL);
  170. BUG_ON(info->type != IRQT_VIRQ);
  171. return info->u.virq;
  172. }
  173. static unsigned pirq_from_irq(unsigned irq)
  174. {
  175. struct irq_info *info = info_for_irq(irq);
  176. BUG_ON(info == NULL);
  177. BUG_ON(info->type != IRQT_PIRQ);
  178. return info->u.pirq.pirq;
  179. }
  180. static unsigned gsi_from_irq(unsigned irq)
  181. {
  182. struct irq_info *info = info_for_irq(irq);
  183. BUG_ON(info == NULL);
  184. BUG_ON(info->type != IRQT_PIRQ);
  185. return info->u.pirq.gsi;
  186. }
  187. static unsigned vector_from_irq(unsigned irq)
  188. {
  189. struct irq_info *info = info_for_irq(irq);
  190. BUG_ON(info == NULL);
  191. BUG_ON(info->type != IRQT_PIRQ);
  192. return info->u.pirq.vector;
  193. }
  194. static enum xen_irq_type type_from_irq(unsigned irq)
  195. {
  196. return info_for_irq(irq)->type;
  197. }
  198. static unsigned cpu_from_irq(unsigned irq)
  199. {
  200. return info_for_irq(irq)->cpu;
  201. }
  202. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  203. {
  204. int irq = evtchn_to_irq[evtchn];
  205. unsigned ret = 0;
  206. if (irq != -1)
  207. ret = cpu_from_irq(irq);
  208. return ret;
  209. }
  210. static bool pirq_needs_eoi(unsigned irq)
  211. {
  212. struct irq_info *info = info_for_irq(irq);
  213. BUG_ON(info->type != IRQT_PIRQ);
  214. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  215. }
  216. static inline unsigned long active_evtchns(unsigned int cpu,
  217. struct shared_info *sh,
  218. unsigned int idx)
  219. {
  220. return (sh->evtchn_pending[idx] &
  221. cpu_evtchn_mask(cpu)[idx] &
  222. ~sh->evtchn_mask[idx]);
  223. }
  224. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  225. {
  226. int irq = evtchn_to_irq[chn];
  227. BUG_ON(irq == -1);
  228. #ifdef CONFIG_SMP
  229. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  230. #endif
  231. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  232. __set_bit(chn, cpu_evtchn_mask(cpu));
  233. irq_info[irq].cpu = cpu;
  234. }
  235. static void init_evtchn_cpu_bindings(void)
  236. {
  237. #ifdef CONFIG_SMP
  238. struct irq_desc *desc;
  239. int i;
  240. /* By default all event channels notify CPU#0. */
  241. for_each_irq_desc(i, desc) {
  242. cpumask_copy(desc->affinity, cpumask_of(0));
  243. }
  244. #endif
  245. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  246. }
  247. static inline void clear_evtchn(int port)
  248. {
  249. struct shared_info *s = HYPERVISOR_shared_info;
  250. sync_clear_bit(port, &s->evtchn_pending[0]);
  251. }
  252. static inline void set_evtchn(int port)
  253. {
  254. struct shared_info *s = HYPERVISOR_shared_info;
  255. sync_set_bit(port, &s->evtchn_pending[0]);
  256. }
  257. static inline int test_evtchn(int port)
  258. {
  259. struct shared_info *s = HYPERVISOR_shared_info;
  260. return sync_test_bit(port, &s->evtchn_pending[0]);
  261. }
  262. /**
  263. * notify_remote_via_irq - send event to remote end of event channel via irq
  264. * @irq: irq of event channel to send event to
  265. *
  266. * Unlike notify_remote_via_evtchn(), this is safe to use across
  267. * save/restore. Notifications on a broken connection are silently
  268. * dropped.
  269. */
  270. void notify_remote_via_irq(int irq)
  271. {
  272. int evtchn = evtchn_from_irq(irq);
  273. if (VALID_EVTCHN(evtchn))
  274. notify_remote_via_evtchn(evtchn);
  275. }
  276. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  277. static void mask_evtchn(int port)
  278. {
  279. struct shared_info *s = HYPERVISOR_shared_info;
  280. sync_set_bit(port, &s->evtchn_mask[0]);
  281. }
  282. static void unmask_evtchn(int port)
  283. {
  284. struct shared_info *s = HYPERVISOR_shared_info;
  285. unsigned int cpu = get_cpu();
  286. BUG_ON(!irqs_disabled());
  287. /* Slow path (hypercall) if this is a non-local port. */
  288. if (unlikely(cpu != cpu_from_evtchn(port))) {
  289. struct evtchn_unmask unmask = { .port = port };
  290. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  291. } else {
  292. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  293. sync_clear_bit(port, &s->evtchn_mask[0]);
  294. /*
  295. * The following is basically the equivalent of
  296. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  297. * the interrupt edge' if the channel is masked.
  298. */
  299. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  300. !sync_test_and_set_bit(port / BITS_PER_LONG,
  301. &vcpu_info->evtchn_pending_sel))
  302. vcpu_info->evtchn_upcall_pending = 1;
  303. }
  304. put_cpu();
  305. }
  306. static int get_nr_hw_irqs(void)
  307. {
  308. int ret = 1;
  309. #ifdef CONFIG_X86_IO_APIC
  310. ret = get_nr_irqs_gsi();
  311. #endif
  312. return ret;
  313. }
  314. /* callers of this function should make sure that PHYSDEVOP_get_nr_pirqs
  315. * succeeded otherwise nr_pirqs won't hold the right value */
  316. static int find_unbound_pirq(void)
  317. {
  318. int i;
  319. for (i = nr_pirqs-1; i >= 0; i--) {
  320. if (pirq_to_irq[i] < 0)
  321. return i;
  322. }
  323. return -1;
  324. }
  325. static int find_unbound_irq(void)
  326. {
  327. struct irq_data *data;
  328. int irq, res;
  329. int start = get_nr_hw_irqs();
  330. if (start == nr_irqs)
  331. goto no_irqs;
  332. /* nr_irqs is a magic value. Must not use it.*/
  333. for (irq = nr_irqs-1; irq > start; irq--) {
  334. data = irq_get_irq_data(irq);
  335. /* only 0->15 have init'd desc; handle irq > 16 */
  336. if (!data)
  337. break;
  338. if (data->chip == &no_irq_chip)
  339. break;
  340. if (data->chip != &xen_dynamic_chip)
  341. continue;
  342. if (irq_info[irq].type == IRQT_UNBOUND)
  343. return irq;
  344. }
  345. if (irq == start)
  346. goto no_irqs;
  347. res = irq_alloc_desc_at(irq, 0);
  348. if (WARN_ON(res != irq))
  349. return -1;
  350. return irq;
  351. no_irqs:
  352. panic("No available IRQ to bind to: increase nr_irqs!\n");
  353. }
  354. static bool identity_mapped_irq(unsigned irq)
  355. {
  356. /* identity map all the hardware irqs */
  357. return irq < get_nr_hw_irqs();
  358. }
  359. static void pirq_unmask_notify(int irq)
  360. {
  361. struct physdev_eoi eoi = { .irq = pirq_from_irq(irq) };
  362. if (unlikely(pirq_needs_eoi(irq))) {
  363. int rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  364. WARN_ON(rc);
  365. }
  366. }
  367. static void pirq_query_unmask(int irq)
  368. {
  369. struct physdev_irq_status_query irq_status;
  370. struct irq_info *info = info_for_irq(irq);
  371. BUG_ON(info->type != IRQT_PIRQ);
  372. irq_status.irq = pirq_from_irq(irq);
  373. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  374. irq_status.flags = 0;
  375. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  376. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  377. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  378. }
  379. static bool probing_irq(int irq)
  380. {
  381. struct irq_desc *desc = irq_to_desc(irq);
  382. return desc && desc->action == NULL;
  383. }
  384. static unsigned int startup_pirq(unsigned int irq)
  385. {
  386. struct evtchn_bind_pirq bind_pirq;
  387. struct irq_info *info = info_for_irq(irq);
  388. int evtchn = evtchn_from_irq(irq);
  389. int rc;
  390. BUG_ON(info->type != IRQT_PIRQ);
  391. if (VALID_EVTCHN(evtchn))
  392. goto out;
  393. bind_pirq.pirq = pirq_from_irq(irq);
  394. /* NB. We are happy to share unless we are probing. */
  395. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  396. BIND_PIRQ__WILL_SHARE : 0;
  397. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  398. if (rc != 0) {
  399. if (!probing_irq(irq))
  400. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  401. irq);
  402. return 0;
  403. }
  404. evtchn = bind_pirq.port;
  405. pirq_query_unmask(irq);
  406. evtchn_to_irq[evtchn] = irq;
  407. bind_evtchn_to_cpu(evtchn, 0);
  408. info->evtchn = evtchn;
  409. out:
  410. unmask_evtchn(evtchn);
  411. pirq_unmask_notify(irq);
  412. return 0;
  413. }
  414. static void shutdown_pirq(unsigned int irq)
  415. {
  416. struct evtchn_close close;
  417. struct irq_info *info = info_for_irq(irq);
  418. int evtchn = evtchn_from_irq(irq);
  419. BUG_ON(info->type != IRQT_PIRQ);
  420. if (!VALID_EVTCHN(evtchn))
  421. return;
  422. mask_evtchn(evtchn);
  423. close.port = evtchn;
  424. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  425. BUG();
  426. bind_evtchn_to_cpu(evtchn, 0);
  427. evtchn_to_irq[evtchn] = -1;
  428. info->evtchn = 0;
  429. }
  430. static void enable_pirq(unsigned int irq)
  431. {
  432. startup_pirq(irq);
  433. }
  434. static void disable_pirq(unsigned int irq)
  435. {
  436. }
  437. static void ack_pirq(unsigned int irq)
  438. {
  439. int evtchn = evtchn_from_irq(irq);
  440. move_native_irq(irq);
  441. if (VALID_EVTCHN(evtchn)) {
  442. mask_evtchn(evtchn);
  443. clear_evtchn(evtchn);
  444. }
  445. }
  446. static void end_pirq(unsigned int irq)
  447. {
  448. int evtchn = evtchn_from_irq(irq);
  449. struct irq_desc *desc = irq_to_desc(irq);
  450. if (WARN_ON(!desc))
  451. return;
  452. if ((desc->status & (IRQ_DISABLED|IRQ_PENDING)) ==
  453. (IRQ_DISABLED|IRQ_PENDING)) {
  454. shutdown_pirq(irq);
  455. } else if (VALID_EVTCHN(evtchn)) {
  456. unmask_evtchn(evtchn);
  457. pirq_unmask_notify(irq);
  458. }
  459. }
  460. static int find_irq_by_gsi(unsigned gsi)
  461. {
  462. int irq;
  463. for (irq = 0; irq < nr_irqs; irq++) {
  464. struct irq_info *info = info_for_irq(irq);
  465. if (info == NULL || info->type != IRQT_PIRQ)
  466. continue;
  467. if (gsi_from_irq(irq) == gsi)
  468. return irq;
  469. }
  470. return -1;
  471. }
  472. int xen_allocate_pirq(unsigned gsi, int shareable, char *name)
  473. {
  474. return xen_map_pirq_gsi(gsi, gsi, shareable, name);
  475. }
  476. /* xen_map_pirq_gsi might allocate irqs from the top down, as a
  477. * consequence don't assume that the irq number returned has a low value
  478. * or can be used as a pirq number unless you know otherwise.
  479. *
  480. * One notable exception is when xen_map_pirq_gsi is called passing an
  481. * hardware gsi as argument, in that case the irq number returned
  482. * matches the gsi number passed as second argument.
  483. *
  484. * Note: We don't assign an event channel until the irq actually started
  485. * up. Return an existing irq if we've already got one for the gsi.
  486. */
  487. int xen_map_pirq_gsi(unsigned pirq, unsigned gsi, int shareable, char *name)
  488. {
  489. int irq = 0;
  490. struct physdev_irq irq_op;
  491. spin_lock(&irq_mapping_update_lock);
  492. if ((pirq > nr_pirqs) || (gsi > nr_irqs)) {
  493. printk(KERN_WARNING "xen_map_pirq_gsi: %s %s is incorrect!\n",
  494. pirq > nr_pirqs ? "nr_pirqs" :"",
  495. gsi > nr_irqs ? "nr_irqs" : "");
  496. goto out;
  497. }
  498. irq = find_irq_by_gsi(gsi);
  499. if (irq != -1) {
  500. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  501. irq, gsi);
  502. goto out; /* XXX need refcount? */
  503. }
  504. /* If we are a PV guest, we don't have GSIs (no ACPI passed). Therefore
  505. * we are using the !xen_initial_domain() to drop in the function.*/
  506. if (identity_mapped_irq(gsi) || (!xen_initial_domain() &&
  507. xen_pv_domain())) {
  508. irq = gsi;
  509. irq_alloc_desc_at(irq, 0);
  510. } else
  511. irq = find_unbound_irq();
  512. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  513. handle_level_irq, name);
  514. irq_op.irq = irq;
  515. irq_op.vector = 0;
  516. /* Only the privileged domain can do this. For non-priv, the pcifront
  517. * driver provides a PCI bus that does the call to do exactly
  518. * this in the priv domain. */
  519. if (xen_initial_domain() &&
  520. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  521. irq_free_desc(irq);
  522. irq = -ENOSPC;
  523. goto out;
  524. }
  525. irq_info[irq] = mk_pirq_info(0, pirq, gsi, irq_op.vector);
  526. irq_info[irq].u.pirq.flags |= shareable ? PIRQ_SHAREABLE : 0;
  527. pirq_to_irq[pirq] = irq;
  528. out:
  529. spin_unlock(&irq_mapping_update_lock);
  530. return irq;
  531. }
  532. #ifdef CONFIG_PCI_MSI
  533. #include <linux/msi.h>
  534. #include "../pci/msi.h"
  535. void xen_allocate_pirq_msi(char *name, int *irq, int *pirq)
  536. {
  537. spin_lock(&irq_mapping_update_lock);
  538. *irq = find_unbound_irq();
  539. if (*irq == -1)
  540. goto out;
  541. *pirq = find_unbound_pirq();
  542. if (*pirq == -1)
  543. goto out;
  544. set_irq_chip_and_handler_name(*irq, &xen_pirq_chip,
  545. handle_level_irq, name);
  546. irq_info[*irq] = mk_pirq_info(0, *pirq, 0, 0);
  547. pirq_to_irq[*pirq] = *irq;
  548. out:
  549. spin_unlock(&irq_mapping_update_lock);
  550. }
  551. int xen_create_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int type)
  552. {
  553. int irq = -1;
  554. struct physdev_map_pirq map_irq;
  555. int rc;
  556. int pos;
  557. u32 table_offset, bir;
  558. memset(&map_irq, 0, sizeof(map_irq));
  559. map_irq.domid = DOMID_SELF;
  560. map_irq.type = MAP_PIRQ_TYPE_MSI;
  561. map_irq.index = -1;
  562. map_irq.pirq = -1;
  563. map_irq.bus = dev->bus->number;
  564. map_irq.devfn = dev->devfn;
  565. if (type == PCI_CAP_ID_MSIX) {
  566. pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
  567. pci_read_config_dword(dev, msix_table_offset_reg(pos),
  568. &table_offset);
  569. bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
  570. map_irq.table_base = pci_resource_start(dev, bir);
  571. map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
  572. }
  573. spin_lock(&irq_mapping_update_lock);
  574. irq = find_unbound_irq();
  575. if (irq == -1)
  576. goto out;
  577. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  578. if (rc) {
  579. printk(KERN_WARNING "xen map irq failed %d\n", rc);
  580. irq_free_desc(irq);
  581. irq = -1;
  582. goto out;
  583. }
  584. irq_info[irq] = mk_pirq_info(0, map_irq.pirq, 0, map_irq.index);
  585. set_irq_chip_and_handler_name(irq, &xen_pirq_chip,
  586. handle_level_irq,
  587. (type == PCI_CAP_ID_MSIX) ? "msi-x":"msi");
  588. out:
  589. spin_unlock(&irq_mapping_update_lock);
  590. return irq;
  591. }
  592. #endif
  593. int xen_destroy_irq(int irq)
  594. {
  595. struct irq_desc *desc;
  596. struct physdev_unmap_pirq unmap_irq;
  597. struct irq_info *info = info_for_irq(irq);
  598. int rc = -ENOENT;
  599. spin_lock(&irq_mapping_update_lock);
  600. desc = irq_to_desc(irq);
  601. if (!desc)
  602. goto out;
  603. if (xen_initial_domain()) {
  604. unmap_irq.pirq = info->u.pirq.gsi;
  605. unmap_irq.domid = DOMID_SELF;
  606. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  607. if (rc) {
  608. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  609. goto out;
  610. }
  611. }
  612. irq_info[irq] = mk_unbound_info();
  613. irq_free_desc(irq);
  614. out:
  615. spin_unlock(&irq_mapping_update_lock);
  616. return rc;
  617. }
  618. int xen_vector_from_irq(unsigned irq)
  619. {
  620. return vector_from_irq(irq);
  621. }
  622. int xen_gsi_from_irq(unsigned irq)
  623. {
  624. return gsi_from_irq(irq);
  625. }
  626. int bind_evtchn_to_irq(unsigned int evtchn)
  627. {
  628. int irq;
  629. spin_lock(&irq_mapping_update_lock);
  630. irq = evtchn_to_irq[evtchn];
  631. if (irq == -1) {
  632. irq = find_unbound_irq();
  633. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  634. handle_edge_irq, "event");
  635. evtchn_to_irq[evtchn] = irq;
  636. irq_info[irq] = mk_evtchn_info(evtchn);
  637. }
  638. spin_unlock(&irq_mapping_update_lock);
  639. return irq;
  640. }
  641. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  642. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  643. {
  644. struct evtchn_bind_ipi bind_ipi;
  645. int evtchn, irq;
  646. spin_lock(&irq_mapping_update_lock);
  647. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  648. if (irq == -1) {
  649. irq = find_unbound_irq();
  650. if (irq < 0)
  651. goto out;
  652. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  653. handle_percpu_irq, "ipi");
  654. bind_ipi.vcpu = cpu;
  655. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  656. &bind_ipi) != 0)
  657. BUG();
  658. evtchn = bind_ipi.port;
  659. evtchn_to_irq[evtchn] = irq;
  660. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  661. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  662. bind_evtchn_to_cpu(evtchn, cpu);
  663. }
  664. out:
  665. spin_unlock(&irq_mapping_update_lock);
  666. return irq;
  667. }
  668. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  669. {
  670. struct evtchn_bind_virq bind_virq;
  671. int evtchn, irq;
  672. spin_lock(&irq_mapping_update_lock);
  673. irq = per_cpu(virq_to_irq, cpu)[virq];
  674. if (irq == -1) {
  675. bind_virq.virq = virq;
  676. bind_virq.vcpu = cpu;
  677. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  678. &bind_virq) != 0)
  679. BUG();
  680. evtchn = bind_virq.port;
  681. irq = find_unbound_irq();
  682. set_irq_chip_and_handler_name(irq, &xen_percpu_chip,
  683. handle_percpu_irq, "virq");
  684. evtchn_to_irq[evtchn] = irq;
  685. irq_info[irq] = mk_virq_info(evtchn, virq);
  686. per_cpu(virq_to_irq, cpu)[virq] = irq;
  687. bind_evtchn_to_cpu(evtchn, cpu);
  688. }
  689. spin_unlock(&irq_mapping_update_lock);
  690. return irq;
  691. }
  692. static void unbind_from_irq(unsigned int irq)
  693. {
  694. struct evtchn_close close;
  695. int evtchn = evtchn_from_irq(irq);
  696. spin_lock(&irq_mapping_update_lock);
  697. if (VALID_EVTCHN(evtchn)) {
  698. close.port = evtchn;
  699. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  700. BUG();
  701. switch (type_from_irq(irq)) {
  702. case IRQT_VIRQ:
  703. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  704. [virq_from_irq(irq)] = -1;
  705. break;
  706. case IRQT_IPI:
  707. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  708. [ipi_from_irq(irq)] = -1;
  709. break;
  710. default:
  711. break;
  712. }
  713. /* Closed ports are implicitly re-bound to VCPU0. */
  714. bind_evtchn_to_cpu(evtchn, 0);
  715. evtchn_to_irq[evtchn] = -1;
  716. }
  717. if (irq_info[irq].type != IRQT_UNBOUND) {
  718. irq_info[irq] = mk_unbound_info();
  719. irq_free_desc(irq);
  720. }
  721. spin_unlock(&irq_mapping_update_lock);
  722. }
  723. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  724. irq_handler_t handler,
  725. unsigned long irqflags,
  726. const char *devname, void *dev_id)
  727. {
  728. unsigned int irq;
  729. int retval;
  730. irq = bind_evtchn_to_irq(evtchn);
  731. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  732. if (retval != 0) {
  733. unbind_from_irq(irq);
  734. return retval;
  735. }
  736. return irq;
  737. }
  738. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  739. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  740. irq_handler_t handler,
  741. unsigned long irqflags, const char *devname, void *dev_id)
  742. {
  743. unsigned int irq;
  744. int retval;
  745. irq = bind_virq_to_irq(virq, cpu);
  746. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  747. if (retval != 0) {
  748. unbind_from_irq(irq);
  749. return retval;
  750. }
  751. return irq;
  752. }
  753. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  754. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  755. unsigned int cpu,
  756. irq_handler_t handler,
  757. unsigned long irqflags,
  758. const char *devname,
  759. void *dev_id)
  760. {
  761. int irq, retval;
  762. irq = bind_ipi_to_irq(ipi, cpu);
  763. if (irq < 0)
  764. return irq;
  765. irqflags |= IRQF_NO_SUSPEND;
  766. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  767. if (retval != 0) {
  768. unbind_from_irq(irq);
  769. return retval;
  770. }
  771. return irq;
  772. }
  773. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  774. {
  775. free_irq(irq, dev_id);
  776. unbind_from_irq(irq);
  777. }
  778. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  779. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  780. {
  781. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  782. BUG_ON(irq < 0);
  783. notify_remote_via_irq(irq);
  784. }
  785. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  786. {
  787. struct shared_info *sh = HYPERVISOR_shared_info;
  788. int cpu = smp_processor_id();
  789. int i;
  790. unsigned long flags;
  791. static DEFINE_SPINLOCK(debug_lock);
  792. spin_lock_irqsave(&debug_lock, flags);
  793. printk("vcpu %d\n ", cpu);
  794. for_each_online_cpu(i) {
  795. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  796. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  797. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  798. v->evtchn_upcall_pending,
  799. v->evtchn_pending_sel);
  800. }
  801. printk("pending:\n ");
  802. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  803. printk("%08lx%s", sh->evtchn_pending[i],
  804. i % 8 == 0 ? "\n " : " ");
  805. printk("\nmasks:\n ");
  806. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  807. printk("%08lx%s", sh->evtchn_mask[i],
  808. i % 8 == 0 ? "\n " : " ");
  809. printk("\nunmasked:\n ");
  810. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  811. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  812. i % 8 == 0 ? "\n " : " ");
  813. printk("\npending list:\n");
  814. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  815. if (sync_test_bit(i, sh->evtchn_pending)) {
  816. printk(" %d: event %d -> irq %d\n",
  817. cpu_from_evtchn(i), i,
  818. evtchn_to_irq[i]);
  819. }
  820. }
  821. spin_unlock_irqrestore(&debug_lock, flags);
  822. return IRQ_HANDLED;
  823. }
  824. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  825. /*
  826. * Search the CPUs pending events bitmasks. For each one found, map
  827. * the event number to an irq, and feed it into do_IRQ() for
  828. * handling.
  829. *
  830. * Xen uses a two-level bitmap to speed searching. The first level is
  831. * a bitset of words which contain pending event bits. The second
  832. * level is a bitset of pending events themselves.
  833. */
  834. static void __xen_evtchn_do_upcall(void)
  835. {
  836. int cpu = get_cpu();
  837. struct shared_info *s = HYPERVISOR_shared_info;
  838. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  839. unsigned count;
  840. do {
  841. unsigned long pending_words;
  842. vcpu_info->evtchn_upcall_pending = 0;
  843. if (__get_cpu_var(xed_nesting_count)++)
  844. goto out;
  845. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  846. /* Clear master flag /before/ clearing selector flag. */
  847. wmb();
  848. #endif
  849. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  850. while (pending_words != 0) {
  851. unsigned long pending_bits;
  852. int word_idx = __ffs(pending_words);
  853. pending_words &= ~(1UL << word_idx);
  854. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  855. int bit_idx = __ffs(pending_bits);
  856. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  857. int irq = evtchn_to_irq[port];
  858. struct irq_desc *desc;
  859. if (irq != -1) {
  860. desc = irq_to_desc(irq);
  861. if (desc)
  862. generic_handle_irq_desc(irq, desc);
  863. }
  864. }
  865. }
  866. BUG_ON(!irqs_disabled());
  867. count = __get_cpu_var(xed_nesting_count);
  868. __get_cpu_var(xed_nesting_count) = 0;
  869. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  870. out:
  871. put_cpu();
  872. }
  873. void xen_evtchn_do_upcall(struct pt_regs *regs)
  874. {
  875. struct pt_regs *old_regs = set_irq_regs(regs);
  876. exit_idle();
  877. irq_enter();
  878. __xen_evtchn_do_upcall();
  879. irq_exit();
  880. set_irq_regs(old_regs);
  881. }
  882. void xen_hvm_evtchn_do_upcall(void)
  883. {
  884. __xen_evtchn_do_upcall();
  885. }
  886. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  887. /* Rebind a new event channel to an existing irq. */
  888. void rebind_evtchn_irq(int evtchn, int irq)
  889. {
  890. struct irq_info *info = info_for_irq(irq);
  891. /* Make sure the irq is masked, since the new event channel
  892. will also be masked. */
  893. disable_irq(irq);
  894. spin_lock(&irq_mapping_update_lock);
  895. /* After resume the irq<->evtchn mappings are all cleared out */
  896. BUG_ON(evtchn_to_irq[evtchn] != -1);
  897. /* Expect irq to have been bound before,
  898. so there should be a proper type */
  899. BUG_ON(info->type == IRQT_UNBOUND);
  900. evtchn_to_irq[evtchn] = irq;
  901. irq_info[irq] = mk_evtchn_info(evtchn);
  902. spin_unlock(&irq_mapping_update_lock);
  903. /* new event channels are always bound to cpu 0 */
  904. irq_set_affinity(irq, cpumask_of(0));
  905. /* Unmask the event channel. */
  906. enable_irq(irq);
  907. }
  908. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  909. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  910. {
  911. struct evtchn_bind_vcpu bind_vcpu;
  912. int evtchn = evtchn_from_irq(irq);
  913. /* events delivered via platform PCI interrupts are always
  914. * routed to vcpu 0 */
  915. if (!VALID_EVTCHN(evtchn) ||
  916. (xen_hvm_domain() && !xen_have_vector_callback))
  917. return -1;
  918. /* Send future instances of this interrupt to other vcpu. */
  919. bind_vcpu.port = evtchn;
  920. bind_vcpu.vcpu = tcpu;
  921. /*
  922. * If this fails, it usually just indicates that we're dealing with a
  923. * virq or IPI channel, which don't actually need to be rebound. Ignore
  924. * it, but don't do the xenlinux-level rebind in that case.
  925. */
  926. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  927. bind_evtchn_to_cpu(evtchn, tcpu);
  928. return 0;
  929. }
  930. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  931. {
  932. unsigned tcpu = cpumask_first(dest);
  933. return rebind_irq_to_cpu(irq, tcpu);
  934. }
  935. int resend_irq_on_evtchn(unsigned int irq)
  936. {
  937. int masked, evtchn = evtchn_from_irq(irq);
  938. struct shared_info *s = HYPERVISOR_shared_info;
  939. if (!VALID_EVTCHN(evtchn))
  940. return 1;
  941. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  942. sync_set_bit(evtchn, s->evtchn_pending);
  943. if (!masked)
  944. unmask_evtchn(evtchn);
  945. return 1;
  946. }
  947. static void enable_dynirq(unsigned int irq)
  948. {
  949. int evtchn = evtchn_from_irq(irq);
  950. if (VALID_EVTCHN(evtchn))
  951. unmask_evtchn(evtchn);
  952. }
  953. static void disable_dynirq(unsigned int irq)
  954. {
  955. int evtchn = evtchn_from_irq(irq);
  956. if (VALID_EVTCHN(evtchn))
  957. mask_evtchn(evtchn);
  958. }
  959. static void ack_dynirq(unsigned int irq)
  960. {
  961. int evtchn = evtchn_from_irq(irq);
  962. move_native_irq(irq);
  963. if (VALID_EVTCHN(evtchn))
  964. clear_evtchn(evtchn);
  965. }
  966. static int retrigger_dynirq(unsigned int irq)
  967. {
  968. int evtchn = evtchn_from_irq(irq);
  969. struct shared_info *sh = HYPERVISOR_shared_info;
  970. int ret = 0;
  971. if (VALID_EVTCHN(evtchn)) {
  972. int masked;
  973. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  974. sync_set_bit(evtchn, sh->evtchn_pending);
  975. if (!masked)
  976. unmask_evtchn(evtchn);
  977. ret = 1;
  978. }
  979. return ret;
  980. }
  981. static void restore_cpu_virqs(unsigned int cpu)
  982. {
  983. struct evtchn_bind_virq bind_virq;
  984. int virq, irq, evtchn;
  985. for (virq = 0; virq < NR_VIRQS; virq++) {
  986. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  987. continue;
  988. BUG_ON(virq_from_irq(irq) != virq);
  989. /* Get a new binding from Xen. */
  990. bind_virq.virq = virq;
  991. bind_virq.vcpu = cpu;
  992. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  993. &bind_virq) != 0)
  994. BUG();
  995. evtchn = bind_virq.port;
  996. /* Record the new mapping. */
  997. evtchn_to_irq[evtchn] = irq;
  998. irq_info[irq] = mk_virq_info(evtchn, virq);
  999. bind_evtchn_to_cpu(evtchn, cpu);
  1000. /* Ready for use. */
  1001. unmask_evtchn(evtchn);
  1002. }
  1003. }
  1004. static void restore_cpu_ipis(unsigned int cpu)
  1005. {
  1006. struct evtchn_bind_ipi bind_ipi;
  1007. int ipi, irq, evtchn;
  1008. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1009. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1010. continue;
  1011. BUG_ON(ipi_from_irq(irq) != ipi);
  1012. /* Get a new binding from Xen. */
  1013. bind_ipi.vcpu = cpu;
  1014. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1015. &bind_ipi) != 0)
  1016. BUG();
  1017. evtchn = bind_ipi.port;
  1018. /* Record the new mapping. */
  1019. evtchn_to_irq[evtchn] = irq;
  1020. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  1021. bind_evtchn_to_cpu(evtchn, cpu);
  1022. /* Ready for use. */
  1023. unmask_evtchn(evtchn);
  1024. }
  1025. }
  1026. /* Clear an irq's pending state, in preparation for polling on it */
  1027. void xen_clear_irq_pending(int irq)
  1028. {
  1029. int evtchn = evtchn_from_irq(irq);
  1030. if (VALID_EVTCHN(evtchn))
  1031. clear_evtchn(evtchn);
  1032. }
  1033. EXPORT_SYMBOL(xen_clear_irq_pending);
  1034. void xen_set_irq_pending(int irq)
  1035. {
  1036. int evtchn = evtchn_from_irq(irq);
  1037. if (VALID_EVTCHN(evtchn))
  1038. set_evtchn(evtchn);
  1039. }
  1040. bool xen_test_irq_pending(int irq)
  1041. {
  1042. int evtchn = evtchn_from_irq(irq);
  1043. bool ret = false;
  1044. if (VALID_EVTCHN(evtchn))
  1045. ret = test_evtchn(evtchn);
  1046. return ret;
  1047. }
  1048. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1049. * the irq will be disabled so it won't deliver an interrupt. */
  1050. void xen_poll_irq_timeout(int irq, u64 timeout)
  1051. {
  1052. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1053. if (VALID_EVTCHN(evtchn)) {
  1054. struct sched_poll poll;
  1055. poll.nr_ports = 1;
  1056. poll.timeout = timeout;
  1057. set_xen_guest_handle(poll.ports, &evtchn);
  1058. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1059. BUG();
  1060. }
  1061. }
  1062. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1063. /* Poll waiting for an irq to become pending. In the usual case, the
  1064. * irq will be disabled so it won't deliver an interrupt. */
  1065. void xen_poll_irq(int irq)
  1066. {
  1067. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1068. }
  1069. void xen_irq_resume(void)
  1070. {
  1071. unsigned int cpu, irq, evtchn;
  1072. init_evtchn_cpu_bindings();
  1073. /* New event-channel space is not 'live' yet. */
  1074. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1075. mask_evtchn(evtchn);
  1076. /* No IRQ <-> event-channel mappings. */
  1077. for (irq = 0; irq < nr_irqs; irq++)
  1078. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  1079. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1080. evtchn_to_irq[evtchn] = -1;
  1081. for_each_possible_cpu(cpu) {
  1082. restore_cpu_virqs(cpu);
  1083. restore_cpu_ipis(cpu);
  1084. }
  1085. }
  1086. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1087. .name = "xen-dyn",
  1088. .disable = disable_dynirq,
  1089. .mask = disable_dynirq,
  1090. .unmask = enable_dynirq,
  1091. .ack = ack_dynirq,
  1092. .set_affinity = set_affinity_irq,
  1093. .retrigger = retrigger_dynirq,
  1094. };
  1095. static struct irq_chip xen_pirq_chip __read_mostly = {
  1096. .name = "xen-pirq",
  1097. .startup = startup_pirq,
  1098. .shutdown = shutdown_pirq,
  1099. .enable = enable_pirq,
  1100. .unmask = enable_pirq,
  1101. .disable = disable_pirq,
  1102. .mask = disable_pirq,
  1103. .ack = ack_pirq,
  1104. .end = end_pirq,
  1105. .set_affinity = set_affinity_irq,
  1106. .retrigger = retrigger_dynirq,
  1107. };
  1108. static struct irq_chip xen_percpu_chip __read_mostly = {
  1109. .name = "xen-percpu",
  1110. .disable = disable_dynirq,
  1111. .mask = disable_dynirq,
  1112. .unmask = enable_dynirq,
  1113. .ack = ack_dynirq,
  1114. };
  1115. int xen_set_callback_via(uint64_t via)
  1116. {
  1117. struct xen_hvm_param a;
  1118. a.domid = DOMID_SELF;
  1119. a.index = HVM_PARAM_CALLBACK_IRQ;
  1120. a.value = via;
  1121. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1122. }
  1123. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1124. #ifdef CONFIG_XEN_PVHVM
  1125. /* Vector callbacks are better than PCI interrupts to receive event
  1126. * channel notifications because we can receive vector callbacks on any
  1127. * vcpu and we don't need PCI support or APIC interactions. */
  1128. void xen_callback_vector(void)
  1129. {
  1130. int rc;
  1131. uint64_t callback_via;
  1132. if (xen_have_vector_callback) {
  1133. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1134. rc = xen_set_callback_via(callback_via);
  1135. if (rc) {
  1136. printk(KERN_ERR "Request for Xen HVM callback vector"
  1137. " failed.\n");
  1138. xen_have_vector_callback = 0;
  1139. return;
  1140. }
  1141. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1142. "enabled\n");
  1143. /* in the restore case the vector has already been allocated */
  1144. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1145. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1146. }
  1147. }
  1148. #else
  1149. void xen_callback_vector(void) {}
  1150. #endif
  1151. void __init xen_init_IRQ(void)
  1152. {
  1153. int i, rc;
  1154. struct physdev_nr_pirqs op_nr_pirqs;
  1155. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  1156. GFP_KERNEL);
  1157. irq_info = kcalloc(nr_irqs, sizeof(*irq_info), GFP_KERNEL);
  1158. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_nr_pirqs, &op_nr_pirqs);
  1159. if (rc < 0) {
  1160. nr_pirqs = nr_irqs;
  1161. if (rc != -ENOSYS)
  1162. printk(KERN_WARNING "PHYSDEVOP_get_nr_pirqs returned rc=%d\n", rc);
  1163. } else {
  1164. if (xen_pv_domain() && !xen_initial_domain())
  1165. nr_pirqs = max((int)op_nr_pirqs.nr_pirqs, nr_irqs);
  1166. else
  1167. nr_pirqs = op_nr_pirqs.nr_pirqs;
  1168. }
  1169. pirq_to_irq = kcalloc(nr_pirqs, sizeof(*pirq_to_irq), GFP_KERNEL);
  1170. for (i = 0; i < nr_pirqs; i++)
  1171. pirq_to_irq[i] = -1;
  1172. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1173. GFP_KERNEL);
  1174. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1175. evtchn_to_irq[i] = -1;
  1176. init_evtchn_cpu_bindings();
  1177. /* No event channels are 'live' right now. */
  1178. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1179. mask_evtchn(i);
  1180. if (xen_hvm_domain()) {
  1181. xen_callback_vector();
  1182. native_init_IRQ();
  1183. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1184. * __acpi_register_gsi can point at the right function */
  1185. pci_xen_hvm_init();
  1186. } else {
  1187. irq_ctx_init(smp_processor_id());
  1188. if (xen_initial_domain())
  1189. xen_setup_pirqs();
  1190. }
  1191. }