sun4d_irq.c 14 KB

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  1. /* $Id: sun4d_irq.c,v 1.29 2001/12/11 04:55:51 davem Exp $
  2. * arch/sparc/kernel/sun4d_irq.c:
  3. * SS1000/SC2000 interrupt handling.
  4. *
  5. * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  6. * Heavily based on arch/sparc/kernel/irq.c.
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/linkage.h>
  10. #include <linux/kernel_stat.h>
  11. #include <linux/signal.h>
  12. #include <linux/sched.h>
  13. #include <linux/ptrace.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/slab.h>
  16. #include <linux/random.h>
  17. #include <linux/init.h>
  18. #include <linux/smp.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/seq_file.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/processor.h>
  23. #include <asm/system.h>
  24. #include <asm/psr.h>
  25. #include <asm/smp.h>
  26. #include <asm/vaddrs.h>
  27. #include <asm/timer.h>
  28. #include <asm/openprom.h>
  29. #include <asm/oplib.h>
  30. #include <asm/traps.h>
  31. #include <asm/irq.h>
  32. #include <asm/io.h>
  33. #include <asm/pgalloc.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/sbus.h>
  36. #include <asm/sbi.h>
  37. #include <asm/cacheflush.h>
  38. #include <asm/irq_regs.h>
  39. #include "irq.h"
  40. /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
  41. /* #define DISTRIBUTE_IRQS */
  42. struct sun4d_timer_regs *sun4d_timers;
  43. #define TIMER_IRQ 10
  44. #define MAX_STATIC_ALLOC 4
  45. extern struct irqaction static_irqaction[MAX_STATIC_ALLOC];
  46. extern int static_irq_count;
  47. unsigned char cpu_leds[32];
  48. #ifdef CONFIG_SMP
  49. unsigned char sbus_tid[32];
  50. #endif
  51. static struct irqaction *irq_action[NR_IRQS];
  52. extern spinlock_t irq_action_lock;
  53. struct sbus_action {
  54. struct irqaction *action;
  55. /* For SMP this needs to be extended */
  56. } *sbus_actions;
  57. static int pil_to_sbus[] = {
  58. 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
  59. };
  60. static int sbus_to_pil[] = {
  61. 0, 2, 3, 5, 7, 9, 11, 13,
  62. };
  63. static int nsbi;
  64. #ifdef CONFIG_SMP
  65. DEFINE_SPINLOCK(sun4d_imsk_lock);
  66. #endif
  67. int show_sun4d_interrupts(struct seq_file *p, void *v)
  68. {
  69. int i = *(loff_t *) v, j = 0, k = 0, sbusl;
  70. struct irqaction * action;
  71. unsigned long flags;
  72. #ifdef CONFIG_SMP
  73. int x;
  74. #endif
  75. spin_lock_irqsave(&irq_action_lock, flags);
  76. if (i < NR_IRQS) {
  77. sbusl = pil_to_sbus[i];
  78. if (!sbusl) {
  79. action = *(i + irq_action);
  80. if (!action)
  81. goto out_unlock;
  82. } else {
  83. for (j = 0; j < nsbi; j++) {
  84. for (k = 0; k < 4; k++)
  85. if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action))
  86. goto found_it;
  87. }
  88. goto out_unlock;
  89. }
  90. found_it: seq_printf(p, "%3d: ", i);
  91. #ifndef CONFIG_SMP
  92. seq_printf(p, "%10u ", kstat_irqs(i));
  93. #else
  94. for_each_online_cpu(x)
  95. seq_printf(p, "%10u ",
  96. kstat_cpu(cpu_logical_map(x)).irqs[i]);
  97. #endif
  98. seq_printf(p, "%c %s",
  99. (action->flags & IRQF_DISABLED) ? '+' : ' ',
  100. action->name);
  101. action = action->next;
  102. for (;;) {
  103. for (; action; action = action->next) {
  104. seq_printf(p, ",%s %s",
  105. (action->flags & IRQF_DISABLED) ? " +" : "",
  106. action->name);
  107. }
  108. if (!sbusl) break;
  109. k++;
  110. if (k < 4)
  111. action = sbus_actions [(j << 5) + (sbusl << 2) + k].action;
  112. else {
  113. j++;
  114. if (j == nsbi) break;
  115. k = 0;
  116. action = sbus_actions [(j << 5) + (sbusl << 2)].action;
  117. }
  118. }
  119. seq_putc(p, '\n');
  120. }
  121. out_unlock:
  122. spin_unlock_irqrestore(&irq_action_lock, flags);
  123. return 0;
  124. }
  125. void sun4d_free_irq(unsigned int irq, void *dev_id)
  126. {
  127. struct irqaction *action, **actionp;
  128. struct irqaction *tmp = NULL;
  129. unsigned long flags;
  130. spin_lock_irqsave(&irq_action_lock, flags);
  131. if (irq < 15)
  132. actionp = irq + irq_action;
  133. else
  134. actionp = &(sbus_actions[irq - (1 << 5)].action);
  135. action = *actionp;
  136. if (!action) {
  137. printk("Trying to free free IRQ%d\n",irq);
  138. goto out_unlock;
  139. }
  140. if (dev_id) {
  141. for (; action; action = action->next) {
  142. if (action->dev_id == dev_id)
  143. break;
  144. tmp = action;
  145. }
  146. if (!action) {
  147. printk("Trying to free free shared IRQ%d\n",irq);
  148. goto out_unlock;
  149. }
  150. } else if (action->flags & IRQF_SHARED) {
  151. printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
  152. goto out_unlock;
  153. }
  154. if (action->flags & SA_STATIC_ALLOC)
  155. {
  156. /* This interrupt is marked as specially allocated
  157. * so it is a bad idea to free it.
  158. */
  159. printk("Attempt to free statically allocated IRQ%d (%s)\n",
  160. irq, action->name);
  161. goto out_unlock;
  162. }
  163. if (action && tmp)
  164. tmp->next = action->next;
  165. else
  166. *actionp = action->next;
  167. spin_unlock_irqrestore(&irq_action_lock, flags);
  168. synchronize_irq(irq);
  169. spin_lock_irqsave(&irq_action_lock, flags);
  170. kfree(action);
  171. if (!(*actionp))
  172. __disable_irq(irq);
  173. out_unlock:
  174. spin_unlock_irqrestore(&irq_action_lock, flags);
  175. }
  176. extern void unexpected_irq(int, void *, struct pt_regs *);
  177. void sun4d_handler_irq(int irq, struct pt_regs * regs)
  178. {
  179. struct pt_regs *old_regs;
  180. struct irqaction * action;
  181. int cpu = smp_processor_id();
  182. /* SBUS IRQ level (1 - 7) */
  183. int sbusl = pil_to_sbus[irq];
  184. /* FIXME: Is this necessary?? */
  185. cc_get_ipen();
  186. cc_set_iclr(1 << irq);
  187. old_regs = set_irq_regs(regs);
  188. irq_enter();
  189. kstat_cpu(cpu).irqs[irq]++;
  190. if (!sbusl) {
  191. action = *(irq + irq_action);
  192. if (!action)
  193. unexpected_irq(irq, NULL, regs);
  194. do {
  195. action->handler(irq, action->dev_id);
  196. action = action->next;
  197. } while (action);
  198. } else {
  199. int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
  200. int sbino;
  201. struct sbus_action *actionp;
  202. unsigned mask, slot;
  203. int sbil = (sbusl << 2);
  204. bw_clear_intr_mask(sbusl, bus_mask);
  205. /* Loop for each pending SBI */
  206. for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1)
  207. if (bus_mask & 1) {
  208. mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
  209. mask &= (0xf << sbil);
  210. actionp = sbus_actions + (sbino << 5) + (sbil);
  211. /* Loop for each pending SBI slot */
  212. for (slot = (1 << sbil); mask; slot <<= 1, actionp++)
  213. if (mask & slot) {
  214. mask &= ~slot;
  215. action = actionp->action;
  216. if (!action)
  217. unexpected_irq(irq, NULL, regs);
  218. do {
  219. action->handler(irq, action->dev_id);
  220. action = action->next;
  221. } while (action);
  222. release_sbi(SBI2DEVID(sbino), slot);
  223. }
  224. }
  225. }
  226. irq_exit();
  227. set_irq_regs(old_regs);
  228. }
  229. unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq)
  230. {
  231. int sbusl = pil_to_sbus[irq];
  232. if (sbusl)
  233. return ((sdev->bus->board + 1) << 5) + (sbusl << 2) + sdev->slot;
  234. else
  235. return irq;
  236. }
  237. unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint)
  238. {
  239. if (sbint >= sizeof(sbus_to_pil)) {
  240. printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint);
  241. BUG();
  242. }
  243. return sun4d_build_irq(sdev, sbus_to_pil[sbint]);
  244. }
  245. int sun4d_request_irq(unsigned int irq,
  246. irq_handler_t handler,
  247. unsigned long irqflags, const char * devname, void *dev_id)
  248. {
  249. struct irqaction *action, *tmp = NULL, **actionp;
  250. unsigned long flags;
  251. int ret;
  252. if(irq > 14 && irq < (1 << 5)) {
  253. ret = -EINVAL;
  254. goto out;
  255. }
  256. if (!handler) {
  257. ret = -EINVAL;
  258. goto out;
  259. }
  260. spin_lock_irqsave(&irq_action_lock, flags);
  261. if (irq >= (1 << 5))
  262. actionp = &(sbus_actions[irq - (1 << 5)].action);
  263. else
  264. actionp = irq + irq_action;
  265. action = *actionp;
  266. if (action) {
  267. if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) {
  268. for (tmp = action; tmp->next; tmp = tmp->next);
  269. } else {
  270. ret = -EBUSY;
  271. goto out_unlock;
  272. }
  273. if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) {
  274. printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
  275. ret = -EBUSY;
  276. goto out_unlock;
  277. }
  278. action = NULL; /* Or else! */
  279. }
  280. /* If this is flagged as statically allocated then we use our
  281. * private struct which is never freed.
  282. */
  283. if (irqflags & SA_STATIC_ALLOC) {
  284. if (static_irq_count < MAX_STATIC_ALLOC)
  285. action = &static_irqaction[static_irq_count++];
  286. else
  287. printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname);
  288. }
  289. if (action == NULL)
  290. action = kmalloc(sizeof(struct irqaction),
  291. GFP_ATOMIC);
  292. if (!action) {
  293. ret = -ENOMEM;
  294. goto out_unlock;
  295. }
  296. action->handler = handler;
  297. action->flags = irqflags;
  298. cpus_clear(action->mask);
  299. action->name = devname;
  300. action->next = NULL;
  301. action->dev_id = dev_id;
  302. if (tmp)
  303. tmp->next = action;
  304. else
  305. *actionp = action;
  306. __enable_irq(irq);
  307. ret = 0;
  308. out_unlock:
  309. spin_unlock_irqrestore(&irq_action_lock, flags);
  310. out:
  311. return ret;
  312. }
  313. static void sun4d_disable_irq(unsigned int irq)
  314. {
  315. #ifdef CONFIG_SMP
  316. int tid = sbus_tid[(irq >> 5) - 1];
  317. unsigned long flags;
  318. #endif
  319. if (irq < NR_IRQS) return;
  320. #ifdef CONFIG_SMP
  321. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  322. cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7]));
  323. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  324. #else
  325. cc_set_imsk(cc_get_imsk() | (1 << sbus_to_pil[(irq >> 2) & 7]));
  326. #endif
  327. }
  328. static void sun4d_enable_irq(unsigned int irq)
  329. {
  330. #ifdef CONFIG_SMP
  331. int tid = sbus_tid[(irq >> 5) - 1];
  332. unsigned long flags;
  333. #endif
  334. if (irq < NR_IRQS) return;
  335. #ifdef CONFIG_SMP
  336. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  337. cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  338. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  339. #else
  340. cc_set_imsk(cc_get_imsk() & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  341. #endif
  342. }
  343. #ifdef CONFIG_SMP
  344. static void sun4d_set_cpu_int(int cpu, int level)
  345. {
  346. sun4d_send_ipi(cpu, level);
  347. }
  348. static void sun4d_clear_ipi(int cpu, int level)
  349. {
  350. }
  351. static void sun4d_set_udt(int cpu)
  352. {
  353. }
  354. /* Setup IRQ distribution scheme. */
  355. void __init sun4d_distribute_irqs(void)
  356. {
  357. #ifdef DISTRIBUTE_IRQS
  358. struct sbus_bus *sbus;
  359. unsigned long sbus_serving_map;
  360. sbus_serving_map = cpu_present_map;
  361. for_each_sbus(sbus) {
  362. if ((sbus->board * 2) == boot_cpu_id && (cpu_present_map & (1 << (sbus->board * 2 + 1))))
  363. sbus_tid[sbus->board] = (sbus->board * 2 + 1);
  364. else if (cpu_present_map & (1 << (sbus->board * 2)))
  365. sbus_tid[sbus->board] = (sbus->board * 2);
  366. else if (cpu_present_map & (1 << (sbus->board * 2 + 1)))
  367. sbus_tid[sbus->board] = (sbus->board * 2 + 1);
  368. else
  369. sbus_tid[sbus->board] = 0xff;
  370. if (sbus_tid[sbus->board] != 0xff)
  371. sbus_serving_map &= ~(1 << sbus_tid[sbus->board]);
  372. }
  373. for_each_sbus(sbus)
  374. if (sbus_tid[sbus->board] == 0xff) {
  375. int i = 31;
  376. if (!sbus_serving_map)
  377. sbus_serving_map = cpu_present_map;
  378. while (!(sbus_serving_map & (1 << i)))
  379. i--;
  380. sbus_tid[sbus->board] = i;
  381. sbus_serving_map &= ~(1 << i);
  382. }
  383. for_each_sbus(sbus) {
  384. printk("sbus%d IRQs directed to CPU%d\n", sbus->board, sbus_tid[sbus->board]);
  385. set_sbi_tid(sbus->devid, sbus_tid[sbus->board] << 3);
  386. }
  387. #else
  388. struct sbus_bus *sbus;
  389. int cpuid = cpu_logical_map(1);
  390. if (cpuid == -1)
  391. cpuid = cpu_logical_map(0);
  392. for_each_sbus(sbus) {
  393. sbus_tid[sbus->board] = cpuid;
  394. set_sbi_tid(sbus->devid, cpuid << 3);
  395. }
  396. printk("All sbus IRQs directed to CPU%d\n", cpuid);
  397. #endif
  398. }
  399. #endif
  400. static void sun4d_clear_clock_irq(void)
  401. {
  402. volatile unsigned int clear_intr;
  403. clear_intr = sun4d_timers->l10_timer_limit;
  404. }
  405. static void sun4d_clear_profile_irq(int cpu)
  406. {
  407. bw_get_prof_limit(cpu);
  408. }
  409. static void sun4d_load_profile_irq(int cpu, unsigned int limit)
  410. {
  411. bw_set_prof_limit(cpu, limit);
  412. }
  413. static void __init sun4d_init_timers(irq_handler_t counter_fn)
  414. {
  415. int irq;
  416. int cpu;
  417. struct resource r;
  418. int mid;
  419. /* Map the User Timer registers. */
  420. memset(&r, 0, sizeof(r));
  421. #ifdef CONFIG_SMP
  422. r.start = CSR_BASE(boot_cpu_id)+BW_TIMER_LIMIT;
  423. #else
  424. r.start = CSR_BASE(0)+BW_TIMER_LIMIT;
  425. #endif
  426. r.flags = 0xf;
  427. sun4d_timers = (struct sun4d_timer_regs *) sbus_ioremap(&r, 0,
  428. PAGE_SIZE, "user timer");
  429. sun4d_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10);
  430. master_l10_counter = &sun4d_timers->l10_cur_count;
  431. master_l10_limit = &sun4d_timers->l10_timer_limit;
  432. irq = request_irq(TIMER_IRQ,
  433. counter_fn,
  434. (IRQF_DISABLED | SA_STATIC_ALLOC),
  435. "timer", NULL);
  436. if (irq) {
  437. prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
  438. prom_halt();
  439. }
  440. /* Enable user timer free run for CPU 0 in BW */
  441. /* bw_set_ctrl(0, bw_get_ctrl(0) | BW_CTRL_USER_TIMER); */
  442. cpu = 0;
  443. while (!cpu_find_by_instance(cpu, NULL, &mid)) {
  444. sun4d_load_profile_irq(mid >> 3, 0);
  445. cpu++;
  446. }
  447. #ifdef CONFIG_SMP
  448. {
  449. unsigned long flags;
  450. extern unsigned long lvl14_save[4];
  451. struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
  452. extern unsigned int real_irq_entry[], smp4d_ticker[];
  453. extern unsigned int patchme_maybe_smp_msg[];
  454. /* Adjust so that we jump directly to smp4d_ticker */
  455. lvl14_save[2] += smp4d_ticker - real_irq_entry;
  456. /* For SMP we use the level 14 ticker, however the bootup code
  457. * has copied the firmware's level 14 vector into the boot cpu's
  458. * trap table, we must fix this now or we get squashed.
  459. */
  460. local_irq_save(flags);
  461. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  462. trap_table->inst_one = lvl14_save[0];
  463. trap_table->inst_two = lvl14_save[1];
  464. trap_table->inst_three = lvl14_save[2];
  465. trap_table->inst_four = lvl14_save[3];
  466. local_flush_cache_all();
  467. local_irq_restore(flags);
  468. }
  469. #endif
  470. }
  471. void __init sun4d_init_sbi_irq(void)
  472. {
  473. struct sbus_bus *sbus;
  474. unsigned mask;
  475. nsbi = 0;
  476. for_each_sbus(sbus)
  477. nsbi++;
  478. sbus_actions = kzalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC);
  479. if (!sbus_actions) {
  480. prom_printf("SUN4D: Cannot allocate sbus_actions, halting.\n");
  481. prom_halt();
  482. }
  483. for_each_sbus(sbus) {
  484. #ifdef CONFIG_SMP
  485. extern unsigned char boot_cpu_id;
  486. set_sbi_tid(sbus->devid, boot_cpu_id << 3);
  487. sbus_tid[sbus->board] = boot_cpu_id;
  488. #endif
  489. /* Get rid of pending irqs from PROM */
  490. mask = acquire_sbi(sbus->devid, 0xffffffff);
  491. if (mask) {
  492. printk ("Clearing pending IRQs %08x on SBI %d\n", mask, sbus->board);
  493. release_sbi(sbus->devid, mask);
  494. }
  495. }
  496. }
  497. void __init sun4d_init_IRQ(void)
  498. {
  499. local_irq_disable();
  500. BTFIXUPSET_CALL(sbint_to_irq, sun4d_sbint_to_irq, BTFIXUPCALL_NORM);
  501. BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM);
  502. BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM);
  503. BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
  504. BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM);
  505. BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
  506. sparc_init_timers = sun4d_init_timers;
  507. #ifdef CONFIG_SMP
  508. BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
  509. BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);
  510. BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);
  511. #endif
  512. /* Cannot enable interrupts until OBP ticker is disabled. */
  513. }