rtc-sh.c 19 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006, 2007, 2008 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <linux/log2.h>
  28. #include <asm/rtc.h>
  29. #define DRV_NAME "sh-rtc"
  30. #define DRV_VERSION "0.2.1"
  31. #define RTC_REG(r) ((r) * rtc_reg_size)
  32. #define R64CNT RTC_REG(0)
  33. #define RSECCNT RTC_REG(1) /* RTC sec */
  34. #define RMINCNT RTC_REG(2) /* RTC min */
  35. #define RHRCNT RTC_REG(3) /* RTC hour */
  36. #define RWKCNT RTC_REG(4) /* RTC week */
  37. #define RDAYCNT RTC_REG(5) /* RTC day */
  38. #define RMONCNT RTC_REG(6) /* RTC month */
  39. #define RYRCNT RTC_REG(7) /* RTC year */
  40. #define RSECAR RTC_REG(8) /* ALARM sec */
  41. #define RMINAR RTC_REG(9) /* ALARM min */
  42. #define RHRAR RTC_REG(10) /* ALARM hour */
  43. #define RWKAR RTC_REG(11) /* ALARM week */
  44. #define RDAYAR RTC_REG(12) /* ALARM day */
  45. #define RMONAR RTC_REG(13) /* ALARM month */
  46. #define RCR1 RTC_REG(14) /* Control */
  47. #define RCR2 RTC_REG(15) /* Control */
  48. /*
  49. * Note on RYRAR and RCR3: Up until this point most of the register
  50. * definitions are consistent across all of the available parts. However,
  51. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  52. * register used to control RYRCNT/RYRAR compare) varies considerably
  53. * across various parts, occasionally being mapped in to a completely
  54. * unrelated address space. For proper RYRAR support a separate resource
  55. * would have to be handed off, but as this is purely optional in
  56. * practice, we simply opt not to support it, thereby keeping the code
  57. * quite a bit more simplified.
  58. */
  59. /* ALARM Bits - or with BCD encoded value */
  60. #define AR_ENB 0x80 /* Enable for alarm cmp */
  61. /* Period Bits */
  62. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  63. #define PF_COUNT 0x200 /* Half periodic counter */
  64. #define PF_OXS 0x400 /* Periodic One x Second */
  65. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  66. #define PF_MASK 0xf00
  67. /* RCR1 Bits */
  68. #define RCR1_CF 0x80 /* Carry Flag */
  69. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  70. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  71. #define RCR1_AF 0x01 /* Alarm Flag */
  72. /* RCR2 Bits */
  73. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  74. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  75. #define RCR2_RTCEN 0x08 /* ENable RTC */
  76. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  77. #define RCR2_RESET 0x02 /* Reset bit */
  78. #define RCR2_START 0x01 /* Start bit */
  79. struct sh_rtc {
  80. void __iomem *regbase;
  81. unsigned long regsize;
  82. struct resource *res;
  83. int alarm_irq;
  84. int periodic_irq;
  85. int carry_irq;
  86. struct rtc_device *rtc_dev;
  87. spinlock_t lock;
  88. unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
  89. unsigned short periodic_freq;
  90. };
  91. static int __sh_rtc_interrupt(struct sh_rtc *rtc)
  92. {
  93. unsigned int tmp, pending;
  94. tmp = readb(rtc->regbase + RCR1);
  95. pending = tmp & RCR1_CF;
  96. tmp &= ~RCR1_CF;
  97. writeb(tmp, rtc->regbase + RCR1);
  98. /* Users have requested One x Second IRQ */
  99. if (pending && rtc->periodic_freq & PF_OXS)
  100. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  101. return pending;
  102. }
  103. static int __sh_rtc_alarm(struct sh_rtc *rtc)
  104. {
  105. unsigned int tmp, pending;
  106. tmp = readb(rtc->regbase + RCR1);
  107. pending = tmp & RCR1_AF;
  108. tmp &= ~(RCR1_AF | RCR1_AIE);
  109. writeb(tmp, rtc->regbase + RCR1);
  110. if (pending)
  111. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  112. return pending;
  113. }
  114. static int __sh_rtc_periodic(struct sh_rtc *rtc)
  115. {
  116. struct rtc_device *rtc_dev = rtc->rtc_dev;
  117. struct rtc_task *irq_task;
  118. unsigned int tmp, pending;
  119. tmp = readb(rtc->regbase + RCR2);
  120. pending = tmp & RCR2_PEF;
  121. tmp &= ~RCR2_PEF;
  122. writeb(tmp, rtc->regbase + RCR2);
  123. if (!pending)
  124. return 0;
  125. /* Half period enabled than one skipped and the next notified */
  126. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  127. rtc->periodic_freq &= ~PF_COUNT;
  128. else {
  129. if (rtc->periodic_freq & PF_HP)
  130. rtc->periodic_freq |= PF_COUNT;
  131. if (rtc->periodic_freq & PF_KOU) {
  132. spin_lock(&rtc_dev->irq_task_lock);
  133. irq_task = rtc_dev->irq_task;
  134. if (irq_task)
  135. irq_task->func(irq_task->private_data);
  136. spin_unlock(&rtc_dev->irq_task_lock);
  137. } else
  138. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  139. }
  140. return pending;
  141. }
  142. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  143. {
  144. struct sh_rtc *rtc = dev_id;
  145. int ret;
  146. spin_lock(&rtc->lock);
  147. ret = __sh_rtc_interrupt(rtc);
  148. spin_unlock(&rtc->lock);
  149. return IRQ_RETVAL(ret);
  150. }
  151. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  152. {
  153. struct sh_rtc *rtc = dev_id;
  154. int ret;
  155. spin_lock(&rtc->lock);
  156. ret = __sh_rtc_alarm(rtc);
  157. spin_unlock(&rtc->lock);
  158. return IRQ_RETVAL(ret);
  159. }
  160. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  161. {
  162. struct sh_rtc *rtc = dev_id;
  163. int ret;
  164. spin_lock(&rtc->lock);
  165. ret = __sh_rtc_periodic(rtc);
  166. spin_unlock(&rtc->lock);
  167. return IRQ_RETVAL(ret);
  168. }
  169. static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
  170. {
  171. struct sh_rtc *rtc = dev_id;
  172. int ret;
  173. spin_lock(&rtc->lock);
  174. ret = __sh_rtc_interrupt(rtc);
  175. ret |= __sh_rtc_alarm(rtc);
  176. ret |= __sh_rtc_periodic(rtc);
  177. spin_unlock(&rtc->lock);
  178. return IRQ_RETVAL(ret);
  179. }
  180. static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
  181. {
  182. struct sh_rtc *rtc = dev_get_drvdata(dev);
  183. unsigned int tmp;
  184. spin_lock_irq(&rtc->lock);
  185. tmp = readb(rtc->regbase + RCR2);
  186. if (enable) {
  187. tmp &= ~RCR2_PEF; /* Clear PES bit */
  188. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  189. } else
  190. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  191. writeb(tmp, rtc->regbase + RCR2);
  192. spin_unlock_irq(&rtc->lock);
  193. }
  194. static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
  195. {
  196. struct sh_rtc *rtc = dev_get_drvdata(dev);
  197. int tmp, ret = 0;
  198. spin_lock_irq(&rtc->lock);
  199. tmp = rtc->periodic_freq & PF_MASK;
  200. switch (freq) {
  201. case 0:
  202. rtc->periodic_freq = 0x00;
  203. break;
  204. case 1:
  205. rtc->periodic_freq = 0x60;
  206. break;
  207. case 2:
  208. rtc->periodic_freq = 0x50;
  209. break;
  210. case 4:
  211. rtc->periodic_freq = 0x40;
  212. break;
  213. case 8:
  214. rtc->periodic_freq = 0x30 | PF_HP;
  215. break;
  216. case 16:
  217. rtc->periodic_freq = 0x30;
  218. break;
  219. case 32:
  220. rtc->periodic_freq = 0x20 | PF_HP;
  221. break;
  222. case 64:
  223. rtc->periodic_freq = 0x20;
  224. break;
  225. case 128:
  226. rtc->periodic_freq = 0x10 | PF_HP;
  227. break;
  228. case 256:
  229. rtc->periodic_freq = 0x10;
  230. break;
  231. default:
  232. ret = -ENOTSUPP;
  233. }
  234. if (ret == 0) {
  235. rtc->periodic_freq |= tmp;
  236. rtc->rtc_dev->irq_freq = freq;
  237. }
  238. spin_unlock_irq(&rtc->lock);
  239. return ret;
  240. }
  241. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  242. {
  243. struct sh_rtc *rtc = dev_get_drvdata(dev);
  244. unsigned int tmp;
  245. spin_lock_irq(&rtc->lock);
  246. tmp = readb(rtc->regbase + RCR1);
  247. if (!enable)
  248. tmp &= ~RCR1_AIE;
  249. else
  250. tmp |= RCR1_AIE;
  251. writeb(tmp, rtc->regbase + RCR1);
  252. spin_unlock_irq(&rtc->lock);
  253. }
  254. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  255. {
  256. struct sh_rtc *rtc = dev_get_drvdata(dev);
  257. unsigned int tmp;
  258. tmp = readb(rtc->regbase + RCR1);
  259. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  260. tmp = readb(rtc->regbase + RCR2);
  261. seq_printf(seq, "periodic_IRQ\t: %s\n",
  262. (tmp & RCR2_PESMASK) ? "yes" : "no");
  263. return 0;
  264. }
  265. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  266. {
  267. struct sh_rtc *rtc = dev_get_drvdata(dev);
  268. unsigned int ret = 0;
  269. switch (cmd) {
  270. case RTC_PIE_OFF:
  271. case RTC_PIE_ON:
  272. sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
  273. break;
  274. case RTC_AIE_OFF:
  275. case RTC_AIE_ON:
  276. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  277. break;
  278. case RTC_UIE_OFF:
  279. rtc->periodic_freq &= ~PF_OXS;
  280. break;
  281. case RTC_UIE_ON:
  282. rtc->periodic_freq |= PF_OXS;
  283. break;
  284. case RTC_IRQP_READ:
  285. ret = put_user(rtc->rtc_dev->irq_freq,
  286. (unsigned long __user *)arg);
  287. break;
  288. case RTC_IRQP_SET:
  289. ret = sh_rtc_setfreq(dev, arg);
  290. break;
  291. default:
  292. ret = -ENOIOCTLCMD;
  293. }
  294. return ret;
  295. }
  296. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  297. {
  298. struct platform_device *pdev = to_platform_device(dev);
  299. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  300. unsigned int sec128, sec2, yr, yr100, cf_bit;
  301. do {
  302. unsigned int tmp;
  303. spin_lock_irq(&rtc->lock);
  304. tmp = readb(rtc->regbase + RCR1);
  305. tmp &= ~RCR1_CF; /* Clear CF-bit */
  306. tmp |= RCR1_CIE;
  307. writeb(tmp, rtc->regbase + RCR1);
  308. sec128 = readb(rtc->regbase + R64CNT);
  309. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  310. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  311. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  312. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  313. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  314. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  315. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  316. yr = readw(rtc->regbase + RYRCNT);
  317. yr100 = bcd2bin(yr >> 8);
  318. yr &= 0xff;
  319. } else {
  320. yr = readb(rtc->regbase + RYRCNT);
  321. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  322. }
  323. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  324. sec2 = readb(rtc->regbase + R64CNT);
  325. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  326. spin_unlock_irq(&rtc->lock);
  327. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  328. #if RTC_BIT_INVERTED != 0
  329. if ((sec128 & RTC_BIT_INVERTED))
  330. tm->tm_sec--;
  331. #endif
  332. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  333. "mday=%d, mon=%d, year=%d, wday=%d\n",
  334. __func__,
  335. tm->tm_sec, tm->tm_min, tm->tm_hour,
  336. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  337. if (rtc_valid_tm(tm) < 0) {
  338. dev_err(dev, "invalid date\n");
  339. rtc_time_to_tm(0, tm);
  340. }
  341. return 0;
  342. }
  343. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  344. {
  345. struct platform_device *pdev = to_platform_device(dev);
  346. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  347. unsigned int tmp;
  348. int year;
  349. spin_lock_irq(&rtc->lock);
  350. /* Reset pre-scaler & stop RTC */
  351. tmp = readb(rtc->regbase + RCR2);
  352. tmp |= RCR2_RESET;
  353. tmp &= ~RCR2_START;
  354. writeb(tmp, rtc->regbase + RCR2);
  355. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  356. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  357. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  358. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  359. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  360. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  361. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  362. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  363. bin2bcd(tm->tm_year % 100);
  364. writew(year, rtc->regbase + RYRCNT);
  365. } else {
  366. year = tm->tm_year % 100;
  367. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  368. }
  369. /* Start RTC */
  370. tmp = readb(rtc->regbase + RCR2);
  371. tmp &= ~RCR2_RESET;
  372. tmp |= RCR2_RTCEN | RCR2_START;
  373. writeb(tmp, rtc->regbase + RCR2);
  374. spin_unlock_irq(&rtc->lock);
  375. return 0;
  376. }
  377. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  378. {
  379. unsigned int byte;
  380. int value = 0xff; /* return 0xff for ignored values */
  381. byte = readb(rtc->regbase + reg_off);
  382. if (byte & AR_ENB) {
  383. byte &= ~AR_ENB; /* strip the enable bit */
  384. value = bcd2bin(byte);
  385. }
  386. return value;
  387. }
  388. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  389. {
  390. struct platform_device *pdev = to_platform_device(dev);
  391. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  392. struct rtc_time *tm = &wkalrm->time;
  393. spin_lock_irq(&rtc->lock);
  394. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  395. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  396. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  397. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  398. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  399. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  400. if (tm->tm_mon > 0)
  401. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  402. tm->tm_year = 0xffff;
  403. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  404. spin_unlock_irq(&rtc->lock);
  405. return 0;
  406. }
  407. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  408. int value, int reg_off)
  409. {
  410. /* < 0 for a value that is ignored */
  411. if (value < 0)
  412. writeb(0, rtc->regbase + reg_off);
  413. else
  414. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  415. }
  416. static int sh_rtc_check_alarm(struct rtc_time *tm)
  417. {
  418. /*
  419. * The original rtc says anything > 0xc0 is "don't care" or "match
  420. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  421. * The original rtc doesn't support years - some things use -1 and
  422. * some 0xffff. We use -1 to make out tests easier.
  423. */
  424. if (tm->tm_year == 0xffff)
  425. tm->tm_year = -1;
  426. if (tm->tm_mon >= 0xff)
  427. tm->tm_mon = -1;
  428. if (tm->tm_mday >= 0xff)
  429. tm->tm_mday = -1;
  430. if (tm->tm_wday >= 0xff)
  431. tm->tm_wday = -1;
  432. if (tm->tm_hour >= 0xff)
  433. tm->tm_hour = -1;
  434. if (tm->tm_min >= 0xff)
  435. tm->tm_min = -1;
  436. if (tm->tm_sec >= 0xff)
  437. tm->tm_sec = -1;
  438. if (tm->tm_year > 9999 ||
  439. tm->tm_mon >= 12 ||
  440. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  441. tm->tm_wday >= 7 ||
  442. tm->tm_hour >= 24 ||
  443. tm->tm_min >= 60 ||
  444. tm->tm_sec >= 60)
  445. return -EINVAL;
  446. return 0;
  447. }
  448. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  449. {
  450. struct platform_device *pdev = to_platform_device(dev);
  451. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  452. unsigned int rcr1;
  453. struct rtc_time *tm = &wkalrm->time;
  454. int mon, err;
  455. err = sh_rtc_check_alarm(tm);
  456. if (unlikely(err < 0))
  457. return err;
  458. spin_lock_irq(&rtc->lock);
  459. /* disable alarm interrupt and clear the alarm flag */
  460. rcr1 = readb(rtc->regbase + RCR1);
  461. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  462. writeb(rcr1, rtc->regbase + RCR1);
  463. /* set alarm time */
  464. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  465. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  466. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  467. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  468. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  469. mon = tm->tm_mon;
  470. if (mon >= 0)
  471. mon += 1;
  472. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  473. if (wkalrm->enabled) {
  474. rcr1 |= RCR1_AIE;
  475. writeb(rcr1, rtc->regbase + RCR1);
  476. }
  477. spin_unlock_irq(&rtc->lock);
  478. return 0;
  479. }
  480. static int sh_rtc_irq_set_state(struct device *dev, int enabled)
  481. {
  482. struct platform_device *pdev = to_platform_device(dev);
  483. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  484. if (enabled) {
  485. rtc->periodic_freq |= PF_KOU;
  486. return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
  487. } else {
  488. rtc->periodic_freq &= ~PF_KOU;
  489. return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
  490. }
  491. }
  492. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  493. {
  494. if (!is_power_of_2(freq))
  495. return -EINVAL;
  496. return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
  497. }
  498. static struct rtc_class_ops sh_rtc_ops = {
  499. .ioctl = sh_rtc_ioctl,
  500. .read_time = sh_rtc_read_time,
  501. .set_time = sh_rtc_set_time,
  502. .read_alarm = sh_rtc_read_alarm,
  503. .set_alarm = sh_rtc_set_alarm,
  504. .irq_set_state = sh_rtc_irq_set_state,
  505. .irq_set_freq = sh_rtc_irq_set_freq,
  506. .proc = sh_rtc_proc,
  507. };
  508. static int __devinit sh_rtc_probe(struct platform_device *pdev)
  509. {
  510. struct sh_rtc *rtc;
  511. struct resource *res;
  512. unsigned int tmp;
  513. int ret;
  514. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  515. if (unlikely(!rtc))
  516. return -ENOMEM;
  517. spin_lock_init(&rtc->lock);
  518. /* get periodic/carry/alarm irqs */
  519. ret = platform_get_irq(pdev, 0);
  520. if (unlikely(ret <= 0)) {
  521. ret = -ENOENT;
  522. dev_err(&pdev->dev, "No IRQ resource\n");
  523. goto err_badres;
  524. }
  525. rtc->periodic_irq = ret;
  526. rtc->carry_irq = platform_get_irq(pdev, 1);
  527. rtc->alarm_irq = platform_get_irq(pdev, 2);
  528. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  529. if (unlikely(res == NULL)) {
  530. ret = -ENOENT;
  531. dev_err(&pdev->dev, "No IO resource\n");
  532. goto err_badres;
  533. }
  534. rtc->regsize = res->end - res->start + 1;
  535. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  536. if (unlikely(!rtc->res)) {
  537. ret = -EBUSY;
  538. goto err_badres;
  539. }
  540. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  541. if (unlikely(!rtc->regbase)) {
  542. ret = -EINVAL;
  543. goto err_badmap;
  544. }
  545. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  546. &sh_rtc_ops, THIS_MODULE);
  547. if (IS_ERR(rtc->rtc_dev)) {
  548. ret = PTR_ERR(rtc->rtc_dev);
  549. goto err_unmap;
  550. }
  551. rtc->capabilities = RTC_DEF_CAPABILITIES;
  552. if (pdev->dev.platform_data) {
  553. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  554. /*
  555. * Some CPUs have special capabilities in addition to the
  556. * default set. Add those in here.
  557. */
  558. rtc->capabilities |= pinfo->capabilities;
  559. }
  560. rtc->rtc_dev->max_user_freq = 256;
  561. rtc->rtc_dev->irq_freq = 1;
  562. rtc->periodic_freq = 0x60;
  563. platform_set_drvdata(pdev, rtc);
  564. if (rtc->carry_irq <= 0) {
  565. /* register shared periodic/carry/alarm irq */
  566. ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
  567. IRQF_DISABLED, "sh-rtc", rtc);
  568. if (unlikely(ret)) {
  569. dev_err(&pdev->dev,
  570. "request IRQ failed with %d, IRQ %d\n", ret,
  571. rtc->periodic_irq);
  572. goto err_unmap;
  573. }
  574. } else {
  575. /* register periodic/carry/alarm irqs */
  576. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic,
  577. IRQF_DISABLED, "sh-rtc period", rtc);
  578. if (unlikely(ret)) {
  579. dev_err(&pdev->dev,
  580. "request period IRQ failed with %d, IRQ %d\n",
  581. ret, rtc->periodic_irq);
  582. goto err_unmap;
  583. }
  584. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt,
  585. IRQF_DISABLED, "sh-rtc carry", rtc);
  586. if (unlikely(ret)) {
  587. dev_err(&pdev->dev,
  588. "request carry IRQ failed with %d, IRQ %d\n",
  589. ret, rtc->carry_irq);
  590. free_irq(rtc->periodic_irq, rtc);
  591. goto err_unmap;
  592. }
  593. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm,
  594. IRQF_DISABLED, "sh-rtc alarm", rtc);
  595. if (unlikely(ret)) {
  596. dev_err(&pdev->dev,
  597. "request alarm IRQ failed with %d, IRQ %d\n",
  598. ret, rtc->alarm_irq);
  599. free_irq(rtc->carry_irq, rtc);
  600. free_irq(rtc->periodic_irq, rtc);
  601. goto err_unmap;
  602. }
  603. }
  604. tmp = readb(rtc->regbase + RCR1);
  605. tmp &= ~RCR1_CF;
  606. tmp |= RCR1_CIE;
  607. writeb(tmp, rtc->regbase + RCR1);
  608. return 0;
  609. err_unmap:
  610. iounmap(rtc->regbase);
  611. err_badmap:
  612. release_resource(rtc->res);
  613. err_badres:
  614. kfree(rtc);
  615. return ret;
  616. }
  617. static int __devexit sh_rtc_remove(struct platform_device *pdev)
  618. {
  619. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  620. if (likely(rtc->rtc_dev))
  621. rtc_device_unregister(rtc->rtc_dev);
  622. sh_rtc_setpie(&pdev->dev, 0);
  623. sh_rtc_setaie(&pdev->dev, 0);
  624. free_irq(rtc->periodic_irq, rtc);
  625. if (rtc->carry_irq > 0) {
  626. free_irq(rtc->carry_irq, rtc);
  627. free_irq(rtc->alarm_irq, rtc);
  628. }
  629. release_resource(rtc->res);
  630. iounmap(rtc->regbase);
  631. platform_set_drvdata(pdev, NULL);
  632. kfree(rtc);
  633. return 0;
  634. }
  635. static struct platform_driver sh_rtc_platform_driver = {
  636. .driver = {
  637. .name = DRV_NAME,
  638. .owner = THIS_MODULE,
  639. },
  640. .probe = sh_rtc_probe,
  641. .remove = __devexit_p(sh_rtc_remove),
  642. };
  643. static int __init sh_rtc_init(void)
  644. {
  645. return platform_driver_register(&sh_rtc_platform_driver);
  646. }
  647. static void __exit sh_rtc_exit(void)
  648. {
  649. platform_driver_unregister(&sh_rtc_platform_driver);
  650. }
  651. module_init(sh_rtc_init);
  652. module_exit(sh_rtc_exit);
  653. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  654. MODULE_VERSION(DRV_VERSION);
  655. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  656. "Jamie Lenehan <lenehan@twibble.org>, "
  657. "Angelo Castello <angelo.castello@st.com>");
  658. MODULE_LICENSE("GPL");
  659. MODULE_ALIAS("platform:" DRV_NAME);