prm_common.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372
  1. /*
  2. * OMAP2+ common Power & Reset Management (PRM) IP block functions
  3. *
  4. * Copyright (C) 2011 Texas Instruments, Inc.
  5. * Tero Kristo <t-kristo@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. *
  12. * For historical purposes, the API used to configure the PRM
  13. * interrupt handler refers to it as the "PRCM interrupt." The
  14. * underlying registers are located in the PRM on OMAP3/4.
  15. *
  16. * XXX This code should eventually be moved to a PRM driver.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/io.h>
  22. #include <linux/irq.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/slab.h>
  25. #include <plat/common.h>
  26. #include <plat/prcm.h>
  27. #include "prm2xxx_3xxx.h"
  28. #include "prm44xx.h"
  29. /*
  30. * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
  31. * XXX this is technically not needed, since
  32. * omap_prcm_register_chain_handler() could allocate this based on the
  33. * actual amount of memory needed for the SoC
  34. */
  35. #define OMAP_PRCM_MAX_NR_PENDING_REG 2
  36. /*
  37. * prcm_irq_chips: an array of all of the "generic IRQ chips" in use
  38. * by the PRCM interrupt handler code. There will be one 'chip' per
  39. * PRM_{IRQSTATUS,IRQENABLE}_MPU register pair. (So OMAP3 will have
  40. * one "chip" and OMAP4 will have two.)
  41. */
  42. static struct irq_chip_generic **prcm_irq_chips;
  43. /*
  44. * prcm_irq_setup: the PRCM IRQ parameters for the hardware the code
  45. * is currently running on. Defined and passed by initialization code
  46. * that calls omap_prcm_register_chain_handler().
  47. */
  48. static struct omap_prcm_irq_setup *prcm_irq_setup;
  49. /*
  50. * prm_ll_data: function pointers to SoC-specific implementations of
  51. * common PRM functions
  52. */
  53. static struct prm_ll_data null_prm_ll_data;
  54. static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
  55. /* Private functions */
  56. /*
  57. * Move priority events from events to priority_events array
  58. */
  59. static void omap_prcm_events_filter_priority(unsigned long *events,
  60. unsigned long *priority_events)
  61. {
  62. int i;
  63. for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
  64. priority_events[i] =
  65. events[i] & prcm_irq_setup->priority_mask[i];
  66. events[i] ^= priority_events[i];
  67. }
  68. }
  69. /*
  70. * PRCM Interrupt Handler
  71. *
  72. * This is a common handler for the OMAP PRCM interrupts. Pending
  73. * interrupts are detected by a call to prcm_pending_events and
  74. * dispatched accordingly. Clearing of the wakeup events should be
  75. * done by the SoC specific individual handlers.
  76. */
  77. static void omap_prcm_irq_handler(unsigned int irq, struct irq_desc *desc)
  78. {
  79. unsigned long pending[OMAP_PRCM_MAX_NR_PENDING_REG];
  80. unsigned long priority_pending[OMAP_PRCM_MAX_NR_PENDING_REG];
  81. struct irq_chip *chip = irq_desc_get_chip(desc);
  82. unsigned int virtirq;
  83. int nr_irq = prcm_irq_setup->nr_regs * 32;
  84. /*
  85. * If we are suspended, mask all interrupts from PRCM level,
  86. * this does not ack them, and they will be pending until we
  87. * re-enable the interrupts, at which point the
  88. * omap_prcm_irq_handler will be executed again. The
  89. * _save_and_clear_irqen() function must ensure that the PRM
  90. * write to disable all IRQs has reached the PRM before
  91. * returning, or spurious PRCM interrupts may occur during
  92. * suspend.
  93. */
  94. if (prcm_irq_setup->suspended) {
  95. prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask);
  96. prcm_irq_setup->suspend_save_flag = true;
  97. }
  98. /*
  99. * Loop until all pending irqs are handled, since
  100. * generic_handle_irq() can cause new irqs to come
  101. */
  102. while (!prcm_irq_setup->suspended) {
  103. prcm_irq_setup->read_pending_irqs(pending);
  104. /* No bit set, then all IRQs are handled */
  105. if (find_first_bit(pending, nr_irq) >= nr_irq)
  106. break;
  107. omap_prcm_events_filter_priority(pending, priority_pending);
  108. /*
  109. * Loop on all currently pending irqs so that new irqs
  110. * cannot starve previously pending irqs
  111. */
  112. /* Serve priority events first */
  113. for_each_set_bit(virtirq, priority_pending, nr_irq)
  114. generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
  115. /* Serve normal events next */
  116. for_each_set_bit(virtirq, pending, nr_irq)
  117. generic_handle_irq(prcm_irq_setup->base_irq + virtirq);
  118. }
  119. if (chip->irq_ack)
  120. chip->irq_ack(&desc->irq_data);
  121. if (chip->irq_eoi)
  122. chip->irq_eoi(&desc->irq_data);
  123. chip->irq_unmask(&desc->irq_data);
  124. prcm_irq_setup->ocp_barrier(); /* avoid spurious IRQs */
  125. }
  126. /* Public functions */
  127. /**
  128. * omap_prcm_event_to_irq - given a PRCM event name, returns the
  129. * corresponding IRQ on which the handler should be registered
  130. * @name: name of the PRCM interrupt bit to look up - see struct omap_prcm_irq
  131. *
  132. * Returns the Linux internal IRQ ID corresponding to @name upon success,
  133. * or -ENOENT upon failure.
  134. */
  135. int omap_prcm_event_to_irq(const char *name)
  136. {
  137. int i;
  138. if (!prcm_irq_setup || !name)
  139. return -ENOENT;
  140. for (i = 0; i < prcm_irq_setup->nr_irqs; i++)
  141. if (!strcmp(prcm_irq_setup->irqs[i].name, name))
  142. return prcm_irq_setup->base_irq +
  143. prcm_irq_setup->irqs[i].offset;
  144. return -ENOENT;
  145. }
  146. /**
  147. * omap_prcm_irq_cleanup - reverses memory allocated and other steps
  148. * done by omap_prcm_register_chain_handler()
  149. *
  150. * No return value.
  151. */
  152. void omap_prcm_irq_cleanup(void)
  153. {
  154. int i;
  155. if (!prcm_irq_setup) {
  156. pr_err("PRCM: IRQ handler not initialized; cannot cleanup\n");
  157. return;
  158. }
  159. if (prcm_irq_chips) {
  160. for (i = 0; i < prcm_irq_setup->nr_regs; i++) {
  161. if (prcm_irq_chips[i])
  162. irq_remove_generic_chip(prcm_irq_chips[i],
  163. 0xffffffff, 0, 0);
  164. prcm_irq_chips[i] = NULL;
  165. }
  166. kfree(prcm_irq_chips);
  167. prcm_irq_chips = NULL;
  168. }
  169. kfree(prcm_irq_setup->saved_mask);
  170. prcm_irq_setup->saved_mask = NULL;
  171. kfree(prcm_irq_setup->priority_mask);
  172. prcm_irq_setup->priority_mask = NULL;
  173. irq_set_chained_handler(prcm_irq_setup->irq, NULL);
  174. if (prcm_irq_setup->base_irq > 0)
  175. irq_free_descs(prcm_irq_setup->base_irq,
  176. prcm_irq_setup->nr_regs * 32);
  177. prcm_irq_setup->base_irq = 0;
  178. }
  179. void omap_prcm_irq_prepare(void)
  180. {
  181. prcm_irq_setup->suspended = true;
  182. }
  183. void omap_prcm_irq_complete(void)
  184. {
  185. prcm_irq_setup->suspended = false;
  186. /* If we have not saved the masks, do not attempt to restore */
  187. if (!prcm_irq_setup->suspend_save_flag)
  188. return;
  189. prcm_irq_setup->suspend_save_flag = false;
  190. /*
  191. * Re-enable all masked PRCM irq sources, this causes the PRCM
  192. * interrupt to fire immediately if the events were masked
  193. * previously in the chain handler
  194. */
  195. prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask);
  196. }
  197. /**
  198. * omap_prcm_register_chain_handler - initializes the prcm chained interrupt
  199. * handler based on provided parameters
  200. * @irq_setup: hardware data about the underlying PRM/PRCM
  201. *
  202. * Set up the PRCM chained interrupt handler on the PRCM IRQ. Sets up
  203. * one generic IRQ chip per PRM interrupt status/enable register pair.
  204. * Returns 0 upon success, -EINVAL if called twice or if invalid
  205. * arguments are passed, or -ENOMEM on any other error.
  206. */
  207. int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
  208. {
  209. int nr_regs;
  210. u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG];
  211. int offset, i;
  212. struct irq_chip_generic *gc;
  213. struct irq_chip_type *ct;
  214. if (!irq_setup)
  215. return -EINVAL;
  216. nr_regs = irq_setup->nr_regs;
  217. if (prcm_irq_setup) {
  218. pr_err("PRCM: already initialized; won't reinitialize\n");
  219. return -EINVAL;
  220. }
  221. if (nr_regs > OMAP_PRCM_MAX_NR_PENDING_REG) {
  222. pr_err("PRCM: nr_regs too large\n");
  223. return -EINVAL;
  224. }
  225. prcm_irq_setup = irq_setup;
  226. prcm_irq_chips = kzalloc(sizeof(void *) * nr_regs, GFP_KERNEL);
  227. prcm_irq_setup->saved_mask = kzalloc(sizeof(u32) * nr_regs, GFP_KERNEL);
  228. prcm_irq_setup->priority_mask = kzalloc(sizeof(u32) * nr_regs,
  229. GFP_KERNEL);
  230. if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
  231. !prcm_irq_setup->priority_mask) {
  232. pr_err("PRCM: kzalloc failed\n");
  233. goto err;
  234. }
  235. memset(mask, 0, sizeof(mask));
  236. for (i = 0; i < irq_setup->nr_irqs; i++) {
  237. offset = irq_setup->irqs[i].offset;
  238. mask[offset >> 5] |= 1 << (offset & 0x1f);
  239. if (irq_setup->irqs[i].priority)
  240. irq_setup->priority_mask[offset >> 5] |=
  241. 1 << (offset & 0x1f);
  242. }
  243. irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler);
  244. irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32,
  245. 0);
  246. if (irq_setup->base_irq < 0) {
  247. pr_err("PRCM: failed to allocate irq descs: %d\n",
  248. irq_setup->base_irq);
  249. goto err;
  250. }
  251. for (i = 0; i < irq_setup->nr_regs; i++) {
  252. gc = irq_alloc_generic_chip("PRCM", 1,
  253. irq_setup->base_irq + i * 32, prm_base,
  254. handle_level_irq);
  255. if (!gc) {
  256. pr_err("PRCM: failed to allocate generic chip\n");
  257. goto err;
  258. }
  259. ct = gc->chip_types;
  260. ct->chip.irq_ack = irq_gc_ack_set_bit;
  261. ct->chip.irq_mask = irq_gc_mask_clr_bit;
  262. ct->chip.irq_unmask = irq_gc_mask_set_bit;
  263. ct->regs.ack = irq_setup->ack + i * 4;
  264. ct->regs.mask = irq_setup->mask + i * 4;
  265. irq_setup_generic_chip(gc, mask[i], 0, IRQ_NOREQUEST, 0);
  266. prcm_irq_chips[i] = gc;
  267. }
  268. return 0;
  269. err:
  270. omap_prcm_irq_cleanup();
  271. return -ENOMEM;
  272. }
  273. /**
  274. * prm_register - register per-SoC low-level data with the PRM
  275. * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  276. *
  277. * Register per-SoC low-level OMAP PRM data and function pointers with
  278. * the OMAP PRM common interface. The caller must keep the data
  279. * pointed to by @pld valid until it calls prm_unregister() and
  280. * it returns successfully. Returns 0 upon success, -EINVAL if @pld
  281. * is NULL, or -EEXIST if prm_register() has already been called
  282. * without an intervening prm_unregister().
  283. */
  284. int prm_register(struct prm_ll_data *pld)
  285. {
  286. if (!pld)
  287. return -EINVAL;
  288. if (prm_ll_data != &null_prm_ll_data)
  289. return -EEXIST;
  290. prm_ll_data = pld;
  291. return 0;
  292. }
  293. /**
  294. * prm_unregister - unregister per-SoC low-level data & function pointers
  295. * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
  296. *
  297. * Unregister per-SoC low-level OMAP PRM data and function pointers
  298. * that were previously registered with prm_register(). The
  299. * caller may not destroy any of the data pointed to by @pld until
  300. * this function returns successfully. Returns 0 upon success, or
  301. * -EINVAL if @pld is NULL or if @pld does not match the struct
  302. * prm_ll_data * previously registered by prm_register().
  303. */
  304. int prm_unregister(struct prm_ll_data *pld)
  305. {
  306. if (!pld || prm_ll_data != pld)
  307. return -EINVAL;
  308. prm_ll_data = &null_prm_ll_data;
  309. return 0;
  310. }