libata-core.c 123 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. static unsigned int ata_dev_init_params(struct ata_port *ap,
  62. struct ata_device *dev,
  63. u16 heads,
  64. u16 sectors);
  65. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  66. struct ata_device *dev);
  67. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
  68. static unsigned int ata_unique_id = 1;
  69. static struct workqueue_struct *ata_wq;
  70. int atapi_enabled = 1;
  71. module_param(atapi_enabled, int, 0444);
  72. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  73. int atapi_dmadir = 0;
  74. module_param(atapi_dmadir, int, 0444);
  75. MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
  76. int libata_fua = 0;
  77. module_param_named(fua, libata_fua, int, 0444);
  78. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  79. MODULE_AUTHOR("Jeff Garzik");
  80. MODULE_DESCRIPTION("Library module for ATA devices");
  81. MODULE_LICENSE("GPL");
  82. MODULE_VERSION(DRV_VERSION);
  83. /**
  84. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  85. * @tf: Taskfile to convert
  86. * @fis: Buffer into which data will output
  87. * @pmp: Port multiplier port
  88. *
  89. * Converts a standard ATA taskfile to a Serial ATA
  90. * FIS structure (Register - Host to Device).
  91. *
  92. * LOCKING:
  93. * Inherited from caller.
  94. */
  95. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  96. {
  97. fis[0] = 0x27; /* Register - Host to Device FIS */
  98. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  99. bit 7 indicates Command FIS */
  100. fis[2] = tf->command;
  101. fis[3] = tf->feature;
  102. fis[4] = tf->lbal;
  103. fis[5] = tf->lbam;
  104. fis[6] = tf->lbah;
  105. fis[7] = tf->device;
  106. fis[8] = tf->hob_lbal;
  107. fis[9] = tf->hob_lbam;
  108. fis[10] = tf->hob_lbah;
  109. fis[11] = tf->hob_feature;
  110. fis[12] = tf->nsect;
  111. fis[13] = tf->hob_nsect;
  112. fis[14] = 0;
  113. fis[15] = tf->ctl;
  114. fis[16] = 0;
  115. fis[17] = 0;
  116. fis[18] = 0;
  117. fis[19] = 0;
  118. }
  119. /**
  120. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  121. * @fis: Buffer from which data will be input
  122. * @tf: Taskfile to output
  123. *
  124. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  125. *
  126. * LOCKING:
  127. * Inherited from caller.
  128. */
  129. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  130. {
  131. tf->command = fis[2]; /* status */
  132. tf->feature = fis[3]; /* error */
  133. tf->lbal = fis[4];
  134. tf->lbam = fis[5];
  135. tf->lbah = fis[6];
  136. tf->device = fis[7];
  137. tf->hob_lbal = fis[8];
  138. tf->hob_lbam = fis[9];
  139. tf->hob_lbah = fis[10];
  140. tf->nsect = fis[12];
  141. tf->hob_nsect = fis[13];
  142. }
  143. static const u8 ata_rw_cmds[] = {
  144. /* pio multi */
  145. ATA_CMD_READ_MULTI,
  146. ATA_CMD_WRITE_MULTI,
  147. ATA_CMD_READ_MULTI_EXT,
  148. ATA_CMD_WRITE_MULTI_EXT,
  149. 0,
  150. 0,
  151. 0,
  152. ATA_CMD_WRITE_MULTI_FUA_EXT,
  153. /* pio */
  154. ATA_CMD_PIO_READ,
  155. ATA_CMD_PIO_WRITE,
  156. ATA_CMD_PIO_READ_EXT,
  157. ATA_CMD_PIO_WRITE_EXT,
  158. 0,
  159. 0,
  160. 0,
  161. 0,
  162. /* dma */
  163. ATA_CMD_READ,
  164. ATA_CMD_WRITE,
  165. ATA_CMD_READ_EXT,
  166. ATA_CMD_WRITE_EXT,
  167. 0,
  168. 0,
  169. 0,
  170. ATA_CMD_WRITE_FUA_EXT
  171. };
  172. /**
  173. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  174. * @qc: command to examine and configure
  175. *
  176. * Examine the device configuration and tf->flags to calculate
  177. * the proper read/write commands and protocol to use.
  178. *
  179. * LOCKING:
  180. * caller.
  181. */
  182. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  183. {
  184. struct ata_taskfile *tf = &qc->tf;
  185. struct ata_device *dev = qc->dev;
  186. u8 cmd;
  187. int index, fua, lba48, write;
  188. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  189. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  190. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  191. if (dev->flags & ATA_DFLAG_PIO) {
  192. tf->protocol = ATA_PROT_PIO;
  193. index = dev->multi_count ? 0 : 8;
  194. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  195. /* Unable to use DMA due to host limitation */
  196. tf->protocol = ATA_PROT_PIO;
  197. index = dev->multi_count ? 0 : 8;
  198. } else {
  199. tf->protocol = ATA_PROT_DMA;
  200. index = 16;
  201. }
  202. cmd = ata_rw_cmds[index + fua + lba48 + write];
  203. if (cmd) {
  204. tf->command = cmd;
  205. return 0;
  206. }
  207. return -1;
  208. }
  209. /**
  210. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  211. * @pio_mask: pio_mask
  212. * @mwdma_mask: mwdma_mask
  213. * @udma_mask: udma_mask
  214. *
  215. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  216. * unsigned int xfer_mask.
  217. *
  218. * LOCKING:
  219. * None.
  220. *
  221. * RETURNS:
  222. * Packed xfer_mask.
  223. */
  224. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  225. unsigned int mwdma_mask,
  226. unsigned int udma_mask)
  227. {
  228. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  229. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  230. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  231. }
  232. /**
  233. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  234. * @xfer_mask: xfer_mask to unpack
  235. * @pio_mask: resulting pio_mask
  236. * @mwdma_mask: resulting mwdma_mask
  237. * @udma_mask: resulting udma_mask
  238. *
  239. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  240. * Any NULL distination masks will be ignored.
  241. */
  242. static void ata_unpack_xfermask(unsigned int xfer_mask,
  243. unsigned int *pio_mask,
  244. unsigned int *mwdma_mask,
  245. unsigned int *udma_mask)
  246. {
  247. if (pio_mask)
  248. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  249. if (mwdma_mask)
  250. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  251. if (udma_mask)
  252. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  253. }
  254. static const struct ata_xfer_ent {
  255. int shift, bits;
  256. u8 base;
  257. } ata_xfer_tbl[] = {
  258. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  259. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  260. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  261. { -1, },
  262. };
  263. /**
  264. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  265. * @xfer_mask: xfer_mask of interest
  266. *
  267. * Return matching XFER_* value for @xfer_mask. Only the highest
  268. * bit of @xfer_mask is considered.
  269. *
  270. * LOCKING:
  271. * None.
  272. *
  273. * RETURNS:
  274. * Matching XFER_* value, 0 if no match found.
  275. */
  276. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  277. {
  278. int highbit = fls(xfer_mask) - 1;
  279. const struct ata_xfer_ent *ent;
  280. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  281. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  282. return ent->base + highbit - ent->shift;
  283. return 0;
  284. }
  285. /**
  286. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  287. * @xfer_mode: XFER_* of interest
  288. *
  289. * Return matching xfer_mask for @xfer_mode.
  290. *
  291. * LOCKING:
  292. * None.
  293. *
  294. * RETURNS:
  295. * Matching xfer_mask, 0 if no match found.
  296. */
  297. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  298. {
  299. const struct ata_xfer_ent *ent;
  300. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  301. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  302. return 1 << (ent->shift + xfer_mode - ent->base);
  303. return 0;
  304. }
  305. /**
  306. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  307. * @xfer_mode: XFER_* of interest
  308. *
  309. * Return matching xfer_shift for @xfer_mode.
  310. *
  311. * LOCKING:
  312. * None.
  313. *
  314. * RETURNS:
  315. * Matching xfer_shift, -1 if no match found.
  316. */
  317. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  318. {
  319. const struct ata_xfer_ent *ent;
  320. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  321. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  322. return ent->shift;
  323. return -1;
  324. }
  325. /**
  326. * ata_mode_string - convert xfer_mask to string
  327. * @xfer_mask: mask of bits supported; only highest bit counts.
  328. *
  329. * Determine string which represents the highest speed
  330. * (highest bit in @modemask).
  331. *
  332. * LOCKING:
  333. * None.
  334. *
  335. * RETURNS:
  336. * Constant C string representing highest speed listed in
  337. * @mode_mask, or the constant C string "<n/a>".
  338. */
  339. static const char *ata_mode_string(unsigned int xfer_mask)
  340. {
  341. static const char * const xfer_mode_str[] = {
  342. "PIO0",
  343. "PIO1",
  344. "PIO2",
  345. "PIO3",
  346. "PIO4",
  347. "MWDMA0",
  348. "MWDMA1",
  349. "MWDMA2",
  350. "UDMA/16",
  351. "UDMA/25",
  352. "UDMA/33",
  353. "UDMA/44",
  354. "UDMA/66",
  355. "UDMA/100",
  356. "UDMA/133",
  357. "UDMA7",
  358. };
  359. int highbit;
  360. highbit = fls(xfer_mask) - 1;
  361. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  362. return xfer_mode_str[highbit];
  363. return "<n/a>";
  364. }
  365. static const char *sata_spd_string(unsigned int spd)
  366. {
  367. static const char * const spd_str[] = {
  368. "1.5 Gbps",
  369. "3.0 Gbps",
  370. };
  371. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  372. return "<unknown>";
  373. return spd_str[spd - 1];
  374. }
  375. void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
  376. {
  377. if (ata_dev_enabled(dev)) {
  378. printk(KERN_WARNING "ata%u: dev %u disabled\n",
  379. ap->id, dev->devno);
  380. dev->class++;
  381. }
  382. }
  383. /**
  384. * ata_pio_devchk - PATA device presence detection
  385. * @ap: ATA channel to examine
  386. * @device: Device to examine (starting at zero)
  387. *
  388. * This technique was originally described in
  389. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  390. * later found its way into the ATA/ATAPI spec.
  391. *
  392. * Write a pattern to the ATA shadow registers,
  393. * and if a device is present, it will respond by
  394. * correctly storing and echoing back the
  395. * ATA shadow register contents.
  396. *
  397. * LOCKING:
  398. * caller.
  399. */
  400. static unsigned int ata_pio_devchk(struct ata_port *ap,
  401. unsigned int device)
  402. {
  403. struct ata_ioports *ioaddr = &ap->ioaddr;
  404. u8 nsect, lbal;
  405. ap->ops->dev_select(ap, device);
  406. outb(0x55, ioaddr->nsect_addr);
  407. outb(0xaa, ioaddr->lbal_addr);
  408. outb(0xaa, ioaddr->nsect_addr);
  409. outb(0x55, ioaddr->lbal_addr);
  410. outb(0x55, ioaddr->nsect_addr);
  411. outb(0xaa, ioaddr->lbal_addr);
  412. nsect = inb(ioaddr->nsect_addr);
  413. lbal = inb(ioaddr->lbal_addr);
  414. if ((nsect == 0x55) && (lbal == 0xaa))
  415. return 1; /* we found a device */
  416. return 0; /* nothing found */
  417. }
  418. /**
  419. * ata_mmio_devchk - PATA device presence detection
  420. * @ap: ATA channel to examine
  421. * @device: Device to examine (starting at zero)
  422. *
  423. * This technique was originally described in
  424. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  425. * later found its way into the ATA/ATAPI spec.
  426. *
  427. * Write a pattern to the ATA shadow registers,
  428. * and if a device is present, it will respond by
  429. * correctly storing and echoing back the
  430. * ATA shadow register contents.
  431. *
  432. * LOCKING:
  433. * caller.
  434. */
  435. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  436. unsigned int device)
  437. {
  438. struct ata_ioports *ioaddr = &ap->ioaddr;
  439. u8 nsect, lbal;
  440. ap->ops->dev_select(ap, device);
  441. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  442. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  443. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  444. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  445. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  446. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  447. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  448. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  449. if ((nsect == 0x55) && (lbal == 0xaa))
  450. return 1; /* we found a device */
  451. return 0; /* nothing found */
  452. }
  453. /**
  454. * ata_devchk - PATA device presence detection
  455. * @ap: ATA channel to examine
  456. * @device: Device to examine (starting at zero)
  457. *
  458. * Dispatch ATA device presence detection, depending
  459. * on whether we are using PIO or MMIO to talk to the
  460. * ATA shadow registers.
  461. *
  462. * LOCKING:
  463. * caller.
  464. */
  465. static unsigned int ata_devchk(struct ata_port *ap,
  466. unsigned int device)
  467. {
  468. if (ap->flags & ATA_FLAG_MMIO)
  469. return ata_mmio_devchk(ap, device);
  470. return ata_pio_devchk(ap, device);
  471. }
  472. /**
  473. * ata_dev_classify - determine device type based on ATA-spec signature
  474. * @tf: ATA taskfile register set for device to be identified
  475. *
  476. * Determine from taskfile register contents whether a device is
  477. * ATA or ATAPI, as per "Signature and persistence" section
  478. * of ATA/PI spec (volume 1, sect 5.14).
  479. *
  480. * LOCKING:
  481. * None.
  482. *
  483. * RETURNS:
  484. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  485. * the event of failure.
  486. */
  487. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  488. {
  489. /* Apple's open source Darwin code hints that some devices only
  490. * put a proper signature into the LBA mid/high registers,
  491. * So, we only check those. It's sufficient for uniqueness.
  492. */
  493. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  494. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  495. DPRINTK("found ATA device by sig\n");
  496. return ATA_DEV_ATA;
  497. }
  498. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  499. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  500. DPRINTK("found ATAPI device by sig\n");
  501. return ATA_DEV_ATAPI;
  502. }
  503. DPRINTK("unknown device\n");
  504. return ATA_DEV_UNKNOWN;
  505. }
  506. /**
  507. * ata_dev_try_classify - Parse returned ATA device signature
  508. * @ap: ATA channel to examine
  509. * @device: Device to examine (starting at zero)
  510. * @r_err: Value of error register on completion
  511. *
  512. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  513. * an ATA/ATAPI-defined set of values is placed in the ATA
  514. * shadow registers, indicating the results of device detection
  515. * and diagnostics.
  516. *
  517. * Select the ATA device, and read the values from the ATA shadow
  518. * registers. Then parse according to the Error register value,
  519. * and the spec-defined values examined by ata_dev_classify().
  520. *
  521. * LOCKING:
  522. * caller.
  523. *
  524. * RETURNS:
  525. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  526. */
  527. static unsigned int
  528. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  529. {
  530. struct ata_taskfile tf;
  531. unsigned int class;
  532. u8 err;
  533. ap->ops->dev_select(ap, device);
  534. memset(&tf, 0, sizeof(tf));
  535. ap->ops->tf_read(ap, &tf);
  536. err = tf.feature;
  537. if (r_err)
  538. *r_err = err;
  539. /* see if device passed diags */
  540. if (err == 1)
  541. /* do nothing */ ;
  542. else if ((device == 0) && (err == 0x81))
  543. /* do nothing */ ;
  544. else
  545. return ATA_DEV_NONE;
  546. /* determine if device is ATA or ATAPI */
  547. class = ata_dev_classify(&tf);
  548. if (class == ATA_DEV_UNKNOWN)
  549. return ATA_DEV_NONE;
  550. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  551. return ATA_DEV_NONE;
  552. return class;
  553. }
  554. /**
  555. * ata_id_string - Convert IDENTIFY DEVICE page into string
  556. * @id: IDENTIFY DEVICE results we will examine
  557. * @s: string into which data is output
  558. * @ofs: offset into identify device page
  559. * @len: length of string to return. must be an even number.
  560. *
  561. * The strings in the IDENTIFY DEVICE page are broken up into
  562. * 16-bit chunks. Run through the string, and output each
  563. * 8-bit chunk linearly, regardless of platform.
  564. *
  565. * LOCKING:
  566. * caller.
  567. */
  568. void ata_id_string(const u16 *id, unsigned char *s,
  569. unsigned int ofs, unsigned int len)
  570. {
  571. unsigned int c;
  572. while (len > 0) {
  573. c = id[ofs] >> 8;
  574. *s = c;
  575. s++;
  576. c = id[ofs] & 0xff;
  577. *s = c;
  578. s++;
  579. ofs++;
  580. len -= 2;
  581. }
  582. }
  583. /**
  584. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  585. * @id: IDENTIFY DEVICE results we will examine
  586. * @s: string into which data is output
  587. * @ofs: offset into identify device page
  588. * @len: length of string to return. must be an odd number.
  589. *
  590. * This function is identical to ata_id_string except that it
  591. * trims trailing spaces and terminates the resulting string with
  592. * null. @len must be actual maximum length (even number) + 1.
  593. *
  594. * LOCKING:
  595. * caller.
  596. */
  597. void ata_id_c_string(const u16 *id, unsigned char *s,
  598. unsigned int ofs, unsigned int len)
  599. {
  600. unsigned char *p;
  601. WARN_ON(!(len & 1));
  602. ata_id_string(id, s, ofs, len - 1);
  603. p = s + strnlen(s, len - 1);
  604. while (p > s && p[-1] == ' ')
  605. p--;
  606. *p = '\0';
  607. }
  608. static u64 ata_id_n_sectors(const u16 *id)
  609. {
  610. if (ata_id_has_lba(id)) {
  611. if (ata_id_has_lba48(id))
  612. return ata_id_u64(id, 100);
  613. else
  614. return ata_id_u32(id, 60);
  615. } else {
  616. if (ata_id_current_chs_valid(id))
  617. return ata_id_u32(id, 57);
  618. else
  619. return id[1] * id[3] * id[6];
  620. }
  621. }
  622. /**
  623. * ata_noop_dev_select - Select device 0/1 on ATA bus
  624. * @ap: ATA channel to manipulate
  625. * @device: ATA device (numbered from zero) to select
  626. *
  627. * This function performs no actual function.
  628. *
  629. * May be used as the dev_select() entry in ata_port_operations.
  630. *
  631. * LOCKING:
  632. * caller.
  633. */
  634. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  635. {
  636. }
  637. /**
  638. * ata_std_dev_select - Select device 0/1 on ATA bus
  639. * @ap: ATA channel to manipulate
  640. * @device: ATA device (numbered from zero) to select
  641. *
  642. * Use the method defined in the ATA specification to
  643. * make either device 0, or device 1, active on the
  644. * ATA channel. Works with both PIO and MMIO.
  645. *
  646. * May be used as the dev_select() entry in ata_port_operations.
  647. *
  648. * LOCKING:
  649. * caller.
  650. */
  651. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  652. {
  653. u8 tmp;
  654. if (device == 0)
  655. tmp = ATA_DEVICE_OBS;
  656. else
  657. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  658. if (ap->flags & ATA_FLAG_MMIO) {
  659. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  660. } else {
  661. outb(tmp, ap->ioaddr.device_addr);
  662. }
  663. ata_pause(ap); /* needed; also flushes, for mmio */
  664. }
  665. /**
  666. * ata_dev_select - Select device 0/1 on ATA bus
  667. * @ap: ATA channel to manipulate
  668. * @device: ATA device (numbered from zero) to select
  669. * @wait: non-zero to wait for Status register BSY bit to clear
  670. * @can_sleep: non-zero if context allows sleeping
  671. *
  672. * Use the method defined in the ATA specification to
  673. * make either device 0, or device 1, active on the
  674. * ATA channel.
  675. *
  676. * This is a high-level version of ata_std_dev_select(),
  677. * which additionally provides the services of inserting
  678. * the proper pauses and status polling, where needed.
  679. *
  680. * LOCKING:
  681. * caller.
  682. */
  683. void ata_dev_select(struct ata_port *ap, unsigned int device,
  684. unsigned int wait, unsigned int can_sleep)
  685. {
  686. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  687. ap->id, device, wait);
  688. if (wait)
  689. ata_wait_idle(ap);
  690. ap->ops->dev_select(ap, device);
  691. if (wait) {
  692. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  693. msleep(150);
  694. ata_wait_idle(ap);
  695. }
  696. }
  697. /**
  698. * ata_dump_id - IDENTIFY DEVICE info debugging output
  699. * @id: IDENTIFY DEVICE page to dump
  700. *
  701. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  702. * page.
  703. *
  704. * LOCKING:
  705. * caller.
  706. */
  707. static inline void ata_dump_id(const u16 *id)
  708. {
  709. DPRINTK("49==0x%04x "
  710. "53==0x%04x "
  711. "63==0x%04x "
  712. "64==0x%04x "
  713. "75==0x%04x \n",
  714. id[49],
  715. id[53],
  716. id[63],
  717. id[64],
  718. id[75]);
  719. DPRINTK("80==0x%04x "
  720. "81==0x%04x "
  721. "82==0x%04x "
  722. "83==0x%04x "
  723. "84==0x%04x \n",
  724. id[80],
  725. id[81],
  726. id[82],
  727. id[83],
  728. id[84]);
  729. DPRINTK("88==0x%04x "
  730. "93==0x%04x\n",
  731. id[88],
  732. id[93]);
  733. }
  734. /**
  735. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  736. * @id: IDENTIFY data to compute xfer mask from
  737. *
  738. * Compute the xfermask for this device. This is not as trivial
  739. * as it seems if we must consider early devices correctly.
  740. *
  741. * FIXME: pre IDE drive timing (do we care ?).
  742. *
  743. * LOCKING:
  744. * None.
  745. *
  746. * RETURNS:
  747. * Computed xfermask
  748. */
  749. static unsigned int ata_id_xfermask(const u16 *id)
  750. {
  751. unsigned int pio_mask, mwdma_mask, udma_mask;
  752. /* Usual case. Word 53 indicates word 64 is valid */
  753. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  754. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  755. pio_mask <<= 3;
  756. pio_mask |= 0x7;
  757. } else {
  758. /* If word 64 isn't valid then Word 51 high byte holds
  759. * the PIO timing number for the maximum. Turn it into
  760. * a mask.
  761. */
  762. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  763. /* But wait.. there's more. Design your standards by
  764. * committee and you too can get a free iordy field to
  765. * process. However its the speeds not the modes that
  766. * are supported... Note drivers using the timing API
  767. * will get this right anyway
  768. */
  769. }
  770. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  771. udma_mask = 0;
  772. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  773. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  774. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  775. }
  776. /**
  777. * ata_port_queue_task - Queue port_task
  778. * @ap: The ata_port to queue port_task for
  779. *
  780. * Schedule @fn(@data) for execution after @delay jiffies using
  781. * port_task. There is one port_task per port and it's the
  782. * user(low level driver)'s responsibility to make sure that only
  783. * one task is active at any given time.
  784. *
  785. * libata core layer takes care of synchronization between
  786. * port_task and EH. ata_port_queue_task() may be ignored for EH
  787. * synchronization.
  788. *
  789. * LOCKING:
  790. * Inherited from caller.
  791. */
  792. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  793. unsigned long delay)
  794. {
  795. int rc;
  796. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  797. return;
  798. PREPARE_WORK(&ap->port_task, fn, data);
  799. if (!delay)
  800. rc = queue_work(ata_wq, &ap->port_task);
  801. else
  802. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  803. /* rc == 0 means that another user is using port task */
  804. WARN_ON(rc == 0);
  805. }
  806. /**
  807. * ata_port_flush_task - Flush port_task
  808. * @ap: The ata_port to flush port_task for
  809. *
  810. * After this function completes, port_task is guranteed not to
  811. * be running or scheduled.
  812. *
  813. * LOCKING:
  814. * Kernel thread context (may sleep)
  815. */
  816. void ata_port_flush_task(struct ata_port *ap)
  817. {
  818. unsigned long flags;
  819. DPRINTK("ENTER\n");
  820. spin_lock_irqsave(&ap->host_set->lock, flags);
  821. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  822. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  823. DPRINTK("flush #1\n");
  824. flush_workqueue(ata_wq);
  825. /*
  826. * At this point, if a task is running, it's guaranteed to see
  827. * the FLUSH flag; thus, it will never queue pio tasks again.
  828. * Cancel and flush.
  829. */
  830. if (!cancel_delayed_work(&ap->port_task)) {
  831. DPRINTK("flush #2\n");
  832. flush_workqueue(ata_wq);
  833. }
  834. spin_lock_irqsave(&ap->host_set->lock, flags);
  835. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  836. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  837. DPRINTK("EXIT\n");
  838. }
  839. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  840. {
  841. struct completion *waiting = qc->private_data;
  842. qc->ap->ops->tf_read(qc->ap, &qc->tf);
  843. complete(waiting);
  844. }
  845. /**
  846. * ata_exec_internal - execute libata internal command
  847. * @ap: Port to which the command is sent
  848. * @dev: Device to which the command is sent
  849. * @tf: Taskfile registers for the command and the result
  850. * @cdb: CDB for packet command
  851. * @dma_dir: Data tranfer direction of the command
  852. * @buf: Data buffer of the command
  853. * @buflen: Length of data buffer
  854. *
  855. * Executes libata internal command with timeout. @tf contains
  856. * command on entry and result on return. Timeout and error
  857. * conditions are reported via return value. No recovery action
  858. * is taken after a command times out. It's caller's duty to
  859. * clean up after timeout.
  860. *
  861. * LOCKING:
  862. * None. Should be called with kernel context, might sleep.
  863. */
  864. unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
  865. struct ata_taskfile *tf, const u8 *cdb,
  866. int dma_dir, void *buf, unsigned int buflen)
  867. {
  868. u8 command = tf->command;
  869. struct ata_queued_cmd *qc;
  870. DECLARE_COMPLETION(wait);
  871. unsigned long flags;
  872. unsigned int err_mask;
  873. spin_lock_irqsave(&ap->host_set->lock, flags);
  874. qc = ata_qc_new_init(ap, dev);
  875. BUG_ON(qc == NULL);
  876. qc->tf = *tf;
  877. if (cdb)
  878. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  879. qc->dma_dir = dma_dir;
  880. if (dma_dir != DMA_NONE) {
  881. ata_sg_init_one(qc, buf, buflen);
  882. qc->nsect = buflen / ATA_SECT_SIZE;
  883. }
  884. qc->private_data = &wait;
  885. qc->complete_fn = ata_qc_complete_internal;
  886. ata_qc_issue(qc);
  887. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  888. if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
  889. ata_port_flush_task(ap);
  890. spin_lock_irqsave(&ap->host_set->lock, flags);
  891. /* We're racing with irq here. If we lose, the
  892. * following test prevents us from completing the qc
  893. * again. If completion irq occurs after here but
  894. * before the caller cleans up, it will result in a
  895. * spurious interrupt. We can live with that.
  896. */
  897. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  898. qc->err_mask = AC_ERR_TIMEOUT;
  899. ata_qc_complete(qc);
  900. printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
  901. ap->id, command);
  902. }
  903. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  904. }
  905. *tf = qc->tf;
  906. err_mask = qc->err_mask;
  907. ata_qc_free(qc);
  908. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  909. * Until those drivers are fixed, we detect the condition
  910. * here, fail the command with AC_ERR_SYSTEM and reenable the
  911. * port.
  912. *
  913. * Note that this doesn't change any behavior as internal
  914. * command failure results in disabling the device in the
  915. * higher layer for LLDDs without new reset/EH callbacks.
  916. *
  917. * Kill the following code as soon as those drivers are fixed.
  918. */
  919. if (ap->flags & ATA_FLAG_DISABLED) {
  920. err_mask |= AC_ERR_SYSTEM;
  921. ata_port_probe(ap);
  922. }
  923. return err_mask;
  924. }
  925. /**
  926. * ata_pio_need_iordy - check if iordy needed
  927. * @adev: ATA device
  928. *
  929. * Check if the current speed of the device requires IORDY. Used
  930. * by various controllers for chip configuration.
  931. */
  932. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  933. {
  934. int pio;
  935. int speed = adev->pio_mode - XFER_PIO_0;
  936. if (speed < 2)
  937. return 0;
  938. if (speed > 2)
  939. return 1;
  940. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  941. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  942. pio = adev->id[ATA_ID_EIDE_PIO];
  943. /* Is the speed faster than the drive allows non IORDY ? */
  944. if (pio) {
  945. /* This is cycle times not frequency - watch the logic! */
  946. if (pio > 240) /* PIO2 is 240nS per cycle */
  947. return 1;
  948. return 0;
  949. }
  950. }
  951. return 0;
  952. }
  953. /**
  954. * ata_dev_read_id - Read ID data from the specified device
  955. * @ap: port on which target device resides
  956. * @dev: target device
  957. * @p_class: pointer to class of the target device (may be changed)
  958. * @post_reset: is this read ID post-reset?
  959. * @p_id: read IDENTIFY page (newly allocated)
  960. *
  961. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  962. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  963. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  964. * for pre-ATA4 drives.
  965. *
  966. * LOCKING:
  967. * Kernel thread context (may sleep)
  968. *
  969. * RETURNS:
  970. * 0 on success, -errno otherwise.
  971. */
  972. static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
  973. unsigned int *p_class, int post_reset, u16 **p_id)
  974. {
  975. unsigned int class = *p_class;
  976. struct ata_taskfile tf;
  977. unsigned int err_mask = 0;
  978. u16 *id;
  979. const char *reason;
  980. int rc;
  981. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  982. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  983. id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
  984. if (id == NULL) {
  985. rc = -ENOMEM;
  986. reason = "out of memory";
  987. goto err_out;
  988. }
  989. retry:
  990. ata_tf_init(ap, &tf, dev->devno);
  991. switch (class) {
  992. case ATA_DEV_ATA:
  993. tf.command = ATA_CMD_ID_ATA;
  994. break;
  995. case ATA_DEV_ATAPI:
  996. tf.command = ATA_CMD_ID_ATAPI;
  997. break;
  998. default:
  999. rc = -ENODEV;
  1000. reason = "unsupported class";
  1001. goto err_out;
  1002. }
  1003. tf.protocol = ATA_PROT_PIO;
  1004. err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
  1005. id, sizeof(id[0]) * ATA_ID_WORDS);
  1006. if (err_mask) {
  1007. rc = -EIO;
  1008. reason = "I/O error";
  1009. goto err_out;
  1010. }
  1011. swap_buf_le16(id, ATA_ID_WORDS);
  1012. /* sanity check */
  1013. if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
  1014. rc = -EINVAL;
  1015. reason = "device reports illegal type";
  1016. goto err_out;
  1017. }
  1018. if (post_reset && class == ATA_DEV_ATA) {
  1019. /*
  1020. * The exact sequence expected by certain pre-ATA4 drives is:
  1021. * SRST RESET
  1022. * IDENTIFY
  1023. * INITIALIZE DEVICE PARAMETERS
  1024. * anything else..
  1025. * Some drives were very specific about that exact sequence.
  1026. */
  1027. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1028. err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
  1029. if (err_mask) {
  1030. rc = -EIO;
  1031. reason = "INIT_DEV_PARAMS failed";
  1032. goto err_out;
  1033. }
  1034. /* current CHS translation info (id[53-58]) might be
  1035. * changed. reread the identify device info.
  1036. */
  1037. post_reset = 0;
  1038. goto retry;
  1039. }
  1040. }
  1041. *p_class = class;
  1042. *p_id = id;
  1043. return 0;
  1044. err_out:
  1045. printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
  1046. ap->id, dev->devno, reason);
  1047. kfree(id);
  1048. return rc;
  1049. }
  1050. static inline u8 ata_dev_knobble(const struct ata_port *ap,
  1051. struct ata_device *dev)
  1052. {
  1053. return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1054. }
  1055. /**
  1056. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1057. * @ap: Port on which target device resides
  1058. * @dev: Target device to configure
  1059. * @print_info: Enable device info printout
  1060. *
  1061. * Configure @dev according to @dev->id. Generic and low-level
  1062. * driver specific fixups are also applied.
  1063. *
  1064. * LOCKING:
  1065. * Kernel thread context (may sleep)
  1066. *
  1067. * RETURNS:
  1068. * 0 on success, -errno otherwise
  1069. */
  1070. static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
  1071. int print_info)
  1072. {
  1073. const u16 *id = dev->id;
  1074. unsigned int xfer_mask;
  1075. int i, rc;
  1076. if (!ata_dev_enabled(dev)) {
  1077. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1078. ap->id, dev->devno);
  1079. return 0;
  1080. }
  1081. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1082. /* print device capabilities */
  1083. if (print_info)
  1084. printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
  1085. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1086. ap->id, dev->devno, id[49], id[82], id[83],
  1087. id[84], id[85], id[86], id[87], id[88]);
  1088. /* initialize to-be-configured parameters */
  1089. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1090. dev->max_sectors = 0;
  1091. dev->cdb_len = 0;
  1092. dev->n_sectors = 0;
  1093. dev->cylinders = 0;
  1094. dev->heads = 0;
  1095. dev->sectors = 0;
  1096. /*
  1097. * common ATA, ATAPI feature tests
  1098. */
  1099. /* find max transfer mode; for printk only */
  1100. xfer_mask = ata_id_xfermask(id);
  1101. ata_dump_id(id);
  1102. /* ATA-specific feature tests */
  1103. if (dev->class == ATA_DEV_ATA) {
  1104. dev->n_sectors = ata_id_n_sectors(id);
  1105. if (ata_id_has_lba(id)) {
  1106. const char *lba_desc;
  1107. lba_desc = "LBA";
  1108. dev->flags |= ATA_DFLAG_LBA;
  1109. if (ata_id_has_lba48(id)) {
  1110. dev->flags |= ATA_DFLAG_LBA48;
  1111. lba_desc = "LBA48";
  1112. }
  1113. /* print device info to dmesg */
  1114. if (print_info)
  1115. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1116. "max %s, %Lu sectors: %s\n",
  1117. ap->id, dev->devno,
  1118. ata_id_major_version(id),
  1119. ata_mode_string(xfer_mask),
  1120. (unsigned long long)dev->n_sectors,
  1121. lba_desc);
  1122. } else {
  1123. /* CHS */
  1124. /* Default translation */
  1125. dev->cylinders = id[1];
  1126. dev->heads = id[3];
  1127. dev->sectors = id[6];
  1128. if (ata_id_current_chs_valid(id)) {
  1129. /* Current CHS translation is valid. */
  1130. dev->cylinders = id[54];
  1131. dev->heads = id[55];
  1132. dev->sectors = id[56];
  1133. }
  1134. /* print device info to dmesg */
  1135. if (print_info)
  1136. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1137. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1138. ap->id, dev->devno,
  1139. ata_id_major_version(id),
  1140. ata_mode_string(xfer_mask),
  1141. (unsigned long long)dev->n_sectors,
  1142. dev->cylinders, dev->heads, dev->sectors);
  1143. }
  1144. dev->cdb_len = 16;
  1145. }
  1146. /* ATAPI-specific feature tests */
  1147. else if (dev->class == ATA_DEV_ATAPI) {
  1148. rc = atapi_cdb_len(id);
  1149. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1150. printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
  1151. rc = -EINVAL;
  1152. goto err_out_nosup;
  1153. }
  1154. dev->cdb_len = (unsigned int) rc;
  1155. /* print device info to dmesg */
  1156. if (print_info)
  1157. printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
  1158. ap->id, dev->devno, ata_mode_string(xfer_mask));
  1159. }
  1160. ap->host->max_cmd_len = 0;
  1161. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1162. ap->host->max_cmd_len = max_t(unsigned int,
  1163. ap->host->max_cmd_len,
  1164. ap->device[i].cdb_len);
  1165. /* limit bridge transfers to udma5, 200 sectors */
  1166. if (ata_dev_knobble(ap, dev)) {
  1167. if (print_info)
  1168. printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
  1169. ap->id, dev->devno);
  1170. dev->udma_mask &= ATA_UDMA5;
  1171. dev->max_sectors = ATA_MAX_SECTORS;
  1172. }
  1173. if (ap->ops->dev_config)
  1174. ap->ops->dev_config(ap, dev);
  1175. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1176. return 0;
  1177. err_out_nosup:
  1178. DPRINTK("EXIT, err\n");
  1179. return rc;
  1180. }
  1181. /**
  1182. * ata_bus_probe - Reset and probe ATA bus
  1183. * @ap: Bus to probe
  1184. *
  1185. * Master ATA bus probing function. Initiates a hardware-dependent
  1186. * bus reset, then attempts to identify any devices found on
  1187. * the bus.
  1188. *
  1189. * LOCKING:
  1190. * PCI/etc. bus probe sem.
  1191. *
  1192. * RETURNS:
  1193. * Zero on success, negative errno otherwise.
  1194. */
  1195. static int ata_bus_probe(struct ata_port *ap)
  1196. {
  1197. unsigned int classes[ATA_MAX_DEVICES];
  1198. int tries[ATA_MAX_DEVICES];
  1199. int i, rc, down_xfermask;
  1200. struct ata_device *dev;
  1201. ata_port_probe(ap);
  1202. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1203. tries[i] = ATA_PROBE_MAX_TRIES;
  1204. retry:
  1205. down_xfermask = 0;
  1206. /* reset and determine device classes */
  1207. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1208. classes[i] = ATA_DEV_UNKNOWN;
  1209. if (ap->ops->probe_reset) {
  1210. rc = ap->ops->probe_reset(ap, classes);
  1211. if (rc) {
  1212. printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
  1213. return rc;
  1214. }
  1215. } else {
  1216. ap->ops->phy_reset(ap);
  1217. if (!(ap->flags & ATA_FLAG_DISABLED))
  1218. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1219. classes[i] = ap->device[i].class;
  1220. ata_port_probe(ap);
  1221. }
  1222. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1223. if (classes[i] == ATA_DEV_UNKNOWN)
  1224. classes[i] = ATA_DEV_NONE;
  1225. /* read IDENTIFY page and configure devices */
  1226. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1227. dev = &ap->device[i];
  1228. if (tries[i])
  1229. dev->class = classes[i];
  1230. if (!ata_dev_enabled(dev))
  1231. continue;
  1232. kfree(dev->id);
  1233. dev->id = NULL;
  1234. rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
  1235. if (rc)
  1236. goto fail;
  1237. rc = ata_dev_configure(ap, dev, 1);
  1238. if (rc)
  1239. goto fail;
  1240. }
  1241. /* configure transfer mode */
  1242. if (ap->ops->set_mode) {
  1243. /* FIXME: make ->set_mode handle no device case and
  1244. * return error code and failing device on failure as
  1245. * ata_set_mode() does.
  1246. */
  1247. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1248. if (ata_dev_enabled(&ap->device[i])) {
  1249. ap->ops->set_mode(ap);
  1250. break;
  1251. }
  1252. rc = 0;
  1253. } else
  1254. rc = ata_set_mode(ap, &dev);
  1255. if (rc) {
  1256. down_xfermask = 1;
  1257. goto fail;
  1258. }
  1259. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1260. if (ata_dev_enabled(&ap->device[i]))
  1261. return 0;
  1262. /* no device present, disable port */
  1263. ata_port_disable(ap);
  1264. ap->ops->port_disable(ap);
  1265. return -ENODEV;
  1266. fail:
  1267. switch (rc) {
  1268. case -EINVAL:
  1269. case -ENODEV:
  1270. tries[dev->devno] = 0;
  1271. break;
  1272. case -EIO:
  1273. sata_down_spd_limit(ap);
  1274. /* fall through */
  1275. default:
  1276. tries[dev->devno]--;
  1277. if (down_xfermask &&
  1278. ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
  1279. tries[dev->devno] = 0;
  1280. }
  1281. if (!tries[dev->devno]) {
  1282. ata_down_xfermask_limit(ap, dev, 1);
  1283. ata_dev_disable(ap, dev);
  1284. }
  1285. goto retry;
  1286. }
  1287. /**
  1288. * ata_port_probe - Mark port as enabled
  1289. * @ap: Port for which we indicate enablement
  1290. *
  1291. * Modify @ap data structure such that the system
  1292. * thinks that the entire port is enabled.
  1293. *
  1294. * LOCKING: host_set lock, or some other form of
  1295. * serialization.
  1296. */
  1297. void ata_port_probe(struct ata_port *ap)
  1298. {
  1299. ap->flags &= ~ATA_FLAG_DISABLED;
  1300. }
  1301. /**
  1302. * sata_print_link_status - Print SATA link status
  1303. * @ap: SATA port to printk link status about
  1304. *
  1305. * This function prints link speed and status of a SATA link.
  1306. *
  1307. * LOCKING:
  1308. * None.
  1309. */
  1310. static void sata_print_link_status(struct ata_port *ap)
  1311. {
  1312. u32 sstatus, scontrol, tmp;
  1313. if (!ap->ops->scr_read)
  1314. return;
  1315. sstatus = scr_read(ap, SCR_STATUS);
  1316. scontrol = scr_read(ap, SCR_CONTROL);
  1317. if (sata_dev_present(ap)) {
  1318. tmp = (sstatus >> 4) & 0xf;
  1319. printk(KERN_INFO
  1320. "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
  1321. ap->id, sata_spd_string(tmp), sstatus, scontrol);
  1322. } else {
  1323. printk(KERN_INFO
  1324. "ata%u: SATA link down (SStatus %X SControl %X)\n",
  1325. ap->id, sstatus, scontrol);
  1326. }
  1327. }
  1328. /**
  1329. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1330. * @ap: SATA port associated with target SATA PHY.
  1331. *
  1332. * This function issues commands to standard SATA Sxxx
  1333. * PHY registers, to wake up the phy (and device), and
  1334. * clear any reset condition.
  1335. *
  1336. * LOCKING:
  1337. * PCI/etc. bus probe sem.
  1338. *
  1339. */
  1340. void __sata_phy_reset(struct ata_port *ap)
  1341. {
  1342. u32 sstatus;
  1343. unsigned long timeout = jiffies + (HZ * 5);
  1344. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1345. /* issue phy wake/reset */
  1346. scr_write_flush(ap, SCR_CONTROL, 0x301);
  1347. /* Couldn't find anything in SATA I/II specs, but
  1348. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1349. mdelay(1);
  1350. }
  1351. scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
  1352. /* wait for phy to become ready, if necessary */
  1353. do {
  1354. msleep(200);
  1355. sstatus = scr_read(ap, SCR_STATUS);
  1356. if ((sstatus & 0xf) != 1)
  1357. break;
  1358. } while (time_before(jiffies, timeout));
  1359. /* print link status */
  1360. sata_print_link_status(ap);
  1361. /* TODO: phy layer with polling, timeouts, etc. */
  1362. if (sata_dev_present(ap))
  1363. ata_port_probe(ap);
  1364. else
  1365. ata_port_disable(ap);
  1366. if (ap->flags & ATA_FLAG_DISABLED)
  1367. return;
  1368. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1369. ata_port_disable(ap);
  1370. return;
  1371. }
  1372. ap->cbl = ATA_CBL_SATA;
  1373. }
  1374. /**
  1375. * sata_phy_reset - Reset SATA bus.
  1376. * @ap: SATA port associated with target SATA PHY.
  1377. *
  1378. * This function resets the SATA bus, and then probes
  1379. * the bus for devices.
  1380. *
  1381. * LOCKING:
  1382. * PCI/etc. bus probe sem.
  1383. *
  1384. */
  1385. void sata_phy_reset(struct ata_port *ap)
  1386. {
  1387. __sata_phy_reset(ap);
  1388. if (ap->flags & ATA_FLAG_DISABLED)
  1389. return;
  1390. ata_bus_reset(ap);
  1391. }
  1392. /**
  1393. * ata_dev_pair - return other device on cable
  1394. * @ap: port
  1395. * @adev: device
  1396. *
  1397. * Obtain the other device on the same cable, or if none is
  1398. * present NULL is returned
  1399. */
  1400. struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
  1401. {
  1402. struct ata_device *pair = &ap->device[1 - adev->devno];
  1403. if (!ata_dev_enabled(pair))
  1404. return NULL;
  1405. return pair;
  1406. }
  1407. /**
  1408. * ata_port_disable - Disable port.
  1409. * @ap: Port to be disabled.
  1410. *
  1411. * Modify @ap data structure such that the system
  1412. * thinks that the entire port is disabled, and should
  1413. * never attempt to probe or communicate with devices
  1414. * on this port.
  1415. *
  1416. * LOCKING: host_set lock, or some other form of
  1417. * serialization.
  1418. */
  1419. void ata_port_disable(struct ata_port *ap)
  1420. {
  1421. ap->device[0].class = ATA_DEV_NONE;
  1422. ap->device[1].class = ATA_DEV_NONE;
  1423. ap->flags |= ATA_FLAG_DISABLED;
  1424. }
  1425. /**
  1426. * sata_down_spd_limit - adjust SATA spd limit downward
  1427. * @ap: Port to adjust SATA spd limit for
  1428. *
  1429. * Adjust SATA spd limit of @ap downward. Note that this
  1430. * function only adjusts the limit. The change must be applied
  1431. * using sata_set_spd().
  1432. *
  1433. * LOCKING:
  1434. * Inherited from caller.
  1435. *
  1436. * RETURNS:
  1437. * 0 on success, negative errno on failure
  1438. */
  1439. int sata_down_spd_limit(struct ata_port *ap)
  1440. {
  1441. u32 spd, mask;
  1442. int highbit;
  1443. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1444. return -EOPNOTSUPP;
  1445. mask = ap->sata_spd_limit;
  1446. if (mask <= 1)
  1447. return -EINVAL;
  1448. highbit = fls(mask) - 1;
  1449. mask &= ~(1 << highbit);
  1450. spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
  1451. if (spd <= 1)
  1452. return -EINVAL;
  1453. spd--;
  1454. mask &= (1 << spd) - 1;
  1455. if (!mask)
  1456. return -EINVAL;
  1457. ap->sata_spd_limit = mask;
  1458. printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
  1459. ap->id, sata_spd_string(fls(mask)));
  1460. return 0;
  1461. }
  1462. static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
  1463. {
  1464. u32 spd, limit;
  1465. if (ap->sata_spd_limit == UINT_MAX)
  1466. limit = 0;
  1467. else
  1468. limit = fls(ap->sata_spd_limit);
  1469. spd = (*scontrol >> 4) & 0xf;
  1470. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1471. return spd != limit;
  1472. }
  1473. /**
  1474. * sata_set_spd_needed - is SATA spd configuration needed
  1475. * @ap: Port in question
  1476. *
  1477. * Test whether the spd limit in SControl matches
  1478. * @ap->sata_spd_limit. This function is used to determine
  1479. * whether hardreset is necessary to apply SATA spd
  1480. * configuration.
  1481. *
  1482. * LOCKING:
  1483. * Inherited from caller.
  1484. *
  1485. * RETURNS:
  1486. * 1 if SATA spd configuration is needed, 0 otherwise.
  1487. */
  1488. int sata_set_spd_needed(struct ata_port *ap)
  1489. {
  1490. u32 scontrol;
  1491. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1492. return 0;
  1493. scontrol = scr_read(ap, SCR_CONTROL);
  1494. return __sata_set_spd_needed(ap, &scontrol);
  1495. }
  1496. /**
  1497. * sata_set_spd - set SATA spd according to spd limit
  1498. * @ap: Port to set SATA spd for
  1499. *
  1500. * Set SATA spd of @ap according to sata_spd_limit.
  1501. *
  1502. * LOCKING:
  1503. * Inherited from caller.
  1504. *
  1505. * RETURNS:
  1506. * 0 if spd doesn't need to be changed, 1 if spd has been
  1507. * changed. -EOPNOTSUPP if SCR registers are inaccessible.
  1508. */
  1509. int sata_set_spd(struct ata_port *ap)
  1510. {
  1511. u32 scontrol;
  1512. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1513. return -EOPNOTSUPP;
  1514. scontrol = scr_read(ap, SCR_CONTROL);
  1515. if (!__sata_set_spd_needed(ap, &scontrol))
  1516. return 0;
  1517. scr_write(ap, SCR_CONTROL, scontrol);
  1518. return 1;
  1519. }
  1520. /*
  1521. * This mode timing computation functionality is ported over from
  1522. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1523. */
  1524. /*
  1525. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1526. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1527. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1528. * is currently supported only by Maxtor drives.
  1529. */
  1530. static const struct ata_timing ata_timing[] = {
  1531. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1532. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1533. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1534. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1535. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1536. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1537. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1538. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1539. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1540. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1541. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1542. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1543. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1544. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1545. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1546. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1547. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1548. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1549. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1550. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1551. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1552. { 0xFF }
  1553. };
  1554. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1555. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1556. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1557. {
  1558. q->setup = EZ(t->setup * 1000, T);
  1559. q->act8b = EZ(t->act8b * 1000, T);
  1560. q->rec8b = EZ(t->rec8b * 1000, T);
  1561. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1562. q->active = EZ(t->active * 1000, T);
  1563. q->recover = EZ(t->recover * 1000, T);
  1564. q->cycle = EZ(t->cycle * 1000, T);
  1565. q->udma = EZ(t->udma * 1000, UT);
  1566. }
  1567. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1568. struct ata_timing *m, unsigned int what)
  1569. {
  1570. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1571. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1572. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1573. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1574. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1575. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1576. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1577. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1578. }
  1579. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1580. {
  1581. const struct ata_timing *t;
  1582. for (t = ata_timing; t->mode != speed; t++)
  1583. if (t->mode == 0xFF)
  1584. return NULL;
  1585. return t;
  1586. }
  1587. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1588. struct ata_timing *t, int T, int UT)
  1589. {
  1590. const struct ata_timing *s;
  1591. struct ata_timing p;
  1592. /*
  1593. * Find the mode.
  1594. */
  1595. if (!(s = ata_timing_find_mode(speed)))
  1596. return -EINVAL;
  1597. memcpy(t, s, sizeof(*s));
  1598. /*
  1599. * If the drive is an EIDE drive, it can tell us it needs extended
  1600. * PIO/MW_DMA cycle timing.
  1601. */
  1602. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1603. memset(&p, 0, sizeof(p));
  1604. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1605. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1606. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1607. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1608. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1609. }
  1610. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1611. }
  1612. /*
  1613. * Convert the timing to bus clock counts.
  1614. */
  1615. ata_timing_quantize(t, t, T, UT);
  1616. /*
  1617. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1618. * S.M.A.R.T * and some other commands. We have to ensure that the
  1619. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1620. */
  1621. if (speed > XFER_PIO_4) {
  1622. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1623. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1624. }
  1625. /*
  1626. * Lengthen active & recovery time so that cycle time is correct.
  1627. */
  1628. if (t->act8b + t->rec8b < t->cyc8b) {
  1629. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1630. t->rec8b = t->cyc8b - t->act8b;
  1631. }
  1632. if (t->active + t->recover < t->cycle) {
  1633. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1634. t->recover = t->cycle - t->active;
  1635. }
  1636. return 0;
  1637. }
  1638. /**
  1639. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1640. * @ap: Port associated with device @dev
  1641. * @dev: Device to adjust xfer masks
  1642. * @force_pio0: Force PIO0
  1643. *
  1644. * Adjust xfer masks of @dev downward. Note that this function
  1645. * does not apply the change. Invoking ata_set_mode() afterwards
  1646. * will apply the limit.
  1647. *
  1648. * LOCKING:
  1649. * Inherited from caller.
  1650. *
  1651. * RETURNS:
  1652. * 0 on success, negative errno on failure
  1653. */
  1654. int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
  1655. int force_pio0)
  1656. {
  1657. unsigned long xfer_mask;
  1658. int highbit;
  1659. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1660. dev->udma_mask);
  1661. if (!xfer_mask)
  1662. goto fail;
  1663. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1664. if (xfer_mask & ATA_MASK_UDMA)
  1665. xfer_mask &= ~ATA_MASK_MWDMA;
  1666. highbit = fls(xfer_mask) - 1;
  1667. xfer_mask &= ~(1 << highbit);
  1668. if (force_pio0)
  1669. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1670. if (!xfer_mask)
  1671. goto fail;
  1672. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1673. &dev->udma_mask);
  1674. printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
  1675. ap->id, dev->devno, ata_mode_string(xfer_mask));
  1676. return 0;
  1677. fail:
  1678. return -EINVAL;
  1679. }
  1680. static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
  1681. {
  1682. unsigned int err_mask;
  1683. int rc;
  1684. dev->flags &= ~ATA_DFLAG_PIO;
  1685. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1686. dev->flags |= ATA_DFLAG_PIO;
  1687. err_mask = ata_dev_set_xfermode(ap, dev);
  1688. if (err_mask) {
  1689. printk(KERN_ERR
  1690. "ata%u: failed to set xfermode (err_mask=0x%x)\n",
  1691. ap->id, err_mask);
  1692. return -EIO;
  1693. }
  1694. rc = ata_dev_revalidate(ap, dev, 0);
  1695. if (rc)
  1696. return rc;
  1697. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1698. dev->xfer_shift, (int)dev->xfer_mode);
  1699. printk(KERN_INFO "ata%u: dev %u configured for %s\n",
  1700. ap->id, dev->devno,
  1701. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1702. return 0;
  1703. }
  1704. /**
  1705. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1706. * @ap: port on which timings will be programmed
  1707. * @r_failed_dev: out paramter for failed device
  1708. *
  1709. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1710. * ata_set_mode() fails, pointer to the failing device is
  1711. * returned in @r_failed_dev.
  1712. *
  1713. * LOCKING:
  1714. * PCI/etc. bus probe sem.
  1715. *
  1716. * RETURNS:
  1717. * 0 on success, negative errno otherwise
  1718. */
  1719. int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1720. {
  1721. struct ata_device *dev;
  1722. int i, rc = 0, used_dma = 0, found = 0;
  1723. /* step 1: calculate xfer_mask */
  1724. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1725. unsigned int pio_mask, dma_mask;
  1726. dev = &ap->device[i];
  1727. if (!ata_dev_enabled(dev))
  1728. continue;
  1729. ata_dev_xfermask(ap, dev);
  1730. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1731. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1732. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1733. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1734. found = 1;
  1735. if (dev->dma_mode)
  1736. used_dma = 1;
  1737. }
  1738. if (!found)
  1739. goto out;
  1740. /* step 2: always set host PIO timings */
  1741. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1742. dev = &ap->device[i];
  1743. if (!ata_dev_enabled(dev))
  1744. continue;
  1745. if (!dev->pio_mode) {
  1746. printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
  1747. ap->id, dev->devno);
  1748. rc = -EINVAL;
  1749. goto out;
  1750. }
  1751. dev->xfer_mode = dev->pio_mode;
  1752. dev->xfer_shift = ATA_SHIFT_PIO;
  1753. if (ap->ops->set_piomode)
  1754. ap->ops->set_piomode(ap, dev);
  1755. }
  1756. /* step 3: set host DMA timings */
  1757. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1758. dev = &ap->device[i];
  1759. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1760. continue;
  1761. dev->xfer_mode = dev->dma_mode;
  1762. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1763. if (ap->ops->set_dmamode)
  1764. ap->ops->set_dmamode(ap, dev);
  1765. }
  1766. /* step 4: update devices' xfer mode */
  1767. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1768. dev = &ap->device[i];
  1769. if (!ata_dev_enabled(dev))
  1770. continue;
  1771. rc = ata_dev_set_mode(ap, dev);
  1772. if (rc)
  1773. goto out;
  1774. }
  1775. /* Record simplex status. If we selected DMA then the other
  1776. * host channels are not permitted to do so.
  1777. */
  1778. if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
  1779. ap->host_set->simplex_claimed = 1;
  1780. /* step5: chip specific finalisation */
  1781. if (ap->ops->post_set_mode)
  1782. ap->ops->post_set_mode(ap);
  1783. out:
  1784. if (rc)
  1785. *r_failed_dev = dev;
  1786. return rc;
  1787. }
  1788. /**
  1789. * ata_tf_to_host - issue ATA taskfile to host controller
  1790. * @ap: port to which command is being issued
  1791. * @tf: ATA taskfile register set
  1792. *
  1793. * Issues ATA taskfile register set to ATA host controller,
  1794. * with proper synchronization with interrupt handler and
  1795. * other threads.
  1796. *
  1797. * LOCKING:
  1798. * spin_lock_irqsave(host_set lock)
  1799. */
  1800. static inline void ata_tf_to_host(struct ata_port *ap,
  1801. const struct ata_taskfile *tf)
  1802. {
  1803. ap->ops->tf_load(ap, tf);
  1804. ap->ops->exec_command(ap, tf);
  1805. }
  1806. /**
  1807. * ata_busy_sleep - sleep until BSY clears, or timeout
  1808. * @ap: port containing status register to be polled
  1809. * @tmout_pat: impatience timeout
  1810. * @tmout: overall timeout
  1811. *
  1812. * Sleep until ATA Status register bit BSY clears,
  1813. * or a timeout occurs.
  1814. *
  1815. * LOCKING: None.
  1816. */
  1817. unsigned int ata_busy_sleep (struct ata_port *ap,
  1818. unsigned long tmout_pat, unsigned long tmout)
  1819. {
  1820. unsigned long timer_start, timeout;
  1821. u8 status;
  1822. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1823. timer_start = jiffies;
  1824. timeout = timer_start + tmout_pat;
  1825. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1826. msleep(50);
  1827. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1828. }
  1829. if (status & ATA_BUSY)
  1830. printk(KERN_WARNING "ata%u is slow to respond, "
  1831. "please be patient\n", ap->id);
  1832. timeout = timer_start + tmout;
  1833. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1834. msleep(50);
  1835. status = ata_chk_status(ap);
  1836. }
  1837. if (status & ATA_BUSY) {
  1838. printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
  1839. ap->id, tmout / HZ);
  1840. return 1;
  1841. }
  1842. return 0;
  1843. }
  1844. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1845. {
  1846. struct ata_ioports *ioaddr = &ap->ioaddr;
  1847. unsigned int dev0 = devmask & (1 << 0);
  1848. unsigned int dev1 = devmask & (1 << 1);
  1849. unsigned long timeout;
  1850. /* if device 0 was found in ata_devchk, wait for its
  1851. * BSY bit to clear
  1852. */
  1853. if (dev0)
  1854. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1855. /* if device 1 was found in ata_devchk, wait for
  1856. * register access, then wait for BSY to clear
  1857. */
  1858. timeout = jiffies + ATA_TMOUT_BOOT;
  1859. while (dev1) {
  1860. u8 nsect, lbal;
  1861. ap->ops->dev_select(ap, 1);
  1862. if (ap->flags & ATA_FLAG_MMIO) {
  1863. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1864. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1865. } else {
  1866. nsect = inb(ioaddr->nsect_addr);
  1867. lbal = inb(ioaddr->lbal_addr);
  1868. }
  1869. if ((nsect == 1) && (lbal == 1))
  1870. break;
  1871. if (time_after(jiffies, timeout)) {
  1872. dev1 = 0;
  1873. break;
  1874. }
  1875. msleep(50); /* give drive a breather */
  1876. }
  1877. if (dev1)
  1878. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1879. /* is all this really necessary? */
  1880. ap->ops->dev_select(ap, 0);
  1881. if (dev1)
  1882. ap->ops->dev_select(ap, 1);
  1883. if (dev0)
  1884. ap->ops->dev_select(ap, 0);
  1885. }
  1886. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1887. unsigned int devmask)
  1888. {
  1889. struct ata_ioports *ioaddr = &ap->ioaddr;
  1890. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1891. /* software reset. causes dev0 to be selected */
  1892. if (ap->flags & ATA_FLAG_MMIO) {
  1893. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1894. udelay(20); /* FIXME: flush */
  1895. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1896. udelay(20); /* FIXME: flush */
  1897. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1898. } else {
  1899. outb(ap->ctl, ioaddr->ctl_addr);
  1900. udelay(10);
  1901. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1902. udelay(10);
  1903. outb(ap->ctl, ioaddr->ctl_addr);
  1904. }
  1905. /* spec mandates ">= 2ms" before checking status.
  1906. * We wait 150ms, because that was the magic delay used for
  1907. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1908. * between when the ATA command register is written, and then
  1909. * status is checked. Because waiting for "a while" before
  1910. * checking status is fine, post SRST, we perform this magic
  1911. * delay here as well.
  1912. *
  1913. * Old drivers/ide uses the 2mS rule and then waits for ready
  1914. */
  1915. msleep(150);
  1916. /* Before we perform post reset processing we want to see if
  1917. * the bus shows 0xFF because the odd clown forgets the D7
  1918. * pulldown resistor.
  1919. */
  1920. if (ata_check_status(ap) == 0xFF) {
  1921. printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
  1922. return AC_ERR_OTHER;
  1923. }
  1924. ata_bus_post_reset(ap, devmask);
  1925. return 0;
  1926. }
  1927. /**
  1928. * ata_bus_reset - reset host port and associated ATA channel
  1929. * @ap: port to reset
  1930. *
  1931. * This is typically the first time we actually start issuing
  1932. * commands to the ATA channel. We wait for BSY to clear, then
  1933. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  1934. * result. Determine what devices, if any, are on the channel
  1935. * by looking at the device 0/1 error register. Look at the signature
  1936. * stored in each device's taskfile registers, to determine if
  1937. * the device is ATA or ATAPI.
  1938. *
  1939. * LOCKING:
  1940. * PCI/etc. bus probe sem.
  1941. * Obtains host_set lock.
  1942. *
  1943. * SIDE EFFECTS:
  1944. * Sets ATA_FLAG_DISABLED if bus reset fails.
  1945. */
  1946. void ata_bus_reset(struct ata_port *ap)
  1947. {
  1948. struct ata_ioports *ioaddr = &ap->ioaddr;
  1949. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  1950. u8 err;
  1951. unsigned int dev0, dev1 = 0, devmask = 0;
  1952. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  1953. /* determine if device 0/1 are present */
  1954. if (ap->flags & ATA_FLAG_SATA_RESET)
  1955. dev0 = 1;
  1956. else {
  1957. dev0 = ata_devchk(ap, 0);
  1958. if (slave_possible)
  1959. dev1 = ata_devchk(ap, 1);
  1960. }
  1961. if (dev0)
  1962. devmask |= (1 << 0);
  1963. if (dev1)
  1964. devmask |= (1 << 1);
  1965. /* select device 0 again */
  1966. ap->ops->dev_select(ap, 0);
  1967. /* issue bus reset */
  1968. if (ap->flags & ATA_FLAG_SRST)
  1969. if (ata_bus_softreset(ap, devmask))
  1970. goto err_out;
  1971. /*
  1972. * determine by signature whether we have ATA or ATAPI devices
  1973. */
  1974. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  1975. if ((slave_possible) && (err != 0x81))
  1976. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  1977. /* re-enable interrupts */
  1978. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  1979. ata_irq_on(ap);
  1980. /* is double-select really necessary? */
  1981. if (ap->device[1].class != ATA_DEV_NONE)
  1982. ap->ops->dev_select(ap, 1);
  1983. if (ap->device[0].class != ATA_DEV_NONE)
  1984. ap->ops->dev_select(ap, 0);
  1985. /* if no devices were detected, disable this port */
  1986. if ((ap->device[0].class == ATA_DEV_NONE) &&
  1987. (ap->device[1].class == ATA_DEV_NONE))
  1988. goto err_out;
  1989. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  1990. /* set up device control for ATA_FLAG_SATA_RESET */
  1991. if (ap->flags & ATA_FLAG_MMIO)
  1992. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1993. else
  1994. outb(ap->ctl, ioaddr->ctl_addr);
  1995. }
  1996. DPRINTK("EXIT\n");
  1997. return;
  1998. err_out:
  1999. printk(KERN_ERR "ata%u: disabling port\n", ap->id);
  2000. ap->ops->port_disable(ap);
  2001. DPRINTK("EXIT\n");
  2002. }
  2003. static int sata_phy_resume(struct ata_port *ap)
  2004. {
  2005. unsigned long timeout = jiffies + (HZ * 5);
  2006. u32 scontrol, sstatus;
  2007. scontrol = scr_read(ap, SCR_CONTROL);
  2008. scontrol = (scontrol & 0x0f0) | 0x300;
  2009. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2010. /* Wait for phy to become ready, if necessary. */
  2011. do {
  2012. msleep(200);
  2013. sstatus = scr_read(ap, SCR_STATUS);
  2014. if ((sstatus & 0xf) != 1)
  2015. return 0;
  2016. } while (time_before(jiffies, timeout));
  2017. return -1;
  2018. }
  2019. /**
  2020. * ata_std_probeinit - initialize probing
  2021. * @ap: port to be probed
  2022. *
  2023. * @ap is about to be probed. Initialize it. This function is
  2024. * to be used as standard callback for ata_drive_probe_reset().
  2025. *
  2026. * NOTE!!! Do not use this function as probeinit if a low level
  2027. * driver implements only hardreset. Just pass NULL as probeinit
  2028. * in that case. Using this function is probably okay but doing
  2029. * so makes reset sequence different from the original
  2030. * ->phy_reset implementation and Jeff nervous. :-P
  2031. */
  2032. void ata_std_probeinit(struct ata_port *ap)
  2033. {
  2034. if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
  2035. u32 spd;
  2036. /* set cable type and resume link */
  2037. ap->cbl = ATA_CBL_SATA;
  2038. sata_phy_resume(ap);
  2039. /* init sata_spd_limit to the current value */
  2040. spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
  2041. if (spd)
  2042. ap->sata_spd_limit &= (1 << spd) - 1;
  2043. /* wait for device */
  2044. if (sata_dev_present(ap))
  2045. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2046. }
  2047. }
  2048. /**
  2049. * ata_std_softreset - reset host port via ATA SRST
  2050. * @ap: port to reset
  2051. * @classes: resulting classes of attached devices
  2052. *
  2053. * Reset host port using ATA SRST. This function is to be used
  2054. * as standard callback for ata_drive_*_reset() functions.
  2055. *
  2056. * LOCKING:
  2057. * Kernel thread context (may sleep)
  2058. *
  2059. * RETURNS:
  2060. * 0 on success, -errno otherwise.
  2061. */
  2062. int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
  2063. {
  2064. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2065. unsigned int devmask = 0, err_mask;
  2066. u8 err;
  2067. DPRINTK("ENTER\n");
  2068. if (ap->ops->scr_read && !sata_dev_present(ap)) {
  2069. classes[0] = ATA_DEV_NONE;
  2070. goto out;
  2071. }
  2072. /* determine if device 0/1 are present */
  2073. if (ata_devchk(ap, 0))
  2074. devmask |= (1 << 0);
  2075. if (slave_possible && ata_devchk(ap, 1))
  2076. devmask |= (1 << 1);
  2077. /* select device 0 again */
  2078. ap->ops->dev_select(ap, 0);
  2079. /* issue bus reset */
  2080. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2081. err_mask = ata_bus_softreset(ap, devmask);
  2082. if (err_mask) {
  2083. printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
  2084. ap->id, err_mask);
  2085. return -EIO;
  2086. }
  2087. /* determine by signature whether we have ATA or ATAPI devices */
  2088. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2089. if (slave_possible && err != 0x81)
  2090. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2091. out:
  2092. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2093. return 0;
  2094. }
  2095. /**
  2096. * sata_std_hardreset - reset host port via SATA phy reset
  2097. * @ap: port to reset
  2098. * @class: resulting class of attached device
  2099. *
  2100. * SATA phy-reset host port using DET bits of SControl register.
  2101. * This function is to be used as standard callback for
  2102. * ata_drive_*_reset().
  2103. *
  2104. * LOCKING:
  2105. * Kernel thread context (may sleep)
  2106. *
  2107. * RETURNS:
  2108. * 0 on success, -errno otherwise.
  2109. */
  2110. int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
  2111. {
  2112. u32 scontrol;
  2113. DPRINTK("ENTER\n");
  2114. if (sata_set_spd_needed(ap)) {
  2115. /* SATA spec says nothing about how to reconfigure
  2116. * spd. To be on the safe side, turn off phy during
  2117. * reconfiguration. This works for at least ICH7 AHCI
  2118. * and Sil3124.
  2119. */
  2120. scontrol = scr_read(ap, SCR_CONTROL);
  2121. scontrol = (scontrol & 0x0f0) | 0x302;
  2122. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2123. sata_set_spd(ap);
  2124. }
  2125. /* issue phy wake/reset */
  2126. scontrol = scr_read(ap, SCR_CONTROL);
  2127. scontrol = (scontrol & 0x0f0) | 0x301;
  2128. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2129. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2130. * 10.4.2 says at least 1 ms.
  2131. */
  2132. msleep(1);
  2133. /* bring phy back */
  2134. sata_phy_resume(ap);
  2135. /* TODO: phy layer with polling, timeouts, etc. */
  2136. if (!sata_dev_present(ap)) {
  2137. *class = ATA_DEV_NONE;
  2138. DPRINTK("EXIT, link offline\n");
  2139. return 0;
  2140. }
  2141. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2142. printk(KERN_ERR
  2143. "ata%u: COMRESET failed (device not ready)\n", ap->id);
  2144. return -EIO;
  2145. }
  2146. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2147. *class = ata_dev_try_classify(ap, 0, NULL);
  2148. DPRINTK("EXIT, class=%u\n", *class);
  2149. return 0;
  2150. }
  2151. /**
  2152. * ata_std_postreset - standard postreset callback
  2153. * @ap: the target ata_port
  2154. * @classes: classes of attached devices
  2155. *
  2156. * This function is invoked after a successful reset. Note that
  2157. * the device might have been reset more than once using
  2158. * different reset methods before postreset is invoked.
  2159. *
  2160. * This function is to be used as standard callback for
  2161. * ata_drive_*_reset().
  2162. *
  2163. * LOCKING:
  2164. * Kernel thread context (may sleep)
  2165. */
  2166. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2167. {
  2168. DPRINTK("ENTER\n");
  2169. /* print link status */
  2170. if (ap->cbl == ATA_CBL_SATA)
  2171. sata_print_link_status(ap);
  2172. /* re-enable interrupts */
  2173. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2174. ata_irq_on(ap);
  2175. /* is double-select really necessary? */
  2176. if (classes[0] != ATA_DEV_NONE)
  2177. ap->ops->dev_select(ap, 1);
  2178. if (classes[1] != ATA_DEV_NONE)
  2179. ap->ops->dev_select(ap, 0);
  2180. /* bail out if no device is present */
  2181. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2182. DPRINTK("EXIT, no device\n");
  2183. return;
  2184. }
  2185. /* set up device control */
  2186. if (ap->ioaddr.ctl_addr) {
  2187. if (ap->flags & ATA_FLAG_MMIO)
  2188. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2189. else
  2190. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2191. }
  2192. DPRINTK("EXIT\n");
  2193. }
  2194. /**
  2195. * ata_std_probe_reset - standard probe reset method
  2196. * @ap: prot to perform probe-reset
  2197. * @classes: resulting classes of attached devices
  2198. *
  2199. * The stock off-the-shelf ->probe_reset method.
  2200. *
  2201. * LOCKING:
  2202. * Kernel thread context (may sleep)
  2203. *
  2204. * RETURNS:
  2205. * 0 on success, -errno otherwise.
  2206. */
  2207. int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
  2208. {
  2209. ata_reset_fn_t hardreset;
  2210. hardreset = NULL;
  2211. if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
  2212. hardreset = sata_std_hardreset;
  2213. return ata_drive_probe_reset(ap, ata_std_probeinit,
  2214. ata_std_softreset, hardreset,
  2215. ata_std_postreset, classes);
  2216. }
  2217. int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
  2218. ata_postreset_fn_t postreset, unsigned int *classes)
  2219. {
  2220. int i, rc;
  2221. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2222. classes[i] = ATA_DEV_UNKNOWN;
  2223. rc = reset(ap, classes);
  2224. if (rc)
  2225. return rc;
  2226. /* If any class isn't ATA_DEV_UNKNOWN, consider classification
  2227. * is complete and convert all ATA_DEV_UNKNOWN to
  2228. * ATA_DEV_NONE.
  2229. */
  2230. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2231. if (classes[i] != ATA_DEV_UNKNOWN)
  2232. break;
  2233. if (i < ATA_MAX_DEVICES)
  2234. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2235. if (classes[i] == ATA_DEV_UNKNOWN)
  2236. classes[i] = ATA_DEV_NONE;
  2237. if (postreset)
  2238. postreset(ap, classes);
  2239. return 0;
  2240. }
  2241. /**
  2242. * ata_drive_probe_reset - Perform probe reset with given methods
  2243. * @ap: port to reset
  2244. * @probeinit: probeinit method (can be NULL)
  2245. * @softreset: softreset method (can be NULL)
  2246. * @hardreset: hardreset method (can be NULL)
  2247. * @postreset: postreset method (can be NULL)
  2248. * @classes: resulting classes of attached devices
  2249. *
  2250. * Reset the specified port and classify attached devices using
  2251. * given methods. This function prefers softreset but tries all
  2252. * possible reset sequences to reset and classify devices. This
  2253. * function is intended to be used for constructing ->probe_reset
  2254. * callback by low level drivers.
  2255. *
  2256. * Reset methods should follow the following rules.
  2257. *
  2258. * - Return 0 on sucess, -errno on failure.
  2259. * - If classification is supported, fill classes[] with
  2260. * recognized class codes.
  2261. * - If classification is not supported, leave classes[] alone.
  2262. *
  2263. * LOCKING:
  2264. * Kernel thread context (may sleep)
  2265. *
  2266. * RETURNS:
  2267. * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
  2268. * if classification fails, and any error code from reset
  2269. * methods.
  2270. */
  2271. int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
  2272. ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
  2273. ata_postreset_fn_t postreset, unsigned int *classes)
  2274. {
  2275. int rc = -EINVAL;
  2276. if (probeinit)
  2277. probeinit(ap);
  2278. if (softreset && !sata_set_spd_needed(ap)) {
  2279. rc = ata_do_reset(ap, softreset, postreset, classes);
  2280. if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
  2281. goto done;
  2282. printk(KERN_INFO "ata%u: softreset failed, will try "
  2283. "hardreset in 5 secs\n", ap->id);
  2284. ssleep(5);
  2285. }
  2286. if (!hardreset)
  2287. goto done;
  2288. while (1) {
  2289. rc = ata_do_reset(ap, hardreset, postreset, classes);
  2290. if (rc == 0) {
  2291. if (classes[0] != ATA_DEV_UNKNOWN)
  2292. goto done;
  2293. break;
  2294. }
  2295. if (sata_down_spd_limit(ap))
  2296. goto done;
  2297. printk(KERN_INFO "ata%u: hardreset failed, will retry "
  2298. "in 5 secs\n", ap->id);
  2299. ssleep(5);
  2300. }
  2301. if (softreset) {
  2302. printk(KERN_INFO "ata%u: hardreset succeeded without "
  2303. "classification, will retry softreset in 5 secs\n",
  2304. ap->id);
  2305. ssleep(5);
  2306. rc = ata_do_reset(ap, softreset, postreset, classes);
  2307. }
  2308. done:
  2309. if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
  2310. rc = -ENODEV;
  2311. return rc;
  2312. }
  2313. /**
  2314. * ata_dev_same_device - Determine whether new ID matches configured device
  2315. * @ap: port on which the device to compare against resides
  2316. * @dev: device to compare against
  2317. * @new_class: class of the new device
  2318. * @new_id: IDENTIFY page of the new device
  2319. *
  2320. * Compare @new_class and @new_id against @dev and determine
  2321. * whether @dev is the device indicated by @new_class and
  2322. * @new_id.
  2323. *
  2324. * LOCKING:
  2325. * None.
  2326. *
  2327. * RETURNS:
  2328. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2329. */
  2330. static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
  2331. unsigned int new_class, const u16 *new_id)
  2332. {
  2333. const u16 *old_id = dev->id;
  2334. unsigned char model[2][41], serial[2][21];
  2335. u64 new_n_sectors;
  2336. if (dev->class != new_class) {
  2337. printk(KERN_INFO
  2338. "ata%u: dev %u class mismatch %d != %d\n",
  2339. ap->id, dev->devno, dev->class, new_class);
  2340. return 0;
  2341. }
  2342. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2343. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2344. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2345. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2346. new_n_sectors = ata_id_n_sectors(new_id);
  2347. if (strcmp(model[0], model[1])) {
  2348. printk(KERN_INFO
  2349. "ata%u: dev %u model number mismatch '%s' != '%s'\n",
  2350. ap->id, dev->devno, model[0], model[1]);
  2351. return 0;
  2352. }
  2353. if (strcmp(serial[0], serial[1])) {
  2354. printk(KERN_INFO
  2355. "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
  2356. ap->id, dev->devno, serial[0], serial[1]);
  2357. return 0;
  2358. }
  2359. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2360. printk(KERN_INFO
  2361. "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
  2362. ap->id, dev->devno, (unsigned long long)dev->n_sectors,
  2363. (unsigned long long)new_n_sectors);
  2364. return 0;
  2365. }
  2366. return 1;
  2367. }
  2368. /**
  2369. * ata_dev_revalidate - Revalidate ATA device
  2370. * @ap: port on which the device to revalidate resides
  2371. * @dev: device to revalidate
  2372. * @post_reset: is this revalidation after reset?
  2373. *
  2374. * Re-read IDENTIFY page and make sure @dev is still attached to
  2375. * the port.
  2376. *
  2377. * LOCKING:
  2378. * Kernel thread context (may sleep)
  2379. *
  2380. * RETURNS:
  2381. * 0 on success, negative errno otherwise
  2382. */
  2383. int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
  2384. int post_reset)
  2385. {
  2386. unsigned int class = dev->class;
  2387. u16 *id = NULL;
  2388. int rc;
  2389. if (!ata_dev_enabled(dev)) {
  2390. rc = -ENODEV;
  2391. goto fail;
  2392. }
  2393. /* allocate & read ID data */
  2394. rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
  2395. if (rc)
  2396. goto fail;
  2397. /* is the device still there? */
  2398. if (!ata_dev_same_device(ap, dev, class, id)) {
  2399. rc = -ENODEV;
  2400. goto fail;
  2401. }
  2402. kfree(dev->id);
  2403. dev->id = id;
  2404. /* configure device according to the new ID */
  2405. rc = ata_dev_configure(ap, dev, 0);
  2406. if (rc == 0)
  2407. return 0;
  2408. fail:
  2409. printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
  2410. ap->id, dev->devno, rc);
  2411. kfree(id);
  2412. return rc;
  2413. }
  2414. static const char * const ata_dma_blacklist [] = {
  2415. "WDC AC11000H", NULL,
  2416. "WDC AC22100H", NULL,
  2417. "WDC AC32500H", NULL,
  2418. "WDC AC33100H", NULL,
  2419. "WDC AC31600H", NULL,
  2420. "WDC AC32100H", "24.09P07",
  2421. "WDC AC23200L", "21.10N21",
  2422. "Compaq CRD-8241B", NULL,
  2423. "CRD-8400B", NULL,
  2424. "CRD-8480B", NULL,
  2425. "CRD-8482B", NULL,
  2426. "CRD-84", NULL,
  2427. "SanDisk SDP3B", NULL,
  2428. "SanDisk SDP3B-64", NULL,
  2429. "SANYO CD-ROM CRD", NULL,
  2430. "HITACHI CDR-8", NULL,
  2431. "HITACHI CDR-8335", NULL,
  2432. "HITACHI CDR-8435", NULL,
  2433. "Toshiba CD-ROM XM-6202B", NULL,
  2434. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2435. "CD-532E-A", NULL,
  2436. "E-IDE CD-ROM CR-840", NULL,
  2437. "CD-ROM Drive/F5A", NULL,
  2438. "WPI CDD-820", NULL,
  2439. "SAMSUNG CD-ROM SC-148C", NULL,
  2440. "SAMSUNG CD-ROM SC", NULL,
  2441. "SanDisk SDP3B-64", NULL,
  2442. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2443. "_NEC DV5800A", NULL,
  2444. "SAMSUNG CD-ROM SN-124", "N001"
  2445. };
  2446. static int ata_strim(char *s, size_t len)
  2447. {
  2448. len = strnlen(s, len);
  2449. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2450. while ((len > 0) && (s[len - 1] == ' ')) {
  2451. len--;
  2452. s[len] = 0;
  2453. }
  2454. return len;
  2455. }
  2456. static int ata_dma_blacklisted(const struct ata_device *dev)
  2457. {
  2458. unsigned char model_num[40];
  2459. unsigned char model_rev[16];
  2460. unsigned int nlen, rlen;
  2461. int i;
  2462. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2463. sizeof(model_num));
  2464. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2465. sizeof(model_rev));
  2466. nlen = ata_strim(model_num, sizeof(model_num));
  2467. rlen = ata_strim(model_rev, sizeof(model_rev));
  2468. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2469. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2470. if (ata_dma_blacklist[i+1] == NULL)
  2471. return 1;
  2472. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2473. return 1;
  2474. }
  2475. }
  2476. return 0;
  2477. }
  2478. /**
  2479. * ata_dev_xfermask - Compute supported xfermask of the given device
  2480. * @ap: Port on which the device to compute xfermask for resides
  2481. * @dev: Device to compute xfermask for
  2482. *
  2483. * Compute supported xfermask of @dev and store it in
  2484. * dev->*_mask. This function is responsible for applying all
  2485. * known limits including host controller limits, device
  2486. * blacklist, etc...
  2487. *
  2488. * FIXME: The current implementation limits all transfer modes to
  2489. * the fastest of the lowested device on the port. This is not
  2490. * required on most controllers.
  2491. *
  2492. * LOCKING:
  2493. * None.
  2494. */
  2495. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
  2496. {
  2497. struct ata_host_set *hs = ap->host_set;
  2498. unsigned long xfer_mask;
  2499. int i;
  2500. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2501. ap->mwdma_mask, ap->udma_mask);
  2502. /* Apply cable rule here. Don't apply it early because when
  2503. * we handle hot plug the cable type can itself change.
  2504. */
  2505. if (ap->cbl == ATA_CBL_PATA40)
  2506. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2507. /* FIXME: Use port-wide xfermask for now */
  2508. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2509. struct ata_device *d = &ap->device[i];
  2510. if (ata_dev_absent(d))
  2511. continue;
  2512. if (ata_dev_disabled(d)) {
  2513. /* to avoid violating device selection timing */
  2514. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2515. UINT_MAX, UINT_MAX);
  2516. continue;
  2517. }
  2518. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2519. d->mwdma_mask, d->udma_mask);
  2520. xfer_mask &= ata_id_xfermask(d->id);
  2521. if (ata_dma_blacklisted(d))
  2522. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2523. }
  2524. if (ata_dma_blacklisted(dev))
  2525. printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
  2526. "disabling DMA\n", ap->id, dev->devno);
  2527. if (hs->flags & ATA_HOST_SIMPLEX) {
  2528. if (hs->simplex_claimed)
  2529. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2530. }
  2531. if (ap->ops->mode_filter)
  2532. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2533. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2534. &dev->mwdma_mask, &dev->udma_mask);
  2535. }
  2536. /**
  2537. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2538. * @ap: Port associated with device @dev
  2539. * @dev: Device to which command will be sent
  2540. *
  2541. * Issue SET FEATURES - XFER MODE command to device @dev
  2542. * on port @ap.
  2543. *
  2544. * LOCKING:
  2545. * PCI/etc. bus probe sem.
  2546. *
  2547. * RETURNS:
  2548. * 0 on success, AC_ERR_* mask otherwise.
  2549. */
  2550. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  2551. struct ata_device *dev)
  2552. {
  2553. struct ata_taskfile tf;
  2554. unsigned int err_mask;
  2555. /* set up set-features taskfile */
  2556. DPRINTK("set features - xfer mode\n");
  2557. ata_tf_init(ap, &tf, dev->devno);
  2558. tf.command = ATA_CMD_SET_FEATURES;
  2559. tf.feature = SETFEATURES_XFER;
  2560. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2561. tf.protocol = ATA_PROT_NODATA;
  2562. tf.nsect = dev->xfer_mode;
  2563. err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
  2564. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2565. return err_mask;
  2566. }
  2567. /**
  2568. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2569. * @ap: Port associated with device @dev
  2570. * @dev: Device to which command will be sent
  2571. *
  2572. * LOCKING:
  2573. * Kernel thread context (may sleep)
  2574. *
  2575. * RETURNS:
  2576. * 0 on success, AC_ERR_* mask otherwise.
  2577. */
  2578. static unsigned int ata_dev_init_params(struct ata_port *ap,
  2579. struct ata_device *dev,
  2580. u16 heads,
  2581. u16 sectors)
  2582. {
  2583. struct ata_taskfile tf;
  2584. unsigned int err_mask;
  2585. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2586. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2587. return AC_ERR_INVALID;
  2588. /* set up init dev params taskfile */
  2589. DPRINTK("init dev params \n");
  2590. ata_tf_init(ap, &tf, dev->devno);
  2591. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2592. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2593. tf.protocol = ATA_PROT_NODATA;
  2594. tf.nsect = sectors;
  2595. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2596. err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
  2597. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2598. return err_mask;
  2599. }
  2600. /**
  2601. * ata_sg_clean - Unmap DMA memory associated with command
  2602. * @qc: Command containing DMA memory to be released
  2603. *
  2604. * Unmap all mapped DMA memory associated with this command.
  2605. *
  2606. * LOCKING:
  2607. * spin_lock_irqsave(host_set lock)
  2608. */
  2609. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2610. {
  2611. struct ata_port *ap = qc->ap;
  2612. struct scatterlist *sg = qc->__sg;
  2613. int dir = qc->dma_dir;
  2614. void *pad_buf = NULL;
  2615. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2616. WARN_ON(sg == NULL);
  2617. if (qc->flags & ATA_QCFLAG_SINGLE)
  2618. WARN_ON(qc->n_elem > 1);
  2619. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2620. /* if we padded the buffer out to 32-bit bound, and data
  2621. * xfer direction is from-device, we must copy from the
  2622. * pad buffer back into the supplied buffer
  2623. */
  2624. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2625. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2626. if (qc->flags & ATA_QCFLAG_SG) {
  2627. if (qc->n_elem)
  2628. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2629. /* restore last sg */
  2630. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2631. if (pad_buf) {
  2632. struct scatterlist *psg = &qc->pad_sgent;
  2633. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2634. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2635. kunmap_atomic(addr, KM_IRQ0);
  2636. }
  2637. } else {
  2638. if (qc->n_elem)
  2639. dma_unmap_single(ap->dev,
  2640. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2641. dir);
  2642. /* restore sg */
  2643. sg->length += qc->pad_len;
  2644. if (pad_buf)
  2645. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2646. pad_buf, qc->pad_len);
  2647. }
  2648. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2649. qc->__sg = NULL;
  2650. }
  2651. /**
  2652. * ata_fill_sg - Fill PCI IDE PRD table
  2653. * @qc: Metadata associated with taskfile to be transferred
  2654. *
  2655. * Fill PCI IDE PRD (scatter-gather) table with segments
  2656. * associated with the current disk command.
  2657. *
  2658. * LOCKING:
  2659. * spin_lock_irqsave(host_set lock)
  2660. *
  2661. */
  2662. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2663. {
  2664. struct ata_port *ap = qc->ap;
  2665. struct scatterlist *sg;
  2666. unsigned int idx;
  2667. WARN_ON(qc->__sg == NULL);
  2668. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2669. idx = 0;
  2670. ata_for_each_sg(sg, qc) {
  2671. u32 addr, offset;
  2672. u32 sg_len, len;
  2673. /* determine if physical DMA addr spans 64K boundary.
  2674. * Note h/w doesn't support 64-bit, so we unconditionally
  2675. * truncate dma_addr_t to u32.
  2676. */
  2677. addr = (u32) sg_dma_address(sg);
  2678. sg_len = sg_dma_len(sg);
  2679. while (sg_len) {
  2680. offset = addr & 0xffff;
  2681. len = sg_len;
  2682. if ((offset + sg_len) > 0x10000)
  2683. len = 0x10000 - offset;
  2684. ap->prd[idx].addr = cpu_to_le32(addr);
  2685. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2686. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2687. idx++;
  2688. sg_len -= len;
  2689. addr += len;
  2690. }
  2691. }
  2692. if (idx)
  2693. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2694. }
  2695. /**
  2696. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2697. * @qc: Metadata associated with taskfile to check
  2698. *
  2699. * Allow low-level driver to filter ATA PACKET commands, returning
  2700. * a status indicating whether or not it is OK to use DMA for the
  2701. * supplied PACKET command.
  2702. *
  2703. * LOCKING:
  2704. * spin_lock_irqsave(host_set lock)
  2705. *
  2706. * RETURNS: 0 when ATAPI DMA can be used
  2707. * nonzero otherwise
  2708. */
  2709. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2710. {
  2711. struct ata_port *ap = qc->ap;
  2712. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2713. if (ap->ops->check_atapi_dma)
  2714. rc = ap->ops->check_atapi_dma(qc);
  2715. return rc;
  2716. }
  2717. /**
  2718. * ata_qc_prep - Prepare taskfile for submission
  2719. * @qc: Metadata associated with taskfile to be prepared
  2720. *
  2721. * Prepare ATA taskfile for submission.
  2722. *
  2723. * LOCKING:
  2724. * spin_lock_irqsave(host_set lock)
  2725. */
  2726. void ata_qc_prep(struct ata_queued_cmd *qc)
  2727. {
  2728. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2729. return;
  2730. ata_fill_sg(qc);
  2731. }
  2732. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2733. /**
  2734. * ata_sg_init_one - Associate command with memory buffer
  2735. * @qc: Command to be associated
  2736. * @buf: Memory buffer
  2737. * @buflen: Length of memory buffer, in bytes.
  2738. *
  2739. * Initialize the data-related elements of queued_cmd @qc
  2740. * to point to a single memory buffer, @buf of byte length @buflen.
  2741. *
  2742. * LOCKING:
  2743. * spin_lock_irqsave(host_set lock)
  2744. */
  2745. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2746. {
  2747. struct scatterlist *sg;
  2748. qc->flags |= ATA_QCFLAG_SINGLE;
  2749. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2750. qc->__sg = &qc->sgent;
  2751. qc->n_elem = 1;
  2752. qc->orig_n_elem = 1;
  2753. qc->buf_virt = buf;
  2754. sg = qc->__sg;
  2755. sg_init_one(sg, buf, buflen);
  2756. }
  2757. /**
  2758. * ata_sg_init - Associate command with scatter-gather table.
  2759. * @qc: Command to be associated
  2760. * @sg: Scatter-gather table.
  2761. * @n_elem: Number of elements in s/g table.
  2762. *
  2763. * Initialize the data-related elements of queued_cmd @qc
  2764. * to point to a scatter-gather table @sg, containing @n_elem
  2765. * elements.
  2766. *
  2767. * LOCKING:
  2768. * spin_lock_irqsave(host_set lock)
  2769. */
  2770. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2771. unsigned int n_elem)
  2772. {
  2773. qc->flags |= ATA_QCFLAG_SG;
  2774. qc->__sg = sg;
  2775. qc->n_elem = n_elem;
  2776. qc->orig_n_elem = n_elem;
  2777. }
  2778. /**
  2779. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2780. * @qc: Command with memory buffer to be mapped.
  2781. *
  2782. * DMA-map the memory buffer associated with queued_cmd @qc.
  2783. *
  2784. * LOCKING:
  2785. * spin_lock_irqsave(host_set lock)
  2786. *
  2787. * RETURNS:
  2788. * Zero on success, negative on error.
  2789. */
  2790. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2791. {
  2792. struct ata_port *ap = qc->ap;
  2793. int dir = qc->dma_dir;
  2794. struct scatterlist *sg = qc->__sg;
  2795. dma_addr_t dma_address;
  2796. int trim_sg = 0;
  2797. /* we must lengthen transfers to end on a 32-bit boundary */
  2798. qc->pad_len = sg->length & 3;
  2799. if (qc->pad_len) {
  2800. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2801. struct scatterlist *psg = &qc->pad_sgent;
  2802. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2803. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2804. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2805. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2806. qc->pad_len);
  2807. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2808. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2809. /* trim sg */
  2810. sg->length -= qc->pad_len;
  2811. if (sg->length == 0)
  2812. trim_sg = 1;
  2813. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2814. sg->length, qc->pad_len);
  2815. }
  2816. if (trim_sg) {
  2817. qc->n_elem--;
  2818. goto skip_map;
  2819. }
  2820. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2821. sg->length, dir);
  2822. if (dma_mapping_error(dma_address)) {
  2823. /* restore sg */
  2824. sg->length += qc->pad_len;
  2825. return -1;
  2826. }
  2827. sg_dma_address(sg) = dma_address;
  2828. sg_dma_len(sg) = sg->length;
  2829. skip_map:
  2830. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2831. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2832. return 0;
  2833. }
  2834. /**
  2835. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2836. * @qc: Command with scatter-gather table to be mapped.
  2837. *
  2838. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2839. *
  2840. * LOCKING:
  2841. * spin_lock_irqsave(host_set lock)
  2842. *
  2843. * RETURNS:
  2844. * Zero on success, negative on error.
  2845. *
  2846. */
  2847. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2848. {
  2849. struct ata_port *ap = qc->ap;
  2850. struct scatterlist *sg = qc->__sg;
  2851. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2852. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2853. VPRINTK("ENTER, ata%u\n", ap->id);
  2854. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2855. /* we must lengthen transfers to end on a 32-bit boundary */
  2856. qc->pad_len = lsg->length & 3;
  2857. if (qc->pad_len) {
  2858. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2859. struct scatterlist *psg = &qc->pad_sgent;
  2860. unsigned int offset;
  2861. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2862. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2863. /*
  2864. * psg->page/offset are used to copy to-be-written
  2865. * data in this function or read data in ata_sg_clean.
  2866. */
  2867. offset = lsg->offset + lsg->length - qc->pad_len;
  2868. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2869. psg->offset = offset_in_page(offset);
  2870. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2871. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2872. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2873. kunmap_atomic(addr, KM_IRQ0);
  2874. }
  2875. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2876. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2877. /* trim last sg */
  2878. lsg->length -= qc->pad_len;
  2879. if (lsg->length == 0)
  2880. trim_sg = 1;
  2881. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2882. qc->n_elem - 1, lsg->length, qc->pad_len);
  2883. }
  2884. pre_n_elem = qc->n_elem;
  2885. if (trim_sg && pre_n_elem)
  2886. pre_n_elem--;
  2887. if (!pre_n_elem) {
  2888. n_elem = 0;
  2889. goto skip_map;
  2890. }
  2891. dir = qc->dma_dir;
  2892. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2893. if (n_elem < 1) {
  2894. /* restore last sg */
  2895. lsg->length += qc->pad_len;
  2896. return -1;
  2897. }
  2898. DPRINTK("%d sg elements mapped\n", n_elem);
  2899. skip_map:
  2900. qc->n_elem = n_elem;
  2901. return 0;
  2902. }
  2903. /**
  2904. * ata_poll_qc_complete - turn irq back on and finish qc
  2905. * @qc: Command to complete
  2906. * @err_mask: ATA status register content
  2907. *
  2908. * LOCKING:
  2909. * None. (grabs host lock)
  2910. */
  2911. void ata_poll_qc_complete(struct ata_queued_cmd *qc)
  2912. {
  2913. struct ata_port *ap = qc->ap;
  2914. unsigned long flags;
  2915. spin_lock_irqsave(&ap->host_set->lock, flags);
  2916. ap->flags &= ~ATA_FLAG_NOINTR;
  2917. ata_irq_on(ap);
  2918. ata_qc_complete(qc);
  2919. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  2920. }
  2921. /**
  2922. * ata_pio_poll - poll using PIO, depending on current state
  2923. * @qc: qc in progress
  2924. *
  2925. * LOCKING:
  2926. * None. (executing in kernel thread context)
  2927. *
  2928. * RETURNS:
  2929. * timeout value to use
  2930. */
  2931. static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
  2932. {
  2933. struct ata_port *ap = qc->ap;
  2934. u8 status;
  2935. unsigned int poll_state = HSM_ST_UNKNOWN;
  2936. unsigned int reg_state = HSM_ST_UNKNOWN;
  2937. switch (ap->hsm_task_state) {
  2938. case HSM_ST:
  2939. case HSM_ST_POLL:
  2940. poll_state = HSM_ST_POLL;
  2941. reg_state = HSM_ST;
  2942. break;
  2943. case HSM_ST_LAST:
  2944. case HSM_ST_LAST_POLL:
  2945. poll_state = HSM_ST_LAST_POLL;
  2946. reg_state = HSM_ST_LAST;
  2947. break;
  2948. default:
  2949. BUG();
  2950. break;
  2951. }
  2952. status = ata_chk_status(ap);
  2953. if (status & ATA_BUSY) {
  2954. if (time_after(jiffies, ap->pio_task_timeout)) {
  2955. qc->err_mask |= AC_ERR_TIMEOUT;
  2956. ap->hsm_task_state = HSM_ST_TMOUT;
  2957. return 0;
  2958. }
  2959. ap->hsm_task_state = poll_state;
  2960. return ATA_SHORT_PAUSE;
  2961. }
  2962. ap->hsm_task_state = reg_state;
  2963. return 0;
  2964. }
  2965. /**
  2966. * ata_pio_complete - check if drive is busy or idle
  2967. * @qc: qc to complete
  2968. *
  2969. * LOCKING:
  2970. * None. (executing in kernel thread context)
  2971. *
  2972. * RETURNS:
  2973. * Non-zero if qc completed, zero otherwise.
  2974. */
  2975. static int ata_pio_complete(struct ata_queued_cmd *qc)
  2976. {
  2977. struct ata_port *ap = qc->ap;
  2978. u8 drv_stat;
  2979. /*
  2980. * This is purely heuristic. This is a fast path. Sometimes when
  2981. * we enter, BSY will be cleared in a chk-status or two. If not,
  2982. * the drive is probably seeking or something. Snooze for a couple
  2983. * msecs, then chk-status again. If still busy, fall back to
  2984. * HSM_ST_POLL state.
  2985. */
  2986. drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
  2987. if (drv_stat & ATA_BUSY) {
  2988. msleep(2);
  2989. drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
  2990. if (drv_stat & ATA_BUSY) {
  2991. ap->hsm_task_state = HSM_ST_LAST_POLL;
  2992. ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
  2993. return 0;
  2994. }
  2995. }
  2996. drv_stat = ata_wait_idle(ap);
  2997. if (!ata_ok(drv_stat)) {
  2998. qc->err_mask |= __ac_err_mask(drv_stat);
  2999. ap->hsm_task_state = HSM_ST_ERR;
  3000. return 0;
  3001. }
  3002. ap->hsm_task_state = HSM_ST_IDLE;
  3003. WARN_ON(qc->err_mask);
  3004. ata_poll_qc_complete(qc);
  3005. /* another command may start at this point */
  3006. return 1;
  3007. }
  3008. /**
  3009. * swap_buf_le16 - swap halves of 16-bit words in place
  3010. * @buf: Buffer to swap
  3011. * @buf_words: Number of 16-bit words in buffer.
  3012. *
  3013. * Swap halves of 16-bit words if needed to convert from
  3014. * little-endian byte order to native cpu byte order, or
  3015. * vice-versa.
  3016. *
  3017. * LOCKING:
  3018. * Inherited from caller.
  3019. */
  3020. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  3021. {
  3022. #ifdef __BIG_ENDIAN
  3023. unsigned int i;
  3024. for (i = 0; i < buf_words; i++)
  3025. buf[i] = le16_to_cpu(buf[i]);
  3026. #endif /* __BIG_ENDIAN */
  3027. }
  3028. /**
  3029. * ata_mmio_data_xfer - Transfer data by MMIO
  3030. * @ap: port to read/write
  3031. * @buf: data buffer
  3032. * @buflen: buffer length
  3033. * @write_data: read/write
  3034. *
  3035. * Transfer data from/to the device data register by MMIO.
  3036. *
  3037. * LOCKING:
  3038. * Inherited from caller.
  3039. */
  3040. static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
  3041. unsigned int buflen, int write_data)
  3042. {
  3043. unsigned int i;
  3044. unsigned int words = buflen >> 1;
  3045. u16 *buf16 = (u16 *) buf;
  3046. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  3047. /* Transfer multiple of 2 bytes */
  3048. if (write_data) {
  3049. for (i = 0; i < words; i++)
  3050. writew(le16_to_cpu(buf16[i]), mmio);
  3051. } else {
  3052. for (i = 0; i < words; i++)
  3053. buf16[i] = cpu_to_le16(readw(mmio));
  3054. }
  3055. /* Transfer trailing 1 byte, if any. */
  3056. if (unlikely(buflen & 0x01)) {
  3057. u16 align_buf[1] = { 0 };
  3058. unsigned char *trailing_buf = buf + buflen - 1;
  3059. if (write_data) {
  3060. memcpy(align_buf, trailing_buf, 1);
  3061. writew(le16_to_cpu(align_buf[0]), mmio);
  3062. } else {
  3063. align_buf[0] = cpu_to_le16(readw(mmio));
  3064. memcpy(trailing_buf, align_buf, 1);
  3065. }
  3066. }
  3067. }
  3068. /**
  3069. * ata_pio_data_xfer - Transfer data by PIO
  3070. * @ap: port to read/write
  3071. * @buf: data buffer
  3072. * @buflen: buffer length
  3073. * @write_data: read/write
  3074. *
  3075. * Transfer data from/to the device data register by PIO.
  3076. *
  3077. * LOCKING:
  3078. * Inherited from caller.
  3079. */
  3080. static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
  3081. unsigned int buflen, int write_data)
  3082. {
  3083. unsigned int words = buflen >> 1;
  3084. /* Transfer multiple of 2 bytes */
  3085. if (write_data)
  3086. outsw(ap->ioaddr.data_addr, buf, words);
  3087. else
  3088. insw(ap->ioaddr.data_addr, buf, words);
  3089. /* Transfer trailing 1 byte, if any. */
  3090. if (unlikely(buflen & 0x01)) {
  3091. u16 align_buf[1] = { 0 };
  3092. unsigned char *trailing_buf = buf + buflen - 1;
  3093. if (write_data) {
  3094. memcpy(align_buf, trailing_buf, 1);
  3095. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3096. } else {
  3097. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3098. memcpy(trailing_buf, align_buf, 1);
  3099. }
  3100. }
  3101. }
  3102. /**
  3103. * ata_data_xfer - Transfer data from/to the data register.
  3104. * @ap: port to read/write
  3105. * @buf: data buffer
  3106. * @buflen: buffer length
  3107. * @do_write: read/write
  3108. *
  3109. * Transfer data from/to the device data register.
  3110. *
  3111. * LOCKING:
  3112. * Inherited from caller.
  3113. */
  3114. static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
  3115. unsigned int buflen, int do_write)
  3116. {
  3117. /* Make the crap hardware pay the costs not the good stuff */
  3118. if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
  3119. unsigned long flags;
  3120. local_irq_save(flags);
  3121. if (ap->flags & ATA_FLAG_MMIO)
  3122. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3123. else
  3124. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3125. local_irq_restore(flags);
  3126. } else {
  3127. if (ap->flags & ATA_FLAG_MMIO)
  3128. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3129. else
  3130. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3131. }
  3132. }
  3133. /**
  3134. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3135. * @qc: Command on going
  3136. *
  3137. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3138. *
  3139. * LOCKING:
  3140. * Inherited from caller.
  3141. */
  3142. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3143. {
  3144. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3145. struct scatterlist *sg = qc->__sg;
  3146. struct ata_port *ap = qc->ap;
  3147. struct page *page;
  3148. unsigned int offset;
  3149. unsigned char *buf;
  3150. if (qc->cursect == (qc->nsect - 1))
  3151. ap->hsm_task_state = HSM_ST_LAST;
  3152. page = sg[qc->cursg].page;
  3153. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3154. /* get the current page and offset */
  3155. page = nth_page(page, (offset >> PAGE_SHIFT));
  3156. offset %= PAGE_SIZE;
  3157. buf = kmap(page) + offset;
  3158. qc->cursect++;
  3159. qc->cursg_ofs++;
  3160. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3161. qc->cursg++;
  3162. qc->cursg_ofs = 0;
  3163. }
  3164. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3165. /* do the actual data transfer */
  3166. do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3167. ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
  3168. kunmap(page);
  3169. }
  3170. /**
  3171. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3172. * @qc: Command on going
  3173. * @bytes: number of bytes
  3174. *
  3175. * Transfer Transfer data from/to the ATAPI device.
  3176. *
  3177. * LOCKING:
  3178. * Inherited from caller.
  3179. *
  3180. */
  3181. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3182. {
  3183. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3184. struct scatterlist *sg = qc->__sg;
  3185. struct ata_port *ap = qc->ap;
  3186. struct page *page;
  3187. unsigned char *buf;
  3188. unsigned int offset, count;
  3189. if (qc->curbytes + bytes >= qc->nbytes)
  3190. ap->hsm_task_state = HSM_ST_LAST;
  3191. next_sg:
  3192. if (unlikely(qc->cursg >= qc->n_elem)) {
  3193. /*
  3194. * The end of qc->sg is reached and the device expects
  3195. * more data to transfer. In order not to overrun qc->sg
  3196. * and fulfill length specified in the byte count register,
  3197. * - for read case, discard trailing data from the device
  3198. * - for write case, padding zero data to the device
  3199. */
  3200. u16 pad_buf[1] = { 0 };
  3201. unsigned int words = bytes >> 1;
  3202. unsigned int i;
  3203. if (words) /* warning if bytes > 1 */
  3204. printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
  3205. ap->id, bytes);
  3206. for (i = 0; i < words; i++)
  3207. ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
  3208. ap->hsm_task_state = HSM_ST_LAST;
  3209. return;
  3210. }
  3211. sg = &qc->__sg[qc->cursg];
  3212. page = sg->page;
  3213. offset = sg->offset + qc->cursg_ofs;
  3214. /* get the current page and offset */
  3215. page = nth_page(page, (offset >> PAGE_SHIFT));
  3216. offset %= PAGE_SIZE;
  3217. /* don't overrun current sg */
  3218. count = min(sg->length - qc->cursg_ofs, bytes);
  3219. /* don't cross page boundaries */
  3220. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3221. buf = kmap(page) + offset;
  3222. bytes -= count;
  3223. qc->curbytes += count;
  3224. qc->cursg_ofs += count;
  3225. if (qc->cursg_ofs == sg->length) {
  3226. qc->cursg++;
  3227. qc->cursg_ofs = 0;
  3228. }
  3229. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3230. /* do the actual data transfer */
  3231. ata_data_xfer(ap, buf, count, do_write);
  3232. kunmap(page);
  3233. if (bytes)
  3234. goto next_sg;
  3235. }
  3236. /**
  3237. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3238. * @qc: Command on going
  3239. *
  3240. * Transfer Transfer data from/to the ATAPI device.
  3241. *
  3242. * LOCKING:
  3243. * Inherited from caller.
  3244. */
  3245. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3246. {
  3247. struct ata_port *ap = qc->ap;
  3248. struct ata_device *dev = qc->dev;
  3249. unsigned int ireason, bc_lo, bc_hi, bytes;
  3250. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3251. ap->ops->tf_read(ap, &qc->tf);
  3252. ireason = qc->tf.nsect;
  3253. bc_lo = qc->tf.lbam;
  3254. bc_hi = qc->tf.lbah;
  3255. bytes = (bc_hi << 8) | bc_lo;
  3256. /* shall be cleared to zero, indicating xfer of data */
  3257. if (ireason & (1 << 0))
  3258. goto err_out;
  3259. /* make sure transfer direction matches expected */
  3260. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3261. if (do_write != i_write)
  3262. goto err_out;
  3263. __atapi_pio_bytes(qc, bytes);
  3264. return;
  3265. err_out:
  3266. printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
  3267. ap->id, dev->devno);
  3268. qc->err_mask |= AC_ERR_HSM;
  3269. ap->hsm_task_state = HSM_ST_ERR;
  3270. }
  3271. /**
  3272. * ata_pio_block - start PIO on a block
  3273. * @qc: qc to transfer block for
  3274. *
  3275. * LOCKING:
  3276. * None. (executing in kernel thread context)
  3277. */
  3278. static void ata_pio_block(struct ata_queued_cmd *qc)
  3279. {
  3280. struct ata_port *ap = qc->ap;
  3281. u8 status;
  3282. /*
  3283. * This is purely heuristic. This is a fast path.
  3284. * Sometimes when we enter, BSY will be cleared in
  3285. * a chk-status or two. If not, the drive is probably seeking
  3286. * or something. Snooze for a couple msecs, then
  3287. * chk-status again. If still busy, fall back to
  3288. * HSM_ST_POLL state.
  3289. */
  3290. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3291. if (status & ATA_BUSY) {
  3292. msleep(2);
  3293. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3294. if (status & ATA_BUSY) {
  3295. ap->hsm_task_state = HSM_ST_POLL;
  3296. ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
  3297. return;
  3298. }
  3299. }
  3300. /* check error */
  3301. if (status & (ATA_ERR | ATA_DF)) {
  3302. qc->err_mask |= AC_ERR_DEV;
  3303. ap->hsm_task_state = HSM_ST_ERR;
  3304. return;
  3305. }
  3306. /* transfer data if any */
  3307. if (is_atapi_taskfile(&qc->tf)) {
  3308. /* DRQ=0 means no more data to transfer */
  3309. if ((status & ATA_DRQ) == 0) {
  3310. ap->hsm_task_state = HSM_ST_LAST;
  3311. return;
  3312. }
  3313. atapi_pio_bytes(qc);
  3314. } else {
  3315. /* handle BSY=0, DRQ=0 as error */
  3316. if ((status & ATA_DRQ) == 0) {
  3317. qc->err_mask |= AC_ERR_HSM;
  3318. ap->hsm_task_state = HSM_ST_ERR;
  3319. return;
  3320. }
  3321. ata_pio_sector(qc);
  3322. }
  3323. }
  3324. static void ata_pio_error(struct ata_queued_cmd *qc)
  3325. {
  3326. struct ata_port *ap = qc->ap;
  3327. if (qc->tf.command != ATA_CMD_PACKET)
  3328. printk(KERN_WARNING "ata%u: dev %u PIO error\n",
  3329. ap->id, qc->dev->devno);
  3330. /* make sure qc->err_mask is available to
  3331. * know what's wrong and recover
  3332. */
  3333. WARN_ON(qc->err_mask == 0);
  3334. ap->hsm_task_state = HSM_ST_IDLE;
  3335. ata_poll_qc_complete(qc);
  3336. }
  3337. static void ata_pio_task(void *_data)
  3338. {
  3339. struct ata_queued_cmd *qc = _data;
  3340. struct ata_port *ap = qc->ap;
  3341. unsigned long timeout;
  3342. int qc_completed;
  3343. fsm_start:
  3344. timeout = 0;
  3345. qc_completed = 0;
  3346. switch (ap->hsm_task_state) {
  3347. case HSM_ST_IDLE:
  3348. return;
  3349. case HSM_ST:
  3350. ata_pio_block(qc);
  3351. break;
  3352. case HSM_ST_LAST:
  3353. qc_completed = ata_pio_complete(qc);
  3354. break;
  3355. case HSM_ST_POLL:
  3356. case HSM_ST_LAST_POLL:
  3357. timeout = ata_pio_poll(qc);
  3358. break;
  3359. case HSM_ST_TMOUT:
  3360. case HSM_ST_ERR:
  3361. ata_pio_error(qc);
  3362. return;
  3363. }
  3364. if (timeout)
  3365. ata_port_queue_task(ap, ata_pio_task, qc, timeout);
  3366. else if (!qc_completed)
  3367. goto fsm_start;
  3368. }
  3369. /**
  3370. * atapi_packet_task - Write CDB bytes to hardware
  3371. * @_data: qc in progress
  3372. *
  3373. * When device has indicated its readiness to accept
  3374. * a CDB, this function is called. Send the CDB.
  3375. * If DMA is to be performed, exit immediately.
  3376. * Otherwise, we are in polling mode, so poll
  3377. * status under operation succeeds or fails.
  3378. *
  3379. * LOCKING:
  3380. * Kernel thread context (may sleep)
  3381. */
  3382. static void atapi_packet_task(void *_data)
  3383. {
  3384. struct ata_queued_cmd *qc = _data;
  3385. struct ata_port *ap = qc->ap;
  3386. u8 status;
  3387. /* sleep-wait for BSY to clear */
  3388. DPRINTK("busy wait\n");
  3389. if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
  3390. qc->err_mask |= AC_ERR_TIMEOUT;
  3391. goto err_out;
  3392. }
  3393. /* make sure DRQ is set */
  3394. status = ata_chk_status(ap);
  3395. if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
  3396. qc->err_mask |= AC_ERR_HSM;
  3397. goto err_out;
  3398. }
  3399. /* send SCSI cdb */
  3400. DPRINTK("send cdb\n");
  3401. WARN_ON(qc->dev->cdb_len < 12);
  3402. if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
  3403. qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
  3404. unsigned long flags;
  3405. /* Once we're done issuing command and kicking bmdma,
  3406. * irq handler takes over. To not lose irq, we need
  3407. * to clear NOINTR flag before sending cdb, but
  3408. * interrupt handler shouldn't be invoked before we're
  3409. * finished. Hence, the following locking.
  3410. */
  3411. spin_lock_irqsave(&ap->host_set->lock, flags);
  3412. ap->flags &= ~ATA_FLAG_NOINTR;
  3413. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  3414. if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
  3415. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3416. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3417. } else {
  3418. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  3419. /* PIO commands are handled by polling */
  3420. ap->hsm_task_state = HSM_ST;
  3421. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3422. }
  3423. return;
  3424. err_out:
  3425. ata_poll_qc_complete(qc);
  3426. }
  3427. /**
  3428. * ata_qc_new - Request an available ATA command, for queueing
  3429. * @ap: Port associated with device @dev
  3430. * @dev: Device from whom we request an available command structure
  3431. *
  3432. * LOCKING:
  3433. * None.
  3434. */
  3435. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3436. {
  3437. struct ata_queued_cmd *qc = NULL;
  3438. unsigned int i;
  3439. for (i = 0; i < ATA_MAX_QUEUE; i++)
  3440. if (!test_and_set_bit(i, &ap->qactive)) {
  3441. qc = ata_qc_from_tag(ap, i);
  3442. break;
  3443. }
  3444. if (qc)
  3445. qc->tag = i;
  3446. return qc;
  3447. }
  3448. /**
  3449. * ata_qc_new_init - Request an available ATA command, and initialize it
  3450. * @ap: Port associated with device @dev
  3451. * @dev: Device from whom we request an available command structure
  3452. *
  3453. * LOCKING:
  3454. * None.
  3455. */
  3456. struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
  3457. struct ata_device *dev)
  3458. {
  3459. struct ata_queued_cmd *qc;
  3460. qc = ata_qc_new(ap);
  3461. if (qc) {
  3462. qc->scsicmd = NULL;
  3463. qc->ap = ap;
  3464. qc->dev = dev;
  3465. ata_qc_reinit(qc);
  3466. }
  3467. return qc;
  3468. }
  3469. /**
  3470. * ata_qc_free - free unused ata_queued_cmd
  3471. * @qc: Command to complete
  3472. *
  3473. * Designed to free unused ata_queued_cmd object
  3474. * in case something prevents using it.
  3475. *
  3476. * LOCKING:
  3477. * spin_lock_irqsave(host_set lock)
  3478. */
  3479. void ata_qc_free(struct ata_queued_cmd *qc)
  3480. {
  3481. struct ata_port *ap = qc->ap;
  3482. unsigned int tag;
  3483. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3484. qc->flags = 0;
  3485. tag = qc->tag;
  3486. if (likely(ata_tag_valid(tag))) {
  3487. if (tag == ap->active_tag)
  3488. ap->active_tag = ATA_TAG_POISON;
  3489. qc->tag = ATA_TAG_POISON;
  3490. clear_bit(tag, &ap->qactive);
  3491. }
  3492. }
  3493. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3494. {
  3495. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3496. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3497. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3498. ata_sg_clean(qc);
  3499. /* atapi: mark qc as inactive to prevent the interrupt handler
  3500. * from completing the command twice later, before the error handler
  3501. * is called. (when rc != 0 and atapi request sense is needed)
  3502. */
  3503. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3504. /* call completion callback */
  3505. qc->complete_fn(qc);
  3506. }
  3507. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3508. {
  3509. struct ata_port *ap = qc->ap;
  3510. switch (qc->tf.protocol) {
  3511. case ATA_PROT_DMA:
  3512. case ATA_PROT_ATAPI_DMA:
  3513. return 1;
  3514. case ATA_PROT_ATAPI:
  3515. case ATA_PROT_PIO:
  3516. if (ap->flags & ATA_FLAG_PIO_DMA)
  3517. return 1;
  3518. /* fall through */
  3519. default:
  3520. return 0;
  3521. }
  3522. /* never reached */
  3523. }
  3524. /**
  3525. * ata_qc_issue - issue taskfile to device
  3526. * @qc: command to issue to device
  3527. *
  3528. * Prepare an ATA command to submission to device.
  3529. * This includes mapping the data into a DMA-able
  3530. * area, filling in the S/G table, and finally
  3531. * writing the taskfile to hardware, starting the command.
  3532. *
  3533. * LOCKING:
  3534. * spin_lock_irqsave(host_set lock)
  3535. */
  3536. void ata_qc_issue(struct ata_queued_cmd *qc)
  3537. {
  3538. struct ata_port *ap = qc->ap;
  3539. qc->ap->active_tag = qc->tag;
  3540. qc->flags |= ATA_QCFLAG_ACTIVE;
  3541. if (ata_should_dma_map(qc)) {
  3542. if (qc->flags & ATA_QCFLAG_SG) {
  3543. if (ata_sg_setup(qc))
  3544. goto sg_err;
  3545. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3546. if (ata_sg_setup_one(qc))
  3547. goto sg_err;
  3548. }
  3549. } else {
  3550. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3551. }
  3552. ap->ops->qc_prep(qc);
  3553. qc->err_mask |= ap->ops->qc_issue(qc);
  3554. if (unlikely(qc->err_mask))
  3555. goto err;
  3556. return;
  3557. sg_err:
  3558. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3559. qc->err_mask |= AC_ERR_SYSTEM;
  3560. err:
  3561. ata_qc_complete(qc);
  3562. }
  3563. /**
  3564. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3565. * @qc: command to issue to device
  3566. *
  3567. * Using various libata functions and hooks, this function
  3568. * starts an ATA command. ATA commands are grouped into
  3569. * classes called "protocols", and issuing each type of protocol
  3570. * is slightly different.
  3571. *
  3572. * May be used as the qc_issue() entry in ata_port_operations.
  3573. *
  3574. * LOCKING:
  3575. * spin_lock_irqsave(host_set lock)
  3576. *
  3577. * RETURNS:
  3578. * Zero on success, AC_ERR_* mask on failure
  3579. */
  3580. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3581. {
  3582. struct ata_port *ap = qc->ap;
  3583. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3584. switch (qc->tf.protocol) {
  3585. case ATA_PROT_NODATA:
  3586. ata_tf_to_host(ap, &qc->tf);
  3587. break;
  3588. case ATA_PROT_DMA:
  3589. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3590. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3591. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3592. break;
  3593. case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
  3594. ata_qc_set_polling(qc);
  3595. ata_tf_to_host(ap, &qc->tf);
  3596. ap->hsm_task_state = HSM_ST;
  3597. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3598. break;
  3599. case ATA_PROT_ATAPI:
  3600. ata_qc_set_polling(qc);
  3601. ata_tf_to_host(ap, &qc->tf);
  3602. ata_port_queue_task(ap, atapi_packet_task, qc, 0);
  3603. break;
  3604. case ATA_PROT_ATAPI_NODATA:
  3605. ap->flags |= ATA_FLAG_NOINTR;
  3606. ata_tf_to_host(ap, &qc->tf);
  3607. ata_port_queue_task(ap, atapi_packet_task, qc, 0);
  3608. break;
  3609. case ATA_PROT_ATAPI_DMA:
  3610. ap->flags |= ATA_FLAG_NOINTR;
  3611. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3612. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3613. ata_port_queue_task(ap, atapi_packet_task, qc, 0);
  3614. break;
  3615. default:
  3616. WARN_ON(1);
  3617. return AC_ERR_SYSTEM;
  3618. }
  3619. return 0;
  3620. }
  3621. /**
  3622. * ata_host_intr - Handle host interrupt for given (port, task)
  3623. * @ap: Port on which interrupt arrived (possibly...)
  3624. * @qc: Taskfile currently active in engine
  3625. *
  3626. * Handle host interrupt for given queued command. Currently,
  3627. * only DMA interrupts are handled. All other commands are
  3628. * handled via polling with interrupts disabled (nIEN bit).
  3629. *
  3630. * LOCKING:
  3631. * spin_lock_irqsave(host_set lock)
  3632. *
  3633. * RETURNS:
  3634. * One if interrupt was handled, zero if not (shared irq).
  3635. */
  3636. inline unsigned int ata_host_intr (struct ata_port *ap,
  3637. struct ata_queued_cmd *qc)
  3638. {
  3639. u8 status, host_stat;
  3640. switch (qc->tf.protocol) {
  3641. case ATA_PROT_DMA:
  3642. case ATA_PROT_ATAPI_DMA:
  3643. case ATA_PROT_ATAPI:
  3644. /* check status of DMA engine */
  3645. host_stat = ap->ops->bmdma_status(ap);
  3646. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3647. /* if it's not our irq... */
  3648. if (!(host_stat & ATA_DMA_INTR))
  3649. goto idle_irq;
  3650. /* before we do anything else, clear DMA-Start bit */
  3651. ap->ops->bmdma_stop(qc);
  3652. /* fall through */
  3653. case ATA_PROT_ATAPI_NODATA:
  3654. case ATA_PROT_NODATA:
  3655. /* check altstatus */
  3656. status = ata_altstatus(ap);
  3657. if (status & ATA_BUSY)
  3658. goto idle_irq;
  3659. /* check main status, clearing INTRQ */
  3660. status = ata_chk_status(ap);
  3661. if (unlikely(status & ATA_BUSY))
  3662. goto idle_irq;
  3663. DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
  3664. ap->id, qc->tf.protocol, status);
  3665. /* ack bmdma irq events */
  3666. ap->ops->irq_clear(ap);
  3667. /* complete taskfile transaction */
  3668. qc->err_mask |= ac_err_mask(status);
  3669. ata_qc_complete(qc);
  3670. break;
  3671. default:
  3672. goto idle_irq;
  3673. }
  3674. return 1; /* irq handled */
  3675. idle_irq:
  3676. ap->stats.idle_irq++;
  3677. #ifdef ATA_IRQ_TRAP
  3678. if ((ap->stats.idle_irq % 1000) == 0) {
  3679. ata_irq_ack(ap, 0); /* debug trap */
  3680. printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
  3681. return 1;
  3682. }
  3683. #endif
  3684. return 0; /* irq not handled */
  3685. }
  3686. /**
  3687. * ata_interrupt - Default ATA host interrupt handler
  3688. * @irq: irq line (unused)
  3689. * @dev_instance: pointer to our ata_host_set information structure
  3690. * @regs: unused
  3691. *
  3692. * Default interrupt handler for PCI IDE devices. Calls
  3693. * ata_host_intr() for each port that is not disabled.
  3694. *
  3695. * LOCKING:
  3696. * Obtains host_set lock during operation.
  3697. *
  3698. * RETURNS:
  3699. * IRQ_NONE or IRQ_HANDLED.
  3700. */
  3701. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  3702. {
  3703. struct ata_host_set *host_set = dev_instance;
  3704. unsigned int i;
  3705. unsigned int handled = 0;
  3706. unsigned long flags;
  3707. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  3708. spin_lock_irqsave(&host_set->lock, flags);
  3709. for (i = 0; i < host_set->n_ports; i++) {
  3710. struct ata_port *ap;
  3711. ap = host_set->ports[i];
  3712. if (ap &&
  3713. !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
  3714. struct ata_queued_cmd *qc;
  3715. qc = ata_qc_from_tag(ap, ap->active_tag);
  3716. if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
  3717. (qc->flags & ATA_QCFLAG_ACTIVE))
  3718. handled |= ata_host_intr(ap, qc);
  3719. }
  3720. }
  3721. spin_unlock_irqrestore(&host_set->lock, flags);
  3722. return IRQ_RETVAL(handled);
  3723. }
  3724. /*
  3725. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  3726. * without filling any other registers
  3727. */
  3728. static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
  3729. u8 cmd)
  3730. {
  3731. struct ata_taskfile tf;
  3732. int err;
  3733. ata_tf_init(ap, &tf, dev->devno);
  3734. tf.command = cmd;
  3735. tf.flags |= ATA_TFLAG_DEVICE;
  3736. tf.protocol = ATA_PROT_NODATA;
  3737. err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
  3738. if (err)
  3739. printk(KERN_ERR "%s: ata command failed: %d\n",
  3740. __FUNCTION__, err);
  3741. return err;
  3742. }
  3743. static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
  3744. {
  3745. u8 cmd;
  3746. if (!ata_try_flush_cache(dev))
  3747. return 0;
  3748. if (ata_id_has_flush_ext(dev->id))
  3749. cmd = ATA_CMD_FLUSH_EXT;
  3750. else
  3751. cmd = ATA_CMD_FLUSH;
  3752. return ata_do_simple_cmd(ap, dev, cmd);
  3753. }
  3754. static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
  3755. {
  3756. return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
  3757. }
  3758. static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
  3759. {
  3760. return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
  3761. }
  3762. /**
  3763. * ata_device_resume - wakeup a previously suspended devices
  3764. * @ap: port the device is connected to
  3765. * @dev: the device to resume
  3766. *
  3767. * Kick the drive back into action, by sending it an idle immediate
  3768. * command and making sure its transfer mode matches between drive
  3769. * and host.
  3770. *
  3771. */
  3772. int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
  3773. {
  3774. if (ap->flags & ATA_FLAG_SUSPENDED) {
  3775. struct ata_device *failed_dev;
  3776. ap->flags &= ~ATA_FLAG_SUSPENDED;
  3777. while (ata_set_mode(ap, &failed_dev))
  3778. ata_dev_disable(ap, failed_dev);
  3779. }
  3780. if (!ata_dev_enabled(dev))
  3781. return 0;
  3782. if (dev->class == ATA_DEV_ATA)
  3783. ata_start_drive(ap, dev);
  3784. return 0;
  3785. }
  3786. /**
  3787. * ata_device_suspend - prepare a device for suspend
  3788. * @ap: port the device is connected to
  3789. * @dev: the device to suspend
  3790. *
  3791. * Flush the cache on the drive, if appropriate, then issue a
  3792. * standbynow command.
  3793. */
  3794. int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
  3795. {
  3796. if (!ata_dev_enabled(dev))
  3797. return 0;
  3798. if (dev->class == ATA_DEV_ATA)
  3799. ata_flush_cache(ap, dev);
  3800. if (state.event != PM_EVENT_FREEZE)
  3801. ata_standby_drive(ap, dev);
  3802. ap->flags |= ATA_FLAG_SUSPENDED;
  3803. return 0;
  3804. }
  3805. /**
  3806. * ata_port_start - Set port up for dma.
  3807. * @ap: Port to initialize
  3808. *
  3809. * Called just after data structures for each port are
  3810. * initialized. Allocates space for PRD table.
  3811. *
  3812. * May be used as the port_start() entry in ata_port_operations.
  3813. *
  3814. * LOCKING:
  3815. * Inherited from caller.
  3816. */
  3817. int ata_port_start (struct ata_port *ap)
  3818. {
  3819. struct device *dev = ap->dev;
  3820. int rc;
  3821. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  3822. if (!ap->prd)
  3823. return -ENOMEM;
  3824. rc = ata_pad_alloc(ap, dev);
  3825. if (rc) {
  3826. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3827. return rc;
  3828. }
  3829. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  3830. return 0;
  3831. }
  3832. /**
  3833. * ata_port_stop - Undo ata_port_start()
  3834. * @ap: Port to shut down
  3835. *
  3836. * Frees the PRD table.
  3837. *
  3838. * May be used as the port_stop() entry in ata_port_operations.
  3839. *
  3840. * LOCKING:
  3841. * Inherited from caller.
  3842. */
  3843. void ata_port_stop (struct ata_port *ap)
  3844. {
  3845. struct device *dev = ap->dev;
  3846. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3847. ata_pad_free(ap, dev);
  3848. }
  3849. void ata_host_stop (struct ata_host_set *host_set)
  3850. {
  3851. if (host_set->mmio_base)
  3852. iounmap(host_set->mmio_base);
  3853. }
  3854. /**
  3855. * ata_host_remove - Unregister SCSI host structure with upper layers
  3856. * @ap: Port to unregister
  3857. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  3858. *
  3859. * LOCKING:
  3860. * Inherited from caller.
  3861. */
  3862. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  3863. {
  3864. struct Scsi_Host *sh = ap->host;
  3865. DPRINTK("ENTER\n");
  3866. if (do_unregister)
  3867. scsi_remove_host(sh);
  3868. ap->ops->port_stop(ap);
  3869. }
  3870. /**
  3871. * ata_host_init - Initialize an ata_port structure
  3872. * @ap: Structure to initialize
  3873. * @host: associated SCSI mid-layer structure
  3874. * @host_set: Collection of hosts to which @ap belongs
  3875. * @ent: Probe information provided by low-level driver
  3876. * @port_no: Port number associated with this ata_port
  3877. *
  3878. * Initialize a new ata_port structure, and its associated
  3879. * scsi_host.
  3880. *
  3881. * LOCKING:
  3882. * Inherited from caller.
  3883. */
  3884. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  3885. struct ata_host_set *host_set,
  3886. const struct ata_probe_ent *ent, unsigned int port_no)
  3887. {
  3888. unsigned int i;
  3889. host->max_id = 16;
  3890. host->max_lun = 1;
  3891. host->max_channel = 1;
  3892. host->unique_id = ata_unique_id++;
  3893. host->max_cmd_len = 12;
  3894. ap->flags = ATA_FLAG_DISABLED;
  3895. ap->id = host->unique_id;
  3896. ap->host = host;
  3897. ap->ctl = ATA_DEVCTL_OBS;
  3898. ap->host_set = host_set;
  3899. ap->dev = ent->dev;
  3900. ap->port_no = port_no;
  3901. ap->hard_port_no =
  3902. ent->legacy_mode ? ent->hard_port_no : port_no;
  3903. ap->pio_mask = ent->pio_mask;
  3904. ap->mwdma_mask = ent->mwdma_mask;
  3905. ap->udma_mask = ent->udma_mask;
  3906. ap->flags |= ent->host_flags;
  3907. ap->ops = ent->port_ops;
  3908. ap->cbl = ATA_CBL_NONE;
  3909. ap->sata_spd_limit = UINT_MAX;
  3910. ap->active_tag = ATA_TAG_POISON;
  3911. ap->last_ctl = 0xFF;
  3912. INIT_WORK(&ap->port_task, NULL, NULL);
  3913. INIT_LIST_HEAD(&ap->eh_done_q);
  3914. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  3915. struct ata_device *dev = &ap->device[i];
  3916. dev->devno = i;
  3917. dev->pio_mask = UINT_MAX;
  3918. dev->mwdma_mask = UINT_MAX;
  3919. dev->udma_mask = UINT_MAX;
  3920. }
  3921. #ifdef ATA_IRQ_TRAP
  3922. ap->stats.unhandled_irq = 1;
  3923. ap->stats.idle_irq = 1;
  3924. #endif
  3925. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  3926. }
  3927. /**
  3928. * ata_host_add - Attach low-level ATA driver to system
  3929. * @ent: Information provided by low-level driver
  3930. * @host_set: Collections of ports to which we add
  3931. * @port_no: Port number associated with this host
  3932. *
  3933. * Attach low-level ATA driver to system.
  3934. *
  3935. * LOCKING:
  3936. * PCI/etc. bus probe sem.
  3937. *
  3938. * RETURNS:
  3939. * New ata_port on success, for NULL on error.
  3940. */
  3941. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  3942. struct ata_host_set *host_set,
  3943. unsigned int port_no)
  3944. {
  3945. struct Scsi_Host *host;
  3946. struct ata_port *ap;
  3947. int rc;
  3948. DPRINTK("ENTER\n");
  3949. if (!ent->port_ops->probe_reset &&
  3950. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  3951. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  3952. port_no);
  3953. return NULL;
  3954. }
  3955. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  3956. if (!host)
  3957. return NULL;
  3958. host->transportt = &ata_scsi_transport_template;
  3959. ap = ata_shost_to_port(host);
  3960. ata_host_init(ap, host, host_set, ent, port_no);
  3961. rc = ap->ops->port_start(ap);
  3962. if (rc)
  3963. goto err_out;
  3964. return ap;
  3965. err_out:
  3966. scsi_host_put(host);
  3967. return NULL;
  3968. }
  3969. /**
  3970. * ata_device_add - Register hardware device with ATA and SCSI layers
  3971. * @ent: Probe information describing hardware device to be registered
  3972. *
  3973. * This function processes the information provided in the probe
  3974. * information struct @ent, allocates the necessary ATA and SCSI
  3975. * host information structures, initializes them, and registers
  3976. * everything with requisite kernel subsystems.
  3977. *
  3978. * This function requests irqs, probes the ATA bus, and probes
  3979. * the SCSI bus.
  3980. *
  3981. * LOCKING:
  3982. * PCI/etc. bus probe sem.
  3983. *
  3984. * RETURNS:
  3985. * Number of ports registered. Zero on error (no ports registered).
  3986. */
  3987. int ata_device_add(const struct ata_probe_ent *ent)
  3988. {
  3989. unsigned int count = 0, i;
  3990. struct device *dev = ent->dev;
  3991. struct ata_host_set *host_set;
  3992. DPRINTK("ENTER\n");
  3993. /* alloc a container for our list of ATA ports (buses) */
  3994. host_set = kzalloc(sizeof(struct ata_host_set) +
  3995. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  3996. if (!host_set)
  3997. return 0;
  3998. spin_lock_init(&host_set->lock);
  3999. host_set->dev = dev;
  4000. host_set->n_ports = ent->n_ports;
  4001. host_set->irq = ent->irq;
  4002. host_set->mmio_base = ent->mmio_base;
  4003. host_set->private_data = ent->private_data;
  4004. host_set->ops = ent->port_ops;
  4005. host_set->flags = ent->host_set_flags;
  4006. /* register each port bound to this device */
  4007. for (i = 0; i < ent->n_ports; i++) {
  4008. struct ata_port *ap;
  4009. unsigned long xfer_mode_mask;
  4010. ap = ata_host_add(ent, host_set, i);
  4011. if (!ap)
  4012. goto err_out;
  4013. host_set->ports[i] = ap;
  4014. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4015. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4016. (ap->pio_mask << ATA_SHIFT_PIO);
  4017. /* print per-port info to dmesg */
  4018. printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
  4019. "bmdma 0x%lX irq %lu\n",
  4020. ap->id,
  4021. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4022. ata_mode_string(xfer_mode_mask),
  4023. ap->ioaddr.cmd_addr,
  4024. ap->ioaddr.ctl_addr,
  4025. ap->ioaddr.bmdma_addr,
  4026. ent->irq);
  4027. ata_chk_status(ap);
  4028. host_set->ops->irq_clear(ap);
  4029. count++;
  4030. }
  4031. if (!count)
  4032. goto err_free_ret;
  4033. /* obtain irq, that is shared between channels */
  4034. if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4035. DRV_NAME, host_set))
  4036. goto err_out;
  4037. /* perform each probe synchronously */
  4038. DPRINTK("probe begin\n");
  4039. for (i = 0; i < count; i++) {
  4040. struct ata_port *ap;
  4041. int rc;
  4042. ap = host_set->ports[i];
  4043. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4044. rc = ata_bus_probe(ap);
  4045. DPRINTK("ata%u: bus probe end\n", ap->id);
  4046. if (rc) {
  4047. /* FIXME: do something useful here?
  4048. * Current libata behavior will
  4049. * tear down everything when
  4050. * the module is removed
  4051. * or the h/w is unplugged.
  4052. */
  4053. }
  4054. rc = scsi_add_host(ap->host, dev);
  4055. if (rc) {
  4056. printk(KERN_ERR "ata%u: scsi_add_host failed\n",
  4057. ap->id);
  4058. /* FIXME: do something useful here */
  4059. /* FIXME: handle unconditional calls to
  4060. * scsi_scan_host and ata_host_remove, below,
  4061. * at the very least
  4062. */
  4063. }
  4064. }
  4065. /* probes are done, now scan each port's disk(s) */
  4066. DPRINTK("host probe begin\n");
  4067. for (i = 0; i < count; i++) {
  4068. struct ata_port *ap = host_set->ports[i];
  4069. ata_scsi_scan_host(ap);
  4070. }
  4071. dev_set_drvdata(dev, host_set);
  4072. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4073. return ent->n_ports; /* success */
  4074. err_out:
  4075. for (i = 0; i < count; i++) {
  4076. ata_host_remove(host_set->ports[i], 1);
  4077. scsi_host_put(host_set->ports[i]->host);
  4078. }
  4079. err_free_ret:
  4080. kfree(host_set);
  4081. VPRINTK("EXIT, returning 0\n");
  4082. return 0;
  4083. }
  4084. /**
  4085. * ata_host_set_remove - PCI layer callback for device removal
  4086. * @host_set: ATA host set that was removed
  4087. *
  4088. * Unregister all objects associated with this host set. Free those
  4089. * objects.
  4090. *
  4091. * LOCKING:
  4092. * Inherited from calling layer (may sleep).
  4093. */
  4094. void ata_host_set_remove(struct ata_host_set *host_set)
  4095. {
  4096. struct ata_port *ap;
  4097. unsigned int i;
  4098. for (i = 0; i < host_set->n_ports; i++) {
  4099. ap = host_set->ports[i];
  4100. scsi_remove_host(ap->host);
  4101. }
  4102. free_irq(host_set->irq, host_set);
  4103. for (i = 0; i < host_set->n_ports; i++) {
  4104. ap = host_set->ports[i];
  4105. ata_scsi_release(ap->host);
  4106. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4107. struct ata_ioports *ioaddr = &ap->ioaddr;
  4108. if (ioaddr->cmd_addr == 0x1f0)
  4109. release_region(0x1f0, 8);
  4110. else if (ioaddr->cmd_addr == 0x170)
  4111. release_region(0x170, 8);
  4112. }
  4113. scsi_host_put(ap->host);
  4114. }
  4115. if (host_set->ops->host_stop)
  4116. host_set->ops->host_stop(host_set);
  4117. kfree(host_set);
  4118. }
  4119. /**
  4120. * ata_scsi_release - SCSI layer callback hook for host unload
  4121. * @host: libata host to be unloaded
  4122. *
  4123. * Performs all duties necessary to shut down a libata port...
  4124. * Kill port kthread, disable port, and release resources.
  4125. *
  4126. * LOCKING:
  4127. * Inherited from SCSI layer.
  4128. *
  4129. * RETURNS:
  4130. * One.
  4131. */
  4132. int ata_scsi_release(struct Scsi_Host *host)
  4133. {
  4134. struct ata_port *ap = ata_shost_to_port(host);
  4135. int i;
  4136. DPRINTK("ENTER\n");
  4137. ap->ops->port_disable(ap);
  4138. ata_host_remove(ap, 0);
  4139. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4140. kfree(ap->device[i].id);
  4141. DPRINTK("EXIT\n");
  4142. return 1;
  4143. }
  4144. /**
  4145. * ata_std_ports - initialize ioaddr with standard port offsets.
  4146. * @ioaddr: IO address structure to be initialized
  4147. *
  4148. * Utility function which initializes data_addr, error_addr,
  4149. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4150. * device_addr, status_addr, and command_addr to standard offsets
  4151. * relative to cmd_addr.
  4152. *
  4153. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4154. */
  4155. void ata_std_ports(struct ata_ioports *ioaddr)
  4156. {
  4157. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4158. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4159. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4160. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4161. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4162. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4163. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4164. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4165. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4166. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4167. }
  4168. #ifdef CONFIG_PCI
  4169. void ata_pci_host_stop (struct ata_host_set *host_set)
  4170. {
  4171. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4172. pci_iounmap(pdev, host_set->mmio_base);
  4173. }
  4174. /**
  4175. * ata_pci_remove_one - PCI layer callback for device removal
  4176. * @pdev: PCI device that was removed
  4177. *
  4178. * PCI layer indicates to libata via this hook that
  4179. * hot-unplug or module unload event has occurred.
  4180. * Handle this by unregistering all objects associated
  4181. * with this PCI device. Free those objects. Then finally
  4182. * release PCI resources and disable device.
  4183. *
  4184. * LOCKING:
  4185. * Inherited from PCI layer (may sleep).
  4186. */
  4187. void ata_pci_remove_one (struct pci_dev *pdev)
  4188. {
  4189. struct device *dev = pci_dev_to_dev(pdev);
  4190. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4191. ata_host_set_remove(host_set);
  4192. pci_release_regions(pdev);
  4193. pci_disable_device(pdev);
  4194. dev_set_drvdata(dev, NULL);
  4195. }
  4196. /* move to PCI subsystem */
  4197. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4198. {
  4199. unsigned long tmp = 0;
  4200. switch (bits->width) {
  4201. case 1: {
  4202. u8 tmp8 = 0;
  4203. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4204. tmp = tmp8;
  4205. break;
  4206. }
  4207. case 2: {
  4208. u16 tmp16 = 0;
  4209. pci_read_config_word(pdev, bits->reg, &tmp16);
  4210. tmp = tmp16;
  4211. break;
  4212. }
  4213. case 4: {
  4214. u32 tmp32 = 0;
  4215. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4216. tmp = tmp32;
  4217. break;
  4218. }
  4219. default:
  4220. return -EINVAL;
  4221. }
  4222. tmp &= bits->mask;
  4223. return (tmp == bits->val) ? 1 : 0;
  4224. }
  4225. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4226. {
  4227. pci_save_state(pdev);
  4228. pci_disable_device(pdev);
  4229. pci_set_power_state(pdev, PCI_D3hot);
  4230. return 0;
  4231. }
  4232. int ata_pci_device_resume(struct pci_dev *pdev)
  4233. {
  4234. pci_set_power_state(pdev, PCI_D0);
  4235. pci_restore_state(pdev);
  4236. pci_enable_device(pdev);
  4237. pci_set_master(pdev);
  4238. return 0;
  4239. }
  4240. #endif /* CONFIG_PCI */
  4241. static int __init ata_init(void)
  4242. {
  4243. ata_wq = create_workqueue("ata");
  4244. if (!ata_wq)
  4245. return -ENOMEM;
  4246. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4247. return 0;
  4248. }
  4249. static void __exit ata_exit(void)
  4250. {
  4251. destroy_workqueue(ata_wq);
  4252. }
  4253. module_init(ata_init);
  4254. module_exit(ata_exit);
  4255. static unsigned long ratelimit_time;
  4256. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4257. int ata_ratelimit(void)
  4258. {
  4259. int rc;
  4260. unsigned long flags;
  4261. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4262. if (time_after(jiffies, ratelimit_time)) {
  4263. rc = 1;
  4264. ratelimit_time = jiffies + (HZ/5);
  4265. } else
  4266. rc = 0;
  4267. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4268. return rc;
  4269. }
  4270. /**
  4271. * ata_wait_register - wait until register value changes
  4272. * @reg: IO-mapped register
  4273. * @mask: Mask to apply to read register value
  4274. * @val: Wait condition
  4275. * @interval_msec: polling interval in milliseconds
  4276. * @timeout_msec: timeout in milliseconds
  4277. *
  4278. * Waiting for some bits of register to change is a common
  4279. * operation for ATA controllers. This function reads 32bit LE
  4280. * IO-mapped register @reg and tests for the following condition.
  4281. *
  4282. * (*@reg & mask) != val
  4283. *
  4284. * If the condition is met, it returns; otherwise, the process is
  4285. * repeated after @interval_msec until timeout.
  4286. *
  4287. * LOCKING:
  4288. * Kernel thread context (may sleep)
  4289. *
  4290. * RETURNS:
  4291. * The final register value.
  4292. */
  4293. u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
  4294. unsigned long interval_msec,
  4295. unsigned long timeout_msec)
  4296. {
  4297. unsigned long timeout;
  4298. u32 tmp;
  4299. tmp = ioread32(reg);
  4300. /* Calculate timeout _after_ the first read to make sure
  4301. * preceding writes reach the controller before starting to
  4302. * eat away the timeout.
  4303. */
  4304. timeout = jiffies + (timeout_msec * HZ) / 1000;
  4305. while ((tmp & mask) == val && time_before(jiffies, timeout)) {
  4306. msleep(interval_msec);
  4307. tmp = ioread32(reg);
  4308. }
  4309. return tmp;
  4310. }
  4311. /*
  4312. * libata is essentially a library of internal helper functions for
  4313. * low-level ATA host controller drivers. As such, the API/ABI is
  4314. * likely to change as new drivers are added and updated.
  4315. * Do not depend on ABI/API stability.
  4316. */
  4317. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4318. EXPORT_SYMBOL_GPL(ata_std_ports);
  4319. EXPORT_SYMBOL_GPL(ata_device_add);
  4320. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4321. EXPORT_SYMBOL_GPL(ata_sg_init);
  4322. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4323. EXPORT_SYMBOL_GPL(__ata_qc_complete);
  4324. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4325. EXPORT_SYMBOL_GPL(ata_tf_load);
  4326. EXPORT_SYMBOL_GPL(ata_tf_read);
  4327. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4328. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4329. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4330. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4331. EXPORT_SYMBOL_GPL(ata_check_status);
  4332. EXPORT_SYMBOL_GPL(ata_altstatus);
  4333. EXPORT_SYMBOL_GPL(ata_exec_command);
  4334. EXPORT_SYMBOL_GPL(ata_port_start);
  4335. EXPORT_SYMBOL_GPL(ata_port_stop);
  4336. EXPORT_SYMBOL_GPL(ata_host_stop);
  4337. EXPORT_SYMBOL_GPL(ata_interrupt);
  4338. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4339. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4340. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4341. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4342. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4343. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4344. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4345. EXPORT_SYMBOL_GPL(ata_port_probe);
  4346. EXPORT_SYMBOL_GPL(sata_set_spd);
  4347. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4348. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4349. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4350. EXPORT_SYMBOL_GPL(ata_std_probeinit);
  4351. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4352. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4353. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4354. EXPORT_SYMBOL_GPL(ata_std_probe_reset);
  4355. EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
  4356. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4357. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4358. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4359. EXPORT_SYMBOL_GPL(ata_port_disable);
  4360. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4361. EXPORT_SYMBOL_GPL(ata_wait_register);
  4362. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4363. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4364. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4365. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4366. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4367. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4368. EXPORT_SYMBOL_GPL(ata_host_intr);
  4369. EXPORT_SYMBOL_GPL(ata_id_string);
  4370. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4371. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4372. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4373. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4374. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4375. #ifdef CONFIG_PCI
  4376. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4377. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4378. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4379. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4380. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4381. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4382. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4383. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4384. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4385. #endif /* CONFIG_PCI */
  4386. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4387. EXPORT_SYMBOL_GPL(ata_device_resume);
  4388. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4389. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
  4390. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4391. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4392. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);