cx88-dvb.c 38 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  54. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  55. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  56. MODULE_LICENSE("GPL");
  57. static unsigned int debug;
  58. module_param(debug, int, 0644);
  59. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. #define dprintk(level,fmt, arg...) if (debug >= level) \
  62. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  63. /* ------------------------------------------------------------------ */
  64. static int dvb_buf_setup(struct videobuf_queue *q,
  65. unsigned int *count, unsigned int *size)
  66. {
  67. struct cx8802_dev *dev = q->priv_data;
  68. dev->ts_packet_size = 188 * 4;
  69. dev->ts_packet_count = 32;
  70. *size = dev->ts_packet_size * dev->ts_packet_count;
  71. *count = 32;
  72. return 0;
  73. }
  74. static int dvb_buf_prepare(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb, enum v4l2_field field)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  79. }
  80. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  84. }
  85. static void dvb_buf_release(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb)
  87. {
  88. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  89. }
  90. static struct videobuf_queue_ops dvb_qops = {
  91. .buf_setup = dvb_buf_setup,
  92. .buf_prepare = dvb_buf_prepare,
  93. .buf_queue = dvb_buf_queue,
  94. .buf_release = dvb_buf_release,
  95. };
  96. /* ------------------------------------------------------------------ */
  97. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  98. {
  99. struct cx8802_dev *dev= fe->dvb->priv;
  100. struct cx8802_driver *drv = NULL;
  101. int ret = 0;
  102. int fe_id;
  103. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  104. if (!fe_id) {
  105. printk(KERN_ERR "%s() No frontend found\n", __func__);
  106. return -EINVAL;
  107. }
  108. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  109. if (drv) {
  110. if (acquire){
  111. dev->frontends.active_fe_id = fe_id;
  112. ret = drv->request_acquire(drv);
  113. } else {
  114. ret = drv->request_release(drv);
  115. dev->frontends.active_fe_id = 0;
  116. }
  117. }
  118. return ret;
  119. }
  120. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  121. {
  122. struct videobuf_dvb_frontends *f;
  123. struct videobuf_dvb_frontend *fe;
  124. if (!core->dvbdev)
  125. return;
  126. f = &core->dvbdev->frontends;
  127. if (!f)
  128. return;
  129. if (f->gate <= 1) /* undefined or fe0 */
  130. fe = videobuf_dvb_get_frontend(f, 1);
  131. else
  132. fe = videobuf_dvb_get_frontend(f, f->gate);
  133. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  134. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  135. }
  136. /* ------------------------------------------------------------------ */
  137. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  138. {
  139. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  140. static u8 reset [] = { RESET, 0x80 };
  141. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  142. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  143. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  144. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  145. mt352_write(fe, clock_config, sizeof(clock_config));
  146. udelay(200);
  147. mt352_write(fe, reset, sizeof(reset));
  148. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  149. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  150. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  155. {
  156. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  157. static u8 reset [] = { RESET, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  159. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  160. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  161. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  162. mt352_write(fe, clock_config, sizeof(clock_config));
  163. udelay(200);
  164. mt352_write(fe, reset, sizeof(reset));
  165. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  166. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  167. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  168. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  169. return 0;
  170. }
  171. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  172. {
  173. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  174. static u8 reset [] = { 0x50, 0x80 };
  175. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  176. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  177. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  178. static u8 dntv_extra[] = { 0xB5, 0x7A };
  179. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  180. mt352_write(fe, clock_config, sizeof(clock_config));
  181. udelay(2000);
  182. mt352_write(fe, reset, sizeof(reset));
  183. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  184. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  185. udelay(2000);
  186. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  187. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  188. return 0;
  189. }
  190. static struct mt352_config dvico_fusionhdtv = {
  191. .demod_address = 0x0f,
  192. .demod_init = dvico_fusionhdtv_demod_init,
  193. };
  194. static struct mt352_config dntv_live_dvbt_config = {
  195. .demod_address = 0x0f,
  196. .demod_init = dntv_live_dvbt_demod_init,
  197. };
  198. static struct mt352_config dvico_fusionhdtv_dual = {
  199. .demod_address = 0x0f,
  200. .demod_init = dvico_dual_demod_init,
  201. };
  202. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  203. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  204. {
  205. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  206. static u8 reset [] = { 0x50, 0x80 };
  207. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  208. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  209. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  210. static u8 dntv_extra[] = { 0xB5, 0x7A };
  211. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  212. mt352_write(fe, clock_config, sizeof(clock_config));
  213. udelay(2000);
  214. mt352_write(fe, reset, sizeof(reset));
  215. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  216. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  217. udelay(2000);
  218. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  219. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  220. return 0;
  221. }
  222. static struct mt352_config dntv_live_dvbt_pro_config = {
  223. .demod_address = 0x0f,
  224. .no_tuner = 1,
  225. .demod_init = dntv_live_dvbt_pro_demod_init,
  226. };
  227. #endif
  228. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  229. .demod_address = 0x0f,
  230. .no_tuner = 1,
  231. };
  232. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  233. .demod_address = 0x0f,
  234. .if2 = 45600,
  235. .no_tuner = 1,
  236. };
  237. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  238. .demod_address = 0x0f,
  239. .if2 = 4560,
  240. .no_tuner = 1,
  241. .demod_init = dvico_fusionhdtv_demod_init,
  242. };
  243. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  244. .demod_address = 0x0f,
  245. };
  246. static struct cx22702_config connexant_refboard_config = {
  247. .demod_address = 0x43,
  248. .output_mode = CX22702_SERIAL_OUTPUT,
  249. };
  250. static struct cx22702_config hauppauge_hvr_config = {
  251. .demod_address = 0x63,
  252. .output_mode = CX22702_SERIAL_OUTPUT,
  253. };
  254. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  255. {
  256. struct cx8802_dev *dev= fe->dvb->priv;
  257. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  258. return 0;
  259. }
  260. static struct or51132_config pchdtv_hd3000 = {
  261. .demod_address = 0x15,
  262. .set_ts_params = or51132_set_ts_param,
  263. };
  264. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  265. {
  266. struct cx8802_dev *dev= fe->dvb->priv;
  267. struct cx88_core *core = dev->core;
  268. dprintk(1, "%s: index = %d\n", __func__, index);
  269. if (index == 0)
  270. cx_clear(MO_GP0_IO, 8);
  271. else
  272. cx_set(MO_GP0_IO, 8);
  273. return 0;
  274. }
  275. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  276. {
  277. struct cx8802_dev *dev= fe->dvb->priv;
  278. if (is_punctured)
  279. dev->ts_gen_cntrl |= 0x04;
  280. else
  281. dev->ts_gen_cntrl &= ~0x04;
  282. return 0;
  283. }
  284. static struct lgdt330x_config fusionhdtv_3_gold = {
  285. .demod_address = 0x0e,
  286. .demod_chip = LGDT3302,
  287. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  288. .set_ts_params = lgdt330x_set_ts_param,
  289. };
  290. static struct lgdt330x_config fusionhdtv_5_gold = {
  291. .demod_address = 0x0e,
  292. .demod_chip = LGDT3303,
  293. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  294. .set_ts_params = lgdt330x_set_ts_param,
  295. };
  296. static struct lgdt330x_config pchdtv_hd5500 = {
  297. .demod_address = 0x59,
  298. .demod_chip = LGDT3303,
  299. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  300. .set_ts_params = lgdt330x_set_ts_param,
  301. };
  302. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  303. {
  304. struct cx8802_dev *dev= fe->dvb->priv;
  305. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  306. return 0;
  307. }
  308. static struct nxt200x_config ati_hdtvwonder = {
  309. .demod_address = 0x0a,
  310. .set_ts_params = nxt200x_set_ts_param,
  311. };
  312. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  313. int is_punctured)
  314. {
  315. struct cx8802_dev *dev= fe->dvb->priv;
  316. dev->ts_gen_cntrl = 0x02;
  317. return 0;
  318. }
  319. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  320. fe_sec_voltage_t voltage)
  321. {
  322. struct cx8802_dev *dev= fe->dvb->priv;
  323. struct cx88_core *core = dev->core;
  324. if (voltage == SEC_VOLTAGE_OFF)
  325. cx_write(MO_GP0_IO, 0x000006fb);
  326. else
  327. cx_write(MO_GP0_IO, 0x000006f9);
  328. if (core->prev_set_voltage)
  329. return core->prev_set_voltage(fe, voltage);
  330. return 0;
  331. }
  332. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  333. fe_sec_voltage_t voltage)
  334. {
  335. struct cx8802_dev *dev= fe->dvb->priv;
  336. struct cx88_core *core = dev->core;
  337. if (voltage == SEC_VOLTAGE_OFF) {
  338. dprintk(1,"LNB Voltage OFF\n");
  339. cx_write(MO_GP0_IO, 0x0000efff);
  340. }
  341. if (core->prev_set_voltage)
  342. return core->prev_set_voltage(fe, voltage);
  343. return 0;
  344. }
  345. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  346. fe_sec_voltage_t voltage)
  347. {
  348. struct cx8802_dev *dev= fe->dvb->priv;
  349. struct cx88_core *core = dev->core;
  350. switch (voltage) {
  351. case SEC_VOLTAGE_13:
  352. printk("LNB Voltage SEC_VOLTAGE_13\n");
  353. cx_write(MO_GP0_IO, 0x00006040);
  354. break;
  355. case SEC_VOLTAGE_18:
  356. printk("LNB Voltage SEC_VOLTAGE_18\n");
  357. cx_write(MO_GP0_IO, 0x00006060);
  358. break;
  359. case SEC_VOLTAGE_OFF:
  360. printk("LNB Voltage SEC_VOLTAGE_off\n");
  361. break;
  362. }
  363. if (core->prev_set_voltage)
  364. return core->prev_set_voltage(fe, voltage);
  365. return 0;
  366. }
  367. static struct cx24123_config geniatech_dvbs_config = {
  368. .demod_address = 0x55,
  369. .set_ts_params = cx24123_set_ts_param,
  370. };
  371. static struct cx24123_config hauppauge_novas_config = {
  372. .demod_address = 0x55,
  373. .set_ts_params = cx24123_set_ts_param,
  374. };
  375. static struct cx24123_config kworld_dvbs_100_config = {
  376. .demod_address = 0x15,
  377. .set_ts_params = cx24123_set_ts_param,
  378. .lnb_polarity = 1,
  379. };
  380. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  381. .demod_address = 0x32 >> 1,
  382. .output_mode = S5H1409_PARALLEL_OUTPUT,
  383. .gpio = S5H1409_GPIO_ON,
  384. .qam_if = 44000,
  385. .inversion = S5H1409_INVERSION_OFF,
  386. .status_mode = S5H1409_DEMODLOCKING,
  387. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  388. };
  389. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  390. .demod_address = 0x32 >> 1,
  391. .output_mode = S5H1409_SERIAL_OUTPUT,
  392. .gpio = S5H1409_GPIO_OFF,
  393. .inversion = S5H1409_INVERSION_OFF,
  394. .status_mode = S5H1409_DEMODLOCKING,
  395. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  396. };
  397. static struct s5h1409_config kworld_atsc_120_config = {
  398. .demod_address = 0x32 >> 1,
  399. .output_mode = S5H1409_SERIAL_OUTPUT,
  400. .gpio = S5H1409_GPIO_OFF,
  401. .inversion = S5H1409_INVERSION_OFF,
  402. .status_mode = S5H1409_DEMODLOCKING,
  403. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  404. };
  405. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  406. .i2c_address = 0x64,
  407. .if_khz = 5380,
  408. };
  409. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  410. .demod_address = (0x1e >> 1),
  411. .no_tuner = 1,
  412. .if2 = 45600,
  413. };
  414. static struct zl10353_config cx88_geniatech_x8000_mt = {
  415. .demod_address = (0x1e >> 1),
  416. .no_tuner = 1,
  417. };
  418. static struct s5h1411_config dvico_fusionhdtv7_config = {
  419. .output_mode = S5H1411_SERIAL_OUTPUT,
  420. .gpio = S5H1411_GPIO_ON,
  421. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  422. .qam_if = S5H1411_IF_44000,
  423. .vsb_if = S5H1411_IF_44000,
  424. .inversion = S5H1411_INVERSION_OFF,
  425. .status_mode = S5H1411_DEMODLOCKING
  426. };
  427. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  428. .i2c_address = 0xc2 >> 1,
  429. .if_khz = 5380,
  430. };
  431. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  432. {
  433. struct dvb_frontend *fe;
  434. struct videobuf_dvb_frontend *fe0 = NULL;
  435. struct xc2028_ctrl ctl;
  436. struct xc2028_config cfg = {
  437. .i2c_adap = &dev->core->i2c_adap,
  438. .i2c_addr = addr,
  439. .ctrl = &ctl,
  440. };
  441. /* Get the first frontend */
  442. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  443. if (!fe0)
  444. return -EINVAL;
  445. if (!fe0->dvb.frontend) {
  446. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  447. "Can't attach xc3028\n",
  448. dev->core->name);
  449. return -EINVAL;
  450. }
  451. /*
  452. * Some xc3028 devices may be hidden by an I2C gate. This is known
  453. * to happen with some s5h1409-based devices.
  454. * Now that I2C gate is open, sets up xc3028 configuration
  455. */
  456. cx88_setup_xc3028(dev->core, &ctl);
  457. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  458. if (!fe) {
  459. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  460. dev->core->name);
  461. dvb_frontend_detach(fe0->dvb.frontend);
  462. dvb_unregister_frontend(fe0->dvb.frontend);
  463. fe0->dvb.frontend = NULL;
  464. return -EINVAL;
  465. }
  466. printk(KERN_INFO "%s/2: xc3028 attached\n",
  467. dev->core->name);
  468. return 0;
  469. }
  470. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  471. int is_punctured)
  472. {
  473. struct cx8802_dev *dev = fe->dvb->priv;
  474. dev->ts_gen_cntrl = 0x2;
  475. return 0;
  476. }
  477. static int cx24116_reset_device(struct dvb_frontend *fe)
  478. {
  479. struct cx8802_dev *dev = fe->dvb->priv;
  480. struct cx88_core *core = dev->core;
  481. /* Reset the part */
  482. /* Put the cx24116 into reset */
  483. cx_write(MO_SRST_IO, 0);
  484. msleep(10);
  485. /* Take the cx24116 out of reset */
  486. cx_write(MO_SRST_IO, 1);
  487. msleep(10);
  488. return 0;
  489. }
  490. static struct cx24116_config hauppauge_hvr4000_config = {
  491. .demod_address = 0x05,
  492. .set_ts_params = cx24116_set_ts_param,
  493. .reset_device = cx24116_reset_device,
  494. };
  495. static struct cx24116_config tevii_s460_config = {
  496. .demod_address = 0x55,
  497. .set_ts_params = cx24116_set_ts_param,
  498. .reset_device = cx24116_reset_device,
  499. };
  500. static struct stv0299_config tevii_tuner_sharp_config = {
  501. .demod_address = 0x68,
  502. .inittab = sharp_z0194a_inittab,
  503. .mclk = 88000000UL,
  504. .invert = 1,
  505. .skip_reinit = 0,
  506. .lock_output = 1,
  507. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  508. .min_delay_ms = 100,
  509. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  510. .set_ts_params = cx24116_set_ts_param,
  511. };
  512. static struct stv0288_config tevii_tuner_earda_config = {
  513. .demod_address = 0x68,
  514. .min_delay_ms = 100,
  515. .set_ts_params = cx24116_set_ts_param,
  516. };
  517. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  518. {
  519. struct cx88_core *core = dev->core;
  520. struct videobuf_dvb_frontend *fe = NULL;
  521. int i;
  522. mutex_init(&dev->frontends.lock);
  523. INIT_LIST_HEAD(&dev->frontends.felist);
  524. if (!core->board.num_frontends)
  525. return -ENODEV;
  526. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  527. core->board.num_frontends);
  528. for (i = 1; i <= core->board.num_frontends; i++) {
  529. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  530. if (!fe) {
  531. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  532. videobuf_dvb_dealloc_frontends(&dev->frontends);
  533. return -ENOMEM;
  534. }
  535. }
  536. return 0;
  537. }
  538. static int dvb_register(struct cx8802_dev *dev)
  539. {
  540. struct cx88_core *core = dev->core;
  541. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  542. int mfe_shared = 0; /* bus not shared by default */
  543. if (0 != core->i2c_rc) {
  544. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  545. goto frontend_detach;
  546. }
  547. /* Get the first frontend */
  548. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  549. if (!fe0)
  550. goto frontend_detach;
  551. /* multi-frontend gate control is undefined or defaults to fe0 */
  552. dev->frontends.gate = 0;
  553. /* Sets the gate control callback to be used by i2c command calls */
  554. core->gate_ctrl = cx88_dvb_gate_ctrl;
  555. /* init frontend(s) */
  556. switch (core->boardnr) {
  557. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  558. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  559. &connexant_refboard_config,
  560. &core->i2c_adap);
  561. if (fe0->dvb.frontend != NULL) {
  562. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  563. 0x61, &core->i2c_adap,
  564. DVB_PLL_THOMSON_DTT759X))
  565. goto frontend_detach;
  566. }
  567. break;
  568. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  569. case CX88_BOARD_CONEXANT_DVB_T1:
  570. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  571. case CX88_BOARD_WINFAST_DTV1000:
  572. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  573. &connexant_refboard_config,
  574. &core->i2c_adap);
  575. if (fe0->dvb.frontend != NULL) {
  576. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  577. 0x60, &core->i2c_adap,
  578. DVB_PLL_THOMSON_DTT7579))
  579. goto frontend_detach;
  580. }
  581. break;
  582. case CX88_BOARD_WINFAST_DTV2000H:
  583. case CX88_BOARD_HAUPPAUGE_HVR1100:
  584. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  585. case CX88_BOARD_HAUPPAUGE_HVR1300:
  586. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  587. &hauppauge_hvr_config,
  588. &core->i2c_adap);
  589. if (fe0->dvb.frontend != NULL) {
  590. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  591. &core->i2c_adap, 0x61,
  592. TUNER_PHILIPS_FMD1216ME_MK3))
  593. goto frontend_detach;
  594. }
  595. break;
  596. case CX88_BOARD_HAUPPAUGE_HVR3000:
  597. /* MFE frontend 1 */
  598. mfe_shared = 1;
  599. dev->frontends.gate = 2;
  600. /* DVB-S init */
  601. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  602. &hauppauge_novas_config,
  603. &dev->core->i2c_adap);
  604. if (fe0->dvb.frontend) {
  605. if (!dvb_attach(isl6421_attach,
  606. fe0->dvb.frontend,
  607. &dev->core->i2c_adap,
  608. 0x08, ISL6421_DCL, 0x00))
  609. goto frontend_detach;
  610. }
  611. /* MFE frontend 2 */
  612. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  613. if (!fe1)
  614. goto frontend_detach;
  615. /* DVB-T init */
  616. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  617. &hauppauge_hvr_config,
  618. &dev->core->i2c_adap);
  619. if (fe1->dvb.frontend) {
  620. fe1->dvb.frontend->id = 1;
  621. if (!dvb_attach(simple_tuner_attach,
  622. fe1->dvb.frontend,
  623. &dev->core->i2c_adap,
  624. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  625. goto frontend_detach;
  626. }
  627. break;
  628. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  629. fe0->dvb.frontend = dvb_attach(mt352_attach,
  630. &dvico_fusionhdtv,
  631. &core->i2c_adap);
  632. if (fe0->dvb.frontend != NULL) {
  633. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  634. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  635. goto frontend_detach;
  636. break;
  637. }
  638. /* ZL10353 replaces MT352 on later cards */
  639. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  640. &dvico_fusionhdtv_plus_v1_1,
  641. &core->i2c_adap);
  642. if (fe0->dvb.frontend != NULL) {
  643. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  644. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  645. goto frontend_detach;
  646. }
  647. break;
  648. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  649. /* The tin box says DEE1601, but it seems to be DTT7579
  650. * compatible, with a slightly different MT352 AGC gain. */
  651. fe0->dvb.frontend = dvb_attach(mt352_attach,
  652. &dvico_fusionhdtv_dual,
  653. &core->i2c_adap);
  654. if (fe0->dvb.frontend != NULL) {
  655. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  656. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  657. goto frontend_detach;
  658. break;
  659. }
  660. /* ZL10353 replaces MT352 on later cards */
  661. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  662. &dvico_fusionhdtv_plus_v1_1,
  663. &core->i2c_adap);
  664. if (fe0->dvb.frontend != NULL) {
  665. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  666. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  667. goto frontend_detach;
  668. }
  669. break;
  670. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  671. fe0->dvb.frontend = dvb_attach(mt352_attach,
  672. &dvico_fusionhdtv,
  673. &core->i2c_adap);
  674. if (fe0->dvb.frontend != NULL) {
  675. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  676. 0x61, NULL, DVB_PLL_LG_Z201))
  677. goto frontend_detach;
  678. }
  679. break;
  680. case CX88_BOARD_KWORLD_DVB_T:
  681. case CX88_BOARD_DNTV_LIVE_DVB_T:
  682. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  683. fe0->dvb.frontend = dvb_attach(mt352_attach,
  684. &dntv_live_dvbt_config,
  685. &core->i2c_adap);
  686. if (fe0->dvb.frontend != NULL) {
  687. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  688. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  689. goto frontend_detach;
  690. }
  691. break;
  692. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  693. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  694. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  695. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  696. &dev->vp3054->adap);
  697. if (fe0->dvb.frontend != NULL) {
  698. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  699. &core->i2c_adap, 0x61,
  700. TUNER_PHILIPS_FMD1216ME_MK3))
  701. goto frontend_detach;
  702. }
  703. #else
  704. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  705. core->name);
  706. #endif
  707. break;
  708. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  709. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  710. &dvico_fusionhdtv_hybrid,
  711. &core->i2c_adap);
  712. if (fe0->dvb.frontend != NULL) {
  713. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  714. &core->i2c_adap, 0x61,
  715. TUNER_THOMSON_FE6600))
  716. goto frontend_detach;
  717. }
  718. break;
  719. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  720. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  721. &dvico_fusionhdtv_xc3028,
  722. &core->i2c_adap);
  723. if (fe0->dvb.frontend == NULL)
  724. fe0->dvb.frontend = dvb_attach(mt352_attach,
  725. &dvico_fusionhdtv_mt352_xc3028,
  726. &core->i2c_adap);
  727. /*
  728. * On this board, the demod provides the I2C bus pullup.
  729. * We must not permit gate_ctrl to be performed, or
  730. * the xc3028 cannot communicate on the bus.
  731. */
  732. if (fe0->dvb.frontend)
  733. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  734. if (attach_xc3028(0x61, dev) < 0)
  735. goto frontend_detach;
  736. break;
  737. case CX88_BOARD_PCHDTV_HD3000:
  738. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  739. &core->i2c_adap);
  740. if (fe0->dvb.frontend != NULL) {
  741. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  742. &core->i2c_adap, 0x61,
  743. TUNER_THOMSON_DTT761X))
  744. goto frontend_detach;
  745. }
  746. break;
  747. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  748. dev->ts_gen_cntrl = 0x08;
  749. /* Do a hardware reset of chip before using it. */
  750. cx_clear(MO_GP0_IO, 1);
  751. mdelay(100);
  752. cx_set(MO_GP0_IO, 1);
  753. mdelay(200);
  754. /* Select RF connector callback */
  755. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  756. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  757. &fusionhdtv_3_gold,
  758. &core->i2c_adap);
  759. if (fe0->dvb.frontend != NULL) {
  760. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  761. &core->i2c_adap, 0x61,
  762. TUNER_MICROTUNE_4042FI5))
  763. goto frontend_detach;
  764. }
  765. break;
  766. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  767. dev->ts_gen_cntrl = 0x08;
  768. /* Do a hardware reset of chip before using it. */
  769. cx_clear(MO_GP0_IO, 1);
  770. mdelay(100);
  771. cx_set(MO_GP0_IO, 9);
  772. mdelay(200);
  773. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  774. &fusionhdtv_3_gold,
  775. &core->i2c_adap);
  776. if (fe0->dvb.frontend != NULL) {
  777. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  778. &core->i2c_adap, 0x61,
  779. TUNER_THOMSON_DTT761X))
  780. goto frontend_detach;
  781. }
  782. break;
  783. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  784. dev->ts_gen_cntrl = 0x08;
  785. /* Do a hardware reset of chip before using it. */
  786. cx_clear(MO_GP0_IO, 1);
  787. mdelay(100);
  788. cx_set(MO_GP0_IO, 1);
  789. mdelay(200);
  790. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  791. &fusionhdtv_5_gold,
  792. &core->i2c_adap);
  793. if (fe0->dvb.frontend != NULL) {
  794. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  795. &core->i2c_adap, 0x61,
  796. TUNER_LG_TDVS_H06XF))
  797. goto frontend_detach;
  798. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  799. &core->i2c_adap, 0x43))
  800. goto frontend_detach;
  801. }
  802. break;
  803. case CX88_BOARD_PCHDTV_HD5500:
  804. dev->ts_gen_cntrl = 0x08;
  805. /* Do a hardware reset of chip before using it. */
  806. cx_clear(MO_GP0_IO, 1);
  807. mdelay(100);
  808. cx_set(MO_GP0_IO, 1);
  809. mdelay(200);
  810. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  811. &pchdtv_hd5500,
  812. &core->i2c_adap);
  813. if (fe0->dvb.frontend != NULL) {
  814. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  815. &core->i2c_adap, 0x61,
  816. TUNER_LG_TDVS_H06XF))
  817. goto frontend_detach;
  818. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  819. &core->i2c_adap, 0x43))
  820. goto frontend_detach;
  821. }
  822. break;
  823. case CX88_BOARD_ATI_HDTVWONDER:
  824. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  825. &ati_hdtvwonder,
  826. &core->i2c_adap);
  827. if (fe0->dvb.frontend != NULL) {
  828. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  829. &core->i2c_adap, 0x61,
  830. TUNER_PHILIPS_TUV1236D))
  831. goto frontend_detach;
  832. }
  833. break;
  834. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  835. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  836. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  837. &hauppauge_novas_config,
  838. &core->i2c_adap);
  839. if (fe0->dvb.frontend) {
  840. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  841. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  842. goto frontend_detach;
  843. }
  844. break;
  845. case CX88_BOARD_KWORLD_DVBS_100:
  846. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  847. &kworld_dvbs_100_config,
  848. &core->i2c_adap);
  849. if (fe0->dvb.frontend) {
  850. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  851. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  852. }
  853. break;
  854. case CX88_BOARD_GENIATECH_DVBS:
  855. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  856. &geniatech_dvbs_config,
  857. &core->i2c_adap);
  858. if (fe0->dvb.frontend) {
  859. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  860. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  861. }
  862. break;
  863. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  864. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  865. &pinnacle_pctv_hd_800i_config,
  866. &core->i2c_adap);
  867. if (fe0->dvb.frontend != NULL) {
  868. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  869. &core->i2c_adap,
  870. &pinnacle_pctv_hd_800i_tuner_config))
  871. goto frontend_detach;
  872. }
  873. break;
  874. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  875. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  876. &dvico_hdtv5_pci_nano_config,
  877. &core->i2c_adap);
  878. if (fe0->dvb.frontend != NULL) {
  879. struct dvb_frontend *fe;
  880. struct xc2028_config cfg = {
  881. .i2c_adap = &core->i2c_adap,
  882. .i2c_addr = 0x61,
  883. };
  884. static struct xc2028_ctrl ctl = {
  885. .fname = XC2028_DEFAULT_FIRMWARE,
  886. .max_len = 64,
  887. .scode_table = XC3028_FE_OREN538,
  888. };
  889. fe = dvb_attach(xc2028_attach,
  890. fe0->dvb.frontend, &cfg);
  891. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  892. fe->ops.tuner_ops.set_config(fe, &ctl);
  893. }
  894. break;
  895. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  896. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  897. &cx88_pinnacle_hybrid_pctv,
  898. &core->i2c_adap);
  899. if (fe0->dvb.frontend) {
  900. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  901. if (attach_xc3028(0x61, dev) < 0)
  902. goto frontend_detach;
  903. }
  904. break;
  905. case CX88_BOARD_GENIATECH_X8000_MT:
  906. dev->ts_gen_cntrl = 0x00;
  907. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  908. &cx88_geniatech_x8000_mt,
  909. &core->i2c_adap);
  910. if (attach_xc3028(0x61, dev) < 0)
  911. goto frontend_detach;
  912. break;
  913. case CX88_BOARD_KWORLD_ATSC_120:
  914. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  915. &kworld_atsc_120_config,
  916. &core->i2c_adap);
  917. if (attach_xc3028(0x61, dev) < 0)
  918. goto frontend_detach;
  919. break;
  920. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  921. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  922. &dvico_fusionhdtv7_config,
  923. &core->i2c_adap);
  924. if (fe0->dvb.frontend != NULL) {
  925. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  926. &core->i2c_adap,
  927. &dvico_fusionhdtv7_tuner_config))
  928. goto frontend_detach;
  929. }
  930. break;
  931. case CX88_BOARD_HAUPPAUGE_HVR4000:
  932. /* MFE frontend 1 */
  933. mfe_shared = 1;
  934. dev->frontends.gate = 2;
  935. /* DVB-S/S2 Init */
  936. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  937. &hauppauge_hvr4000_config,
  938. &dev->core->i2c_adap);
  939. if (fe0->dvb.frontend) {
  940. if (!dvb_attach(isl6421_attach,
  941. fe0->dvb.frontend,
  942. &dev->core->i2c_adap,
  943. 0x08, ISL6421_DCL, 0x00))
  944. goto frontend_detach;
  945. }
  946. /* MFE frontend 2 */
  947. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  948. if (!fe1)
  949. goto frontend_detach;
  950. /* DVB-T Init */
  951. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  952. &hauppauge_hvr_config,
  953. &dev->core->i2c_adap);
  954. if (fe1->dvb.frontend) {
  955. fe1->dvb.frontend->id = 1;
  956. if (!dvb_attach(simple_tuner_attach,
  957. fe1->dvb.frontend,
  958. &dev->core->i2c_adap,
  959. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  960. goto frontend_detach;
  961. }
  962. break;
  963. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  964. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  965. &hauppauge_hvr4000_config,
  966. &dev->core->i2c_adap);
  967. if (fe0->dvb.frontend) {
  968. if (!dvb_attach(isl6421_attach,
  969. fe0->dvb.frontend,
  970. &dev->core->i2c_adap,
  971. 0x08, ISL6421_DCL, 0x00))
  972. goto frontend_detach;
  973. }
  974. break;
  975. case CX88_BOARD_PROF_6200:
  976. case CX88_BOARD_TBS_8910:
  977. case CX88_BOARD_TEVII_S420:
  978. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  979. &tevii_tuner_sharp_config,
  980. &core->i2c_adap);
  981. if (fe0->dvb.frontend != NULL) {
  982. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  983. &core->i2c_adap, DVB_PLL_OPERA1))
  984. goto frontend_detach;
  985. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  986. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  987. } else {
  988. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  989. &tevii_tuner_earda_config,
  990. &core->i2c_adap);
  991. if (fe0->dvb.frontend != NULL) {
  992. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  993. &core->i2c_adap))
  994. goto frontend_detach;
  995. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  996. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  997. }
  998. }
  999. break;
  1000. case CX88_BOARD_TEVII_S460:
  1001. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1002. &tevii_s460_config,
  1003. &core->i2c_adap);
  1004. if (fe0->dvb.frontend != NULL)
  1005. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1006. break;
  1007. case CX88_BOARD_OMICOM_SS4_PCI:
  1008. case CX88_BOARD_TBS_8920:
  1009. case CX88_BOARD_PROF_7300:
  1010. case CX88_BOARD_SATTRADE_ST4200:
  1011. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1012. &hauppauge_hvr4000_config,
  1013. &core->i2c_adap);
  1014. if (fe0->dvb.frontend != NULL)
  1015. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1016. break;
  1017. default:
  1018. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1019. core->name);
  1020. break;
  1021. }
  1022. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1023. printk(KERN_ERR
  1024. "%s/2: frontend initialization failed\n",
  1025. core->name);
  1026. goto frontend_detach;
  1027. }
  1028. /* define general-purpose callback pointer */
  1029. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1030. /* Ensure all frontends negotiate bus access */
  1031. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1032. if (fe1)
  1033. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1034. /* Put the analog decoder in standby to keep it quiet */
  1035. cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
  1036. /* register everything */
  1037. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1038. &dev->pci->dev, adapter_nr, mfe_shared);
  1039. frontend_detach:
  1040. core->gate_ctrl = NULL;
  1041. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1042. return -EINVAL;
  1043. }
  1044. /* ----------------------------------------------------------- */
  1045. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1046. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1047. {
  1048. struct cx88_core *core = drv->core;
  1049. int err = 0;
  1050. dprintk( 1, "%s\n", __func__);
  1051. switch (core->boardnr) {
  1052. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1053. /* We arrive here with either the cx23416 or the cx22702
  1054. * on the bus. Take the bus from the cx23416 and enable the
  1055. * cx22702 demod
  1056. */
  1057. /* Toggle reset on cx22702 leaving i2c active */
  1058. cx_set(MO_GP0_IO, 0x00000080);
  1059. udelay(1000);
  1060. cx_clear(MO_GP0_IO, 0x00000080);
  1061. udelay(50);
  1062. cx_set(MO_GP0_IO, 0x00000080);
  1063. udelay(1000);
  1064. /* enable the cx22702 pins */
  1065. cx_clear(MO_GP0_IO, 0x00000004);
  1066. udelay(1000);
  1067. break;
  1068. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1069. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1070. /* Toggle reset on cx22702 leaving i2c active */
  1071. cx_set(MO_GP0_IO, 0x00000080);
  1072. udelay(1000);
  1073. cx_clear(MO_GP0_IO, 0x00000080);
  1074. udelay(50);
  1075. cx_set(MO_GP0_IO, 0x00000080);
  1076. udelay(1000);
  1077. switch (core->dvbdev->frontends.active_fe_id) {
  1078. case 1: /* DVB-S/S2 Enabled */
  1079. /* tri-state the cx22702 pins */
  1080. cx_set(MO_GP0_IO, 0x00000004);
  1081. /* Take the cx24116/cx24123 out of reset */
  1082. cx_write(MO_SRST_IO, 1);
  1083. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1084. break;
  1085. case 2: /* DVB-T Enabled */
  1086. /* Put the cx24116/cx24123 into reset */
  1087. cx_write(MO_SRST_IO, 0);
  1088. /* enable the cx22702 pins */
  1089. cx_clear(MO_GP0_IO, 0x00000004);
  1090. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1091. break;
  1092. }
  1093. udelay(1000);
  1094. break;
  1095. default:
  1096. err = -ENODEV;
  1097. }
  1098. return err;
  1099. }
  1100. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1101. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1102. {
  1103. struct cx88_core *core = drv->core;
  1104. int err = 0;
  1105. dprintk( 1, "%s\n", __func__);
  1106. switch (core->boardnr) {
  1107. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1108. /* Do Nothing, leave the cx22702 on the bus. */
  1109. break;
  1110. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1111. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1112. break;
  1113. default:
  1114. err = -ENODEV;
  1115. }
  1116. return err;
  1117. }
  1118. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1119. {
  1120. struct cx88_core *core = drv->core;
  1121. struct cx8802_dev *dev = drv->core->dvbdev;
  1122. int err;
  1123. struct videobuf_dvb_frontend *fe;
  1124. int i;
  1125. dprintk( 1, "%s\n", __func__);
  1126. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1127. core->boardnr,
  1128. core->name,
  1129. core->pci_bus,
  1130. core->pci_slot);
  1131. err = -ENODEV;
  1132. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1133. goto fail_core;
  1134. /* If vp3054 isn't enabled, a stub will just return 0 */
  1135. err = vp3054_i2c_probe(dev);
  1136. if (0 != err)
  1137. goto fail_core;
  1138. /* dvb stuff */
  1139. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1140. dev->ts_gen_cntrl = 0x0c;
  1141. err = cx8802_alloc_frontends(dev);
  1142. if (err)
  1143. goto fail_core;
  1144. err = -ENODEV;
  1145. for (i = 1; i <= core->board.num_frontends; i++) {
  1146. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1147. if (fe == NULL) {
  1148. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1149. __func__, i);
  1150. goto fail_probe;
  1151. }
  1152. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1153. &dev->pci->dev, &dev->slock,
  1154. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1155. V4L2_FIELD_TOP,
  1156. sizeof(struct cx88_buffer),
  1157. dev);
  1158. /* init struct videobuf_dvb */
  1159. fe->dvb.name = dev->core->name;
  1160. }
  1161. err = dvb_register(dev);
  1162. if (err)
  1163. /* frontends/adapter de-allocated in dvb_register */
  1164. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1165. core->name, err);
  1166. return err;
  1167. fail_probe:
  1168. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1169. fail_core:
  1170. return err;
  1171. }
  1172. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1173. {
  1174. struct cx88_core *core = drv->core;
  1175. struct cx8802_dev *dev = drv->core->dvbdev;
  1176. dprintk( 1, "%s\n", __func__);
  1177. videobuf_dvb_unregister_bus(&dev->frontends);
  1178. vp3054_i2c_remove(dev);
  1179. core->gate_ctrl = NULL;
  1180. return 0;
  1181. }
  1182. static struct cx8802_driver cx8802_dvb_driver = {
  1183. .type_id = CX88_MPEG_DVB,
  1184. .hw_access = CX8802_DRVCTL_SHARED,
  1185. .probe = cx8802_dvb_probe,
  1186. .remove = cx8802_dvb_remove,
  1187. .advise_acquire = cx8802_dvb_advise_acquire,
  1188. .advise_release = cx8802_dvb_advise_release,
  1189. };
  1190. static int dvb_init(void)
  1191. {
  1192. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1193. (CX88_VERSION_CODE >> 16) & 0xff,
  1194. (CX88_VERSION_CODE >> 8) & 0xff,
  1195. CX88_VERSION_CODE & 0xff);
  1196. #ifdef SNAPSHOT
  1197. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1198. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1199. #endif
  1200. return cx8802_register_driver(&cx8802_dvb_driver);
  1201. }
  1202. static void dvb_fini(void)
  1203. {
  1204. cx8802_unregister_driver(&cx8802_dvb_driver);
  1205. }
  1206. module_init(dvb_init);
  1207. module_exit(dvb_fini);
  1208. /*
  1209. * Local variables:
  1210. * c-basic-offset: 8
  1211. * compile-command: "make DVB=1"
  1212. * End:
  1213. */