generic.c 10 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * Code common to all SA11x0 machines.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/gpio.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/cpufreq.h>
  19. #include <linux/ioport.h>
  20. #include <linux/platform_device.h>
  21. #include <video/sa1100fb.h>
  22. #include <asm/div64.h>
  23. #include <mach/hardware.h>
  24. #include <asm/system.h>
  25. #include <asm/mach/map.h>
  26. #include <asm/mach/flash.h>
  27. #include <asm/irq.h>
  28. #include "generic.h"
  29. unsigned int reset_status;
  30. EXPORT_SYMBOL(reset_status);
  31. #define NR_FREQS 16
  32. /*
  33. * This table is setup for a 3.6864MHz Crystal.
  34. */
  35. static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  36. 590, /* 59.0 MHz */
  37. 737, /* 73.7 MHz */
  38. 885, /* 88.5 MHz */
  39. 1032, /* 103.2 MHz */
  40. 1180, /* 118.0 MHz */
  41. 1327, /* 132.7 MHz */
  42. 1475, /* 147.5 MHz */
  43. 1622, /* 162.2 MHz */
  44. 1769, /* 176.9 MHz */
  45. 1917, /* 191.7 MHz */
  46. 2064, /* 206.4 MHz */
  47. 2212, /* 221.2 MHz */
  48. 2359, /* 235.9 MHz */
  49. 2507, /* 250.7 MHz */
  50. 2654, /* 265.4 MHz */
  51. 2802 /* 280.2 MHz */
  52. };
  53. /* rounds up(!) */
  54. unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  55. {
  56. int i;
  57. khz /= 100;
  58. for (i = 0; i < NR_FREQS; i++)
  59. if (cclk_frequency_100khz[i] >= khz)
  60. break;
  61. return i;
  62. }
  63. unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  64. {
  65. unsigned int freq = 0;
  66. if (idx < NR_FREQS)
  67. freq = cclk_frequency_100khz[idx] * 100;
  68. return freq;
  69. }
  70. /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  71. * this platform, anyway.
  72. */
  73. int sa11x0_verify_speed(struct cpufreq_policy *policy)
  74. {
  75. unsigned int tmp;
  76. if (policy->cpu)
  77. return -EINVAL;
  78. cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  79. /* make sure that at least one frequency is within the policy */
  80. tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  81. if (tmp > policy->max)
  82. policy->max = tmp;
  83. cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  84. return 0;
  85. }
  86. unsigned int sa11x0_getspeed(unsigned int cpu)
  87. {
  88. if (cpu)
  89. return 0;
  90. return cclk_frequency_100khz[PPCR & 0xf] * 100;
  91. }
  92. /*
  93. * Default power-off for SA1100
  94. */
  95. static void sa1100_power_off(void)
  96. {
  97. mdelay(100);
  98. local_irq_disable();
  99. /* disable internal oscillator, float CS lines */
  100. PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
  101. /* enable wake-up on GPIO0 (Assabet...) */
  102. PWER = GFER = GRER = 1;
  103. /*
  104. * set scratchpad to zero, just in case it is used as a
  105. * restart address by the bootloader.
  106. */
  107. PSPR = 0;
  108. /* enter sleep mode */
  109. PMCR = PMCR_SF;
  110. }
  111. void sa11x0_restart(char mode, const char *cmd)
  112. {
  113. if (mode == 's') {
  114. /* Jump into ROM at address 0 */
  115. soft_restart(0);
  116. } else {
  117. /* Use on-chip reset capability */
  118. RSRR = RSRR_SWR;
  119. }
  120. }
  121. static void sa11x0_register_device(struct platform_device *dev, void *data)
  122. {
  123. int err;
  124. dev->dev.platform_data = data;
  125. err = platform_device_register(dev);
  126. if (err)
  127. printk(KERN_ERR "Unable to register device %s: %d\n",
  128. dev->name, err);
  129. }
  130. static struct resource sa11x0udc_resources[] = {
  131. [0] = {
  132. .start = __PREG(Ser0UDCCR),
  133. .end = __PREG(Ser0UDCCR) + 0xffff,
  134. .flags = IORESOURCE_MEM,
  135. },
  136. [1] = {
  137. .start = IRQ_Ser0UDC,
  138. .end = IRQ_Ser0UDC,
  139. .flags = IORESOURCE_IRQ,
  140. },
  141. };
  142. static u64 sa11x0udc_dma_mask = 0xffffffffUL;
  143. static struct platform_device sa11x0udc_device = {
  144. .name = "sa11x0-udc",
  145. .id = -1,
  146. .dev = {
  147. .dma_mask = &sa11x0udc_dma_mask,
  148. .coherent_dma_mask = 0xffffffff,
  149. },
  150. .num_resources = ARRAY_SIZE(sa11x0udc_resources),
  151. .resource = sa11x0udc_resources,
  152. };
  153. static struct resource sa11x0uart1_resources[] = {
  154. [0] = {
  155. .start = __PREG(Ser1UTCR0),
  156. .end = __PREG(Ser1UTCR0) + 0xffff,
  157. .flags = IORESOURCE_MEM,
  158. },
  159. [1] = {
  160. .start = IRQ_Ser1UART,
  161. .end = IRQ_Ser1UART,
  162. .flags = IORESOURCE_IRQ,
  163. },
  164. };
  165. static struct platform_device sa11x0uart1_device = {
  166. .name = "sa11x0-uart",
  167. .id = 1,
  168. .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
  169. .resource = sa11x0uart1_resources,
  170. };
  171. static struct resource sa11x0uart3_resources[] = {
  172. [0] = {
  173. .start = __PREG(Ser3UTCR0),
  174. .end = __PREG(Ser3UTCR0) + 0xffff,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. [1] = {
  178. .start = IRQ_Ser3UART,
  179. .end = IRQ_Ser3UART,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. };
  183. static struct platform_device sa11x0uart3_device = {
  184. .name = "sa11x0-uart",
  185. .id = 3,
  186. .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
  187. .resource = sa11x0uart3_resources,
  188. };
  189. static struct resource sa11x0mcp_resources[] = {
  190. [0] = {
  191. .start = __PREG(Ser4MCCR0),
  192. .end = __PREG(Ser4MCCR0) + 0xffff,
  193. .flags = IORESOURCE_MEM,
  194. },
  195. [1] = {
  196. .start = IRQ_Ser4MCP,
  197. .end = IRQ_Ser4MCP,
  198. .flags = IORESOURCE_IRQ,
  199. },
  200. };
  201. static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
  202. static struct platform_device sa11x0mcp_device = {
  203. .name = "sa11x0-mcp",
  204. .id = -1,
  205. .dev = {
  206. .dma_mask = &sa11x0mcp_dma_mask,
  207. .coherent_dma_mask = 0xffffffff,
  208. },
  209. .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
  210. .resource = sa11x0mcp_resources,
  211. };
  212. void sa11x0_register_mcp(struct mcp_plat_data *data)
  213. {
  214. sa11x0_register_device(&sa11x0mcp_device, data);
  215. }
  216. static struct resource sa11x0ssp_resources[] = {
  217. [0] = {
  218. .start = 0x80070000,
  219. .end = 0x8007ffff,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. [1] = {
  223. .start = IRQ_Ser4SSP,
  224. .end = IRQ_Ser4SSP,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. };
  228. static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
  229. static struct platform_device sa11x0ssp_device = {
  230. .name = "sa11x0-ssp",
  231. .id = -1,
  232. .dev = {
  233. .dma_mask = &sa11x0ssp_dma_mask,
  234. .coherent_dma_mask = 0xffffffff,
  235. },
  236. .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
  237. .resource = sa11x0ssp_resources,
  238. };
  239. static struct resource sa11x0fb_resources[] = {
  240. [0] = {
  241. .start = 0xb0100000,
  242. .end = 0xb010ffff,
  243. .flags = IORESOURCE_MEM,
  244. },
  245. [1] = {
  246. .start = IRQ_LCD,
  247. .end = IRQ_LCD,
  248. .flags = IORESOURCE_IRQ,
  249. },
  250. };
  251. static struct platform_device sa11x0fb_device = {
  252. .name = "sa11x0-fb",
  253. .id = -1,
  254. .dev = {
  255. .coherent_dma_mask = 0xffffffff,
  256. },
  257. .num_resources = ARRAY_SIZE(sa11x0fb_resources),
  258. .resource = sa11x0fb_resources,
  259. };
  260. void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
  261. {
  262. sa11x0_register_device(&sa11x0fb_device, inf);
  263. }
  264. static struct platform_device sa11x0pcmcia_device = {
  265. .name = "sa11x0-pcmcia",
  266. .id = -1,
  267. };
  268. static struct platform_device sa11x0mtd_device = {
  269. .name = "sa1100-mtd",
  270. .id = -1,
  271. };
  272. void sa11x0_register_mtd(struct flash_platform_data *flash,
  273. struct resource *res, int nr)
  274. {
  275. flash->name = "sa1100";
  276. sa11x0mtd_device.resource = res;
  277. sa11x0mtd_device.num_resources = nr;
  278. sa11x0_register_device(&sa11x0mtd_device, flash);
  279. }
  280. static struct resource sa11x0ir_resources[] = {
  281. {
  282. .start = __PREG(Ser2UTCR0),
  283. .end = __PREG(Ser2UTCR0) + 0x24 - 1,
  284. .flags = IORESOURCE_MEM,
  285. }, {
  286. .start = __PREG(Ser2HSCR0),
  287. .end = __PREG(Ser2HSCR0) + 0x1c - 1,
  288. .flags = IORESOURCE_MEM,
  289. }, {
  290. .start = __PREG(Ser2HSCR2),
  291. .end = __PREG(Ser2HSCR2) + 0x04 - 1,
  292. .flags = IORESOURCE_MEM,
  293. }, {
  294. .start = IRQ_Ser2ICP,
  295. .end = IRQ_Ser2ICP,
  296. .flags = IORESOURCE_IRQ,
  297. }
  298. };
  299. static struct platform_device sa11x0ir_device = {
  300. .name = "sa11x0-ir",
  301. .id = -1,
  302. .num_resources = ARRAY_SIZE(sa11x0ir_resources),
  303. .resource = sa11x0ir_resources,
  304. };
  305. void sa11x0_register_irda(struct irda_platform_data *irda)
  306. {
  307. sa11x0_register_device(&sa11x0ir_device, irda);
  308. }
  309. static struct platform_device sa11x0rtc_device = {
  310. .name = "sa1100-rtc",
  311. .id = -1,
  312. };
  313. static struct platform_device *sa11x0_devices[] __initdata = {
  314. &sa11x0udc_device,
  315. &sa11x0uart1_device,
  316. &sa11x0uart3_device,
  317. &sa11x0ssp_device,
  318. &sa11x0pcmcia_device,
  319. &sa11x0rtc_device,
  320. };
  321. static int __init sa1100_init(void)
  322. {
  323. pm_power_off = sa1100_power_off;
  324. return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
  325. }
  326. arch_initcall(sa1100_init);
  327. void (*sa1100fb_backlight_power)(int on);
  328. void (*sa1100fb_lcd_power)(int on);
  329. EXPORT_SYMBOL(sa1100fb_backlight_power);
  330. EXPORT_SYMBOL(sa1100fb_lcd_power);
  331. /*
  332. * Common I/O mapping:
  333. *
  334. * Typically, static virtual address mappings are as follow:
  335. *
  336. * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
  337. * 0xf4000000-0xf4ffffff: SA-1111
  338. * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
  339. * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
  340. * 0xffff0000-0xffff0fff: SA1100 exception vectors
  341. * 0xffff2000-0xffff2fff: Minicache copy_user_page area
  342. *
  343. * Below 0xe8000000 is reserved for vm allocation.
  344. *
  345. * The machine specific code must provide the extra mapping beside the
  346. * default mapping provided here.
  347. */
  348. static struct map_desc standard_io_desc[] __initdata = {
  349. { /* PCM */
  350. .virtual = 0xf8000000,
  351. .pfn = __phys_to_pfn(0x80000000),
  352. .length = 0x00100000,
  353. .type = MT_DEVICE
  354. }, { /* SCM */
  355. .virtual = 0xfa000000,
  356. .pfn = __phys_to_pfn(0x90000000),
  357. .length = 0x00100000,
  358. .type = MT_DEVICE
  359. }, { /* MER */
  360. .virtual = 0xfc000000,
  361. .pfn = __phys_to_pfn(0xa0000000),
  362. .length = 0x00100000,
  363. .type = MT_DEVICE
  364. }, { /* LCD + DMA */
  365. .virtual = 0xfe000000,
  366. .pfn = __phys_to_pfn(0xb0000000),
  367. .length = 0x00200000,
  368. .type = MT_DEVICE
  369. },
  370. };
  371. void __init sa1100_map_io(void)
  372. {
  373. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  374. }
  375. /*
  376. * Disable the memory bus request/grant signals on the SA1110 to
  377. * ensure that we don't receive spurious memory requests. We set
  378. * the MBGNT signal false to ensure the SA1111 doesn't own the
  379. * SDRAM bus.
  380. */
  381. void __init sa1110_mb_disable(void)
  382. {
  383. unsigned long flags;
  384. local_irq_save(flags);
  385. PGSR &= ~GPIO_MBGNT;
  386. GPCR = GPIO_MBGNT;
  387. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  388. GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
  389. local_irq_restore(flags);
  390. }
  391. /*
  392. * If the system is going to use the SA-1111 DMA engines, set up
  393. * the memory bus request/grant pins.
  394. */
  395. void __devinit sa1110_mb_enable(void)
  396. {
  397. unsigned long flags;
  398. local_irq_save(flags);
  399. PGSR &= ~GPIO_MBGNT;
  400. GPCR = GPIO_MBGNT;
  401. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  402. GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
  403. TUCR |= TUCR_MR;
  404. local_irq_restore(flags);
  405. }