mach-crag6410.c 13 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/delay.h>
  22. #include <linux/regulator/machine.h>
  23. #include <linux/pwm_backlight.h>
  24. #include <linux/dm9000.h>
  25. #include <linux/gpio_keys.h>
  26. #include <linux/basic_mmio_gpio.h>
  27. #include <linux/spi/spi.h>
  28. #include <linux/i2c/pca953x.h>
  29. #include <video/platform_lcd.h>
  30. #include <linux/mfd/wm831x/core.h>
  31. #include <linux/mfd/wm831x/pdata.h>
  32. #include <linux/mfd/wm831x/gpio.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach-types.h>
  35. #include <mach/hardware.h>
  36. #include <mach/map.h>
  37. #include <mach/s3c6410.h>
  38. #include <mach/regs-sys.h>
  39. #include <mach/regs-gpio.h>
  40. #include <mach/regs-modem.h>
  41. #include <mach/gpio-bank-o.h>
  42. #include <mach/regs-gpio-memport.h>
  43. #include <plat/regs-serial.h>
  44. #include <plat/regs-fb-v4.h>
  45. #include <plat/fb.h>
  46. #include <plat/sdhci.h>
  47. #include <plat/gpio-cfg.h>
  48. #include <plat/s3c64xx-spi.h>
  49. #include <plat/keypad.h>
  50. #include <plat/clock.h>
  51. #include <plat/devs.h>
  52. #include <plat/cpu.h>
  53. #include <plat/adc.h>
  54. #include <plat/iic.h>
  55. #include <plat/pm.h>
  56. #define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
  57. #define PCA935X_GPIO_BASE GPIO_BOARD_START
  58. #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
  59. /* serial port setup */
  60. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  61. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  62. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  63. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  64. [0] = {
  65. .hwport = 0,
  66. .flags = 0,
  67. .ucon = UCON,
  68. .ulcon = ULCON,
  69. .ufcon = UFCON,
  70. },
  71. [1] = {
  72. .hwport = 1,
  73. .flags = 0,
  74. .ucon = UCON,
  75. .ulcon = ULCON,
  76. .ufcon = UFCON,
  77. },
  78. [2] = {
  79. .hwport = 2,
  80. .flags = 0,
  81. .ucon = UCON,
  82. .ulcon = ULCON,
  83. .ufcon = UFCON,
  84. },
  85. [3] = {
  86. .hwport = 3,
  87. .flags = 0,
  88. .ucon = UCON,
  89. .ulcon = ULCON,
  90. .ufcon = UFCON,
  91. },
  92. };
  93. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  94. .pwm_id = 0,
  95. .max_brightness = 1000,
  96. .dft_brightness = 600,
  97. .pwm_period_ns = 100000, /* about 1kHz */
  98. };
  99. static struct platform_device crag6410_backlight_device = {
  100. .name = "pwm-backlight",
  101. .id = -1,
  102. .dev = {
  103. .parent = &s3c_device_timer[0].dev,
  104. .platform_data = &crag6410_backlight_data,
  105. },
  106. };
  107. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  108. {
  109. pr_debug("%s: setting power %d\n", __func__, power);
  110. if (power) {
  111. gpio_set_value(S3C64XX_GPB(0), 1);
  112. msleep(1);
  113. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  114. } else {
  115. gpio_direction_output(S3C64XX_GPF(14), 0);
  116. gpio_set_value(S3C64XX_GPB(0), 0);
  117. }
  118. }
  119. static struct platform_device crag6410_lcd_powerdev = {
  120. .name = "platform-lcd",
  121. .id = -1,
  122. .dev.parent = &s3c_device_fb.dev,
  123. .dev.platform_data = &(struct plat_lcd_data) {
  124. .set_power = crag6410_lcd_power_set,
  125. },
  126. };
  127. /* 640x480 URT */
  128. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  129. /* this is to ensure we use win0 */
  130. .win_mode = {
  131. .left_margin = 150,
  132. .right_margin = 80,
  133. .upper_margin = 40,
  134. .lower_margin = 5,
  135. .hsync_len = 40,
  136. .vsync_len = 5,
  137. .xres = 640,
  138. .yres = 480,
  139. },
  140. .max_bpp = 32,
  141. .default_bpp = 16,
  142. .virtual_y = 480 * 2,
  143. .virtual_x = 640,
  144. };
  145. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  146. static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
  147. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  148. .win[0] = &crag6410_fb_win0,
  149. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  150. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  151. };
  152. /* 2x6 keypad */
  153. static uint32_t crag6410_keymap[] __initdata = {
  154. /* KEY(row, col, keycode) */
  155. KEY(0, 0, KEY_VOLUMEUP),
  156. KEY(0, 1, KEY_HOME),
  157. KEY(0, 2, KEY_VOLUMEDOWN),
  158. KEY(0, 3, KEY_HELP),
  159. KEY(0, 4, KEY_MENU),
  160. KEY(0, 5, KEY_MEDIA),
  161. KEY(1, 0, 232),
  162. KEY(1, 1, KEY_DOWN),
  163. KEY(1, 2, KEY_LEFT),
  164. KEY(1, 3, KEY_UP),
  165. KEY(1, 4, KEY_RIGHT),
  166. KEY(1, 5, KEY_CAMERA),
  167. };
  168. static struct matrix_keymap_data crag6410_keymap_data __initdata = {
  169. .keymap = crag6410_keymap,
  170. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  171. };
  172. static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
  173. .keymap_data = &crag6410_keymap_data,
  174. .rows = 2,
  175. .cols = 6,
  176. };
  177. static struct gpio_keys_button crag6410_gpio_keys[] = {
  178. [0] = {
  179. .code = KEY_SUSPEND,
  180. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  181. .type = EV_SW,
  182. .wakeup = 1,
  183. .active_low = 1,
  184. },
  185. };
  186. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  187. .buttons = crag6410_gpio_keys,
  188. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  189. };
  190. static struct platform_device crag6410_gpio_keydev = {
  191. .name = "gpio-keys",
  192. .id = 0,
  193. .dev.platform_data = &crag6410_gpio_keydata,
  194. };
  195. static struct resource crag6410_dm9k_resource[] = {
  196. [0] = {
  197. .start = S3C64XX_PA_XM0CSN5,
  198. .end = S3C64XX_PA_XM0CSN5 + 1,
  199. .flags = IORESOURCE_MEM,
  200. },
  201. [1] = {
  202. .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
  203. .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
  204. .flags = IORESOURCE_MEM,
  205. },
  206. [2] = {
  207. .start = S3C_EINT(17),
  208. .end = S3C_EINT(17),
  209. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  210. },
  211. };
  212. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  213. .flags = DM9000_PLATF_16BITONLY,
  214. };
  215. static struct platform_device crag6410_dm9k_device = {
  216. .name = "dm9000",
  217. .id = -1,
  218. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  219. .resource = crag6410_dm9k_resource,
  220. .dev.platform_data = &mini6410_dm9k_pdata,
  221. };
  222. static struct resource crag6410_mmgpio_resource[] = {
  223. [0] = {
  224. .start = S3C64XX_PA_XM0CSN4 + 1,
  225. .end = S3C64XX_PA_XM0CSN4 + 1,
  226. .flags = IORESOURCE_MEM,
  227. },
  228. };
  229. static struct platform_device crag6410_mmgpio = {
  230. .name = "basic-mmio-gpio",
  231. .id = -1,
  232. .resource = crag6410_mmgpio_resource,
  233. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  234. .dev.platform_data = &(struct bgpio_pdata) {
  235. .base = -1,
  236. },
  237. };
  238. static struct platform_device *crag6410_devices[] __initdata = {
  239. &s3c_device_hsmmc0,
  240. &s3c_device_hsmmc1,
  241. &s3c_device_hsmmc2,
  242. &s3c_device_i2c0,
  243. &s3c_device_i2c1,
  244. &s3c_device_fb,
  245. &s3c_device_ohci,
  246. &s3c_device_usb_hsotg,
  247. &s3c_device_adc,
  248. &s3c_device_rtc,
  249. &s3c_device_ts,
  250. &s3c_device_timer[0],
  251. &s3c64xx_device_iis0,
  252. &s3c64xx_device_iis1,
  253. &samsung_asoc_dma,
  254. &samsung_device_keypad,
  255. &crag6410_gpio_keydev,
  256. &crag6410_dm9k_device,
  257. &s3c64xx_device_spi0,
  258. &crag6410_mmgpio,
  259. &crag6410_lcd_powerdev,
  260. &crag6410_backlight_device,
  261. };
  262. static struct pca953x_platform_data crag6410_pca_data = {
  263. .gpio_base = PCA935X_GPIO_BASE,
  264. .irq_base = 0,
  265. };
  266. static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
  267. REGULATOR_SUPPLY("vddarm", NULL),
  268. };
  269. static struct regulator_init_data vddarm __initdata = {
  270. .constraints = {
  271. .name = "VDDARM",
  272. .min_uV = 1000000,
  273. .max_uV = 1300000,
  274. .always_on = 1,
  275. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  276. },
  277. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  278. .consumer_supplies = vddarm_consumers,
  279. };
  280. static struct regulator_init_data vddint __initdata = {
  281. .constraints = {
  282. .name = "VDDINT",
  283. .min_uV = 1000000,
  284. .max_uV = 1200000,
  285. .always_on = 1,
  286. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  287. },
  288. };
  289. static struct regulator_init_data vddmem __initdata = {
  290. .constraints = {
  291. .name = "VDDMEM",
  292. .always_on = 1,
  293. },
  294. };
  295. static struct regulator_init_data vddsys __initdata = {
  296. .constraints = {
  297. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  298. .always_on = 1,
  299. },
  300. };
  301. static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
  302. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  303. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  304. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  305. };
  306. static struct regulator_init_data vddmmc __initdata = {
  307. .constraints = {
  308. .name = "VDDMMC,UH",
  309. .always_on = 1,
  310. },
  311. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  312. .consumer_supplies = vddmmc_consumers,
  313. };
  314. static struct regulator_init_data vddotgi __initdata = {
  315. .constraints = {
  316. .name = "VDDOTGi",
  317. .always_on = 1,
  318. },
  319. };
  320. static struct regulator_init_data vddotg __initdata = {
  321. .constraints = {
  322. .name = "VDDOTG",
  323. .always_on = 1,
  324. },
  325. };
  326. static struct regulator_init_data vddhi __initdata = {
  327. .constraints = {
  328. .name = "VDDHI",
  329. .always_on = 1,
  330. },
  331. };
  332. static struct regulator_init_data vddadc __initdata = {
  333. .constraints = {
  334. .name = "VDDADC,VDDDAC",
  335. .always_on = 1,
  336. },
  337. };
  338. static struct regulator_init_data vddmem0 __initdata = {
  339. .constraints = {
  340. .name = "VDDMEM0",
  341. .always_on = 1,
  342. },
  343. };
  344. static struct regulator_init_data vddpll __initdata = {
  345. .constraints = {
  346. .name = "VDDPLL",
  347. .always_on = 1,
  348. },
  349. };
  350. static struct regulator_init_data vddlcd __initdata = {
  351. .constraints = {
  352. .name = "VDDLCD",
  353. .always_on = 1,
  354. },
  355. };
  356. static struct regulator_init_data vddalive __initdata = {
  357. .constraints = {
  358. .name = "VDDALIVE",
  359. .always_on = 1,
  360. },
  361. };
  362. static struct wm831x_status_pdata banff_red_led __initdata = {
  363. .name = "banff:red:",
  364. .default_src = WM831X_STATUS_MANUAL,
  365. };
  366. static struct wm831x_status_pdata banff_green_led __initdata = {
  367. .name = "banff:green:",
  368. .default_src = WM831X_STATUS_MANUAL,
  369. };
  370. static struct wm831x_touch_pdata touch_pdata __initdata = {
  371. .data_irq = S3C_EINT(26),
  372. };
  373. static __init int crag_pmic_pre_init(struct wm831x *wm831x)
  374. {
  375. /* Touchscreen data IRQ - CMOS, DBVDD, active high*/
  376. wm831x_reg_write(wm831x, WM831X_GPIO11_CONTROL,
  377. WM831X_GPN_POL | WM831X_GPN_ENA | 0x6);
  378. /* Touchscreen pen down IRQ - CMOS, DBVDD, active high*/
  379. wm831x_reg_write(wm831x, WM831X_GPIO12_CONTROL,
  380. WM831X_GPN_POL | WM831X_GPN_ENA | 0x7);
  381. return 0;
  382. }
  383. static struct wm831x_pdata crag_pmic_pdata __initdata = {
  384. .pre_init = crag_pmic_pre_init,
  385. .irq_base = BANFF_PMIC_IRQ_BASE,
  386. .gpio_base = GPIO_BOARD_START + 8,
  387. .dcdc = {
  388. &vddarm, /* DCDC1 */
  389. &vddint, /* DCDC2 */
  390. &vddmem, /* DCDC3 */
  391. },
  392. .ldo = {
  393. &vddsys, /* LDO1 */
  394. &vddmmc, /* LDO2 */
  395. NULL, /* LDO3 */
  396. &vddotgi, /* LDO4 */
  397. &vddotg, /* LDO5 */
  398. &vddhi, /* LDO6 */
  399. &vddadc, /* LDO7 */
  400. &vddmem0, /* LDO8 */
  401. &vddpll, /* LDO9 */
  402. &vddlcd, /* LDO10 */
  403. &vddalive, /* LDO11 */
  404. },
  405. .status = {
  406. &banff_green_led,
  407. &banff_red_led,
  408. },
  409. .touch = &touch_pdata,
  410. };
  411. static struct i2c_board_info i2c_devs0[] __initdata = {
  412. { I2C_BOARD_INFO("24c08", 0x50), },
  413. { I2C_BOARD_INFO("tca6408", 0x20),
  414. .platform_data = &crag6410_pca_data,
  415. },
  416. { I2C_BOARD_INFO("wm8312", 0x34),
  417. .platform_data = &crag_pmic_pdata,
  418. .irq = S3C_EINT(23),
  419. },
  420. };
  421. static struct s3c2410_platform_i2c i2c0_pdata = {
  422. .frequency = 400000,
  423. };
  424. static struct i2c_board_info i2c_devs1[] __initdata = {
  425. { I2C_BOARD_INFO("wm8311", 0x34),
  426. .platform_data = &glenfarclas_pmic_pdata,
  427. },
  428. };
  429. static void __init crag6410_map_io(void)
  430. {
  431. s3c64xx_init_io(NULL, 0);
  432. s3c24xx_init_clocks(12000000);
  433. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  434. /* LCD type and Bypass set by bootloader */
  435. }
  436. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  437. .max_width = 4,
  438. .cd_type = S3C_SDHCI_CD_PERMANENT,
  439. };
  440. static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
  441. .max_width = 4,
  442. .cd_type = S3C_SDHCI_CD_GPIO,
  443. .ext_cd_gpio = S3C64XX_GPF(11),
  444. };
  445. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  446. {
  447. /* Set all the necessary GPG pins to special-function 2 */
  448. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  449. /* force card-detected for prototype 0 */
  450. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  451. }
  452. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  453. .max_width = 4,
  454. .cd_type = S3C_SDHCI_CD_INTERNAL,
  455. .cfg_gpio = crag6410_cfg_sdhci0,
  456. };
  457. static void __init crag6410_machine_init(void)
  458. {
  459. /* Open drain IRQs need pullups */
  460. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  461. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  462. gpio_request(S3C64XX_GPB(0), "LCD power");
  463. gpio_direction_output(S3C64XX_GPB(0), 0);
  464. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  465. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  466. gpio_request(S3C64XX_GPB(1), "SD power");
  467. gpio_direction_output(S3C64XX_GPB(1), 0);
  468. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  469. gpio_direction_output(S3C64XX_GPF(10), 1);
  470. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  471. s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
  472. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  473. s3c_i2c0_set_platdata(&i2c0_pdata);
  474. s3c_i2c1_set_platdata(NULL);
  475. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  476. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  477. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  478. samsung_keypad_set_platdata(&crag6410_keypad_data);
  479. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  480. s3c_pm_init();
  481. }
  482. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  483. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  484. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  485. .init_irq = s3c6410_init_irq,
  486. .map_io = crag6410_map_io,
  487. .init_machine = crag6410_machine_init,
  488. .timer = &s3c24xx_timer,
  489. MACHINE_END