f71805f.c 36 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated
  3. * hardware monitoring features
  4. * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. #include <linux/sysfs.h>
  34. #include <asm/io.h>
  35. static struct platform_device *pdev;
  36. #define DRVNAME "f71805f"
  37. /*
  38. * Super-I/O constants and functions
  39. */
  40. #define F71805F_LD_HWM 0x04
  41. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  42. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  43. #define SIO_REG_DEVREV 0x22 /* Device revision */
  44. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  45. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  46. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  47. #define SIO_FINTEK_ID 0x1934
  48. #define SIO_F71805F_ID 0x0406
  49. static inline int
  50. superio_inb(int base, int reg)
  51. {
  52. outb(reg, base);
  53. return inb(base + 1);
  54. }
  55. static int
  56. superio_inw(int base, int reg)
  57. {
  58. int val;
  59. outb(reg++, base);
  60. val = inb(base + 1) << 8;
  61. outb(reg, base);
  62. val |= inb(base + 1);
  63. return val;
  64. }
  65. static inline void
  66. superio_select(int base, int ld)
  67. {
  68. outb(SIO_REG_LDSEL, base);
  69. outb(ld, base + 1);
  70. }
  71. static inline void
  72. superio_enter(int base)
  73. {
  74. outb(0x87, base);
  75. outb(0x87, base);
  76. }
  77. static inline void
  78. superio_exit(int base)
  79. {
  80. outb(0xaa, base);
  81. }
  82. /*
  83. * ISA constants
  84. */
  85. #define REGION_LENGTH 2
  86. #define ADDR_REG_OFFSET 0
  87. #define DATA_REG_OFFSET 1
  88. /*
  89. * Registers
  90. */
  91. /* in nr from 0 to 8 (8-bit values) */
  92. #define F71805F_REG_IN(nr) (0x10 + (nr))
  93. #define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr))
  94. #define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr))
  95. /* fan nr from 0 to 2 (12-bit values, two registers) */
  96. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  97. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  98. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  99. #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
  100. #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
  101. /* temp nr from 0 to 2 (8-bit values) */
  102. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  103. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  104. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  105. #define F71805F_REG_TEMP_MODE 0x01
  106. #define F71805F_REG_START 0x00
  107. /* status nr from 0 to 2 */
  108. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  109. /* individual register bits */
  110. #define FAN_CTRL_SKIP 0x80
  111. #define FAN_CTRL_DC_MODE 0x10
  112. #define FAN_CTRL_MODE_MASK 0x03
  113. #define FAN_CTRL_MODE_SPEED 0x00
  114. #define FAN_CTRL_MODE_TEMPERATURE 0x01
  115. #define FAN_CTRL_MODE_MANUAL 0x02
  116. /*
  117. * Data structures and manipulation thereof
  118. */
  119. struct f71805f_data {
  120. unsigned short addr;
  121. const char *name;
  122. struct mutex lock;
  123. struct class_device *class_dev;
  124. struct mutex update_lock;
  125. char valid; /* !=0 if following fields are valid */
  126. unsigned long last_updated; /* In jiffies */
  127. unsigned long last_limits; /* In jiffies */
  128. /* Register values */
  129. u8 in[9];
  130. u8 in_high[9];
  131. u8 in_low[9];
  132. u16 fan[3];
  133. u16 fan_low[3];
  134. u8 fan_ctrl[3];
  135. u8 pwm[3];
  136. u8 pwm_freq[3];
  137. u8 temp[3];
  138. u8 temp_high[3];
  139. u8 temp_hyst[3];
  140. u8 temp_mode;
  141. unsigned long alarms;
  142. };
  143. static inline long in_from_reg(u8 reg)
  144. {
  145. return (reg * 8);
  146. }
  147. /* The 2 least significant bits are not used */
  148. static inline u8 in_to_reg(long val)
  149. {
  150. if (val <= 0)
  151. return 0;
  152. if (val >= 2016)
  153. return 0xfc;
  154. return (((val + 16) / 32) << 2);
  155. }
  156. /* in0 is downscaled by a factor 2 internally */
  157. static inline long in0_from_reg(u8 reg)
  158. {
  159. return (reg * 16);
  160. }
  161. static inline u8 in0_to_reg(long val)
  162. {
  163. if (val <= 0)
  164. return 0;
  165. if (val >= 4032)
  166. return 0xfc;
  167. return (((val + 32) / 64) << 2);
  168. }
  169. /* The 4 most significant bits are not used */
  170. static inline long fan_from_reg(u16 reg)
  171. {
  172. reg &= 0xfff;
  173. if (!reg || reg == 0xfff)
  174. return 0;
  175. return (1500000 / reg);
  176. }
  177. static inline u16 fan_to_reg(long rpm)
  178. {
  179. /* If the low limit is set below what the chip can measure,
  180. store the largest possible 12-bit value in the registers,
  181. so that no alarm will ever trigger. */
  182. if (rpm < 367)
  183. return 0xfff;
  184. return (1500000 / rpm);
  185. }
  186. static inline unsigned long pwm_freq_from_reg(u8 reg)
  187. {
  188. unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
  189. reg &= 0x7f;
  190. if (reg == 0)
  191. reg++;
  192. return clock / (reg << 8);
  193. }
  194. static inline u8 pwm_freq_to_reg(unsigned long val)
  195. {
  196. if (val >= 187500) /* The highest we can do */
  197. return 0x80;
  198. if (val >= 1475) /* Use 48 MHz clock */
  199. return 0x80 | (48000000UL / (val << 8));
  200. if (val < 31) /* The lowest we can do */
  201. return 0x7f;
  202. else /* Use 1 MHz clock */
  203. return 1000000UL / (val << 8);
  204. }
  205. static inline int pwm_mode_from_reg(u8 reg)
  206. {
  207. return !(reg & FAN_CTRL_DC_MODE);
  208. }
  209. static inline long temp_from_reg(u8 reg)
  210. {
  211. return (reg * 1000);
  212. }
  213. static inline u8 temp_to_reg(long val)
  214. {
  215. if (val < 0)
  216. val = 0;
  217. else if (val > 1000 * 0xff)
  218. val = 0xff;
  219. return ((val + 500) / 1000);
  220. }
  221. /*
  222. * Device I/O access
  223. */
  224. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  225. {
  226. u8 val;
  227. mutex_lock(&data->lock);
  228. outb(reg, data->addr + ADDR_REG_OFFSET);
  229. val = inb(data->addr + DATA_REG_OFFSET);
  230. mutex_unlock(&data->lock);
  231. return val;
  232. }
  233. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  234. {
  235. mutex_lock(&data->lock);
  236. outb(reg, data->addr + ADDR_REG_OFFSET);
  237. outb(val, data->addr + DATA_REG_OFFSET);
  238. mutex_unlock(&data->lock);
  239. }
  240. /* It is important to read the MSB first, because doing so latches the
  241. value of the LSB, so we are sure both bytes belong to the same value. */
  242. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  243. {
  244. u16 val;
  245. mutex_lock(&data->lock);
  246. outb(reg, data->addr + ADDR_REG_OFFSET);
  247. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  248. outb(++reg, data->addr + ADDR_REG_OFFSET);
  249. val |= inb(data->addr + DATA_REG_OFFSET);
  250. mutex_unlock(&data->lock);
  251. return val;
  252. }
  253. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  254. {
  255. mutex_lock(&data->lock);
  256. outb(reg, data->addr + ADDR_REG_OFFSET);
  257. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  258. outb(++reg, data->addr + ADDR_REG_OFFSET);
  259. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  260. mutex_unlock(&data->lock);
  261. }
  262. static struct f71805f_data *f71805f_update_device(struct device *dev)
  263. {
  264. struct f71805f_data *data = dev_get_drvdata(dev);
  265. int nr;
  266. mutex_lock(&data->update_lock);
  267. /* Limit registers cache is refreshed after 60 seconds */
  268. if (time_after(jiffies, data->last_updated + 60 * HZ)
  269. || !data->valid) {
  270. for (nr = 0; nr < 9; nr++) {
  271. data->in_high[nr] = f71805f_read8(data,
  272. F71805F_REG_IN_HIGH(nr));
  273. data->in_low[nr] = f71805f_read8(data,
  274. F71805F_REG_IN_LOW(nr));
  275. }
  276. for (nr = 0; nr < 3; nr++) {
  277. if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
  278. continue;
  279. data->fan_low[nr] = f71805f_read16(data,
  280. F71805F_REG_FAN_LOW(nr));
  281. data->pwm_freq[nr] = f71805f_read8(data,
  282. F71805F_REG_PWM_FREQ(nr));
  283. }
  284. for (nr = 0; nr < 3; nr++) {
  285. data->temp_high[nr] = f71805f_read8(data,
  286. F71805F_REG_TEMP_HIGH(nr));
  287. data->temp_hyst[nr] = f71805f_read8(data,
  288. F71805F_REG_TEMP_HYST(nr));
  289. }
  290. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  291. data->last_limits = jiffies;
  292. }
  293. /* Measurement registers cache is refreshed after 1 second */
  294. if (time_after(jiffies, data->last_updated + HZ)
  295. || !data->valid) {
  296. for (nr = 0; nr < 9; nr++) {
  297. data->in[nr] = f71805f_read8(data,
  298. F71805F_REG_IN(nr));
  299. }
  300. for (nr = 0; nr < 3; nr++) {
  301. if (data->fan_ctrl[nr] & FAN_CTRL_SKIP)
  302. continue;
  303. data->fan[nr] = f71805f_read16(data,
  304. F71805F_REG_FAN(nr));
  305. data->fan_ctrl[nr] = f71805f_read8(data,
  306. F71805F_REG_FAN_CTRL(nr));
  307. data->pwm[nr] = f71805f_read8(data,
  308. F71805F_REG_PWM_DUTY(nr));
  309. }
  310. for (nr = 0; nr < 3; nr++) {
  311. data->temp[nr] = f71805f_read8(data,
  312. F71805F_REG_TEMP(nr));
  313. }
  314. data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
  315. + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
  316. + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
  317. data->last_updated = jiffies;
  318. data->valid = 1;
  319. }
  320. mutex_unlock(&data->update_lock);
  321. return data;
  322. }
  323. /*
  324. * Sysfs interface
  325. */
  326. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  327. char *buf)
  328. {
  329. struct f71805f_data *data = f71805f_update_device(dev);
  330. return sprintf(buf, "%ld\n", in0_from_reg(data->in[0]));
  331. }
  332. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  333. *devattr, char *buf)
  334. {
  335. struct f71805f_data *data = f71805f_update_device(dev);
  336. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0]));
  337. }
  338. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  339. *devattr, char *buf)
  340. {
  341. struct f71805f_data *data = f71805f_update_device(dev);
  342. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0]));
  343. }
  344. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  345. *devattr, const char *buf, size_t count)
  346. {
  347. struct f71805f_data *data = dev_get_drvdata(dev);
  348. long val = simple_strtol(buf, NULL, 10);
  349. mutex_lock(&data->update_lock);
  350. data->in_high[0] = in0_to_reg(val);
  351. f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]);
  352. mutex_unlock(&data->update_lock);
  353. return count;
  354. }
  355. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  356. *devattr, const char *buf, size_t count)
  357. {
  358. struct f71805f_data *data = dev_get_drvdata(dev);
  359. long val = simple_strtol(buf, NULL, 10);
  360. mutex_lock(&data->update_lock);
  361. data->in_low[0] = in0_to_reg(val);
  362. f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]);
  363. mutex_unlock(&data->update_lock);
  364. return count;
  365. }
  366. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  367. char *buf)
  368. {
  369. struct f71805f_data *data = f71805f_update_device(dev);
  370. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  371. int nr = attr->index;
  372. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  373. }
  374. static ssize_t show_in_max(struct device *dev, struct device_attribute
  375. *devattr, char *buf)
  376. {
  377. struct f71805f_data *data = f71805f_update_device(dev);
  378. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  379. int nr = attr->index;
  380. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  381. }
  382. static ssize_t show_in_min(struct device *dev, struct device_attribute
  383. *devattr, char *buf)
  384. {
  385. struct f71805f_data *data = f71805f_update_device(dev);
  386. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  387. int nr = attr->index;
  388. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  389. }
  390. static ssize_t set_in_max(struct device *dev, struct device_attribute
  391. *devattr, const char *buf, size_t count)
  392. {
  393. struct f71805f_data *data = dev_get_drvdata(dev);
  394. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  395. int nr = attr->index;
  396. long val = simple_strtol(buf, NULL, 10);
  397. mutex_lock(&data->update_lock);
  398. data->in_high[nr] = in_to_reg(val);
  399. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  400. mutex_unlock(&data->update_lock);
  401. return count;
  402. }
  403. static ssize_t set_in_min(struct device *dev, struct device_attribute
  404. *devattr, const char *buf, size_t count)
  405. {
  406. struct f71805f_data *data = dev_get_drvdata(dev);
  407. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  408. int nr = attr->index;
  409. long val = simple_strtol(buf, NULL, 10);
  410. mutex_lock(&data->update_lock);
  411. data->in_low[nr] = in_to_reg(val);
  412. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  413. mutex_unlock(&data->update_lock);
  414. return count;
  415. }
  416. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  417. char *buf)
  418. {
  419. struct f71805f_data *data = f71805f_update_device(dev);
  420. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  421. int nr = attr->index;
  422. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  423. }
  424. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  425. *devattr, char *buf)
  426. {
  427. struct f71805f_data *data = f71805f_update_device(dev);
  428. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  429. int nr = attr->index;
  430. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  431. }
  432. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  433. *devattr, const char *buf, size_t count)
  434. {
  435. struct f71805f_data *data = dev_get_drvdata(dev);
  436. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  437. int nr = attr->index;
  438. long val = simple_strtol(buf, NULL, 10);
  439. mutex_lock(&data->update_lock);
  440. data->fan_low[nr] = fan_to_reg(val);
  441. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  442. mutex_unlock(&data->update_lock);
  443. return count;
  444. }
  445. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  446. char *buf)
  447. {
  448. struct f71805f_data *data = f71805f_update_device(dev);
  449. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  450. int nr = attr->index;
  451. return sprintf(buf, "%d\n", (int)data->pwm[nr]);
  452. }
  453. static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
  454. *devattr, char *buf)
  455. {
  456. struct f71805f_data *data = f71805f_update_device(dev);
  457. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  458. int nr = attr->index;
  459. int mode;
  460. switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
  461. case FAN_CTRL_MODE_SPEED:
  462. mode = 3;
  463. break;
  464. case FAN_CTRL_MODE_TEMPERATURE:
  465. mode = 2;
  466. break;
  467. default: /* MANUAL */
  468. mode = 1;
  469. }
  470. return sprintf(buf, "%d\n", mode);
  471. }
  472. static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
  473. *devattr, char *buf)
  474. {
  475. struct f71805f_data *data = f71805f_update_device(dev);
  476. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  477. int nr = attr->index;
  478. return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
  479. }
  480. static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
  481. *devattr, char *buf)
  482. {
  483. struct f71805f_data *data = f71805f_update_device(dev);
  484. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  485. int nr = attr->index;
  486. return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
  487. }
  488. static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
  489. const char *buf, size_t count)
  490. {
  491. struct f71805f_data *data = dev_get_drvdata(dev);
  492. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  493. int nr = attr->index;
  494. unsigned long val = simple_strtoul(buf, NULL, 10);
  495. if (val > 255)
  496. return -EINVAL;
  497. mutex_lock(&data->update_lock);
  498. data->pwm[nr] = val;
  499. f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
  500. mutex_unlock(&data->update_lock);
  501. return count;
  502. }
  503. static struct attribute *f71805f_attr_pwm[];
  504. static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
  505. *devattr, const char *buf, size_t count)
  506. {
  507. struct f71805f_data *data = dev_get_drvdata(dev);
  508. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  509. int nr = attr->index;
  510. unsigned long val = simple_strtoul(buf, NULL, 10);
  511. u8 reg;
  512. if (val < 1 || val > 3)
  513. return -EINVAL;
  514. if (val > 1) { /* Automatic mode, user can't set PWM value */
  515. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  516. S_IRUGO))
  517. dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
  518. }
  519. mutex_lock(&data->update_lock);
  520. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
  521. & ~FAN_CTRL_MODE_MASK;
  522. switch (val) {
  523. case 1:
  524. reg |= FAN_CTRL_MODE_MANUAL;
  525. break;
  526. case 2:
  527. reg |= FAN_CTRL_MODE_TEMPERATURE;
  528. break;
  529. case 3:
  530. reg |= FAN_CTRL_MODE_SPEED;
  531. break;
  532. }
  533. data->fan_ctrl[nr] = reg;
  534. f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
  535. mutex_unlock(&data->update_lock);
  536. if (val == 1) { /* Manual mode, user can set PWM value */
  537. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  538. S_IRUGO | S_IWUSR))
  539. dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
  540. }
  541. return count;
  542. }
  543. static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
  544. *devattr, const char *buf, size_t count)
  545. {
  546. struct f71805f_data *data = dev_get_drvdata(dev);
  547. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  548. int nr = attr->index;
  549. unsigned long val = simple_strtoul(buf, NULL, 10);
  550. mutex_lock(&data->update_lock);
  551. data->pwm_freq[nr] = pwm_freq_to_reg(val);
  552. f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
  553. mutex_unlock(&data->update_lock);
  554. return count;
  555. }
  556. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  557. char *buf)
  558. {
  559. struct f71805f_data *data = f71805f_update_device(dev);
  560. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  561. int nr = attr->index;
  562. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  563. }
  564. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  565. *devattr, char *buf)
  566. {
  567. struct f71805f_data *data = f71805f_update_device(dev);
  568. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  569. int nr = attr->index;
  570. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  571. }
  572. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  573. *devattr, char *buf)
  574. {
  575. struct f71805f_data *data = f71805f_update_device(dev);
  576. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  577. int nr = attr->index;
  578. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  579. }
  580. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  581. *devattr, char *buf)
  582. {
  583. struct f71805f_data *data = f71805f_update_device(dev);
  584. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  585. int nr = attr->index;
  586. /* 3 is diode, 4 is thermistor */
  587. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  588. }
  589. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  590. *devattr, const char *buf, size_t count)
  591. {
  592. struct f71805f_data *data = dev_get_drvdata(dev);
  593. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  594. int nr = attr->index;
  595. long val = simple_strtol(buf, NULL, 10);
  596. mutex_lock(&data->update_lock);
  597. data->temp_high[nr] = temp_to_reg(val);
  598. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  599. mutex_unlock(&data->update_lock);
  600. return count;
  601. }
  602. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  603. *devattr, const char *buf, size_t count)
  604. {
  605. struct f71805f_data *data = dev_get_drvdata(dev);
  606. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  607. int nr = attr->index;
  608. long val = simple_strtol(buf, NULL, 10);
  609. mutex_lock(&data->update_lock);
  610. data->temp_hyst[nr] = temp_to_reg(val);
  611. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  612. mutex_unlock(&data->update_lock);
  613. return count;
  614. }
  615. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  616. *devattr, char *buf)
  617. {
  618. struct f71805f_data *data = f71805f_update_device(dev);
  619. return sprintf(buf, "%lu\n", data->alarms & 0x1ff);
  620. }
  621. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  622. *devattr, char *buf)
  623. {
  624. struct f71805f_data *data = f71805f_update_device(dev);
  625. return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
  626. }
  627. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  628. *devattr, char *buf)
  629. {
  630. struct f71805f_data *data = f71805f_update_device(dev);
  631. return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
  632. }
  633. static ssize_t show_alarm(struct device *dev, struct device_attribute
  634. *devattr, char *buf)
  635. {
  636. struct f71805f_data *data = f71805f_update_device(dev);
  637. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  638. int bitnr = attr->index;
  639. return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
  640. }
  641. static ssize_t show_name(struct device *dev, struct device_attribute
  642. *devattr, char *buf)
  643. {
  644. struct f71805f_data *data = dev_get_drvdata(dev);
  645. return sprintf(buf, "%s\n", data->name);
  646. }
  647. static DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL);
  648. static DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max);
  649. static DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min);
  650. static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
  651. static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
  652. show_in_max, set_in_max, 1);
  653. static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
  654. show_in_min, set_in_min, 1);
  655. static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
  656. static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
  657. show_in_max, set_in_max, 2);
  658. static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
  659. show_in_min, set_in_min, 2);
  660. static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
  661. static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
  662. show_in_max, set_in_max, 3);
  663. static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
  664. show_in_min, set_in_min, 3);
  665. static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
  666. static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
  667. show_in_max, set_in_max, 4);
  668. static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
  669. show_in_min, set_in_min, 4);
  670. static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
  671. static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
  672. show_in_max, set_in_max, 5);
  673. static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
  674. show_in_min, set_in_min, 5);
  675. static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
  676. static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
  677. show_in_max, set_in_max, 6);
  678. static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
  679. show_in_min, set_in_min, 6);
  680. static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
  681. static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
  682. show_in_max, set_in_max, 7);
  683. static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
  684. show_in_min, set_in_min, 7);
  685. static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
  686. static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
  687. show_in_max, set_in_max, 8);
  688. static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
  689. show_in_min, set_in_min, 8);
  690. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  691. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  692. show_fan_min, set_fan_min, 0);
  693. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  694. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  695. show_fan_min, set_fan_min, 1);
  696. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  697. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  698. show_fan_min, set_fan_min, 2);
  699. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
  700. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  701. show_temp_max, set_temp_max, 0);
  702. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  703. show_temp_hyst, set_temp_hyst, 0);
  704. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
  705. static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
  706. static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  707. show_temp_max, set_temp_max, 1);
  708. static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  709. show_temp_hyst, set_temp_hyst, 1);
  710. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
  711. static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
  712. static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  713. show_temp_max, set_temp_max, 2);
  714. static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  715. show_temp_hyst, set_temp_hyst, 2);
  716. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
  717. /* pwm (value) files are created read-only, write permission is
  718. then added or removed dynamically as needed */
  719. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
  720. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
  721. show_pwm_enable, set_pwm_enable, 0);
  722. static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
  723. show_pwm_freq, set_pwm_freq, 0);
  724. static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
  725. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
  726. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  727. show_pwm_enable, set_pwm_enable, 1);
  728. static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
  729. show_pwm_freq, set_pwm_freq, 1);
  730. static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
  731. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
  732. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
  733. show_pwm_enable, set_pwm_enable, 2);
  734. static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
  735. show_pwm_freq, set_pwm_freq, 2);
  736. static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
  737. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  738. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  739. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  740. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  741. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
  742. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
  743. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
  744. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
  745. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
  746. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
  747. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
  748. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
  749. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
  750. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
  751. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
  752. static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
  753. static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
  754. static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
  755. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  756. static struct attribute *f71805f_attributes[] = {
  757. &dev_attr_in0_input.attr,
  758. &dev_attr_in0_max.attr,
  759. &dev_attr_in0_min.attr,
  760. &sensor_dev_attr_in1_input.dev_attr.attr,
  761. &sensor_dev_attr_in1_max.dev_attr.attr,
  762. &sensor_dev_attr_in1_min.dev_attr.attr,
  763. &sensor_dev_attr_in2_input.dev_attr.attr,
  764. &sensor_dev_attr_in2_max.dev_attr.attr,
  765. &sensor_dev_attr_in2_min.dev_attr.attr,
  766. &sensor_dev_attr_in3_input.dev_attr.attr,
  767. &sensor_dev_attr_in3_max.dev_attr.attr,
  768. &sensor_dev_attr_in3_min.dev_attr.attr,
  769. &sensor_dev_attr_in4_input.dev_attr.attr,
  770. &sensor_dev_attr_in4_max.dev_attr.attr,
  771. &sensor_dev_attr_in4_min.dev_attr.attr,
  772. &sensor_dev_attr_in5_input.dev_attr.attr,
  773. &sensor_dev_attr_in5_max.dev_attr.attr,
  774. &sensor_dev_attr_in5_min.dev_attr.attr,
  775. &sensor_dev_attr_in6_input.dev_attr.attr,
  776. &sensor_dev_attr_in6_max.dev_attr.attr,
  777. &sensor_dev_attr_in6_min.dev_attr.attr,
  778. &sensor_dev_attr_in7_input.dev_attr.attr,
  779. &sensor_dev_attr_in7_max.dev_attr.attr,
  780. &sensor_dev_attr_in7_min.dev_attr.attr,
  781. &sensor_dev_attr_in8_input.dev_attr.attr,
  782. &sensor_dev_attr_in8_max.dev_attr.attr,
  783. &sensor_dev_attr_in8_min.dev_attr.attr,
  784. &sensor_dev_attr_temp1_input.dev_attr.attr,
  785. &sensor_dev_attr_temp1_max.dev_attr.attr,
  786. &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
  787. &sensor_dev_attr_temp1_type.dev_attr.attr,
  788. &sensor_dev_attr_temp2_input.dev_attr.attr,
  789. &sensor_dev_attr_temp2_max.dev_attr.attr,
  790. &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
  791. &sensor_dev_attr_temp2_type.dev_attr.attr,
  792. &sensor_dev_attr_temp3_input.dev_attr.attr,
  793. &sensor_dev_attr_temp3_max.dev_attr.attr,
  794. &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
  795. &sensor_dev_attr_temp3_type.dev_attr.attr,
  796. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  797. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  798. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  799. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  800. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  801. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  802. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  803. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  804. &sensor_dev_attr_in8_alarm.dev_attr.attr,
  805. &dev_attr_alarms_in.attr,
  806. &sensor_dev_attr_temp1_alarm.dev_attr.attr,
  807. &sensor_dev_attr_temp2_alarm.dev_attr.attr,
  808. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  809. &dev_attr_alarms_temp.attr,
  810. &dev_attr_alarms_fan.attr,
  811. &dev_attr_name.attr,
  812. NULL
  813. };
  814. static const struct attribute_group f71805f_group = {
  815. .attrs = f71805f_attributes,
  816. };
  817. static struct attribute *f71805f_attributes_fan[3][7] = {
  818. {
  819. &sensor_dev_attr_fan1_input.dev_attr.attr,
  820. &sensor_dev_attr_fan1_min.dev_attr.attr,
  821. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  822. &sensor_dev_attr_pwm1.dev_attr.attr,
  823. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  824. &sensor_dev_attr_pwm1_mode.dev_attr.attr,
  825. NULL
  826. }, {
  827. &sensor_dev_attr_fan2_input.dev_attr.attr,
  828. &sensor_dev_attr_fan2_min.dev_attr.attr,
  829. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  830. &sensor_dev_attr_pwm2.dev_attr.attr,
  831. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  832. &sensor_dev_attr_pwm2_mode.dev_attr.attr,
  833. NULL
  834. }, {
  835. &sensor_dev_attr_fan3_input.dev_attr.attr,
  836. &sensor_dev_attr_fan3_min.dev_attr.attr,
  837. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  838. &sensor_dev_attr_pwm3.dev_attr.attr,
  839. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  840. &sensor_dev_attr_pwm3_mode.dev_attr.attr,
  841. NULL
  842. }
  843. };
  844. static const struct attribute_group f71805f_group_fan[3] = {
  845. { .attrs = f71805f_attributes_fan[0] },
  846. { .attrs = f71805f_attributes_fan[1] },
  847. { .attrs = f71805f_attributes_fan[2] },
  848. };
  849. /* We don't include pwm_freq files in the arrays above, because they must be
  850. created conditionally (only if pwm_mode is 1 == PWM) */
  851. static struct attribute *f71805f_attributes_pwm_freq[] = {
  852. &sensor_dev_attr_pwm1_freq.dev_attr.attr,
  853. &sensor_dev_attr_pwm2_freq.dev_attr.attr,
  854. &sensor_dev_attr_pwm3_freq.dev_attr.attr,
  855. NULL
  856. };
  857. static const struct attribute_group f71805f_group_pwm_freq = {
  858. .attrs = f71805f_attributes_pwm_freq,
  859. };
  860. /* We also need an indexed access to pwmN files to toggle writability */
  861. static struct attribute *f71805f_attr_pwm[] = {
  862. &sensor_dev_attr_pwm1.dev_attr.attr,
  863. &sensor_dev_attr_pwm2.dev_attr.attr,
  864. &sensor_dev_attr_pwm3.dev_attr.attr,
  865. };
  866. /*
  867. * Device registration and initialization
  868. */
  869. static void __devinit f71805f_init_device(struct f71805f_data *data)
  870. {
  871. u8 reg;
  872. int i;
  873. reg = f71805f_read8(data, F71805F_REG_START);
  874. if ((reg & 0x41) != 0x01) {
  875. printk(KERN_DEBUG DRVNAME ": Starting monitoring "
  876. "operations\n");
  877. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  878. }
  879. /* Fan monitoring can be disabled. If it is, we won't be polling
  880. the register values, and won't create the related sysfs files. */
  881. for (i = 0; i < 3; i++) {
  882. data->fan_ctrl[i] = f71805f_read8(data,
  883. F71805F_REG_FAN_CTRL(i));
  884. }
  885. }
  886. static int __devinit f71805f_probe(struct platform_device *pdev)
  887. {
  888. struct f71805f_data *data;
  889. struct resource *res;
  890. int i, err;
  891. if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
  892. err = -ENOMEM;
  893. printk(KERN_ERR DRVNAME ": Out of memory\n");
  894. goto exit;
  895. }
  896. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  897. data->addr = res->start;
  898. mutex_init(&data->lock);
  899. data->name = "f71805f";
  900. mutex_init(&data->update_lock);
  901. platform_set_drvdata(pdev, data);
  902. /* Initialize the F71805F chip */
  903. f71805f_init_device(data);
  904. /* Register sysfs interface files */
  905. if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group)))
  906. goto exit_free;
  907. for (i = 0; i < 3; i++) {
  908. if (data->fan_ctrl[i] & FAN_CTRL_SKIP)
  909. continue;
  910. if ((err = sysfs_create_group(&pdev->dev.kobj,
  911. &f71805f_group_fan[i])))
  912. goto exit_remove_files;
  913. /* If control mode is PWM, create pwm_freq file */
  914. if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
  915. if ((err = sysfs_create_file(&pdev->dev.kobj,
  916. f71805f_attributes_pwm_freq[i])))
  917. goto exit_remove_files;
  918. }
  919. /* If PWM is in manual mode, add write permission */
  920. if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
  921. if ((err = sysfs_chmod_file(&pdev->dev.kobj,
  922. f71805f_attr_pwm[i],
  923. S_IRUGO | S_IWUSR))) {
  924. dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
  925. i + 1);
  926. goto exit_remove_files;
  927. }
  928. }
  929. }
  930. data->class_dev = hwmon_device_register(&pdev->dev);
  931. if (IS_ERR(data->class_dev)) {
  932. err = PTR_ERR(data->class_dev);
  933. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  934. goto exit_remove_files;
  935. }
  936. return 0;
  937. exit_remove_files:
  938. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  939. for (i = 0; i < 3; i++)
  940. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
  941. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  942. exit_free:
  943. platform_set_drvdata(pdev, NULL);
  944. kfree(data);
  945. exit:
  946. return err;
  947. }
  948. static int __devexit f71805f_remove(struct platform_device *pdev)
  949. {
  950. struct f71805f_data *data = platform_get_drvdata(pdev);
  951. int i;
  952. platform_set_drvdata(pdev, NULL);
  953. hwmon_device_unregister(data->class_dev);
  954. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  955. for (i = 0; i < 3; i++)
  956. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_fan[i]);
  957. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  958. kfree(data);
  959. return 0;
  960. }
  961. static struct platform_driver f71805f_driver = {
  962. .driver = {
  963. .owner = THIS_MODULE,
  964. .name = DRVNAME,
  965. },
  966. .probe = f71805f_probe,
  967. .remove = __devexit_p(f71805f_remove),
  968. };
  969. static int __init f71805f_device_add(unsigned short address)
  970. {
  971. struct resource res = {
  972. .start = address,
  973. .end = address + REGION_LENGTH - 1,
  974. .flags = IORESOURCE_IO,
  975. };
  976. int err;
  977. pdev = platform_device_alloc(DRVNAME, address);
  978. if (!pdev) {
  979. err = -ENOMEM;
  980. printk(KERN_ERR DRVNAME ": Device allocation failed\n");
  981. goto exit;
  982. }
  983. res.name = pdev->name;
  984. err = platform_device_add_resources(pdev, &res, 1);
  985. if (err) {
  986. printk(KERN_ERR DRVNAME ": Device resource addition failed "
  987. "(%d)\n", err);
  988. goto exit_device_put;
  989. }
  990. err = platform_device_add(pdev);
  991. if (err) {
  992. printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
  993. err);
  994. goto exit_device_put;
  995. }
  996. return 0;
  997. exit_device_put:
  998. platform_device_put(pdev);
  999. exit:
  1000. return err;
  1001. }
  1002. static int __init f71805f_find(int sioaddr, unsigned short *address)
  1003. {
  1004. int err = -ENODEV;
  1005. u16 devid;
  1006. superio_enter(sioaddr);
  1007. devid = superio_inw(sioaddr, SIO_REG_MANID);
  1008. if (devid != SIO_FINTEK_ID)
  1009. goto exit;
  1010. devid = superio_inw(sioaddr, SIO_REG_DEVID);
  1011. if (devid != SIO_F71805F_ID) {
  1012. printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
  1013. "skipping\n");
  1014. goto exit;
  1015. }
  1016. superio_select(sioaddr, F71805F_LD_HWM);
  1017. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  1018. printk(KERN_WARNING DRVNAME ": Device not activated, "
  1019. "skipping\n");
  1020. goto exit;
  1021. }
  1022. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  1023. if (*address == 0) {
  1024. printk(KERN_WARNING DRVNAME ": Base address not set, "
  1025. "skipping\n");
  1026. goto exit;
  1027. }
  1028. err = 0;
  1029. printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n",
  1030. *address, superio_inb(sioaddr, SIO_REG_DEVREV));
  1031. exit:
  1032. superio_exit(sioaddr);
  1033. return err;
  1034. }
  1035. static int __init f71805f_init(void)
  1036. {
  1037. int err;
  1038. unsigned short address;
  1039. if (f71805f_find(0x2e, &address)
  1040. && f71805f_find(0x4e, &address))
  1041. return -ENODEV;
  1042. err = platform_driver_register(&f71805f_driver);
  1043. if (err)
  1044. goto exit;
  1045. /* Sets global pdev as a side effect */
  1046. err = f71805f_device_add(address);
  1047. if (err)
  1048. goto exit_driver;
  1049. return 0;
  1050. exit_driver:
  1051. platform_driver_unregister(&f71805f_driver);
  1052. exit:
  1053. return err;
  1054. }
  1055. static void __exit f71805f_exit(void)
  1056. {
  1057. platform_device_unregister(pdev);
  1058. platform_driver_unregister(&f71805f_driver);
  1059. }
  1060. MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
  1061. MODULE_LICENSE("GPL");
  1062. MODULE_DESCRIPTION("F71805F hardware monitoring driver");
  1063. module_init(f71805f_init);
  1064. module_exit(f71805f_exit);