board-paz00.c 4.6 KB

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  1. /*
  2. * arch/arm/mach-tegra/board-paz00.c
  3. *
  4. * Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
  5. *
  6. * Based on board-harmony.c
  7. * Copyright (C) 2010 Google, Inc.
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/serial_8250.h>
  23. #include <linux/clk.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/pda_power.h>
  26. #include <linux/io.h>
  27. #include <linux/i2c.h>
  28. #include <linux/gpio.h>
  29. #include <linux/rfkill-gpio.h>
  30. #include <asm/hardware/gic.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach/time.h>
  34. #include <asm/setup.h>
  35. #include <mach/iomap.h>
  36. #include <mach/irqs.h>
  37. #include <mach/sdhci.h>
  38. #include "board.h"
  39. #include "board-paz00.h"
  40. #include "clock.h"
  41. #include "devices.h"
  42. #include "gpio-names.h"
  43. static struct plat_serial8250_port debug_uart_platform_data[] = {
  44. {
  45. /* serial port on JP1 */
  46. .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
  47. .mapbase = TEGRA_UARTA_BASE,
  48. .irq = INT_UARTA,
  49. .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
  50. .type = PORT_TEGRA,
  51. .iotype = UPIO_MEM,
  52. .regshift = 2,
  53. .uartclk = 216000000,
  54. }, {
  55. /* serial port on mini-pcie */
  56. .membase = IO_ADDRESS(TEGRA_UARTD_BASE),
  57. .mapbase = TEGRA_UARTD_BASE,
  58. .irq = INT_UARTD,
  59. .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
  60. .type = PORT_TEGRA,
  61. .iotype = UPIO_MEM,
  62. .regshift = 2,
  63. .uartclk = 216000000,
  64. }, {
  65. .flags = 0
  66. }
  67. };
  68. static struct platform_device debug_uart = {
  69. .name = "serial8250",
  70. .id = PLAT8250_DEV_PLATFORM,
  71. .dev = {
  72. .platform_data = debug_uart_platform_data,
  73. },
  74. };
  75. static struct rfkill_gpio_platform_data wifi_rfkill_platform_data = {
  76. .name = "wifi_rfkill",
  77. .reset_gpio = TEGRA_WIFI_RST,
  78. .shutdown_gpio = TEGRA_WIFI_PWRN,
  79. .type = RFKILL_TYPE_WLAN,
  80. };
  81. static struct platform_device wifi_rfkill_device = {
  82. .name = "rfkill_gpio",
  83. .id = -1,
  84. .dev = {
  85. .platform_data = &wifi_rfkill_platform_data,
  86. },
  87. };
  88. static struct gpio_led gpio_leds[] = {
  89. {
  90. .name = "wifi-led",
  91. .default_trigger = "rfkill0",
  92. .gpio = TEGRA_WIFI_LED,
  93. },
  94. };
  95. static struct gpio_led_platform_data gpio_led_info = {
  96. .leds = gpio_leds,
  97. .num_leds = ARRAY_SIZE(gpio_leds),
  98. };
  99. static struct platform_device leds_gpio = {
  100. .name = "leds-gpio",
  101. .id = -1,
  102. .dev = {
  103. .platform_data = &gpio_led_info,
  104. },
  105. };
  106. static struct platform_device *paz00_devices[] __initdata = {
  107. &debug_uart,
  108. &tegra_sdhci_device4,
  109. &tegra_sdhci_device1,
  110. &wifi_rfkill_device,
  111. &leds_gpio,
  112. };
  113. static void paz00_i2c_init(void)
  114. {
  115. platform_device_register(&tegra_i2c_device1);
  116. platform_device_register(&tegra_i2c_device2);
  117. platform_device_register(&tegra_i2c_device4);
  118. }
  119. static void paz00_usb_init(void)
  120. {
  121. platform_device_register(&tegra_ehci2_device);
  122. platform_device_register(&tegra_ehci3_device);
  123. }
  124. static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
  125. struct meminfo *mi)
  126. {
  127. mi->nr_banks = 1;
  128. mi->bank[0].start = PHYS_OFFSET;
  129. mi->bank[0].size = 448 * SZ_1M;
  130. }
  131. static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
  132. /* name parent rate enabled */
  133. { "uarta", "pll_p", 216000000, true },
  134. { "uartd", "pll_p", 216000000, true },
  135. { "pll_p_out4", "pll_p", 24000000, true },
  136. { "usbd", "clk_m", 12000000, false },
  137. { "usb2", "clk_m", 12000000, false },
  138. { "usb3", "clk_m", 12000000, false },
  139. { NULL, NULL, 0, 0},
  140. };
  141. static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  142. .cd_gpio = TEGRA_GPIO_SD1_CD,
  143. .wp_gpio = TEGRA_GPIO_SD1_WP,
  144. .power_gpio = TEGRA_GPIO_SD1_POWER,
  145. };
  146. static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  147. .cd_gpio = -1,
  148. .wp_gpio = -1,
  149. .power_gpio = -1,
  150. .is_8bit = 1,
  151. };
  152. static void __init tegra_paz00_init(void)
  153. {
  154. tegra_clk_init_from_table(paz00_clk_init_table);
  155. paz00_pinmux_init();
  156. tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
  157. tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
  158. platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
  159. paz00_i2c_init();
  160. paz00_usb_init();
  161. }
  162. MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
  163. .atag_offset = 0x100,
  164. .fixup = tegra_paz00_fixup,
  165. .map_io = tegra_map_common_io,
  166. .init_early = tegra20_init_early,
  167. .init_irq = tegra_init_irq,
  168. .handle_irq = gic_handle_irq,
  169. .timer = &tegra_timer,
  170. .init_machine = tegra_paz00_init,
  171. MACHINE_END