it87.c 73 KB

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  1. /*
  2. * it87.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring.
  4. *
  5. * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
  6. * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
  7. * addition to an Environment Controller (Enhanced Hardware Monitor and
  8. * Fan Controller)
  9. *
  10. * This driver supports only the Environment Controller in the IT8705F and
  11. * similar parts. The other devices are supported by different drivers.
  12. *
  13. * Supports: IT8705F Super I/O chip w/LPC interface
  14. * IT8712F Super I/O chip w/LPC interface
  15. * IT8716F Super I/O chip w/LPC interface
  16. * IT8718F Super I/O chip w/LPC interface
  17. * IT8720F Super I/O chip w/LPC interface
  18. * IT8721F Super I/O chip w/LPC interface
  19. * IT8726F Super I/O chip w/LPC interface
  20. * IT8728F Super I/O chip w/LPC interface
  21. * IT8758E Super I/O chip w/LPC interface
  22. * IT8782F Super I/O chip w/LPC interface
  23. * IT8783E/F Super I/O chip w/LPC interface
  24. * Sis950 A clone of the IT8705F
  25. *
  26. * Copyright (C) 2001 Chris Gauthron
  27. * Copyright (C) 2005-2010 Jean Delvare <khali@linux-fr.org>
  28. *
  29. * This program is free software; you can redistribute it and/or modify
  30. * it under the terms of the GNU General Public License as published by
  31. * the Free Software Foundation; either version 2 of the License, or
  32. * (at your option) any later version.
  33. *
  34. * This program is distributed in the hope that it will be useful,
  35. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  36. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  37. * GNU General Public License for more details.
  38. *
  39. * You should have received a copy of the GNU General Public License
  40. * along with this program; if not, write to the Free Software
  41. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  42. */
  43. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44. #include <linux/module.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/jiffies.h>
  48. #include <linux/platform_device.h>
  49. #include <linux/hwmon.h>
  50. #include <linux/hwmon-sysfs.h>
  51. #include <linux/hwmon-vid.h>
  52. #include <linux/err.h>
  53. #include <linux/mutex.h>
  54. #include <linux/sysfs.h>
  55. #include <linux/string.h>
  56. #include <linux/dmi.h>
  57. #include <linux/acpi.h>
  58. #include <linux/io.h>
  59. #define DRVNAME "it87"
  60. enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8782,
  61. it8783 };
  62. static unsigned short force_id;
  63. module_param(force_id, ushort, 0);
  64. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  65. static struct platform_device *pdev;
  66. #define REG 0x2e /* The register to read/write */
  67. #define DEV 0x07 /* Register: Logical device select */
  68. #define VAL 0x2f /* The value to read/write */
  69. #define PME 0x04 /* The device with the fan registers in it */
  70. /* The device with the IT8718F/IT8720F VID value in it */
  71. #define GPIO 0x07
  72. #define DEVID 0x20 /* Register: Device ID */
  73. #define DEVREV 0x22 /* Register: Device Revision */
  74. static inline int superio_inb(int reg)
  75. {
  76. outb(reg, REG);
  77. return inb(VAL);
  78. }
  79. static inline void superio_outb(int reg, int val)
  80. {
  81. outb(reg, REG);
  82. outb(val, VAL);
  83. }
  84. static int superio_inw(int reg)
  85. {
  86. int val;
  87. outb(reg++, REG);
  88. val = inb(VAL) << 8;
  89. outb(reg, REG);
  90. val |= inb(VAL);
  91. return val;
  92. }
  93. static inline void superio_select(int ldn)
  94. {
  95. outb(DEV, REG);
  96. outb(ldn, VAL);
  97. }
  98. static inline int superio_enter(void)
  99. {
  100. /*
  101. * Try to reserve REG and REG + 1 for exclusive access.
  102. */
  103. if (!request_muxed_region(REG, 2, DRVNAME))
  104. return -EBUSY;
  105. outb(0x87, REG);
  106. outb(0x01, REG);
  107. outb(0x55, REG);
  108. outb(0x55, REG);
  109. return 0;
  110. }
  111. static inline void superio_exit(void)
  112. {
  113. outb(0x02, REG);
  114. outb(0x02, VAL);
  115. release_region(REG, 2);
  116. }
  117. /* Logical device 4 registers */
  118. #define IT8712F_DEVID 0x8712
  119. #define IT8705F_DEVID 0x8705
  120. #define IT8716F_DEVID 0x8716
  121. #define IT8718F_DEVID 0x8718
  122. #define IT8720F_DEVID 0x8720
  123. #define IT8721F_DEVID 0x8721
  124. #define IT8726F_DEVID 0x8726
  125. #define IT8728F_DEVID 0x8728
  126. #define IT8782F_DEVID 0x8782
  127. #define IT8783E_DEVID 0x8783
  128. #define IT87_ACT_REG 0x30
  129. #define IT87_BASE_REG 0x60
  130. /* Logical device 7 registers (IT8712F and later) */
  131. #define IT87_SIO_GPIO1_REG 0x25
  132. #define IT87_SIO_GPIO3_REG 0x27
  133. #define IT87_SIO_GPIO5_REG 0x29
  134. #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
  135. #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
  136. #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
  137. #define IT87_SIO_VID_REG 0xfc /* VID value */
  138. #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
  139. /* Update battery voltage after every reading if true */
  140. static bool update_vbat;
  141. /* Not all BIOSes properly configure the PWM registers */
  142. static bool fix_pwm_polarity;
  143. /* Many IT87 constants specified below */
  144. /* Length of ISA address segment */
  145. #define IT87_EXTENT 8
  146. /* Length of ISA address segment for Environmental Controller */
  147. #define IT87_EC_EXTENT 2
  148. /* Offset of EC registers from ISA base address */
  149. #define IT87_EC_OFFSET 5
  150. /* Where are the ISA address/data registers relative to the EC base address */
  151. #define IT87_ADDR_REG_OFFSET 0
  152. #define IT87_DATA_REG_OFFSET 1
  153. /*----- The IT87 registers -----*/
  154. #define IT87_REG_CONFIG 0x00
  155. #define IT87_REG_ALARM1 0x01
  156. #define IT87_REG_ALARM2 0x02
  157. #define IT87_REG_ALARM3 0x03
  158. /*
  159. * The IT8718F and IT8720F have the VID value in a different register, in
  160. * Super-I/O configuration space.
  161. */
  162. #define IT87_REG_VID 0x0a
  163. /*
  164. * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
  165. * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
  166. * mode.
  167. */
  168. #define IT87_REG_FAN_DIV 0x0b
  169. #define IT87_REG_FAN_16BIT 0x0c
  170. /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
  171. static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
  172. static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 };
  173. static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 };
  174. static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
  175. static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
  176. #define IT87_REG_FAN_MAIN_CTRL 0x13
  177. #define IT87_REG_FAN_CTL 0x14
  178. #define IT87_REG_PWM(nr) (0x15 + (nr))
  179. #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
  180. #define IT87_REG_VIN(nr) (0x20 + (nr))
  181. #define IT87_REG_TEMP(nr) (0x29 + (nr))
  182. #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
  183. #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
  184. #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
  185. #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2)
  186. #define IT87_REG_VIN_ENABLE 0x50
  187. #define IT87_REG_TEMP_ENABLE 0x51
  188. #define IT87_REG_TEMP_EXTRA 0x55
  189. #define IT87_REG_BEEP_ENABLE 0x5c
  190. #define IT87_REG_CHIPID 0x58
  191. #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
  192. #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i))
  193. struct it87_sio_data {
  194. enum chips type;
  195. /* Values read from Super-I/O config space */
  196. u8 revision;
  197. u8 vid_value;
  198. u8 beep_pin;
  199. u8 internal; /* Internal sensors can be labeled */
  200. /* Features skipped based on config or DMI */
  201. u16 skip_in;
  202. u8 skip_vid;
  203. u8 skip_fan;
  204. u8 skip_pwm;
  205. u8 skip_temp;
  206. };
  207. /*
  208. * For each registered chip, we need to keep some data in memory.
  209. * The structure is dynamically allocated.
  210. */
  211. struct it87_data {
  212. struct device *hwmon_dev;
  213. enum chips type;
  214. u8 revision;
  215. unsigned short addr;
  216. const char *name;
  217. struct mutex update_lock;
  218. char valid; /* !=0 if following fields are valid */
  219. unsigned long last_updated; /* In jiffies */
  220. u16 in_scaled; /* Internal voltage sensors are scaled */
  221. u8 in[9][3]; /* [nr][0]=in, [1]=min, [2]=max */
  222. u8 has_fan; /* Bitfield, fans enabled */
  223. u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */
  224. u8 has_temp; /* Bitfield, temp sensors enabled */
  225. s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
  226. u8 sensor; /* Register value */
  227. u8 fan_div[3]; /* Register encoding, shifted right */
  228. u8 vid; /* Register encoding, combined */
  229. u8 vrm;
  230. u32 alarms; /* Register encoding, combined */
  231. u8 beeps; /* Register encoding */
  232. u8 fan_main_ctrl; /* Register value */
  233. u8 fan_ctl; /* Register value */
  234. /*
  235. * The following 3 arrays correspond to the same registers up to
  236. * the IT8720F. The meaning of bits 6-0 depends on the value of bit
  237. * 7, and we want to preserve settings on mode changes, so we have
  238. * to track all values separately.
  239. * Starting with the IT8721F, the manual PWM duty cycles are stored
  240. * in separate registers (8-bit values), so the separate tracking
  241. * is no longer needed, but it is still done to keep the driver
  242. * simple.
  243. */
  244. u8 pwm_ctrl[3]; /* Register value */
  245. u8 pwm_duty[3]; /* Manual PWM value set by user */
  246. u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
  247. /* Automatic fan speed control registers */
  248. u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
  249. s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */
  250. };
  251. static inline int has_12mv_adc(const struct it87_data *data)
  252. {
  253. /*
  254. * IT8721F and later have a 12 mV ADC, also with internal scaling
  255. * on selected inputs.
  256. */
  257. return data->type == it8721
  258. || data->type == it8728;
  259. }
  260. static inline int has_newer_autopwm(const struct it87_data *data)
  261. {
  262. /*
  263. * IT8721F and later have separate registers for the temperature
  264. * mapping and the manual duty cycle.
  265. */
  266. return data->type == it8721
  267. || data->type == it8728;
  268. }
  269. static inline int has_temp_offset(const struct it87_data *data)
  270. {
  271. return data->type == it8716
  272. || data->type == it8718
  273. || data->type == it8720
  274. || data->type == it8721
  275. || data->type == it8728
  276. || data->type == it8782
  277. || data->type == it8783;
  278. }
  279. static int adc_lsb(const struct it87_data *data, int nr)
  280. {
  281. int lsb = has_12mv_adc(data) ? 12 : 16;
  282. if (data->in_scaled & (1 << nr))
  283. lsb <<= 1;
  284. return lsb;
  285. }
  286. static u8 in_to_reg(const struct it87_data *data, int nr, long val)
  287. {
  288. val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
  289. return SENSORS_LIMIT(val, 0, 255);
  290. }
  291. static int in_from_reg(const struct it87_data *data, int nr, int val)
  292. {
  293. return val * adc_lsb(data, nr);
  294. }
  295. static inline u8 FAN_TO_REG(long rpm, int div)
  296. {
  297. if (rpm == 0)
  298. return 255;
  299. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  300. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
  301. 254);
  302. }
  303. static inline u16 FAN16_TO_REG(long rpm)
  304. {
  305. if (rpm == 0)
  306. return 0xffff;
  307. return SENSORS_LIMIT((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
  308. }
  309. #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
  310. 1350000 / ((val) * (div)))
  311. /* The divider is fixed to 2 in 16-bit mode */
  312. #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
  313. 1350000 / ((val) * 2))
  314. #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (((val) - 500) / 1000) : \
  315. ((val) + 500) / 1000), -128, 127))
  316. #define TEMP_FROM_REG(val) ((val) * 1000)
  317. static u8 pwm_to_reg(const struct it87_data *data, long val)
  318. {
  319. if (has_newer_autopwm(data))
  320. return val;
  321. else
  322. return val >> 1;
  323. }
  324. static int pwm_from_reg(const struct it87_data *data, u8 reg)
  325. {
  326. if (has_newer_autopwm(data))
  327. return reg;
  328. else
  329. return (reg & 0x7f) << 1;
  330. }
  331. static int DIV_TO_REG(int val)
  332. {
  333. int answer = 0;
  334. while (answer < 7 && (val >>= 1))
  335. answer++;
  336. return answer;
  337. }
  338. #define DIV_FROM_REG(val) (1 << (val))
  339. static const unsigned int pwm_freq[8] = {
  340. 48000000 / 128,
  341. 24000000 / 128,
  342. 12000000 / 128,
  343. 8000000 / 128,
  344. 6000000 / 128,
  345. 3000000 / 128,
  346. 1500000 / 128,
  347. 750000 / 128,
  348. };
  349. static inline int has_16bit_fans(const struct it87_data *data)
  350. {
  351. /*
  352. * IT8705F Datasheet 0.4.1, 3h == Version G.
  353. * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
  354. * These are the first revisions with 16-bit tachometer support.
  355. */
  356. return (data->type == it87 && data->revision >= 0x03)
  357. || (data->type == it8712 && data->revision >= 0x08)
  358. || data->type == it8716
  359. || data->type == it8718
  360. || data->type == it8720
  361. || data->type == it8721
  362. || data->type == it8728
  363. || data->type == it8782
  364. || data->type == it8783;
  365. }
  366. static inline int has_old_autopwm(const struct it87_data *data)
  367. {
  368. /*
  369. * The old automatic fan speed control interface is implemented
  370. * by IT8705F chips up to revision F and IT8712F chips up to
  371. * revision G.
  372. */
  373. return (data->type == it87 && data->revision < 0x03)
  374. || (data->type == it8712 && data->revision < 0x08);
  375. }
  376. static int it87_probe(struct platform_device *pdev);
  377. static int it87_remove(struct platform_device *pdev);
  378. static int it87_read_value(struct it87_data *data, u8 reg);
  379. static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
  380. static struct it87_data *it87_update_device(struct device *dev);
  381. static int it87_check_pwm(struct device *dev);
  382. static void it87_init_device(struct platform_device *pdev);
  383. static struct platform_driver it87_driver = {
  384. .driver = {
  385. .owner = THIS_MODULE,
  386. .name = DRVNAME,
  387. },
  388. .probe = it87_probe,
  389. .remove = it87_remove,
  390. };
  391. static ssize_t show_in(struct device *dev, struct device_attribute *attr,
  392. char *buf)
  393. {
  394. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  395. int nr = sattr->nr;
  396. int index = sattr->index;
  397. struct it87_data *data = it87_update_device(dev);
  398. return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
  399. }
  400. static ssize_t set_in(struct device *dev, struct device_attribute *attr,
  401. const char *buf, size_t count)
  402. {
  403. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  404. int nr = sattr->nr;
  405. int index = sattr->index;
  406. struct it87_data *data = dev_get_drvdata(dev);
  407. unsigned long val;
  408. if (kstrtoul(buf, 10, &val) < 0)
  409. return -EINVAL;
  410. mutex_lock(&data->update_lock);
  411. data->in[nr][index] = in_to_reg(data, nr, val);
  412. it87_write_value(data,
  413. index == 1 ? IT87_REG_VIN_MIN(nr)
  414. : IT87_REG_VIN_MAX(nr),
  415. data->in[nr][index]);
  416. mutex_unlock(&data->update_lock);
  417. return count;
  418. }
  419. static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
  420. static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
  421. 0, 1);
  422. static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
  423. 0, 2);
  424. static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
  425. static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
  426. 1, 1);
  427. static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
  428. 1, 2);
  429. static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
  430. static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
  431. 2, 1);
  432. static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
  433. 2, 2);
  434. static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
  435. static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
  436. 3, 1);
  437. static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
  438. 3, 2);
  439. static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
  440. static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
  441. 4, 1);
  442. static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
  443. 4, 2);
  444. static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
  445. static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
  446. 5, 1);
  447. static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
  448. 5, 2);
  449. static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
  450. static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
  451. 6, 1);
  452. static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
  453. 6, 2);
  454. static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
  455. static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
  456. 7, 1);
  457. static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
  458. 7, 2);
  459. static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
  460. /* 3 temperatures */
  461. static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
  462. char *buf)
  463. {
  464. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  465. int nr = sattr->nr;
  466. int index = sattr->index;
  467. struct it87_data *data = it87_update_device(dev);
  468. return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
  469. }
  470. static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
  471. const char *buf, size_t count)
  472. {
  473. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  474. int nr = sattr->nr;
  475. int index = sattr->index;
  476. struct it87_data *data = dev_get_drvdata(dev);
  477. long val;
  478. u8 reg, regval;
  479. if (kstrtol(buf, 10, &val) < 0)
  480. return -EINVAL;
  481. mutex_lock(&data->update_lock);
  482. switch (index) {
  483. default:
  484. case 1:
  485. reg = IT87_REG_TEMP_LOW(nr);
  486. break;
  487. case 2:
  488. reg = IT87_REG_TEMP_HIGH(nr);
  489. break;
  490. case 3:
  491. regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
  492. if (!(regval & 0x80)) {
  493. regval |= 0x80;
  494. it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
  495. }
  496. data->valid = 0;
  497. reg = IT87_REG_TEMP_OFFSET[nr];
  498. break;
  499. }
  500. data->temp[nr][index] = TEMP_TO_REG(val);
  501. it87_write_value(data, reg, data->temp[nr][index]);
  502. mutex_unlock(&data->update_lock);
  503. return count;
  504. }
  505. static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
  506. static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
  507. 0, 1);
  508. static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
  509. 0, 2);
  510. static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
  511. set_temp, 0, 3);
  512. static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
  513. static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
  514. 1, 1);
  515. static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
  516. 1, 2);
  517. static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
  518. set_temp, 1, 3);
  519. static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
  520. static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
  521. 2, 1);
  522. static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
  523. 2, 2);
  524. static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
  525. set_temp, 2, 3);
  526. static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
  527. char *buf)
  528. {
  529. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  530. int nr = sensor_attr->index;
  531. struct it87_data *data = it87_update_device(dev);
  532. u8 reg = data->sensor; /* In case value is updated while used */
  533. if (reg & (1 << nr))
  534. return sprintf(buf, "3\n"); /* thermal diode */
  535. if (reg & (8 << nr))
  536. return sprintf(buf, "4\n"); /* thermistor */
  537. return sprintf(buf, "0\n"); /* disabled */
  538. }
  539. static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
  540. const char *buf, size_t count)
  541. {
  542. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  543. int nr = sensor_attr->index;
  544. struct it87_data *data = dev_get_drvdata(dev);
  545. long val;
  546. u8 reg;
  547. if (kstrtol(buf, 10, &val) < 0)
  548. return -EINVAL;
  549. reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
  550. reg &= ~(1 << nr);
  551. reg &= ~(8 << nr);
  552. if (val == 2) { /* backwards compatibility */
  553. dev_warn(dev, "Sensor type 2 is deprecated, please use 4 "
  554. "instead\n");
  555. val = 4;
  556. }
  557. /* 3 = thermal diode; 4 = thermistor; 0 = disabled */
  558. if (val == 3)
  559. reg |= 1 << nr;
  560. else if (val == 4)
  561. reg |= 8 << nr;
  562. else if (val != 0)
  563. return -EINVAL;
  564. mutex_lock(&data->update_lock);
  565. data->sensor = reg;
  566. it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
  567. data->valid = 0; /* Force cache refresh */
  568. mutex_unlock(&data->update_lock);
  569. return count;
  570. }
  571. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
  572. set_temp_type, 0);
  573. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
  574. set_temp_type, 1);
  575. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
  576. set_temp_type, 2);
  577. /* 3 Fans */
  578. static int pwm_mode(const struct it87_data *data, int nr)
  579. {
  580. int ctrl = data->fan_main_ctrl & (1 << nr);
  581. if (ctrl == 0) /* Full speed */
  582. return 0;
  583. if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
  584. return 2;
  585. else /* Manual mode */
  586. return 1;
  587. }
  588. static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
  589. char *buf)
  590. {
  591. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  592. int nr = sattr->nr;
  593. int index = sattr->index;
  594. int speed;
  595. struct it87_data *data = it87_update_device(dev);
  596. speed = has_16bit_fans(data) ?
  597. FAN16_FROM_REG(data->fan[nr][index]) :
  598. FAN_FROM_REG(data->fan[nr][index],
  599. DIV_FROM_REG(data->fan_div[nr]));
  600. return sprintf(buf, "%d\n", speed);
  601. }
  602. static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
  603. char *buf)
  604. {
  605. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  606. int nr = sensor_attr->index;
  607. struct it87_data *data = it87_update_device(dev);
  608. return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
  609. }
  610. static ssize_t show_pwm_enable(struct device *dev,
  611. struct device_attribute *attr, char *buf)
  612. {
  613. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  614. int nr = sensor_attr->index;
  615. struct it87_data *data = it87_update_device(dev);
  616. return sprintf(buf, "%d\n", pwm_mode(data, nr));
  617. }
  618. static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
  619. char *buf)
  620. {
  621. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  622. int nr = sensor_attr->index;
  623. struct it87_data *data = it87_update_device(dev);
  624. return sprintf(buf, "%d\n",
  625. pwm_from_reg(data, data->pwm_duty[nr]));
  626. }
  627. static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
  628. char *buf)
  629. {
  630. struct it87_data *data = it87_update_device(dev);
  631. int index = (data->fan_ctl >> 4) & 0x07;
  632. return sprintf(buf, "%u\n", pwm_freq[index]);
  633. }
  634. static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
  635. const char *buf, size_t count)
  636. {
  637. struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
  638. int nr = sattr->nr;
  639. int index = sattr->index;
  640. struct it87_data *data = dev_get_drvdata(dev);
  641. long val;
  642. u8 reg;
  643. if (kstrtol(buf, 10, &val) < 0)
  644. return -EINVAL;
  645. mutex_lock(&data->update_lock);
  646. if (has_16bit_fans(data)) {
  647. data->fan[nr][index] = FAN16_TO_REG(val);
  648. it87_write_value(data, IT87_REG_FAN_MIN[nr],
  649. data->fan[nr][index] & 0xff);
  650. it87_write_value(data, IT87_REG_FANX_MIN[nr],
  651. data->fan[nr][index] >> 8);
  652. } else {
  653. reg = it87_read_value(data, IT87_REG_FAN_DIV);
  654. switch (nr) {
  655. case 0:
  656. data->fan_div[nr] = reg & 0x07;
  657. break;
  658. case 1:
  659. data->fan_div[nr] = (reg >> 3) & 0x07;
  660. break;
  661. case 2:
  662. data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
  663. break;
  664. }
  665. data->fan[nr][index] =
  666. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  667. it87_write_value(data, IT87_REG_FAN_MIN[nr],
  668. data->fan[nr][index]);
  669. }
  670. mutex_unlock(&data->update_lock);
  671. return count;
  672. }
  673. static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
  674. const char *buf, size_t count)
  675. {
  676. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  677. int nr = sensor_attr->index;
  678. struct it87_data *data = dev_get_drvdata(dev);
  679. unsigned long val;
  680. int min;
  681. u8 old;
  682. if (kstrtoul(buf, 10, &val) < 0)
  683. return -EINVAL;
  684. mutex_lock(&data->update_lock);
  685. old = it87_read_value(data, IT87_REG_FAN_DIV);
  686. /* Save fan min limit */
  687. min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
  688. switch (nr) {
  689. case 0:
  690. case 1:
  691. data->fan_div[nr] = DIV_TO_REG(val);
  692. break;
  693. case 2:
  694. if (val < 8)
  695. data->fan_div[nr] = 1;
  696. else
  697. data->fan_div[nr] = 3;
  698. }
  699. val = old & 0x80;
  700. val |= (data->fan_div[0] & 0x07);
  701. val |= (data->fan_div[1] & 0x07) << 3;
  702. if (data->fan_div[2] == 3)
  703. val |= 0x1 << 6;
  704. it87_write_value(data, IT87_REG_FAN_DIV, val);
  705. /* Restore fan min limit */
  706. data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  707. it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
  708. mutex_unlock(&data->update_lock);
  709. return count;
  710. }
  711. /* Returns 0 if OK, -EINVAL otherwise */
  712. static int check_trip_points(struct device *dev, int nr)
  713. {
  714. const struct it87_data *data = dev_get_drvdata(dev);
  715. int i, err = 0;
  716. if (has_old_autopwm(data)) {
  717. for (i = 0; i < 3; i++) {
  718. if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
  719. err = -EINVAL;
  720. }
  721. for (i = 0; i < 2; i++) {
  722. if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
  723. err = -EINVAL;
  724. }
  725. }
  726. if (err) {
  727. dev_err(dev, "Inconsistent trip points, not switching to "
  728. "automatic mode\n");
  729. dev_err(dev, "Adjust the trip points and try again\n");
  730. }
  731. return err;
  732. }
  733. static ssize_t set_pwm_enable(struct device *dev,
  734. struct device_attribute *attr, const char *buf, size_t count)
  735. {
  736. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  737. int nr = sensor_attr->index;
  738. struct it87_data *data = dev_get_drvdata(dev);
  739. long val;
  740. if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
  741. return -EINVAL;
  742. /* Check trip points before switching to automatic mode */
  743. if (val == 2) {
  744. if (check_trip_points(dev, nr) < 0)
  745. return -EINVAL;
  746. }
  747. mutex_lock(&data->update_lock);
  748. if (val == 0) {
  749. int tmp;
  750. /* make sure the fan is on when in on/off mode */
  751. tmp = it87_read_value(data, IT87_REG_FAN_CTL);
  752. it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
  753. /* set on/off mode */
  754. data->fan_main_ctrl &= ~(1 << nr);
  755. it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
  756. data->fan_main_ctrl);
  757. } else {
  758. if (val == 1) /* Manual mode */
  759. data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
  760. data->pwm_temp_map[nr] :
  761. data->pwm_duty[nr];
  762. else /* Automatic mode */
  763. data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
  764. it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
  765. /* set SmartGuardian mode */
  766. data->fan_main_ctrl |= (1 << nr);
  767. it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
  768. data->fan_main_ctrl);
  769. }
  770. mutex_unlock(&data->update_lock);
  771. return count;
  772. }
  773. static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
  774. const char *buf, size_t count)
  775. {
  776. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  777. int nr = sensor_attr->index;
  778. struct it87_data *data = dev_get_drvdata(dev);
  779. long val;
  780. if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
  781. return -EINVAL;
  782. mutex_lock(&data->update_lock);
  783. if (has_newer_autopwm(data)) {
  784. /*
  785. * If we are in automatic mode, the PWM duty cycle register
  786. * is read-only so we can't write the value.
  787. */
  788. if (data->pwm_ctrl[nr] & 0x80) {
  789. mutex_unlock(&data->update_lock);
  790. return -EBUSY;
  791. }
  792. data->pwm_duty[nr] = pwm_to_reg(data, val);
  793. it87_write_value(data, IT87_REG_PWM_DUTY(nr),
  794. data->pwm_duty[nr]);
  795. } else {
  796. data->pwm_duty[nr] = pwm_to_reg(data, val);
  797. /*
  798. * If we are in manual mode, write the duty cycle immediately;
  799. * otherwise, just store it for later use.
  800. */
  801. if (!(data->pwm_ctrl[nr] & 0x80)) {
  802. data->pwm_ctrl[nr] = data->pwm_duty[nr];
  803. it87_write_value(data, IT87_REG_PWM(nr),
  804. data->pwm_ctrl[nr]);
  805. }
  806. }
  807. mutex_unlock(&data->update_lock);
  808. return count;
  809. }
  810. static ssize_t set_pwm_freq(struct device *dev,
  811. struct device_attribute *attr, const char *buf, size_t count)
  812. {
  813. struct it87_data *data = dev_get_drvdata(dev);
  814. unsigned long val;
  815. int i;
  816. if (kstrtoul(buf, 10, &val) < 0)
  817. return -EINVAL;
  818. /* Search for the nearest available frequency */
  819. for (i = 0; i < 7; i++) {
  820. if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
  821. break;
  822. }
  823. mutex_lock(&data->update_lock);
  824. data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
  825. data->fan_ctl |= i << 4;
  826. it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
  827. mutex_unlock(&data->update_lock);
  828. return count;
  829. }
  830. static ssize_t show_pwm_temp_map(struct device *dev,
  831. struct device_attribute *attr, char *buf)
  832. {
  833. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  834. int nr = sensor_attr->index;
  835. struct it87_data *data = it87_update_device(dev);
  836. int map;
  837. if (data->pwm_temp_map[nr] < 3)
  838. map = 1 << data->pwm_temp_map[nr];
  839. else
  840. map = 0; /* Should never happen */
  841. return sprintf(buf, "%d\n", map);
  842. }
  843. static ssize_t set_pwm_temp_map(struct device *dev,
  844. struct device_attribute *attr, const char *buf, size_t count)
  845. {
  846. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  847. int nr = sensor_attr->index;
  848. struct it87_data *data = dev_get_drvdata(dev);
  849. long val;
  850. u8 reg;
  851. /*
  852. * This check can go away if we ever support automatic fan speed
  853. * control on newer chips.
  854. */
  855. if (!has_old_autopwm(data)) {
  856. dev_notice(dev, "Mapping change disabled for safety reasons\n");
  857. return -EINVAL;
  858. }
  859. if (kstrtol(buf, 10, &val) < 0)
  860. return -EINVAL;
  861. switch (val) {
  862. case (1 << 0):
  863. reg = 0x00;
  864. break;
  865. case (1 << 1):
  866. reg = 0x01;
  867. break;
  868. case (1 << 2):
  869. reg = 0x02;
  870. break;
  871. default:
  872. return -EINVAL;
  873. }
  874. mutex_lock(&data->update_lock);
  875. data->pwm_temp_map[nr] = reg;
  876. /*
  877. * If we are in automatic mode, write the temp mapping immediately;
  878. * otherwise, just store it for later use.
  879. */
  880. if (data->pwm_ctrl[nr] & 0x80) {
  881. data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
  882. it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
  883. }
  884. mutex_unlock(&data->update_lock);
  885. return count;
  886. }
  887. static ssize_t show_auto_pwm(struct device *dev,
  888. struct device_attribute *attr, char *buf)
  889. {
  890. struct it87_data *data = it87_update_device(dev);
  891. struct sensor_device_attribute_2 *sensor_attr =
  892. to_sensor_dev_attr_2(attr);
  893. int nr = sensor_attr->nr;
  894. int point = sensor_attr->index;
  895. return sprintf(buf, "%d\n",
  896. pwm_from_reg(data, data->auto_pwm[nr][point]));
  897. }
  898. static ssize_t set_auto_pwm(struct device *dev,
  899. struct device_attribute *attr, const char *buf, size_t count)
  900. {
  901. struct it87_data *data = dev_get_drvdata(dev);
  902. struct sensor_device_attribute_2 *sensor_attr =
  903. to_sensor_dev_attr_2(attr);
  904. int nr = sensor_attr->nr;
  905. int point = sensor_attr->index;
  906. long val;
  907. if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
  908. return -EINVAL;
  909. mutex_lock(&data->update_lock);
  910. data->auto_pwm[nr][point] = pwm_to_reg(data, val);
  911. it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
  912. data->auto_pwm[nr][point]);
  913. mutex_unlock(&data->update_lock);
  914. return count;
  915. }
  916. static ssize_t show_auto_temp(struct device *dev,
  917. struct device_attribute *attr, char *buf)
  918. {
  919. struct it87_data *data = it87_update_device(dev);
  920. struct sensor_device_attribute_2 *sensor_attr =
  921. to_sensor_dev_attr_2(attr);
  922. int nr = sensor_attr->nr;
  923. int point = sensor_attr->index;
  924. return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
  925. }
  926. static ssize_t set_auto_temp(struct device *dev,
  927. struct device_attribute *attr, const char *buf, size_t count)
  928. {
  929. struct it87_data *data = dev_get_drvdata(dev);
  930. struct sensor_device_attribute_2 *sensor_attr =
  931. to_sensor_dev_attr_2(attr);
  932. int nr = sensor_attr->nr;
  933. int point = sensor_attr->index;
  934. long val;
  935. if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
  936. return -EINVAL;
  937. mutex_lock(&data->update_lock);
  938. data->auto_temp[nr][point] = TEMP_TO_REG(val);
  939. it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
  940. data->auto_temp[nr][point]);
  941. mutex_unlock(&data->update_lock);
  942. return count;
  943. }
  944. static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
  945. static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
  946. 0, 1);
  947. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
  948. set_fan_div, 0);
  949. static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
  950. static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
  951. 1, 1);
  952. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
  953. set_fan_div, 1);
  954. static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
  955. static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
  956. 2, 1);
  957. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
  958. set_fan_div, 2);
  959. static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
  960. static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
  961. 3, 1);
  962. static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
  963. static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
  964. 4, 1);
  965. #define show_pwm_offset(offset) \
  966. static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
  967. show_pwm_enable, set_pwm_enable, offset - 1); \
  968. static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
  969. show_pwm, set_pwm, offset - 1); \
  970. static DEVICE_ATTR(pwm##offset##_freq, \
  971. (offset == 1 ? S_IRUGO | S_IWUSR : S_IRUGO), \
  972. show_pwm_freq, (offset == 1 ? set_pwm_freq : NULL)); \
  973. static SENSOR_DEVICE_ATTR(pwm##offset##_auto_channels_temp, \
  974. S_IRUGO | S_IWUSR, show_pwm_temp_map, set_pwm_temp_map, \
  975. offset - 1); \
  976. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_pwm, \
  977. S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
  978. offset - 1, 0); \
  979. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_pwm, \
  980. S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
  981. offset - 1, 1); \
  982. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_pwm, \
  983. S_IRUGO | S_IWUSR, show_auto_pwm, set_auto_pwm, \
  984. offset - 1, 2); \
  985. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_pwm, \
  986. S_IRUGO, show_auto_pwm, NULL, offset - 1, 3); \
  987. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp, \
  988. S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
  989. offset - 1, 1); \
  990. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point1_temp_hyst, \
  991. S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
  992. offset - 1, 0); \
  993. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point2_temp, \
  994. S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
  995. offset - 1, 2); \
  996. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point3_temp, \
  997. S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
  998. offset - 1, 3); \
  999. static SENSOR_DEVICE_ATTR_2(pwm##offset##_auto_point4_temp, \
  1000. S_IRUGO | S_IWUSR, show_auto_temp, set_auto_temp, \
  1001. offset - 1, 4);
  1002. show_pwm_offset(1);
  1003. show_pwm_offset(2);
  1004. show_pwm_offset(3);
  1005. /* Alarms */
  1006. static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
  1007. char *buf)
  1008. {
  1009. struct it87_data *data = it87_update_device(dev);
  1010. return sprintf(buf, "%u\n", data->alarms);
  1011. }
  1012. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
  1013. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  1014. char *buf)
  1015. {
  1016. int bitnr = to_sensor_dev_attr(attr)->index;
  1017. struct it87_data *data = it87_update_device(dev);
  1018. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  1019. }
  1020. static ssize_t clear_intrusion(struct device *dev, struct device_attribute
  1021. *attr, const char *buf, size_t count)
  1022. {
  1023. struct it87_data *data = dev_get_drvdata(dev);
  1024. long val;
  1025. int config;
  1026. if (kstrtol(buf, 10, &val) < 0 || val != 0)
  1027. return -EINVAL;
  1028. mutex_lock(&data->update_lock);
  1029. config = it87_read_value(data, IT87_REG_CONFIG);
  1030. if (config < 0) {
  1031. count = config;
  1032. } else {
  1033. config |= 1 << 5;
  1034. it87_write_value(data, IT87_REG_CONFIG, config);
  1035. /* Invalidate cache to force re-read */
  1036. data->valid = 0;
  1037. }
  1038. mutex_unlock(&data->update_lock);
  1039. return count;
  1040. }
  1041. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
  1042. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
  1043. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
  1044. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
  1045. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
  1046. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
  1047. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
  1048. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
  1049. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
  1050. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
  1051. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
  1052. static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
  1053. static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
  1054. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
  1055. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
  1056. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
  1057. static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
  1058. show_alarm, clear_intrusion, 4);
  1059. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  1060. char *buf)
  1061. {
  1062. int bitnr = to_sensor_dev_attr(attr)->index;
  1063. struct it87_data *data = it87_update_device(dev);
  1064. return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
  1065. }
  1066. static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
  1067. const char *buf, size_t count)
  1068. {
  1069. int bitnr = to_sensor_dev_attr(attr)->index;
  1070. struct it87_data *data = dev_get_drvdata(dev);
  1071. long val;
  1072. if (kstrtol(buf, 10, &val) < 0
  1073. || (val != 0 && val != 1))
  1074. return -EINVAL;
  1075. mutex_lock(&data->update_lock);
  1076. data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
  1077. if (val)
  1078. data->beeps |= (1 << bitnr);
  1079. else
  1080. data->beeps &= ~(1 << bitnr);
  1081. it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
  1082. mutex_unlock(&data->update_lock);
  1083. return count;
  1084. }
  1085. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  1086. show_beep, set_beep, 1);
  1087. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
  1088. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
  1089. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
  1090. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
  1091. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
  1092. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
  1093. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
  1094. /* fanX_beep writability is set later */
  1095. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
  1096. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
  1097. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
  1098. static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
  1099. static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
  1100. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  1101. show_beep, set_beep, 2);
  1102. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
  1103. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
  1104. static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
  1105. char *buf)
  1106. {
  1107. struct it87_data *data = dev_get_drvdata(dev);
  1108. return sprintf(buf, "%u\n", data->vrm);
  1109. }
  1110. static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
  1111. const char *buf, size_t count)
  1112. {
  1113. struct it87_data *data = dev_get_drvdata(dev);
  1114. unsigned long val;
  1115. if (kstrtoul(buf, 10, &val) < 0)
  1116. return -EINVAL;
  1117. data->vrm = val;
  1118. return count;
  1119. }
  1120. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  1121. static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
  1122. char *buf)
  1123. {
  1124. struct it87_data *data = it87_update_device(dev);
  1125. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  1126. }
  1127. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  1128. static ssize_t show_label(struct device *dev, struct device_attribute *attr,
  1129. char *buf)
  1130. {
  1131. static const char * const labels[] = {
  1132. "+5V",
  1133. "5VSB",
  1134. "Vbat",
  1135. };
  1136. static const char * const labels_it8721[] = {
  1137. "+3.3V",
  1138. "3VSB",
  1139. "Vbat",
  1140. };
  1141. struct it87_data *data = dev_get_drvdata(dev);
  1142. int nr = to_sensor_dev_attr(attr)->index;
  1143. return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
  1144. : labels[nr]);
  1145. }
  1146. static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
  1147. static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
  1148. static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
  1149. static ssize_t show_name(struct device *dev, struct device_attribute
  1150. *devattr, char *buf)
  1151. {
  1152. struct it87_data *data = dev_get_drvdata(dev);
  1153. return sprintf(buf, "%s\n", data->name);
  1154. }
  1155. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1156. static struct attribute *it87_attributes_in[9][5] = {
  1157. {
  1158. &sensor_dev_attr_in0_input.dev_attr.attr,
  1159. &sensor_dev_attr_in0_min.dev_attr.attr,
  1160. &sensor_dev_attr_in0_max.dev_attr.attr,
  1161. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  1162. NULL
  1163. }, {
  1164. &sensor_dev_attr_in1_input.dev_attr.attr,
  1165. &sensor_dev_attr_in1_min.dev_attr.attr,
  1166. &sensor_dev_attr_in1_max.dev_attr.attr,
  1167. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  1168. NULL
  1169. }, {
  1170. &sensor_dev_attr_in2_input.dev_attr.attr,
  1171. &sensor_dev_attr_in2_min.dev_attr.attr,
  1172. &sensor_dev_attr_in2_max.dev_attr.attr,
  1173. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  1174. NULL
  1175. }, {
  1176. &sensor_dev_attr_in3_input.dev_attr.attr,
  1177. &sensor_dev_attr_in3_min.dev_attr.attr,
  1178. &sensor_dev_attr_in3_max.dev_attr.attr,
  1179. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  1180. NULL
  1181. }, {
  1182. &sensor_dev_attr_in4_input.dev_attr.attr,
  1183. &sensor_dev_attr_in4_min.dev_attr.attr,
  1184. &sensor_dev_attr_in4_max.dev_attr.attr,
  1185. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  1186. NULL
  1187. }, {
  1188. &sensor_dev_attr_in5_input.dev_attr.attr,
  1189. &sensor_dev_attr_in5_min.dev_attr.attr,
  1190. &sensor_dev_attr_in5_max.dev_attr.attr,
  1191. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  1192. NULL
  1193. }, {
  1194. &sensor_dev_attr_in6_input.dev_attr.attr,
  1195. &sensor_dev_attr_in6_min.dev_attr.attr,
  1196. &sensor_dev_attr_in6_max.dev_attr.attr,
  1197. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  1198. NULL
  1199. }, {
  1200. &sensor_dev_attr_in7_input.dev_attr.attr,
  1201. &sensor_dev_attr_in7_min.dev_attr.attr,
  1202. &sensor_dev_attr_in7_max.dev_attr.attr,
  1203. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  1204. NULL
  1205. }, {
  1206. &sensor_dev_attr_in8_input.dev_attr.attr,
  1207. NULL
  1208. } };
  1209. static const struct attribute_group it87_group_in[9] = {
  1210. { .attrs = it87_attributes_in[0] },
  1211. { .attrs = it87_attributes_in[1] },
  1212. { .attrs = it87_attributes_in[2] },
  1213. { .attrs = it87_attributes_in[3] },
  1214. { .attrs = it87_attributes_in[4] },
  1215. { .attrs = it87_attributes_in[5] },
  1216. { .attrs = it87_attributes_in[6] },
  1217. { .attrs = it87_attributes_in[7] },
  1218. { .attrs = it87_attributes_in[8] },
  1219. };
  1220. static struct attribute *it87_attributes_temp[3][6] = {
  1221. {
  1222. &sensor_dev_attr_temp1_input.dev_attr.attr,
  1223. &sensor_dev_attr_temp1_max.dev_attr.attr,
  1224. &sensor_dev_attr_temp1_min.dev_attr.attr,
  1225. &sensor_dev_attr_temp1_type.dev_attr.attr,
  1226. &sensor_dev_attr_temp1_alarm.dev_attr.attr,
  1227. NULL
  1228. } , {
  1229. &sensor_dev_attr_temp2_input.dev_attr.attr,
  1230. &sensor_dev_attr_temp2_max.dev_attr.attr,
  1231. &sensor_dev_attr_temp2_min.dev_attr.attr,
  1232. &sensor_dev_attr_temp2_type.dev_attr.attr,
  1233. &sensor_dev_attr_temp2_alarm.dev_attr.attr,
  1234. NULL
  1235. } , {
  1236. &sensor_dev_attr_temp3_input.dev_attr.attr,
  1237. &sensor_dev_attr_temp3_max.dev_attr.attr,
  1238. &sensor_dev_attr_temp3_min.dev_attr.attr,
  1239. &sensor_dev_attr_temp3_type.dev_attr.attr,
  1240. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  1241. NULL
  1242. } };
  1243. static const struct attribute_group it87_group_temp[3] = {
  1244. { .attrs = it87_attributes_temp[0] },
  1245. { .attrs = it87_attributes_temp[1] },
  1246. { .attrs = it87_attributes_temp[2] },
  1247. };
  1248. static struct attribute *it87_attributes_temp_offset[] = {
  1249. &sensor_dev_attr_temp1_offset.dev_attr.attr,
  1250. &sensor_dev_attr_temp2_offset.dev_attr.attr,
  1251. &sensor_dev_attr_temp3_offset.dev_attr.attr,
  1252. };
  1253. static struct attribute *it87_attributes[] = {
  1254. &dev_attr_alarms.attr,
  1255. &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
  1256. &dev_attr_name.attr,
  1257. NULL
  1258. };
  1259. static const struct attribute_group it87_group = {
  1260. .attrs = it87_attributes,
  1261. };
  1262. static struct attribute *it87_attributes_in_beep[] = {
  1263. &sensor_dev_attr_in0_beep.dev_attr.attr,
  1264. &sensor_dev_attr_in1_beep.dev_attr.attr,
  1265. &sensor_dev_attr_in2_beep.dev_attr.attr,
  1266. &sensor_dev_attr_in3_beep.dev_attr.attr,
  1267. &sensor_dev_attr_in4_beep.dev_attr.attr,
  1268. &sensor_dev_attr_in5_beep.dev_attr.attr,
  1269. &sensor_dev_attr_in6_beep.dev_attr.attr,
  1270. &sensor_dev_attr_in7_beep.dev_attr.attr,
  1271. NULL
  1272. };
  1273. static struct attribute *it87_attributes_temp_beep[] = {
  1274. &sensor_dev_attr_temp1_beep.dev_attr.attr,
  1275. &sensor_dev_attr_temp2_beep.dev_attr.attr,
  1276. &sensor_dev_attr_temp3_beep.dev_attr.attr,
  1277. };
  1278. static struct attribute *it87_attributes_fan[5][3+1] = { {
  1279. &sensor_dev_attr_fan1_input.dev_attr.attr,
  1280. &sensor_dev_attr_fan1_min.dev_attr.attr,
  1281. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  1282. NULL
  1283. }, {
  1284. &sensor_dev_attr_fan2_input.dev_attr.attr,
  1285. &sensor_dev_attr_fan2_min.dev_attr.attr,
  1286. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  1287. NULL
  1288. }, {
  1289. &sensor_dev_attr_fan3_input.dev_attr.attr,
  1290. &sensor_dev_attr_fan3_min.dev_attr.attr,
  1291. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  1292. NULL
  1293. }, {
  1294. &sensor_dev_attr_fan4_input.dev_attr.attr,
  1295. &sensor_dev_attr_fan4_min.dev_attr.attr,
  1296. &sensor_dev_attr_fan4_alarm.dev_attr.attr,
  1297. NULL
  1298. }, {
  1299. &sensor_dev_attr_fan5_input.dev_attr.attr,
  1300. &sensor_dev_attr_fan5_min.dev_attr.attr,
  1301. &sensor_dev_attr_fan5_alarm.dev_attr.attr,
  1302. NULL
  1303. } };
  1304. static const struct attribute_group it87_group_fan[5] = {
  1305. { .attrs = it87_attributes_fan[0] },
  1306. { .attrs = it87_attributes_fan[1] },
  1307. { .attrs = it87_attributes_fan[2] },
  1308. { .attrs = it87_attributes_fan[3] },
  1309. { .attrs = it87_attributes_fan[4] },
  1310. };
  1311. static const struct attribute *it87_attributes_fan_div[] = {
  1312. &sensor_dev_attr_fan1_div.dev_attr.attr,
  1313. &sensor_dev_attr_fan2_div.dev_attr.attr,
  1314. &sensor_dev_attr_fan3_div.dev_attr.attr,
  1315. };
  1316. static struct attribute *it87_attributes_pwm[3][4+1] = { {
  1317. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  1318. &sensor_dev_attr_pwm1.dev_attr.attr,
  1319. &dev_attr_pwm1_freq.attr,
  1320. &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
  1321. NULL
  1322. }, {
  1323. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  1324. &sensor_dev_attr_pwm2.dev_attr.attr,
  1325. &dev_attr_pwm2_freq.attr,
  1326. &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
  1327. NULL
  1328. }, {
  1329. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  1330. &sensor_dev_attr_pwm3.dev_attr.attr,
  1331. &dev_attr_pwm3_freq.attr,
  1332. &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
  1333. NULL
  1334. } };
  1335. static const struct attribute_group it87_group_pwm[3] = {
  1336. { .attrs = it87_attributes_pwm[0] },
  1337. { .attrs = it87_attributes_pwm[1] },
  1338. { .attrs = it87_attributes_pwm[2] },
  1339. };
  1340. static struct attribute *it87_attributes_autopwm[3][9+1] = { {
  1341. &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
  1342. &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
  1343. &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
  1344. &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
  1345. &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
  1346. &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
  1347. &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
  1348. &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
  1349. &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
  1350. NULL
  1351. }, {
  1352. &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
  1353. &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
  1354. &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
  1355. &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
  1356. &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
  1357. &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
  1358. &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
  1359. &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
  1360. &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
  1361. NULL
  1362. }, {
  1363. &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
  1364. &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
  1365. &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
  1366. &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
  1367. &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
  1368. &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
  1369. &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
  1370. &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
  1371. &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
  1372. NULL
  1373. } };
  1374. static const struct attribute_group it87_group_autopwm[3] = {
  1375. { .attrs = it87_attributes_autopwm[0] },
  1376. { .attrs = it87_attributes_autopwm[1] },
  1377. { .attrs = it87_attributes_autopwm[2] },
  1378. };
  1379. static struct attribute *it87_attributes_fan_beep[] = {
  1380. &sensor_dev_attr_fan1_beep.dev_attr.attr,
  1381. &sensor_dev_attr_fan2_beep.dev_attr.attr,
  1382. &sensor_dev_attr_fan3_beep.dev_attr.attr,
  1383. &sensor_dev_attr_fan4_beep.dev_attr.attr,
  1384. &sensor_dev_attr_fan5_beep.dev_attr.attr,
  1385. };
  1386. static struct attribute *it87_attributes_vid[] = {
  1387. &dev_attr_vrm.attr,
  1388. &dev_attr_cpu0_vid.attr,
  1389. NULL
  1390. };
  1391. static const struct attribute_group it87_group_vid = {
  1392. .attrs = it87_attributes_vid,
  1393. };
  1394. static struct attribute *it87_attributes_label[] = {
  1395. &sensor_dev_attr_in3_label.dev_attr.attr,
  1396. &sensor_dev_attr_in7_label.dev_attr.attr,
  1397. &sensor_dev_attr_in8_label.dev_attr.attr,
  1398. NULL
  1399. };
  1400. static const struct attribute_group it87_group_label = {
  1401. .attrs = it87_attributes_label,
  1402. };
  1403. /* SuperIO detection - will change isa_address if a chip is found */
  1404. static int __init it87_find(unsigned short *address,
  1405. struct it87_sio_data *sio_data)
  1406. {
  1407. int err;
  1408. u16 chip_type;
  1409. const char *board_vendor, *board_name;
  1410. err = superio_enter();
  1411. if (err)
  1412. return err;
  1413. err = -ENODEV;
  1414. chip_type = force_id ? force_id : superio_inw(DEVID);
  1415. switch (chip_type) {
  1416. case IT8705F_DEVID:
  1417. sio_data->type = it87;
  1418. break;
  1419. case IT8712F_DEVID:
  1420. sio_data->type = it8712;
  1421. break;
  1422. case IT8716F_DEVID:
  1423. case IT8726F_DEVID:
  1424. sio_data->type = it8716;
  1425. break;
  1426. case IT8718F_DEVID:
  1427. sio_data->type = it8718;
  1428. break;
  1429. case IT8720F_DEVID:
  1430. sio_data->type = it8720;
  1431. break;
  1432. case IT8721F_DEVID:
  1433. sio_data->type = it8721;
  1434. break;
  1435. case IT8728F_DEVID:
  1436. sio_data->type = it8728;
  1437. break;
  1438. case IT8782F_DEVID:
  1439. sio_data->type = it8782;
  1440. break;
  1441. case IT8783E_DEVID:
  1442. sio_data->type = it8783;
  1443. break;
  1444. case 0xffff: /* No device at all */
  1445. goto exit;
  1446. default:
  1447. pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
  1448. goto exit;
  1449. }
  1450. superio_select(PME);
  1451. if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
  1452. pr_info("Device not activated, skipping\n");
  1453. goto exit;
  1454. }
  1455. *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
  1456. if (*address == 0) {
  1457. pr_info("Base address not set, skipping\n");
  1458. goto exit;
  1459. }
  1460. err = 0;
  1461. sio_data->revision = superio_inb(DEVREV) & 0x0f;
  1462. pr_info("Found IT%04xF chip at 0x%x, revision %d\n",
  1463. chip_type, *address, sio_data->revision);
  1464. /* in8 (Vbat) is always internal */
  1465. sio_data->internal = (1 << 2);
  1466. /* Read GPIO config and VID value from LDN 7 (GPIO) */
  1467. if (sio_data->type == it87) {
  1468. /* The IT8705F doesn't have VID pins at all */
  1469. sio_data->skip_vid = 1;
  1470. /* The IT8705F has a different LD number for GPIO */
  1471. superio_select(5);
  1472. sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
  1473. } else if (sio_data->type == it8783) {
  1474. int reg25, reg27, reg2A, reg2C, regEF;
  1475. sio_data->skip_vid = 1; /* No VID */
  1476. superio_select(GPIO);
  1477. reg25 = superio_inb(IT87_SIO_GPIO1_REG);
  1478. reg27 = superio_inb(IT87_SIO_GPIO3_REG);
  1479. reg2A = superio_inb(IT87_SIO_PINX1_REG);
  1480. reg2C = superio_inb(IT87_SIO_PINX2_REG);
  1481. regEF = superio_inb(IT87_SIO_SPI_REG);
  1482. /* Check if fan3 is there or not */
  1483. if ((reg27 & (1 << 0)) || !(reg2C & (1 << 2)))
  1484. sio_data->skip_fan |= (1 << 2);
  1485. if ((reg25 & (1 << 4))
  1486. || (!(reg2A & (1 << 1)) && (regEF & (1 << 0))))
  1487. sio_data->skip_pwm |= (1 << 2);
  1488. /* Check if fan2 is there or not */
  1489. if (reg27 & (1 << 7))
  1490. sio_data->skip_fan |= (1 << 1);
  1491. if (reg27 & (1 << 3))
  1492. sio_data->skip_pwm |= (1 << 1);
  1493. /* VIN5 */
  1494. if ((reg27 & (1 << 0)) || (reg2C & (1 << 2)))
  1495. sio_data->skip_in |= (1 << 5); /* No VIN5 */
  1496. /* VIN6 */
  1497. if (reg27 & (1 << 1))
  1498. sio_data->skip_in |= (1 << 6); /* No VIN6 */
  1499. /*
  1500. * VIN7
  1501. * Does not depend on bit 2 of Reg2C, contrary to datasheet.
  1502. */
  1503. if (reg27 & (1 << 2)) {
  1504. /*
  1505. * The data sheet is a bit unclear regarding the
  1506. * internal voltage divider for VCCH5V. It says
  1507. * "This bit enables and switches VIN7 (pin 91) to the
  1508. * internal voltage divider for VCCH5V".
  1509. * This is different to other chips, where the internal
  1510. * voltage divider would connect VIN7 to an internal
  1511. * voltage source. Maybe that is the case here as well.
  1512. *
  1513. * Since we don't know for sure, re-route it if that is
  1514. * not the case, and ask the user to report if the
  1515. * resulting voltage is sane.
  1516. */
  1517. if (!(reg2C & (1 << 1))) {
  1518. reg2C |= (1 << 1);
  1519. superio_outb(IT87_SIO_PINX2_REG, reg2C);
  1520. pr_notice("Routing internal VCCH5V to in7.\n");
  1521. }
  1522. pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
  1523. pr_notice("Please report if it displays a reasonable voltage.\n");
  1524. }
  1525. if (reg2C & (1 << 0))
  1526. sio_data->internal |= (1 << 0);
  1527. if (reg2C & (1 << 1))
  1528. sio_data->internal |= (1 << 1);
  1529. sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
  1530. } else {
  1531. int reg;
  1532. bool uart6;
  1533. superio_select(GPIO);
  1534. reg = superio_inb(IT87_SIO_GPIO3_REG);
  1535. if (sio_data->type == it8721 || sio_data->type == it8728 ||
  1536. sio_data->type == it8782) {
  1537. /*
  1538. * IT8721F/IT8758E, and IT8782F don't have VID pins
  1539. * at all, not sure about the IT8728F.
  1540. */
  1541. sio_data->skip_vid = 1;
  1542. } else {
  1543. /* We need at least 4 VID pins */
  1544. if (reg & 0x0f) {
  1545. pr_info("VID is disabled (pins used for GPIO)\n");
  1546. sio_data->skip_vid = 1;
  1547. }
  1548. }
  1549. /* Check if fan3 is there or not */
  1550. if (reg & (1 << 6))
  1551. sio_data->skip_pwm |= (1 << 2);
  1552. if (reg & (1 << 7))
  1553. sio_data->skip_fan |= (1 << 2);
  1554. /* Check if fan2 is there or not */
  1555. reg = superio_inb(IT87_SIO_GPIO5_REG);
  1556. if (reg & (1 << 1))
  1557. sio_data->skip_pwm |= (1 << 1);
  1558. if (reg & (1 << 2))
  1559. sio_data->skip_fan |= (1 << 1);
  1560. if ((sio_data->type == it8718 || sio_data->type == it8720)
  1561. && !(sio_data->skip_vid))
  1562. sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
  1563. reg = superio_inb(IT87_SIO_PINX2_REG);
  1564. uart6 = sio_data->type == it8782 && (reg & (1 << 2));
  1565. /*
  1566. * The IT8720F has no VIN7 pin, so VCCH should always be
  1567. * routed internally to VIN7 with an internal divider.
  1568. * Curiously, there still is a configuration bit to control
  1569. * this, which means it can be set incorrectly. And even
  1570. * more curiously, many boards out there are improperly
  1571. * configured, even though the IT8720F datasheet claims
  1572. * that the internal routing of VCCH to VIN7 is the default
  1573. * setting. So we force the internal routing in this case.
  1574. *
  1575. * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
  1576. * If UART6 is enabled, re-route VIN7 to the internal divider
  1577. * if that is not already the case.
  1578. */
  1579. if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
  1580. reg |= (1 << 1);
  1581. superio_outb(IT87_SIO_PINX2_REG, reg);
  1582. pr_notice("Routing internal VCCH to in7\n");
  1583. }
  1584. if (reg & (1 << 0))
  1585. sio_data->internal |= (1 << 0);
  1586. if ((reg & (1 << 1)) || sio_data->type == it8721 ||
  1587. sio_data->type == it8728)
  1588. sio_data->internal |= (1 << 1);
  1589. /*
  1590. * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
  1591. * While VIN7 can be routed to the internal voltage divider,
  1592. * VIN5 and VIN6 are not available if UART6 is enabled.
  1593. *
  1594. * Also, temp3 is not available if UART6 is enabled and TEMPIN3
  1595. * is the temperature source. Since we can not read the
  1596. * temperature source here, skip_temp is preliminary.
  1597. */
  1598. if (uart6) {
  1599. sio_data->skip_in |= (1 << 5) | (1 << 6);
  1600. sio_data->skip_temp |= (1 << 2);
  1601. }
  1602. sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
  1603. }
  1604. if (sio_data->beep_pin)
  1605. pr_info("Beeping is supported\n");
  1606. /* Disable specific features based on DMI strings */
  1607. board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
  1608. board_name = dmi_get_system_info(DMI_BOARD_NAME);
  1609. if (board_vendor && board_name) {
  1610. if (strcmp(board_vendor, "nVIDIA") == 0
  1611. && strcmp(board_name, "FN68PT") == 0) {
  1612. /*
  1613. * On the Shuttle SN68PT, FAN_CTL2 is apparently not
  1614. * connected to a fan, but to something else. One user
  1615. * has reported instant system power-off when changing
  1616. * the PWM2 duty cycle, so we disable it.
  1617. * I use the board name string as the trigger in case
  1618. * the same board is ever used in other systems.
  1619. */
  1620. pr_info("Disabling pwm2 due to hardware constraints\n");
  1621. sio_data->skip_pwm = (1 << 1);
  1622. }
  1623. }
  1624. exit:
  1625. superio_exit();
  1626. return err;
  1627. }
  1628. static void it87_remove_files(struct device *dev)
  1629. {
  1630. struct it87_data *data = platform_get_drvdata(pdev);
  1631. struct it87_sio_data *sio_data = dev->platform_data;
  1632. int i;
  1633. sysfs_remove_group(&dev->kobj, &it87_group);
  1634. for (i = 0; i < 9; i++) {
  1635. if (sio_data->skip_in & (1 << i))
  1636. continue;
  1637. sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
  1638. if (it87_attributes_in_beep[i])
  1639. sysfs_remove_file(&dev->kobj,
  1640. it87_attributes_in_beep[i]);
  1641. }
  1642. for (i = 0; i < 3; i++) {
  1643. if (!(data->has_temp & (1 << i)))
  1644. continue;
  1645. sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
  1646. if (has_temp_offset(data))
  1647. sysfs_remove_file(&dev->kobj,
  1648. it87_attributes_temp_offset[i]);
  1649. if (sio_data->beep_pin)
  1650. sysfs_remove_file(&dev->kobj,
  1651. it87_attributes_temp_beep[i]);
  1652. }
  1653. for (i = 0; i < 5; i++) {
  1654. if (!(data->has_fan & (1 << i)))
  1655. continue;
  1656. sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
  1657. if (sio_data->beep_pin)
  1658. sysfs_remove_file(&dev->kobj,
  1659. it87_attributes_fan_beep[i]);
  1660. if (i < 3 && !has_16bit_fans(data))
  1661. sysfs_remove_file(&dev->kobj,
  1662. it87_attributes_fan_div[i]);
  1663. }
  1664. for (i = 0; i < 3; i++) {
  1665. if (sio_data->skip_pwm & (1 << 0))
  1666. continue;
  1667. sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
  1668. if (has_old_autopwm(data))
  1669. sysfs_remove_group(&dev->kobj,
  1670. &it87_group_autopwm[i]);
  1671. }
  1672. if (!sio_data->skip_vid)
  1673. sysfs_remove_group(&dev->kobj, &it87_group_vid);
  1674. sysfs_remove_group(&dev->kobj, &it87_group_label);
  1675. }
  1676. static int it87_probe(struct platform_device *pdev)
  1677. {
  1678. struct it87_data *data;
  1679. struct resource *res;
  1680. struct device *dev = &pdev->dev;
  1681. struct it87_sio_data *sio_data = dev->platform_data;
  1682. int err = 0, i;
  1683. int enable_pwm_interface;
  1684. int fan_beep_need_rw;
  1685. static const char * const names[] = {
  1686. "it87",
  1687. "it8712",
  1688. "it8716",
  1689. "it8718",
  1690. "it8720",
  1691. "it8721",
  1692. "it8728",
  1693. "it8782",
  1694. "it8783",
  1695. };
  1696. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1697. if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
  1698. DRVNAME)) {
  1699. dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
  1700. (unsigned long)res->start,
  1701. (unsigned long)(res->start + IT87_EC_EXTENT - 1));
  1702. return -EBUSY;
  1703. }
  1704. data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
  1705. if (!data)
  1706. return -ENOMEM;
  1707. data->addr = res->start;
  1708. data->type = sio_data->type;
  1709. data->revision = sio_data->revision;
  1710. data->name = names[sio_data->type];
  1711. /* Now, we do the remaining detection. */
  1712. if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
  1713. || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
  1714. return -ENODEV;
  1715. platform_set_drvdata(pdev, data);
  1716. mutex_init(&data->update_lock);
  1717. /* Check PWM configuration */
  1718. enable_pwm_interface = it87_check_pwm(dev);
  1719. /* Starting with IT8721F, we handle scaling of internal voltages */
  1720. if (has_12mv_adc(data)) {
  1721. if (sio_data->internal & (1 << 0))
  1722. data->in_scaled |= (1 << 3); /* in3 is AVCC */
  1723. if (sio_data->internal & (1 << 1))
  1724. data->in_scaled |= (1 << 7); /* in7 is VSB */
  1725. if (sio_data->internal & (1 << 2))
  1726. data->in_scaled |= (1 << 8); /* in8 is Vbat */
  1727. } else if (sio_data->type == it8782 || sio_data->type == it8783) {
  1728. if (sio_data->internal & (1 << 0))
  1729. data->in_scaled |= (1 << 3); /* in3 is VCC5V */
  1730. if (sio_data->internal & (1 << 1))
  1731. data->in_scaled |= (1 << 7); /* in7 is VCCH5V */
  1732. }
  1733. data->has_temp = 0x07;
  1734. if (sio_data->skip_temp & (1 << 2)) {
  1735. if (sio_data->type == it8782
  1736. && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
  1737. data->has_temp &= ~(1 << 2);
  1738. }
  1739. /* Initialize the IT87 chip */
  1740. it87_init_device(pdev);
  1741. /* Register sysfs hooks */
  1742. err = sysfs_create_group(&dev->kobj, &it87_group);
  1743. if (err)
  1744. return err;
  1745. for (i = 0; i < 9; i++) {
  1746. if (sio_data->skip_in & (1 << i))
  1747. continue;
  1748. err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
  1749. if (err)
  1750. goto error;
  1751. if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
  1752. err = sysfs_create_file(&dev->kobj,
  1753. it87_attributes_in_beep[i]);
  1754. if (err)
  1755. goto error;
  1756. }
  1757. }
  1758. for (i = 0; i < 3; i++) {
  1759. if (!(data->has_temp & (1 << i)))
  1760. continue;
  1761. err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
  1762. if (err)
  1763. goto error;
  1764. if (has_temp_offset(data)) {
  1765. err = sysfs_create_file(&dev->kobj,
  1766. it87_attributes_temp_offset[i]);
  1767. if (err)
  1768. goto error;
  1769. }
  1770. if (sio_data->beep_pin) {
  1771. err = sysfs_create_file(&dev->kobj,
  1772. it87_attributes_temp_beep[i]);
  1773. if (err)
  1774. goto error;
  1775. }
  1776. }
  1777. /* Do not create fan files for disabled fans */
  1778. fan_beep_need_rw = 1;
  1779. for (i = 0; i < 5; i++) {
  1780. if (!(data->has_fan & (1 << i)))
  1781. continue;
  1782. err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
  1783. if (err)
  1784. goto error;
  1785. if (i < 3 && !has_16bit_fans(data)) {
  1786. err = sysfs_create_file(&dev->kobj,
  1787. it87_attributes_fan_div[i]);
  1788. if (err)
  1789. goto error;
  1790. }
  1791. if (sio_data->beep_pin) {
  1792. err = sysfs_create_file(&dev->kobj,
  1793. it87_attributes_fan_beep[i]);
  1794. if (err)
  1795. goto error;
  1796. if (!fan_beep_need_rw)
  1797. continue;
  1798. /*
  1799. * As we have a single beep enable bit for all fans,
  1800. * only the first enabled fan has a writable attribute
  1801. * for it.
  1802. */
  1803. if (sysfs_chmod_file(&dev->kobj,
  1804. it87_attributes_fan_beep[i],
  1805. S_IRUGO | S_IWUSR))
  1806. dev_dbg(dev, "chmod +w fan%d_beep failed\n",
  1807. i + 1);
  1808. fan_beep_need_rw = 0;
  1809. }
  1810. }
  1811. if (enable_pwm_interface) {
  1812. for (i = 0; i < 3; i++) {
  1813. if (sio_data->skip_pwm & (1 << i))
  1814. continue;
  1815. err = sysfs_create_group(&dev->kobj,
  1816. &it87_group_pwm[i]);
  1817. if (err)
  1818. goto error;
  1819. if (!has_old_autopwm(data))
  1820. continue;
  1821. err = sysfs_create_group(&dev->kobj,
  1822. &it87_group_autopwm[i]);
  1823. if (err)
  1824. goto error;
  1825. }
  1826. }
  1827. if (!sio_data->skip_vid) {
  1828. data->vrm = vid_which_vrm();
  1829. /* VID reading from Super-I/O config space if available */
  1830. data->vid = sio_data->vid_value;
  1831. err = sysfs_create_group(&dev->kobj, &it87_group_vid);
  1832. if (err)
  1833. goto error;
  1834. }
  1835. /* Export labels for internal sensors */
  1836. for (i = 0; i < 3; i++) {
  1837. if (!(sio_data->internal & (1 << i)))
  1838. continue;
  1839. err = sysfs_create_file(&dev->kobj,
  1840. it87_attributes_label[i]);
  1841. if (err)
  1842. goto error;
  1843. }
  1844. data->hwmon_dev = hwmon_device_register(dev);
  1845. if (IS_ERR(data->hwmon_dev)) {
  1846. err = PTR_ERR(data->hwmon_dev);
  1847. goto error;
  1848. }
  1849. return 0;
  1850. error:
  1851. it87_remove_files(dev);
  1852. return err;
  1853. }
  1854. static int it87_remove(struct platform_device *pdev)
  1855. {
  1856. struct it87_data *data = platform_get_drvdata(pdev);
  1857. hwmon_device_unregister(data->hwmon_dev);
  1858. it87_remove_files(&pdev->dev);
  1859. return 0;
  1860. }
  1861. /*
  1862. * Must be called with data->update_lock held, except during initialization.
  1863. * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
  1864. * would slow down the IT87 access and should not be necessary.
  1865. */
  1866. static int it87_read_value(struct it87_data *data, u8 reg)
  1867. {
  1868. outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
  1869. return inb_p(data->addr + IT87_DATA_REG_OFFSET);
  1870. }
  1871. /*
  1872. * Must be called with data->update_lock held, except during initialization.
  1873. * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
  1874. * would slow down the IT87 access and should not be necessary.
  1875. */
  1876. static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
  1877. {
  1878. outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
  1879. outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
  1880. }
  1881. /* Return 1 if and only if the PWM interface is safe to use */
  1882. static int it87_check_pwm(struct device *dev)
  1883. {
  1884. struct it87_data *data = dev_get_drvdata(dev);
  1885. /*
  1886. * Some BIOSes fail to correctly configure the IT87 fans. All fans off
  1887. * and polarity set to active low is sign that this is the case so we
  1888. * disable pwm control to protect the user.
  1889. */
  1890. int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
  1891. if ((tmp & 0x87) == 0) {
  1892. if (fix_pwm_polarity) {
  1893. /*
  1894. * The user asks us to attempt a chip reconfiguration.
  1895. * This means switching to active high polarity and
  1896. * inverting all fan speed values.
  1897. */
  1898. int i;
  1899. u8 pwm[3];
  1900. for (i = 0; i < 3; i++)
  1901. pwm[i] = it87_read_value(data,
  1902. IT87_REG_PWM(i));
  1903. /*
  1904. * If any fan is in automatic pwm mode, the polarity
  1905. * might be correct, as suspicious as it seems, so we
  1906. * better don't change anything (but still disable the
  1907. * PWM interface).
  1908. */
  1909. if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
  1910. dev_info(dev, "Reconfiguring PWM to "
  1911. "active high polarity\n");
  1912. it87_write_value(data, IT87_REG_FAN_CTL,
  1913. tmp | 0x87);
  1914. for (i = 0; i < 3; i++)
  1915. it87_write_value(data,
  1916. IT87_REG_PWM(i),
  1917. 0x7f & ~pwm[i]);
  1918. return 1;
  1919. }
  1920. dev_info(dev, "PWM configuration is "
  1921. "too broken to be fixed\n");
  1922. }
  1923. dev_info(dev, "Detected broken BIOS "
  1924. "defaults, disabling PWM interface\n");
  1925. return 0;
  1926. } else if (fix_pwm_polarity) {
  1927. dev_info(dev, "PWM configuration looks "
  1928. "sane, won't touch\n");
  1929. }
  1930. return 1;
  1931. }
  1932. /* Called when we have found a new IT87. */
  1933. static void it87_init_device(struct platform_device *pdev)
  1934. {
  1935. struct it87_sio_data *sio_data = pdev->dev.platform_data;
  1936. struct it87_data *data = platform_get_drvdata(pdev);
  1937. int tmp, i;
  1938. u8 mask;
  1939. /*
  1940. * For each PWM channel:
  1941. * - If it is in automatic mode, setting to manual mode should set
  1942. * the fan to full speed by default.
  1943. * - If it is in manual mode, we need a mapping to temperature
  1944. * channels to use when later setting to automatic mode later.
  1945. * Use a 1:1 mapping by default (we are clueless.)
  1946. * In both cases, the value can (and should) be changed by the user
  1947. * prior to switching to a different mode.
  1948. * Note that this is no longer needed for the IT8721F and later, as
  1949. * these have separate registers for the temperature mapping and the
  1950. * manual duty cycle.
  1951. */
  1952. for (i = 0; i < 3; i++) {
  1953. data->pwm_temp_map[i] = i;
  1954. data->pwm_duty[i] = 0x7f; /* Full speed */
  1955. data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
  1956. }
  1957. /*
  1958. * Some chips seem to have default value 0xff for all limit
  1959. * registers. For low voltage limits it makes no sense and triggers
  1960. * alarms, so change to 0 instead. For high temperature limits, it
  1961. * means -1 degree C, which surprisingly doesn't trigger an alarm,
  1962. * but is still confusing, so change to 127 degrees C.
  1963. */
  1964. for (i = 0; i < 8; i++) {
  1965. tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
  1966. if (tmp == 0xff)
  1967. it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
  1968. }
  1969. for (i = 0; i < 3; i++) {
  1970. tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
  1971. if (tmp == 0xff)
  1972. it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
  1973. }
  1974. /*
  1975. * Temperature channels are not forcibly enabled, as they can be
  1976. * set to two different sensor types and we can't guess which one
  1977. * is correct for a given system. These channels can be enabled at
  1978. * run-time through the temp{1-3}_type sysfs accessors if needed.
  1979. */
  1980. /* Check if voltage monitors are reset manually or by some reason */
  1981. tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
  1982. if ((tmp & 0xff) == 0) {
  1983. /* Enable all voltage monitors */
  1984. it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
  1985. }
  1986. /* Check if tachometers are reset manually or by some reason */
  1987. mask = 0x70 & ~(sio_data->skip_fan << 4);
  1988. data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
  1989. if ((data->fan_main_ctrl & mask) == 0) {
  1990. /* Enable all fan tachometers */
  1991. data->fan_main_ctrl |= mask;
  1992. it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
  1993. data->fan_main_ctrl);
  1994. }
  1995. data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
  1996. /* Set tachometers to 16-bit mode if needed */
  1997. if (has_16bit_fans(data)) {
  1998. tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
  1999. if (~tmp & 0x07 & data->has_fan) {
  2000. dev_dbg(&pdev->dev,
  2001. "Setting fan1-3 to 16-bit mode\n");
  2002. it87_write_value(data, IT87_REG_FAN_16BIT,
  2003. tmp | 0x07);
  2004. }
  2005. /* IT8705F, IT8782F, and IT8783E/F only support three fans. */
  2006. if (data->type != it87 && data->type != it8782 &&
  2007. data->type != it8783) {
  2008. if (tmp & (1 << 4))
  2009. data->has_fan |= (1 << 3); /* fan4 enabled */
  2010. if (tmp & (1 << 5))
  2011. data->has_fan |= (1 << 4); /* fan5 enabled */
  2012. }
  2013. }
  2014. /* Fan input pins may be used for alternative functions */
  2015. data->has_fan &= ~sio_data->skip_fan;
  2016. /* Start monitoring */
  2017. it87_write_value(data, IT87_REG_CONFIG,
  2018. (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
  2019. | (update_vbat ? 0x41 : 0x01));
  2020. }
  2021. static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
  2022. {
  2023. data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
  2024. if (has_newer_autopwm(data)) {
  2025. data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
  2026. data->pwm_duty[nr] = it87_read_value(data,
  2027. IT87_REG_PWM_DUTY(nr));
  2028. } else {
  2029. if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
  2030. data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
  2031. else /* Manual mode */
  2032. data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
  2033. }
  2034. if (has_old_autopwm(data)) {
  2035. int i;
  2036. for (i = 0; i < 5 ; i++)
  2037. data->auto_temp[nr][i] = it87_read_value(data,
  2038. IT87_REG_AUTO_TEMP(nr, i));
  2039. for (i = 0; i < 3 ; i++)
  2040. data->auto_pwm[nr][i] = it87_read_value(data,
  2041. IT87_REG_AUTO_PWM(nr, i));
  2042. }
  2043. }
  2044. static struct it87_data *it87_update_device(struct device *dev)
  2045. {
  2046. struct it87_data *data = dev_get_drvdata(dev);
  2047. int i;
  2048. mutex_lock(&data->update_lock);
  2049. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  2050. || !data->valid) {
  2051. if (update_vbat) {
  2052. /*
  2053. * Cleared after each update, so reenable. Value
  2054. * returned by this read will be previous value
  2055. */
  2056. it87_write_value(data, IT87_REG_CONFIG,
  2057. it87_read_value(data, IT87_REG_CONFIG) | 0x40);
  2058. }
  2059. for (i = 0; i <= 7; i++) {
  2060. data->in[i][0] =
  2061. it87_read_value(data, IT87_REG_VIN(i));
  2062. data->in[i][1] =
  2063. it87_read_value(data, IT87_REG_VIN_MIN(i));
  2064. data->in[i][2] =
  2065. it87_read_value(data, IT87_REG_VIN_MAX(i));
  2066. }
  2067. /* in8 (battery) has no limit registers */
  2068. data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
  2069. for (i = 0; i < 5; i++) {
  2070. /* Skip disabled fans */
  2071. if (!(data->has_fan & (1 << i)))
  2072. continue;
  2073. data->fan[i][1] =
  2074. it87_read_value(data, IT87_REG_FAN_MIN[i]);
  2075. data->fan[i][0] = it87_read_value(data,
  2076. IT87_REG_FAN[i]);
  2077. /* Add high byte if in 16-bit mode */
  2078. if (has_16bit_fans(data)) {
  2079. data->fan[i][0] |= it87_read_value(data,
  2080. IT87_REG_FANX[i]) << 8;
  2081. data->fan[i][1] |= it87_read_value(data,
  2082. IT87_REG_FANX_MIN[i]) << 8;
  2083. }
  2084. }
  2085. for (i = 0; i < 3; i++) {
  2086. if (!(data->has_temp & (1 << i)))
  2087. continue;
  2088. data->temp[i][0] =
  2089. it87_read_value(data, IT87_REG_TEMP(i));
  2090. data->temp[i][1] =
  2091. it87_read_value(data, IT87_REG_TEMP_LOW(i));
  2092. data->temp[i][2] =
  2093. it87_read_value(data, IT87_REG_TEMP_HIGH(i));
  2094. if (has_temp_offset(data))
  2095. data->temp[i][3] =
  2096. it87_read_value(data,
  2097. IT87_REG_TEMP_OFFSET[i]);
  2098. }
  2099. /* Newer chips don't have clock dividers */
  2100. if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
  2101. i = it87_read_value(data, IT87_REG_FAN_DIV);
  2102. data->fan_div[0] = i & 0x07;
  2103. data->fan_div[1] = (i >> 3) & 0x07;
  2104. data->fan_div[2] = (i & 0x40) ? 3 : 1;
  2105. }
  2106. data->alarms =
  2107. it87_read_value(data, IT87_REG_ALARM1) |
  2108. (it87_read_value(data, IT87_REG_ALARM2) << 8) |
  2109. (it87_read_value(data, IT87_REG_ALARM3) << 16);
  2110. data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
  2111. data->fan_main_ctrl = it87_read_value(data,
  2112. IT87_REG_FAN_MAIN_CTRL);
  2113. data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
  2114. for (i = 0; i < 3; i++)
  2115. it87_update_pwm_ctrl(data, i);
  2116. data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
  2117. /*
  2118. * The IT8705F does not have VID capability.
  2119. * The IT8718F and later don't use IT87_REG_VID for the
  2120. * same purpose.
  2121. */
  2122. if (data->type == it8712 || data->type == it8716) {
  2123. data->vid = it87_read_value(data, IT87_REG_VID);
  2124. /*
  2125. * The older IT8712F revisions had only 5 VID pins,
  2126. * but we assume it is always safe to read 6 bits.
  2127. */
  2128. data->vid &= 0x3f;
  2129. }
  2130. data->last_updated = jiffies;
  2131. data->valid = 1;
  2132. }
  2133. mutex_unlock(&data->update_lock);
  2134. return data;
  2135. }
  2136. static int __init it87_device_add(unsigned short address,
  2137. const struct it87_sio_data *sio_data)
  2138. {
  2139. struct resource res = {
  2140. .start = address + IT87_EC_OFFSET,
  2141. .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
  2142. .name = DRVNAME,
  2143. .flags = IORESOURCE_IO,
  2144. };
  2145. int err;
  2146. err = acpi_check_resource_conflict(&res);
  2147. if (err)
  2148. goto exit;
  2149. pdev = platform_device_alloc(DRVNAME, address);
  2150. if (!pdev) {
  2151. err = -ENOMEM;
  2152. pr_err("Device allocation failed\n");
  2153. goto exit;
  2154. }
  2155. err = platform_device_add_resources(pdev, &res, 1);
  2156. if (err) {
  2157. pr_err("Device resource addition failed (%d)\n", err);
  2158. goto exit_device_put;
  2159. }
  2160. err = platform_device_add_data(pdev, sio_data,
  2161. sizeof(struct it87_sio_data));
  2162. if (err) {
  2163. pr_err("Platform data allocation failed\n");
  2164. goto exit_device_put;
  2165. }
  2166. err = platform_device_add(pdev);
  2167. if (err) {
  2168. pr_err("Device addition failed (%d)\n", err);
  2169. goto exit_device_put;
  2170. }
  2171. return 0;
  2172. exit_device_put:
  2173. platform_device_put(pdev);
  2174. exit:
  2175. return err;
  2176. }
  2177. static int __init sm_it87_init(void)
  2178. {
  2179. int err;
  2180. unsigned short isa_address = 0;
  2181. struct it87_sio_data sio_data;
  2182. memset(&sio_data, 0, sizeof(struct it87_sio_data));
  2183. err = it87_find(&isa_address, &sio_data);
  2184. if (err)
  2185. return err;
  2186. err = platform_driver_register(&it87_driver);
  2187. if (err)
  2188. return err;
  2189. err = it87_device_add(isa_address, &sio_data);
  2190. if (err) {
  2191. platform_driver_unregister(&it87_driver);
  2192. return err;
  2193. }
  2194. return 0;
  2195. }
  2196. static void __exit sm_it87_exit(void)
  2197. {
  2198. platform_device_unregister(pdev);
  2199. platform_driver_unregister(&it87_driver);
  2200. }
  2201. MODULE_AUTHOR("Chris Gauthron, "
  2202. "Jean Delvare <khali@linux-fr.org>");
  2203. MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
  2204. module_param(update_vbat, bool, 0);
  2205. MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
  2206. module_param(fix_pwm_polarity, bool, 0);
  2207. MODULE_PARM_DESC(fix_pwm_polarity,
  2208. "Force PWM polarity to active high (DANGEROUS)");
  2209. MODULE_LICENSE("GPL");
  2210. module_init(sm_it87_init);
  2211. module_exit(sm_it87_exit);