proc.c 6.0 KB

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  1. #include <linux/smp.h>
  2. #include <linux/timex.h>
  3. #include <linux/string.h>
  4. #include <asm/semaphore.h>
  5. #include <linux/seq_file.h>
  6. #include <linux/cpufreq.h>
  7. /*
  8. * Get CPU information for use by the procfs.
  9. */
  10. static int show_cpuinfo(struct seq_file *m, void *v)
  11. {
  12. /*
  13. * These flag bits must match the definitions in <asm/cpufeature.h>.
  14. * NULL means this bit is undefined or reserved; either way it doesn't
  15. * have meaning as far as Linux is concerned. Note that it's important
  16. * to realize there is a difference between this table and CPUID -- if
  17. * applications want to get the raw CPUID data, they should access
  18. * /dev/cpu/<cpu_nr>/cpuid instead.
  19. */
  20. static const char * const x86_cap_flags[] = {
  21. /* Intel-defined */
  22. "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
  23. "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
  24. "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
  25. "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
  26. /* AMD-defined */
  27. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  28. NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
  29. NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
  30. NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
  31. "3dnowext", "3dnow",
  32. /* Transmeta-defined */
  33. "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
  34. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  35. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  36. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  37. /* Other (Linux-defined) */
  38. "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
  39. NULL, NULL, NULL, NULL,
  40. "constant_tsc", "up", NULL, "arch_perfmon",
  41. "pebs", "bts", NULL, "sync_rdtsc",
  42. "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  43. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  44. /* Intel-defined (#2) */
  45. "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
  46. "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
  47. NULL, NULL, "dca", "sse4_1", "sse4_2", NULL, NULL, "popcnt",
  48. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  49. /* VIA/Cyrix/Centaur-defined */
  50. NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
  51. "ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
  52. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  53. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  54. /* AMD-defined (#2) */
  55. "lahf_lm", "cmp_legacy", "svm", "extapic",
  56. "cr8_legacy", "abm", "sse4a", "misalignsse",
  57. "3dnowprefetch", "osvw", "ibs", "sse5",
  58. "skinit", "wdt", NULL, NULL,
  59. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  60. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  61. /* Auxiliary (Linux-defined) */
  62. "ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  63. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  64. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  65. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  66. };
  67. static const char * const x86_power_flags[] = {
  68. "ts", /* temperature sensor */
  69. "fid", /* frequency id control */
  70. "vid", /* voltage id control */
  71. "ttp", /* thermal trip */
  72. "tm",
  73. "stc",
  74. "100mhzsteps",
  75. "hwpstate",
  76. "", /* constant_tsc - moved to flags */
  77. /* nothing */
  78. };
  79. struct cpuinfo_x86 *c = v;
  80. int i, n = 0;
  81. int fpu_exception;
  82. #ifdef CONFIG_SMP
  83. if (!cpu_online(n))
  84. return 0;
  85. n = c->cpu_index;
  86. #endif
  87. seq_printf(m, "processor\t: %d\n"
  88. "vendor_id\t: %s\n"
  89. "cpu family\t: %d\n"
  90. "model\t\t: %d\n"
  91. "model name\t: %s\n",
  92. n,
  93. c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
  94. c->x86,
  95. c->x86_model,
  96. c->x86_model_id[0] ? c->x86_model_id : "unknown");
  97. if (c->x86_mask || c->cpuid_level >= 0)
  98. seq_printf(m, "stepping\t: %d\n", c->x86_mask);
  99. else
  100. seq_printf(m, "stepping\t: unknown\n");
  101. if ( cpu_has(c, X86_FEATURE_TSC) ) {
  102. unsigned int freq = cpufreq_quick_get(n);
  103. if (!freq)
  104. freq = cpu_khz;
  105. seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
  106. freq / 1000, (freq % 1000));
  107. }
  108. /* Cache size */
  109. if (c->x86_cache_size >= 0)
  110. seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
  111. #ifdef CONFIG_X86_HT
  112. if (c->x86_max_cores * smp_num_siblings > 1) {
  113. seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
  114. seq_printf(m, "siblings\t: %d\n",
  115. cpus_weight(per_cpu(cpu_core_map, n)));
  116. seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
  117. seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
  118. }
  119. #endif
  120. /* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */
  121. fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
  122. seq_printf(m, "fdiv_bug\t: %s\n"
  123. "hlt_bug\t\t: %s\n"
  124. "f00f_bug\t: %s\n"
  125. "coma_bug\t: %s\n"
  126. "fpu\t\t: %s\n"
  127. "fpu_exception\t: %s\n"
  128. "cpuid level\t: %d\n"
  129. "wp\t\t: %s\n"
  130. "flags\t\t:",
  131. c->fdiv_bug ? "yes" : "no",
  132. c->hlt_works_ok ? "no" : "yes",
  133. c->f00f_bug ? "yes" : "no",
  134. c->coma_bug ? "yes" : "no",
  135. c->hard_math ? "yes" : "no",
  136. fpu_exception ? "yes" : "no",
  137. c->cpuid_level,
  138. c->wp_works_ok ? "yes" : "no");
  139. for ( i = 0 ; i < 32*NCAPINTS ; i++ )
  140. if ( test_bit(i, c->x86_capability) &&
  141. x86_cap_flags[i] != NULL )
  142. seq_printf(m, " %s", x86_cap_flags[i]);
  143. for (i = 0; i < 32; i++)
  144. if (c->x86_power & (1 << i)) {
  145. if (i < ARRAY_SIZE(x86_power_flags) &&
  146. x86_power_flags[i])
  147. seq_printf(m, "%s%s",
  148. x86_power_flags[i][0]?" ":"",
  149. x86_power_flags[i]);
  150. else
  151. seq_printf(m, " [%d]", i);
  152. }
  153. seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
  154. c->loops_per_jiffy/(500000/HZ),
  155. (c->loops_per_jiffy/(5000/HZ)) % 100);
  156. seq_printf(m, "clflush size\t: %u\n\n", c->x86_clflush_size);
  157. return 0;
  158. }
  159. static void *c_start(struct seq_file *m, loff_t *pos)
  160. {
  161. if (*pos == 0) /* just in case, cpu 0 is not the first */
  162. *pos = first_cpu(cpu_possible_map);
  163. if ((*pos) < NR_CPUS && cpu_possible(*pos))
  164. return &cpu_data(*pos);
  165. return NULL;
  166. }
  167. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  168. {
  169. *pos = next_cpu(*pos, cpu_possible_map);
  170. return c_start(m, pos);
  171. }
  172. static void c_stop(struct seq_file *m, void *v)
  173. {
  174. }
  175. struct seq_operations cpuinfo_op = {
  176. .start = c_start,
  177. .next = c_next,
  178. .stop = c_stop,
  179. .show = show_cpuinfo,
  180. };