mxser_new.c 71 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw).
  5. * Copyright (C) 2006 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. * - Fixed sleep with spinlock held in mxser_send_break
  20. */
  21. #include <linux/module.h>
  22. #include <linux/autoconf.h>
  23. #include <linux/errno.h>
  24. #include <linux/signal.h>
  25. #include <linux/sched.h>
  26. #include <linux/timer.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/tty.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_reg.h>
  32. #include <linux/major.h>
  33. #include <linux/string.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/ptrace.h>
  36. #include <linux/gfp.h>
  37. #include <linux/ioport.h>
  38. #include <linux/mm.h>
  39. #include <linux/smp_lock.h>
  40. #include <linux/delay.h>
  41. #include <linux/pci.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/bitops.h>
  46. #include <asm/uaccess.h>
  47. #include "mxser_new.h"
  48. #define MXSER_VERSION "2.0"
  49. #define MXSERMAJOR 174
  50. #define MXSERCUMAJOR 175
  51. #define MXSER_EVENT_TXLOW 1
  52. #define MXSER_EVENT_HANGUP 2
  53. #define MXSER_BOARDS 4 /* Max. boards */
  54. #define MXSER_PORTS 32 /* Max. ports */
  55. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  56. #define MXSER_ISR_PASS_LIMIT 99999L
  57. #define MXSER_ERR_IOADDR -1
  58. #define MXSER_ERR_IRQ -2
  59. #define MXSER_ERR_IRQ_CONFLIT -3
  60. #define MXSER_ERR_VECTOR -4
  61. #define SERIAL_TYPE_NORMAL 1
  62. #define SERIAL_TYPE_CALLOUT 2
  63. #define WAKEUP_CHARS 256
  64. #define UART_MCR_AFE 0x20
  65. #define UART_LSR_SPECIAL 0x1E
  66. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
  67. IXON|IXOFF))
  68. #define C168_ASIC_ID 1
  69. #define C104_ASIC_ID 2
  70. #define C102_ASIC_ID 0xB
  71. #define CI132_ASIC_ID 4
  72. #define CI134_ASIC_ID 3
  73. #define CI104J_ASIC_ID 5
  74. #define MXSER_HIGHBAUD 1
  75. #define MXSER_HAS2 2
  76. /* This is only for PCI */
  77. static const struct {
  78. int type;
  79. int tx_fifo;
  80. int rx_fifo;
  81. int xmit_fifo_size;
  82. int rx_high_water;
  83. int rx_trigger;
  84. int rx_low_water;
  85. long max_baud;
  86. } Gpci_uart_info[] = {
  87. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  88. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  89. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  90. };
  91. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  92. struct mxser_cardinfo {
  93. unsigned int nports;
  94. char *name;
  95. unsigned int flags;
  96. };
  97. static const struct mxser_cardinfo mxser_cards[] = {
  98. { 8, "C168 series", }, /* C168-ISA */
  99. { 4, "C104 series", }, /* C104-ISA */
  100. { 4, "CI-104J series", }, /* CI104J */
  101. { 8, "C168H/PCI series", }, /* C168-PCI */
  102. { 4, "C104H/PCI series", }, /* C104-PCI */
  103. { 4, "C102 series", MXSER_HAS2 }, /* C102-ISA */
  104. { 4, "CI-132 series", MXSER_HAS2 }, /* CI132 */
  105. { 4, "CI-134 series", }, /* CI134 */
  106. { 2, "CP-132 series", }, /* CP132 */
  107. { 4, "CP-114 series", }, /* CP114 */
  108. { 4, "CT-114 series", }, /* CT114 */
  109. { 2, "CP-102 series", MXSER_HIGHBAUD }, /* CP102 */
  110. { 4, "CP-104U series", }, /* CP104U */
  111. { 8, "CP-168U series", }, /* CP168U */
  112. { 2, "CP-132U series", }, /* CP132U */
  113. { 4, "CP-134U series", }, /* CP134U */
  114. { 4, "CP-104JU series", }, /* CP104JU */
  115. { 8, "Moxa UC7000 Serial", }, /* RC7000 */
  116. { 8, "CP-118U series", }, /* CP118U */
  117. { 2, "CP-102UL series", }, /* CP102UL */
  118. { 2, "CP-102U series", }, /* CP102U */
  119. { 8, "CP-118EL series", }, /* CP118EL */
  120. { 8, "CP-168EL series", }, /* CP168EL */
  121. { 4, "CP-104EL series", } /* CP104EL */
  122. };
  123. /* driver_data correspond to the lines in the structure above
  124. see also ISA probe function before you change something */
  125. static struct pci_device_id mxser_pcibrds[] = {
  126. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168),
  127. .driver_data = 3 },
  128. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104),
  129. .driver_data = 4 },
  130. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132),
  131. .driver_data = 8 },
  132. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114),
  133. .driver_data = 9 },
  134. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114),
  135. .driver_data = 10 },
  136. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102),
  137. .driver_data = 11 },
  138. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U),
  139. .driver_data = 12 },
  140. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U),
  141. .driver_data = 13 },
  142. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U),
  143. .driver_data = 14 },
  144. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U),
  145. .driver_data = 15 },
  146. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU),
  147. .driver_data = 16 },
  148. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000),
  149. .driver_data = 17 },
  150. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U),
  151. .driver_data = 18 },
  152. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL),
  153. .driver_data = 19 },
  154. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U),
  155. .driver_data = 20 },
  156. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118EL),
  157. .driver_data = 21 },
  158. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168EL),
  159. .driver_data = 22 },
  160. { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104EL),
  161. .driver_data = 23 },
  162. { }
  163. };
  164. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  165. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  166. static int ttymajor = MXSERMAJOR;
  167. static int calloutmajor = MXSERCUMAJOR;
  168. /* Variables for insmod */
  169. MODULE_AUTHOR("Casper Yang");
  170. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  171. module_param_array(ioaddr, int, NULL, 0);
  172. module_param(ttymajor, int, 0);
  173. MODULE_LICENSE("GPL");
  174. struct mxser_log {
  175. int tick;
  176. unsigned long rxcnt[MXSER_PORTS];
  177. unsigned long txcnt[MXSER_PORTS];
  178. };
  179. struct mxser_mon {
  180. unsigned long rxcnt;
  181. unsigned long txcnt;
  182. unsigned long up_rxcnt;
  183. unsigned long up_txcnt;
  184. int modem_status;
  185. unsigned char hold_reason;
  186. };
  187. struct mxser_mon_ext {
  188. unsigned long rx_cnt[32];
  189. unsigned long tx_cnt[32];
  190. unsigned long up_rxcnt[32];
  191. unsigned long up_txcnt[32];
  192. int modem_status[32];
  193. long baudrate[32];
  194. int databits[32];
  195. int stopbits[32];
  196. int parity[32];
  197. int flowctrl[32];
  198. int fifo[32];
  199. int iftype[32];
  200. };
  201. struct mxser_board;
  202. struct mxser_port {
  203. struct mxser_board *board;
  204. struct tty_struct *tty;
  205. unsigned long ioaddr;
  206. unsigned long opmode_ioaddr;
  207. int max_baud;
  208. int rx_high_water;
  209. int rx_trigger; /* Rx fifo trigger level */
  210. int rx_low_water;
  211. int baud_base; /* max. speed */
  212. long realbaud;
  213. int type; /* UART type */
  214. int flags; /* defined in tty.h */
  215. long session; /* Session of opening process */
  216. long pgrp; /* pgrp of opening process */
  217. int x_char; /* xon/xoff character */
  218. int IER; /* Interrupt Enable Register */
  219. int MCR; /* Modem control register */
  220. unsigned char stop_rx;
  221. unsigned char ldisc_stop_rx;
  222. int custom_divisor;
  223. int close_delay;
  224. unsigned short closing_wait;
  225. unsigned char err_shadow;
  226. unsigned long event;
  227. int count; /* # of fd on device */
  228. int blocked_open; /* # of blocked opens */
  229. struct async_icount icount; /* kernel counters for 4 input interrupts */
  230. int timeout;
  231. int read_status_mask;
  232. int ignore_status_mask;
  233. int xmit_fifo_size;
  234. unsigned char *xmit_buf;
  235. int xmit_head;
  236. int xmit_tail;
  237. int xmit_cnt;
  238. struct termios normal_termios;
  239. struct termios callout_termios;
  240. struct mxser_mon mon_data;
  241. spinlock_t slock;
  242. struct work_struct tqueue;
  243. wait_queue_head_t open_wait;
  244. wait_queue_head_t close_wait;
  245. wait_queue_head_t delta_msr_wait;
  246. };
  247. struct mxser_board {
  248. struct pci_dev *pdev; /* temporary (until pci probing) */
  249. int irq;
  250. const struct mxser_cardinfo *info;
  251. unsigned long vector;
  252. unsigned long vector_mask;
  253. int chip_flag;
  254. int uart_type;
  255. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  256. };
  257. struct mxser_mstatus {
  258. tcflag_t cflag;
  259. int cts;
  260. int dsr;
  261. int ri;
  262. int dcd;
  263. };
  264. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  265. static int mxserBoardCAP[MXSER_BOARDS] = {
  266. 0, 0, 0, 0
  267. /* 0x180, 0x280, 0x200, 0x320 */
  268. };
  269. static struct mxser_board mxser_boards[MXSER_BOARDS];
  270. static struct tty_driver *mxvar_sdriver;
  271. static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
  272. static struct termios *mxvar_termios[MXSER_PORTS + 1];
  273. static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
  274. static struct mxser_log mxvar_log;
  275. static int mxvar_diagflag;
  276. static unsigned char mxser_msr[MXSER_PORTS + 1];
  277. static struct mxser_mon_ext mon_data_ext;
  278. static int mxser_set_baud_method[MXSER_PORTS + 1];
  279. static spinlock_t gm_lock;
  280. static int CheckIsMoxaMust(int io)
  281. {
  282. u8 oldmcr, hwid;
  283. int i;
  284. outb(0, io + UART_LCR);
  285. DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
  286. oldmcr = inb(io + UART_MCR);
  287. outb(0, io + UART_MCR);
  288. SET_MOXA_MUST_XON1_VALUE(io, 0x11);
  289. if ((hwid = inb(io + UART_MCR)) != 0) {
  290. outb(oldmcr, io + UART_MCR);
  291. return MOXA_OTHER_UART;
  292. }
  293. GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
  294. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  295. if (hwid == Gpci_uart_info[i].type)
  296. return (int)hwid;
  297. }
  298. return MOXA_OTHER_UART;
  299. }
  300. static void process_txrx_fifo(struct mxser_port *info)
  301. {
  302. int i;
  303. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  304. info->rx_trigger = 1;
  305. info->rx_high_water = 1;
  306. info->rx_low_water = 1;
  307. info->xmit_fifo_size = 1;
  308. } else
  309. for (i = 0; i < UART_INFO_NUM; i++)
  310. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  311. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  312. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  313. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  314. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  315. break;
  316. }
  317. }
  318. static void mxser_do_softint(void *private_)
  319. {
  320. struct mxser_port *info = private_;
  321. struct tty_struct *tty;
  322. tty = info->tty;
  323. if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
  324. tty_wakeup(tty);
  325. if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
  326. tty_hangup(tty);
  327. }
  328. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  329. {
  330. unsigned char status = 0;
  331. status = inb(baseaddr + UART_MSR);
  332. mxser_msr[port] &= 0x0F;
  333. mxser_msr[port] |= status;
  334. status = mxser_msr[port];
  335. if (mode)
  336. mxser_msr[port] = 0;
  337. return status;
  338. }
  339. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  340. struct mxser_port *port)
  341. {
  342. DECLARE_WAITQUEUE(wait, current);
  343. int retval;
  344. int do_clocal = 0;
  345. unsigned long flags;
  346. /*
  347. * If non-blocking mode is set, or the port is not enabled,
  348. * then make the check up front and then exit.
  349. */
  350. if ((filp->f_flags & O_NONBLOCK) ||
  351. test_bit(TTY_IO_ERROR, &tty->flags)) {
  352. port->flags |= ASYNC_NORMAL_ACTIVE;
  353. return 0;
  354. }
  355. if (tty->termios->c_cflag & CLOCAL)
  356. do_clocal = 1;
  357. /*
  358. * Block waiting for the carrier detect and the line to become
  359. * free (i.e., not in use by the callout). While we are in
  360. * this loop, port->count is dropped by one, so that
  361. * mxser_close() knows when to free things. We restore it upon
  362. * exit, either normal or abnormal.
  363. */
  364. retval = 0;
  365. add_wait_queue(&port->open_wait, &wait);
  366. spin_lock_irqsave(&port->slock, flags);
  367. if (!tty_hung_up_p(filp))
  368. port->count--;
  369. spin_unlock_irqrestore(&port->slock, flags);
  370. port->blocked_open++;
  371. while (1) {
  372. spin_lock_irqsave(&port->slock, flags);
  373. outb(inb(port->ioaddr + UART_MCR) |
  374. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  375. spin_unlock_irqrestore(&port->slock, flags);
  376. set_current_state(TASK_INTERRUPTIBLE);
  377. if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) {
  378. if (port->flags & ASYNC_HUP_NOTIFY)
  379. retval = -EAGAIN;
  380. else
  381. retval = -ERESTARTSYS;
  382. break;
  383. }
  384. if (!(port->flags & ASYNC_CLOSING) &&
  385. (do_clocal ||
  386. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  387. break;
  388. if (signal_pending(current)) {
  389. retval = -ERESTARTSYS;
  390. break;
  391. }
  392. schedule();
  393. }
  394. set_current_state(TASK_RUNNING);
  395. remove_wait_queue(&port->open_wait, &wait);
  396. if (!tty_hung_up_p(filp))
  397. port->count++;
  398. port->blocked_open--;
  399. if (retval)
  400. return retval;
  401. port->flags |= ASYNC_NORMAL_ACTIVE;
  402. return 0;
  403. }
  404. static int mxser_set_baud(struct mxser_port *info, long newspd)
  405. {
  406. int quot = 0;
  407. unsigned char cval;
  408. int ret = 0;
  409. unsigned long flags;
  410. if (!info->tty || !info->tty->termios)
  411. return ret;
  412. if (!(info->ioaddr))
  413. return ret;
  414. if (newspd > info->max_baud)
  415. return 0;
  416. info->realbaud = newspd;
  417. if (newspd == 134) {
  418. quot = (2 * info->baud_base / 269);
  419. } else if (newspd) {
  420. quot = info->baud_base / newspd;
  421. if (quot == 0)
  422. quot = 1;
  423. } else {
  424. quot = 0;
  425. }
  426. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  427. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  428. if (quot) {
  429. spin_lock_irqsave(&info->slock, flags);
  430. info->MCR |= UART_MCR_DTR;
  431. outb(info->MCR, info->ioaddr + UART_MCR);
  432. spin_unlock_irqrestore(&info->slock, flags);
  433. } else {
  434. spin_lock_irqsave(&info->slock, flags);
  435. info->MCR &= ~UART_MCR_DTR;
  436. outb(info->MCR, info->ioaddr + UART_MCR);
  437. spin_unlock_irqrestore(&info->slock, flags);
  438. return ret;
  439. }
  440. cval = inb(info->ioaddr + UART_LCR);
  441. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  442. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  443. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  444. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  445. return ret;
  446. }
  447. /*
  448. * This routine is called to set the UART divisor registers to match
  449. * the specified baud rate for a serial port.
  450. */
  451. static int mxser_change_speed(struct mxser_port *info,
  452. struct termios *old_termios)
  453. {
  454. unsigned cflag, cval, fcr;
  455. int ret = 0;
  456. unsigned char status;
  457. long baud;
  458. unsigned long flags;
  459. if (!info->tty || !info->tty->termios)
  460. return ret;
  461. cflag = info->tty->termios->c_cflag;
  462. if (!(info->ioaddr))
  463. return ret;
  464. if (mxser_set_baud_method[info->tty->index] == 0) {
  465. baud = tty_get_baud_rate(info->tty);
  466. mxser_set_baud(info, baud);
  467. }
  468. /* byte size and parity */
  469. switch (cflag & CSIZE) {
  470. case CS5:
  471. cval = 0x00;
  472. break;
  473. case CS6:
  474. cval = 0x01;
  475. break;
  476. case CS7:
  477. cval = 0x02;
  478. break;
  479. case CS8:
  480. cval = 0x03;
  481. break;
  482. default:
  483. cval = 0x00;
  484. break; /* too keep GCC shut... */
  485. }
  486. if (cflag & CSTOPB)
  487. cval |= 0x04;
  488. if (cflag & PARENB)
  489. cval |= UART_LCR_PARITY;
  490. if (!(cflag & PARODD))
  491. cval |= UART_LCR_EPAR;
  492. if (cflag & CMSPAR)
  493. cval |= UART_LCR_SPAR;
  494. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  495. if (info->board->chip_flag) {
  496. fcr = UART_FCR_ENABLE_FIFO;
  497. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  498. SET_MOXA_MUST_FIFO_VALUE(info);
  499. } else
  500. fcr = 0;
  501. } else {
  502. fcr = UART_FCR_ENABLE_FIFO;
  503. if (info->board->chip_flag) {
  504. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  505. SET_MOXA_MUST_FIFO_VALUE(info);
  506. } else {
  507. switch (info->rx_trigger) {
  508. case 1:
  509. fcr |= UART_FCR_TRIGGER_1;
  510. break;
  511. case 4:
  512. fcr |= UART_FCR_TRIGGER_4;
  513. break;
  514. case 8:
  515. fcr |= UART_FCR_TRIGGER_8;
  516. break;
  517. default:
  518. fcr |= UART_FCR_TRIGGER_14;
  519. break;
  520. }
  521. }
  522. }
  523. /* CTS flow control flag and modem status interrupts */
  524. info->IER &= ~UART_IER_MSI;
  525. info->MCR &= ~UART_MCR_AFE;
  526. if (cflag & CRTSCTS) {
  527. info->flags |= ASYNC_CTS_FLOW;
  528. info->IER |= UART_IER_MSI;
  529. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  530. info->MCR |= UART_MCR_AFE;
  531. } else {
  532. status = inb(info->ioaddr + UART_MSR);
  533. if (info->tty->hw_stopped) {
  534. if (status & UART_MSR_CTS) {
  535. info->tty->hw_stopped = 0;
  536. if (info->type != PORT_16550A &&
  537. !info->board->chip_flag) {
  538. outb(info->IER & ~UART_IER_THRI,
  539. info->ioaddr +
  540. UART_IER);
  541. info->IER |= UART_IER_THRI;
  542. outb(info->IER, info->ioaddr +
  543. UART_IER);
  544. }
  545. set_bit(MXSER_EVENT_TXLOW, &info->event);
  546. schedule_work(&info->tqueue); }
  547. } else {
  548. if (!(status & UART_MSR_CTS)) {
  549. info->tty->hw_stopped = 1;
  550. if ((info->type != PORT_16550A) &&
  551. (!info->board->chip_flag)) {
  552. info->IER &= ~UART_IER_THRI;
  553. outb(info->IER, info->ioaddr +
  554. UART_IER);
  555. }
  556. }
  557. }
  558. }
  559. } else {
  560. info->flags &= ~ASYNC_CTS_FLOW;
  561. }
  562. outb(info->MCR, info->ioaddr + UART_MCR);
  563. if (cflag & CLOCAL) {
  564. info->flags &= ~ASYNC_CHECK_CD;
  565. } else {
  566. info->flags |= ASYNC_CHECK_CD;
  567. info->IER |= UART_IER_MSI;
  568. }
  569. outb(info->IER, info->ioaddr + UART_IER);
  570. /*
  571. * Set up parity check flag
  572. */
  573. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  574. if (I_INPCK(info->tty))
  575. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  576. if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
  577. info->read_status_mask |= UART_LSR_BI;
  578. info->ignore_status_mask = 0;
  579. if (I_IGNBRK(info->tty)) {
  580. info->ignore_status_mask |= UART_LSR_BI;
  581. info->read_status_mask |= UART_LSR_BI;
  582. /*
  583. * If we're ignore parity and break indicators, ignore
  584. * overruns too. (For real raw support).
  585. */
  586. if (I_IGNPAR(info->tty)) {
  587. info->ignore_status_mask |=
  588. UART_LSR_OE |
  589. UART_LSR_PE |
  590. UART_LSR_FE;
  591. info->read_status_mask |=
  592. UART_LSR_OE |
  593. UART_LSR_PE |
  594. UART_LSR_FE;
  595. }
  596. }
  597. if (info->board->chip_flag) {
  598. spin_lock_irqsave(&info->slock, flags);
  599. SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty));
  600. SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty));
  601. if (I_IXON(info->tty)) {
  602. ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  603. } else {
  604. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  605. }
  606. if (I_IXOFF(info->tty)) {
  607. ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  608. } else {
  609. DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  610. }
  611. spin_unlock_irqrestore(&info->slock, flags);
  612. }
  613. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  614. outb(cval, info->ioaddr + UART_LCR);
  615. return ret;
  616. }
  617. static void mxser_check_modem_status(struct mxser_port *port, int status)
  618. {
  619. /* update input line counters */
  620. if (status & UART_MSR_TERI)
  621. port->icount.rng++;
  622. if (status & UART_MSR_DDSR)
  623. port->icount.dsr++;
  624. if (status & UART_MSR_DDCD)
  625. port->icount.dcd++;
  626. if (status & UART_MSR_DCTS)
  627. port->icount.cts++;
  628. port->mon_data.modem_status = status;
  629. wake_up_interruptible(&port->delta_msr_wait);
  630. if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  631. if (status & UART_MSR_DCD)
  632. wake_up_interruptible(&port->open_wait);
  633. schedule_work(&port->tqueue);
  634. }
  635. if (port->flags & ASYNC_CTS_FLOW) {
  636. if (port->tty->hw_stopped) {
  637. if (status & UART_MSR_CTS) {
  638. port->tty->hw_stopped = 0;
  639. if ((port->type != PORT_16550A) &&
  640. (!port->board->chip_flag)) {
  641. outb(port->IER & ~UART_IER_THRI,
  642. port->ioaddr + UART_IER);
  643. port->IER |= UART_IER_THRI;
  644. outb(port->IER, port->ioaddr +
  645. UART_IER);
  646. }
  647. set_bit(MXSER_EVENT_TXLOW, &port->event);
  648. schedule_work(&port->tqueue);
  649. }
  650. } else {
  651. if (!(status & UART_MSR_CTS)) {
  652. port->tty->hw_stopped = 1;
  653. if (port->type != PORT_16550A &&
  654. !port->board->chip_flag) {
  655. port->IER &= ~UART_IER_THRI;
  656. outb(port->IER, port->ioaddr +
  657. UART_IER);
  658. }
  659. }
  660. }
  661. }
  662. }
  663. static int mxser_startup(struct mxser_port *info)
  664. {
  665. unsigned long page;
  666. unsigned long flags;
  667. page = __get_free_page(GFP_KERNEL);
  668. if (!page)
  669. return -ENOMEM;
  670. spin_lock_irqsave(&info->slock, flags);
  671. if (info->flags & ASYNC_INITIALIZED) {
  672. free_page(page);
  673. spin_unlock_irqrestore(&info->slock, flags);
  674. return 0;
  675. }
  676. if (!info->ioaddr || !info->type) {
  677. if (info->tty)
  678. set_bit(TTY_IO_ERROR, &info->tty->flags);
  679. free_page(page);
  680. spin_unlock_irqrestore(&info->slock, flags);
  681. return 0;
  682. }
  683. if (info->xmit_buf)
  684. free_page(page);
  685. else
  686. info->xmit_buf = (unsigned char *) page;
  687. /*
  688. * Clear the FIFO buffers and disable them
  689. * (they will be reenabled in mxser_change_speed())
  690. */
  691. if (info->board->chip_flag)
  692. outb((UART_FCR_CLEAR_RCVR |
  693. UART_FCR_CLEAR_XMIT |
  694. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  695. else
  696. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  697. info->ioaddr + UART_FCR);
  698. /*
  699. * At this point there's no way the LSR could still be 0xFF;
  700. * if it is, then bail out, because there's likely no UART
  701. * here.
  702. */
  703. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  704. spin_unlock_irqrestore(&info->slock, flags);
  705. if (capable(CAP_SYS_ADMIN)) {
  706. if (info->tty)
  707. set_bit(TTY_IO_ERROR, &info->tty->flags);
  708. return 0;
  709. } else
  710. return -ENODEV;
  711. }
  712. /*
  713. * Clear the interrupt registers.
  714. */
  715. (void) inb(info->ioaddr + UART_LSR);
  716. (void) inb(info->ioaddr + UART_RX);
  717. (void) inb(info->ioaddr + UART_IIR);
  718. (void) inb(info->ioaddr + UART_MSR);
  719. /*
  720. * Now, initialize the UART
  721. */
  722. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  723. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  724. outb(info->MCR, info->ioaddr + UART_MCR);
  725. /*
  726. * Finally, enable interrupts
  727. */
  728. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  729. if (info->board->chip_flag)
  730. info->IER |= MOXA_MUST_IER_EGDAI;
  731. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  732. /*
  733. * And clear the interrupt registers again for luck.
  734. */
  735. (void) inb(info->ioaddr + UART_LSR);
  736. (void) inb(info->ioaddr + UART_RX);
  737. (void) inb(info->ioaddr + UART_IIR);
  738. (void) inb(info->ioaddr + UART_MSR);
  739. if (info->tty)
  740. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  741. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  742. /*
  743. * and set the speed of the serial port
  744. */
  745. spin_unlock_irqrestore(&info->slock, flags);
  746. mxser_change_speed(info, NULL);
  747. info->flags |= ASYNC_INITIALIZED;
  748. return 0;
  749. }
  750. /*
  751. * This routine will shutdown a serial port; interrupts maybe disabled, and
  752. * DTR is dropped if the hangup on close termio flag is on.
  753. */
  754. static void mxser_shutdown(struct mxser_port *info)
  755. {
  756. unsigned long flags;
  757. if (!(info->flags & ASYNC_INITIALIZED))
  758. return;
  759. spin_lock_irqsave(&info->slock, flags);
  760. /*
  761. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  762. * here so the queue might never be waken up
  763. */
  764. wake_up_interruptible(&info->delta_msr_wait);
  765. /*
  766. * Free the IRQ, if necessary
  767. */
  768. if (info->xmit_buf) {
  769. free_page((unsigned long) info->xmit_buf);
  770. info->xmit_buf = NULL;
  771. }
  772. info->IER = 0;
  773. outb(0x00, info->ioaddr + UART_IER);
  774. if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
  775. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  776. outb(info->MCR, info->ioaddr + UART_MCR);
  777. /* clear Rx/Tx FIFO's */
  778. if (info->board->chip_flag)
  779. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  780. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  781. info->ioaddr + UART_FCR);
  782. else
  783. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  784. info->ioaddr + UART_FCR);
  785. /* read data port to reset things */
  786. (void) inb(info->ioaddr + UART_RX);
  787. if (info->tty)
  788. set_bit(TTY_IO_ERROR, &info->tty->flags);
  789. info->flags &= ~ASYNC_INITIALIZED;
  790. if (info->board->chip_flag)
  791. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  792. spin_unlock_irqrestore(&info->slock, flags);
  793. }
  794. /*
  795. * This routine is called whenever a serial port is opened. It
  796. * enables interrupts for a serial port, linking in its async structure into
  797. * the IRQ chain. It also performs the serial-specific
  798. * initialization for the tty structure.
  799. */
  800. static int mxser_open(struct tty_struct *tty, struct file *filp)
  801. {
  802. struct mxser_port *info;
  803. int retval, line;
  804. /* initialize driver_data in case something fails */
  805. tty->driver_data = NULL;
  806. line = tty->index;
  807. if (line == MXSER_PORTS)
  808. return 0;
  809. if (line < 0 || line > MXSER_PORTS)
  810. return -ENODEV;
  811. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  812. if (!info->ioaddr)
  813. return -ENODEV;
  814. tty->driver_data = info;
  815. info->tty = tty;
  816. /*
  817. * Start up serial port
  818. */
  819. info->count++;
  820. retval = mxser_startup(info);
  821. if (retval)
  822. return retval;
  823. retval = mxser_block_til_ready(tty, filp, info);
  824. if (retval)
  825. return retval;
  826. if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
  827. if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
  828. *tty->termios = info->normal_termios;
  829. else
  830. *tty->termios = info->callout_termios;
  831. mxser_change_speed(info, NULL);
  832. }
  833. info->session = process_session(current);
  834. info->pgrp = process_group(current);
  835. /* unmark here for very high baud rate (ex. 921600 bps) used */
  836. tty->low_latency = 1;
  837. return 0;
  838. }
  839. /*
  840. * This routine is called when the serial port gets closed. First, we
  841. * wait for the last remaining data to be sent. Then, we unlink its
  842. * async structure from the interrupt chain if necessary, and we free
  843. * that IRQ if nothing is left in the chain.
  844. */
  845. static void mxser_close(struct tty_struct *tty, struct file *filp)
  846. {
  847. struct mxser_port *info = tty->driver_data;
  848. unsigned long timeout;
  849. unsigned long flags;
  850. if (tty->index == MXSER_PORTS)
  851. return;
  852. if (!info)
  853. return;
  854. spin_lock_irqsave(&info->slock, flags);
  855. if (tty_hung_up_p(filp)) {
  856. spin_unlock_irqrestore(&info->slock, flags);
  857. return;
  858. }
  859. if ((tty->count == 1) && (info->count != 1)) {
  860. /*
  861. * Uh, oh. tty->count is 1, which means that the tty
  862. * structure will be freed. Info->count should always
  863. * be one in these conditions. If it's greater than
  864. * one, we've got real problems, since it means the
  865. * serial port won't be shutdown.
  866. */
  867. printk(KERN_ERR "mxser_close: bad serial port count; "
  868. "tty->count is 1, info->count is %d\n", info->count);
  869. info->count = 1;
  870. }
  871. if (--info->count < 0) {
  872. printk(KERN_ERR "mxser_close: bad serial port count for "
  873. "ttys%d: %d\n", tty->index, info->count);
  874. info->count = 0;
  875. }
  876. if (info->count) {
  877. spin_unlock_irqrestore(&info->slock, flags);
  878. return;
  879. }
  880. info->flags |= ASYNC_CLOSING;
  881. spin_unlock_irqrestore(&info->slock, flags);
  882. /*
  883. * Save the termios structure, since this port may have
  884. * separate termios for callout and dialin.
  885. */
  886. if (info->flags & ASYNC_NORMAL_ACTIVE)
  887. info->normal_termios = *tty->termios;
  888. /*
  889. * Now we wait for the transmit buffer to clear; and we notify
  890. * the line discipline to only process XON/XOFF characters.
  891. */
  892. tty->closing = 1;
  893. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  894. tty_wait_until_sent(tty, info->closing_wait);
  895. /*
  896. * At this point we stop accepting input. To do this, we
  897. * disable the receive line status interrupts, and tell the
  898. * interrupt driver to stop checking the data ready bit in the
  899. * line status register.
  900. */
  901. info->IER &= ~UART_IER_RLSI;
  902. if (info->board->chip_flag)
  903. info->IER &= ~MOXA_MUST_RECV_ISR;
  904. if (info->flags & ASYNC_INITIALIZED) {
  905. outb(info->IER, info->ioaddr + UART_IER);
  906. /*
  907. * Before we drop DTR, make sure the UART transmitter
  908. * has completely drained; this is especially
  909. * important if there is a transmit FIFO!
  910. */
  911. timeout = jiffies + HZ;
  912. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  913. schedule_timeout_interruptible(5);
  914. if (time_after(jiffies, timeout))
  915. break;
  916. }
  917. }
  918. mxser_shutdown(info);
  919. if (tty->driver->flush_buffer)
  920. tty->driver->flush_buffer(tty);
  921. tty_ldisc_flush(tty);
  922. tty->closing = 0;
  923. info->event = 0;
  924. info->tty = NULL;
  925. if (info->blocked_open) {
  926. if (info->close_delay)
  927. schedule_timeout_interruptible(info->close_delay);
  928. wake_up_interruptible(&info->open_wait);
  929. }
  930. info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  931. wake_up_interruptible(&info->close_wait);
  932. }
  933. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  934. {
  935. int c, total = 0;
  936. struct mxser_port *info = tty->driver_data;
  937. unsigned long flags;
  938. if (!info->xmit_buf)
  939. return 0;
  940. while (1) {
  941. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  942. SERIAL_XMIT_SIZE - info->xmit_head));
  943. if (c <= 0)
  944. break;
  945. memcpy(info->xmit_buf + info->xmit_head, buf, c);
  946. spin_lock_irqsave(&info->slock, flags);
  947. info->xmit_head = (info->xmit_head + c) &
  948. (SERIAL_XMIT_SIZE - 1);
  949. info->xmit_cnt += c;
  950. spin_unlock_irqrestore(&info->slock, flags);
  951. buf += c;
  952. count -= c;
  953. total += c;
  954. }
  955. if (info->xmit_cnt && !tty->stopped) {
  956. if (!tty->hw_stopped ||
  957. (info->type == PORT_16550A) ||
  958. (info->board->chip_flag)) {
  959. spin_lock_irqsave(&info->slock, flags);
  960. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  961. UART_IER);
  962. info->IER |= UART_IER_THRI;
  963. outb(info->IER, info->ioaddr + UART_IER);
  964. spin_unlock_irqrestore(&info->slock, flags);
  965. }
  966. }
  967. return total;
  968. }
  969. static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
  970. {
  971. struct mxser_port *info = tty->driver_data;
  972. unsigned long flags;
  973. if (!info->xmit_buf)
  974. return;
  975. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  976. return;
  977. spin_lock_irqsave(&info->slock, flags);
  978. info->xmit_buf[info->xmit_head++] = ch;
  979. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  980. info->xmit_cnt++;
  981. spin_unlock_irqrestore(&info->slock, flags);
  982. if (!tty->stopped) {
  983. if (!tty->hw_stopped ||
  984. (info->type == PORT_16550A) ||
  985. info->board->chip_flag) {
  986. spin_lock_irqsave(&info->slock, flags);
  987. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  988. info->IER |= UART_IER_THRI;
  989. outb(info->IER, info->ioaddr + UART_IER);
  990. spin_unlock_irqrestore(&info->slock, flags);
  991. }
  992. }
  993. }
  994. static void mxser_flush_chars(struct tty_struct *tty)
  995. {
  996. struct mxser_port *info = tty->driver_data;
  997. unsigned long flags;
  998. if (info->xmit_cnt <= 0 ||
  999. tty->stopped ||
  1000. !info->xmit_buf ||
  1001. (tty->hw_stopped &&
  1002. (info->type != PORT_16550A) &&
  1003. (!info->board->chip_flag)
  1004. ))
  1005. return;
  1006. spin_lock_irqsave(&info->slock, flags);
  1007. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1008. info->IER |= UART_IER_THRI;
  1009. outb(info->IER, info->ioaddr + UART_IER);
  1010. spin_unlock_irqrestore(&info->slock, flags);
  1011. }
  1012. static int mxser_write_room(struct tty_struct *tty)
  1013. {
  1014. struct mxser_port *info = tty->driver_data;
  1015. int ret;
  1016. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1017. if (ret < 0)
  1018. ret = 0;
  1019. return ret;
  1020. }
  1021. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1022. {
  1023. struct mxser_port *info = tty->driver_data;
  1024. return info->xmit_cnt;
  1025. }
  1026. static void mxser_flush_buffer(struct tty_struct *tty)
  1027. {
  1028. struct mxser_port *info = tty->driver_data;
  1029. char fcr;
  1030. unsigned long flags;
  1031. spin_lock_irqsave(&info->slock, flags);
  1032. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  1033. fcr = inb(info->ioaddr + UART_FCR);
  1034. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  1035. info->ioaddr + UART_FCR);
  1036. outb(fcr, info->ioaddr + UART_FCR);
  1037. spin_unlock_irqrestore(&info->slock, flags);
  1038. tty_wakeup(tty);
  1039. }
  1040. /*
  1041. * ------------------------------------------------------------
  1042. * friends of mxser_ioctl()
  1043. * ------------------------------------------------------------
  1044. */
  1045. static int mxser_get_serial_info(struct mxser_port *info,
  1046. struct serial_struct __user *retinfo)
  1047. {
  1048. struct serial_struct tmp;
  1049. if (!retinfo)
  1050. return -EFAULT;
  1051. memset(&tmp, 0, sizeof(tmp));
  1052. tmp.type = info->type;
  1053. tmp.line = info->tty->index;
  1054. tmp.port = info->ioaddr;
  1055. tmp.irq = info->board->irq;
  1056. tmp.flags = info->flags;
  1057. tmp.baud_base = info->baud_base;
  1058. tmp.close_delay = info->close_delay;
  1059. tmp.closing_wait = info->closing_wait;
  1060. tmp.custom_divisor = info->custom_divisor;
  1061. tmp.hub6 = 0;
  1062. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1063. return -EFAULT;
  1064. return 0;
  1065. }
  1066. static int mxser_set_serial_info(struct mxser_port *info,
  1067. struct serial_struct __user *new_info)
  1068. {
  1069. struct serial_struct new_serial;
  1070. unsigned int flags;
  1071. int retval = 0;
  1072. if (!new_info || !info->ioaddr)
  1073. return -EFAULT;
  1074. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1075. return -EFAULT;
  1076. if ((new_serial.irq != info->board->irq) ||
  1077. (new_serial.port != info->ioaddr) ||
  1078. (new_serial.custom_divisor != info->custom_divisor) ||
  1079. (new_serial.baud_base != info->baud_base))
  1080. return -EPERM;
  1081. flags = info->flags & ASYNC_SPD_MASK;
  1082. if (!capable(CAP_SYS_ADMIN)) {
  1083. if ((new_serial.baud_base != info->baud_base) ||
  1084. (new_serial.close_delay != info->close_delay) ||
  1085. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
  1086. return -EPERM;
  1087. info->flags = ((info->flags & ~ASYNC_USR_MASK) |
  1088. (new_serial.flags & ASYNC_USR_MASK));
  1089. } else {
  1090. /*
  1091. * OK, past this point, all the error checking has been done.
  1092. * At this point, we start making changes.....
  1093. */
  1094. info->flags = ((info->flags & ~ASYNC_FLAGS) |
  1095. (new_serial.flags & ASYNC_FLAGS));
  1096. info->close_delay = new_serial.close_delay * HZ / 100;
  1097. info->closing_wait = new_serial.closing_wait * HZ / 100;
  1098. info->tty->low_latency =
  1099. (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1100. info->tty->low_latency = 0;
  1101. }
  1102. info->type = new_serial.type;
  1103. process_txrx_fifo(info);
  1104. if (info->flags & ASYNC_INITIALIZED) {
  1105. if (flags != (info->flags & ASYNC_SPD_MASK))
  1106. mxser_change_speed(info, NULL);
  1107. } else
  1108. retval = mxser_startup(info);
  1109. return retval;
  1110. }
  1111. /*
  1112. * mxser_get_lsr_info - get line status register info
  1113. *
  1114. * Purpose: Let user call ioctl() to get info when the UART physically
  1115. * is emptied. On bus types like RS485, the transmitter must
  1116. * release the bus after transmitting. This must be done when
  1117. * the transmit shift register is empty, not be done when the
  1118. * transmit holding register is empty. This functionality
  1119. * allows an RS485 driver to be written in user space.
  1120. */
  1121. static int mxser_get_lsr_info(struct mxser_port *info,
  1122. unsigned int __user *value)
  1123. {
  1124. unsigned char status;
  1125. unsigned int result;
  1126. unsigned long flags;
  1127. spin_lock_irqsave(&info->slock, flags);
  1128. status = inb(info->ioaddr + UART_LSR);
  1129. spin_unlock_irqrestore(&info->slock, flags);
  1130. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1131. return put_user(result, value);
  1132. }
  1133. /*
  1134. * This routine sends a break character out the serial port.
  1135. */
  1136. static void mxser_send_break(struct mxser_port *info, int duration)
  1137. {
  1138. unsigned long flags;
  1139. if (!info->ioaddr)
  1140. return;
  1141. set_current_state(TASK_INTERRUPTIBLE);
  1142. spin_lock_irqsave(&info->slock, flags);
  1143. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1144. info->ioaddr + UART_LCR);
  1145. spin_unlock_irqrestore(&info->slock, flags);
  1146. schedule_timeout(duration);
  1147. spin_lock_irqsave(&info->slock, flags);
  1148. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1149. info->ioaddr + UART_LCR);
  1150. spin_unlock_irqrestore(&info->slock, flags);
  1151. }
  1152. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1153. {
  1154. struct mxser_port *info = tty->driver_data;
  1155. unsigned char control, status;
  1156. unsigned long flags;
  1157. if (tty->index == MXSER_PORTS)
  1158. return -ENOIOCTLCMD;
  1159. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1160. return -EIO;
  1161. control = info->MCR;
  1162. spin_lock_irqsave(&info->slock, flags);
  1163. status = inb(info->ioaddr + UART_MSR);
  1164. if (status & UART_MSR_ANY_DELTA)
  1165. mxser_check_modem_status(info, status);
  1166. spin_unlock_irqrestore(&info->slock, flags);
  1167. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1168. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1169. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1170. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1171. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1172. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1173. }
  1174. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1175. unsigned int set, unsigned int clear)
  1176. {
  1177. struct mxser_port *info = tty->driver_data;
  1178. unsigned long flags;
  1179. if (tty->index == MXSER_PORTS)
  1180. return -ENOIOCTLCMD;
  1181. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1182. return -EIO;
  1183. spin_lock_irqsave(&info->slock, flags);
  1184. if (set & TIOCM_RTS)
  1185. info->MCR |= UART_MCR_RTS;
  1186. if (set & TIOCM_DTR)
  1187. info->MCR |= UART_MCR_DTR;
  1188. if (clear & TIOCM_RTS)
  1189. info->MCR &= ~UART_MCR_RTS;
  1190. if (clear & TIOCM_DTR)
  1191. info->MCR &= ~UART_MCR_DTR;
  1192. outb(info->MCR, info->ioaddr + UART_MCR);
  1193. spin_unlock_irqrestore(&info->slock, flags);
  1194. return 0;
  1195. }
  1196. static int mxser_program_mode(int port)
  1197. {
  1198. int id, i, j, n;
  1199. spin_lock(&gm_lock);
  1200. outb(0, port);
  1201. outb(0, port);
  1202. outb(0, port);
  1203. (void)inb(port);
  1204. (void)inb(port);
  1205. outb(0, port);
  1206. (void)inb(port);
  1207. spin_unlock(&gm_lock);
  1208. id = inb(port + 1) & 0x1F;
  1209. if ((id != C168_ASIC_ID) &&
  1210. (id != C104_ASIC_ID) &&
  1211. (id != C102_ASIC_ID) &&
  1212. (id != CI132_ASIC_ID) &&
  1213. (id != CI134_ASIC_ID) &&
  1214. (id != CI104J_ASIC_ID))
  1215. return -1;
  1216. for (i = 0, j = 0; i < 4; i++) {
  1217. n = inb(port + 2);
  1218. if (n == 'M') {
  1219. j = 1;
  1220. } else if ((j == 1) && (n == 1)) {
  1221. j = 2;
  1222. break;
  1223. } else
  1224. j = 0;
  1225. }
  1226. if (j != 2)
  1227. id = -2;
  1228. return id;
  1229. }
  1230. static void mxser_normal_mode(int port)
  1231. {
  1232. int i, n;
  1233. outb(0xA5, port + 1);
  1234. outb(0x80, port + 3);
  1235. outb(12, port + 0); /* 9600 bps */
  1236. outb(0, port + 1);
  1237. outb(0x03, port + 3); /* 8 data bits */
  1238. outb(0x13, port + 4); /* loop back mode */
  1239. for (i = 0; i < 16; i++) {
  1240. n = inb(port + 5);
  1241. if ((n & 0x61) == 0x60)
  1242. break;
  1243. if ((n & 1) == 1)
  1244. (void)inb(port);
  1245. }
  1246. outb(0x00, port + 4);
  1247. }
  1248. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1249. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1250. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1251. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1252. #define EN_CCMD 0x000 /* Chip's command register */
  1253. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1254. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1255. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1256. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1257. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1258. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1259. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1260. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1261. static int mxser_read_register(int port, unsigned short *regs)
  1262. {
  1263. int i, k, value, id;
  1264. unsigned int j;
  1265. id = mxser_program_mode(port);
  1266. if (id < 0)
  1267. return id;
  1268. for (i = 0; i < 14; i++) {
  1269. k = (i & 0x3F) | 0x180;
  1270. for (j = 0x100; j > 0; j >>= 1) {
  1271. outb(CHIP_CS, port);
  1272. if (k & j) {
  1273. outb(CHIP_CS | CHIP_DO, port);
  1274. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1275. } else {
  1276. outb(CHIP_CS, port);
  1277. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1278. }
  1279. }
  1280. (void)inb(port);
  1281. value = 0;
  1282. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1283. outb(CHIP_CS, port);
  1284. outb(CHIP_CS | CHIP_SK, port);
  1285. if (inb(port) & CHIP_DI)
  1286. value |= j;
  1287. }
  1288. regs[i] = value;
  1289. outb(0, port);
  1290. }
  1291. mxser_normal_mode(port);
  1292. return id;
  1293. }
  1294. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1295. {
  1296. struct mxser_port *port;
  1297. int result, status;
  1298. unsigned int i, j;
  1299. switch (cmd) {
  1300. case MOXA_GET_CONF:
  1301. /* if (copy_to_user(argp, mxsercfg,
  1302. sizeof(struct mxser_hwconf) * 4))
  1303. return -EFAULT;
  1304. return 0;*/
  1305. return -ENXIO;
  1306. case MOXA_GET_MAJOR:
  1307. if (copy_to_user(argp, &ttymajor, sizeof(int)))
  1308. return -EFAULT;
  1309. return 0;
  1310. case MOXA_GET_CUMAJOR:
  1311. if (copy_to_user(argp, &calloutmajor, sizeof(int)))
  1312. return -EFAULT;
  1313. return 0;
  1314. case MOXA_CHKPORTENABLE:
  1315. result = 0;
  1316. for (i = 0; i < MXSER_BOARDS; i++)
  1317. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1318. if (mxser_boards[i].ports[j].ioaddr)
  1319. result |= (1 << i);
  1320. return put_user(result, (unsigned long __user *)argp);
  1321. case MOXA_GETDATACOUNT:
  1322. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1323. return -EFAULT;
  1324. return 0;
  1325. case MOXA_GETMSTATUS:
  1326. for (i = 0; i < MXSER_BOARDS; i++)
  1327. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1328. port = &mxser_boards[i].ports[j];
  1329. GMStatus[i].ri = 0;
  1330. if (!port->ioaddr) {
  1331. GMStatus[i].dcd = 0;
  1332. GMStatus[i].dsr = 0;
  1333. GMStatus[i].cts = 0;
  1334. continue;
  1335. }
  1336. if (!port->tty || !port->tty->termios)
  1337. GMStatus[i].cflag =
  1338. port->normal_termios.c_cflag;
  1339. else
  1340. GMStatus[i].cflag =
  1341. port->tty->termios->c_cflag;
  1342. status = inb(port->ioaddr + UART_MSR);
  1343. if (status & 0x80 /*UART_MSR_DCD */ )
  1344. GMStatus[i].dcd = 1;
  1345. else
  1346. GMStatus[i].dcd = 0;
  1347. if (status & 0x20 /*UART_MSR_DSR */ )
  1348. GMStatus[i].dsr = 1;
  1349. else
  1350. GMStatus[i].dsr = 0;
  1351. if (status & 0x10 /*UART_MSR_CTS */ )
  1352. GMStatus[i].cts = 1;
  1353. else
  1354. GMStatus[i].cts = 0;
  1355. }
  1356. if (copy_to_user(argp, GMStatus,
  1357. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1358. return -EFAULT;
  1359. return 0;
  1360. case MOXA_ASPP_MON_EXT: {
  1361. int status, p, shiftbit;
  1362. unsigned long opmode;
  1363. unsigned cflag, iflag;
  1364. for (i = 0; i < MXSER_BOARDS; i++)
  1365. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1366. port = &mxser_boards[i].ports[j];
  1367. if (!port->ioaddr)
  1368. continue;
  1369. status = mxser_get_msr(port->ioaddr, 0, i);
  1370. if (status & UART_MSR_TERI)
  1371. port->icount.rng++;
  1372. if (status & UART_MSR_DDSR)
  1373. port->icount.dsr++;
  1374. if (status & UART_MSR_DDCD)
  1375. port->icount.dcd++;
  1376. if (status & UART_MSR_DCTS)
  1377. port->icount.cts++;
  1378. port->mon_data.modem_status = status;
  1379. mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
  1380. mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
  1381. mon_data_ext.up_rxcnt[i] =
  1382. port->mon_data.up_rxcnt;
  1383. mon_data_ext.up_txcnt[i] =
  1384. port->mon_data.up_txcnt;
  1385. mon_data_ext.modem_status[i] =
  1386. port->mon_data.modem_status;
  1387. mon_data_ext.baudrate[i] = port->realbaud;
  1388. if (!port->tty || !port->tty->termios) {
  1389. cflag = port->normal_termios.c_cflag;
  1390. iflag = port->normal_termios.c_iflag;
  1391. } else {
  1392. cflag = port->tty->termios->c_cflag;
  1393. iflag = port->tty->termios->c_iflag;
  1394. }
  1395. mon_data_ext.databits[i] = cflag & CSIZE;
  1396. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1397. mon_data_ext.parity[i] =
  1398. cflag & (PARENB | PARODD | CMSPAR);
  1399. mon_data_ext.flowctrl[i] = 0x00;
  1400. if (cflag & CRTSCTS)
  1401. mon_data_ext.flowctrl[i] |= 0x03;
  1402. if (iflag & (IXON | IXOFF))
  1403. mon_data_ext.flowctrl[i] |= 0x0C;
  1404. if (port->type == PORT_16550A)
  1405. mon_data_ext.fifo[i] = 1;
  1406. else
  1407. mon_data_ext.fifo[i] = 0;
  1408. p = i % 4;
  1409. shiftbit = p * 2;
  1410. opmode = inb(port->opmode_ioaddr) >> shiftbit;
  1411. opmode &= OP_MODE_MASK;
  1412. mon_data_ext.iftype[i] = opmode;
  1413. }
  1414. if (copy_to_user(argp, &mon_data_ext,
  1415. sizeof(mon_data_ext)))
  1416. return -EFAULT;
  1417. return 0;
  1418. } default:
  1419. return -ENOIOCTLCMD;
  1420. }
  1421. return 0;
  1422. }
  1423. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1424. unsigned int cmd, unsigned long arg)
  1425. {
  1426. struct mxser_port *info = tty->driver_data;
  1427. struct async_icount cprev, cnow; /* kernel counter temps */
  1428. struct serial_icounter_struct __user *p_cuser;
  1429. unsigned long templ;
  1430. unsigned long flags;
  1431. void __user *argp = (void __user *)arg;
  1432. int retval;
  1433. if (tty->index == MXSER_PORTS)
  1434. return mxser_ioctl_special(cmd, argp);
  1435. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1436. int p;
  1437. unsigned long opmode;
  1438. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1439. int shiftbit;
  1440. unsigned char val, mask;
  1441. p = tty->index % 4;
  1442. if (cmd == MOXA_SET_OP_MODE) {
  1443. if (get_user(opmode, (int __user *) argp))
  1444. return -EFAULT;
  1445. if (opmode != RS232_MODE &&
  1446. opmode != RS485_2WIRE_MODE &&
  1447. opmode != RS422_MODE &&
  1448. opmode != RS485_4WIRE_MODE)
  1449. return -EFAULT;
  1450. mask = ModeMask[p];
  1451. shiftbit = p * 2;
  1452. val = inb(info->opmode_ioaddr);
  1453. val &= mask;
  1454. val |= (opmode << shiftbit);
  1455. outb(val, info->opmode_ioaddr);
  1456. } else {
  1457. shiftbit = p * 2;
  1458. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1459. opmode &= OP_MODE_MASK;
  1460. if (copy_to_user(argp, &opmode, sizeof(int)))
  1461. return -EFAULT;
  1462. }
  1463. return 0;
  1464. }
  1465. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1466. test_bit(TTY_IO_ERROR, &tty->flags))
  1467. return -EIO;
  1468. switch (cmd) {
  1469. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1470. retval = tty_check_change(tty);
  1471. if (retval)
  1472. return retval;
  1473. tty_wait_until_sent(tty, 0);
  1474. if (!arg)
  1475. mxser_send_break(info, HZ / 4); /* 1/4 second */
  1476. return 0;
  1477. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1478. retval = tty_check_change(tty);
  1479. if (retval)
  1480. return retval;
  1481. tty_wait_until_sent(tty, 0);
  1482. mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
  1483. return 0;
  1484. case TIOCGSOFTCAR:
  1485. return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
  1486. case TIOCSSOFTCAR:
  1487. if (get_user(templ, (unsigned long __user *) argp))
  1488. return -EFAULT;
  1489. arg = templ;
  1490. tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
  1491. return 0;
  1492. case TIOCGSERIAL:
  1493. return mxser_get_serial_info(info, argp);
  1494. case TIOCSSERIAL:
  1495. return mxser_set_serial_info(info, argp);
  1496. case TIOCSERGETLSR: /* Get line status register */
  1497. return mxser_get_lsr_info(info, argp);
  1498. /*
  1499. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1500. * - mask passed in arg for lines of interest
  1501. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1502. * Caller should use TIOCGICOUNT to see which one it was
  1503. */
  1504. case TIOCMIWAIT: {
  1505. DECLARE_WAITQUEUE(wait, current);
  1506. int ret;
  1507. spin_lock_irqsave(&info->slock, flags);
  1508. cprev = info->icount; /* note the counters on entry */
  1509. spin_unlock_irqrestore(&info->slock, flags);
  1510. add_wait_queue(&info->delta_msr_wait, &wait);
  1511. while (1) {
  1512. spin_lock_irqsave(&info->slock, flags);
  1513. cnow = info->icount; /* atomic copy */
  1514. spin_unlock_irqrestore(&info->slock, flags);
  1515. set_current_state(TASK_INTERRUPTIBLE);
  1516. if (((arg & TIOCM_RNG) &&
  1517. (cnow.rng != cprev.rng)) ||
  1518. ((arg & TIOCM_DSR) &&
  1519. (cnow.dsr != cprev.dsr)) ||
  1520. ((arg & TIOCM_CD) &&
  1521. (cnow.dcd != cprev.dcd)) ||
  1522. ((arg & TIOCM_CTS) &&
  1523. (cnow.cts != cprev.cts))) {
  1524. ret = 0;
  1525. break;
  1526. }
  1527. /* see if a signal did it */
  1528. if (signal_pending(current)) {
  1529. ret = -ERESTARTSYS;
  1530. break;
  1531. }
  1532. cprev = cnow;
  1533. }
  1534. current->state = TASK_RUNNING;
  1535. remove_wait_queue(&info->delta_msr_wait, &wait);
  1536. break;
  1537. }
  1538. /* NOTREACHED */
  1539. /*
  1540. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1541. * Return: write counters to the user passed counter struct
  1542. * NB: both 1->0 and 0->1 transitions are counted except for
  1543. * RI where only 0->1 is counted.
  1544. */
  1545. case TIOCGICOUNT:
  1546. spin_lock_irqsave(&info->slock, flags);
  1547. cnow = info->icount;
  1548. spin_unlock_irqrestore(&info->slock, flags);
  1549. p_cuser = argp;
  1550. if (put_user(cnow.frame, &p_cuser->frame))
  1551. return -EFAULT;
  1552. if (put_user(cnow.brk, &p_cuser->brk))
  1553. return -EFAULT;
  1554. if (put_user(cnow.overrun, &p_cuser->overrun))
  1555. return -EFAULT;
  1556. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1557. return -EFAULT;
  1558. if (put_user(cnow.parity, &p_cuser->parity))
  1559. return -EFAULT;
  1560. if (put_user(cnow.rx, &p_cuser->rx))
  1561. return -EFAULT;
  1562. if (put_user(cnow.tx, &p_cuser->tx))
  1563. return -EFAULT;
  1564. put_user(cnow.cts, &p_cuser->cts);
  1565. put_user(cnow.dsr, &p_cuser->dsr);
  1566. put_user(cnow.rng, &p_cuser->rng);
  1567. put_user(cnow.dcd, &p_cuser->dcd);
  1568. return 0;
  1569. case MOXA_HighSpeedOn:
  1570. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1571. case MOXA_SDS_RSTICOUNTER:
  1572. info->mon_data.rxcnt = 0;
  1573. info->mon_data.txcnt = 0;
  1574. return 0;
  1575. case MOXA_ASPP_SETBAUD:{
  1576. long baud;
  1577. if (get_user(baud, (long __user *)argp))
  1578. return -EFAULT;
  1579. mxser_set_baud(info, baud);
  1580. return 0;
  1581. }
  1582. case MOXA_ASPP_GETBAUD:
  1583. if (copy_to_user(argp, &info->realbaud, sizeof(long)))
  1584. return -EFAULT;
  1585. return 0;
  1586. case MOXA_ASPP_OQUEUE:{
  1587. int len, lsr;
  1588. len = mxser_chars_in_buffer(tty);
  1589. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1590. len += (lsr ? 0 : 1);
  1591. if (copy_to_user(argp, &len, sizeof(int)))
  1592. return -EFAULT;
  1593. return 0;
  1594. }
  1595. case MOXA_ASPP_MON: {
  1596. int mcr, status;
  1597. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1598. mxser_check_modem_status(info, status);
  1599. mcr = inb(info->ioaddr + UART_MCR);
  1600. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1601. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1602. else
  1603. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1604. if (mcr & MOXA_MUST_MCR_TX_XON)
  1605. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1606. else
  1607. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1608. if (info->tty->hw_stopped)
  1609. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1610. else
  1611. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1612. if (copy_to_user(argp, &info->mon_data,
  1613. sizeof(struct mxser_mon)))
  1614. return -EFAULT;
  1615. return 0;
  1616. }
  1617. case MOXA_ASPP_LSTATUS: {
  1618. if (copy_to_user(argp, &info->err_shadow,
  1619. sizeof(unsigned char)))
  1620. return -EFAULT;
  1621. info->err_shadow = 0;
  1622. return 0;
  1623. }
  1624. case MOXA_SET_BAUD_METHOD: {
  1625. int method;
  1626. if (get_user(method, (int __user *)argp))
  1627. return -EFAULT;
  1628. mxser_set_baud_method[tty->index] = method;
  1629. if (copy_to_user(argp, &method, sizeof(int)))
  1630. return -EFAULT;
  1631. return 0;
  1632. }
  1633. default:
  1634. return -ENOIOCTLCMD;
  1635. }
  1636. return 0;
  1637. }
  1638. static void mxser_stoprx(struct tty_struct *tty)
  1639. {
  1640. struct mxser_port *info = tty->driver_data;
  1641. info->ldisc_stop_rx = 1;
  1642. if (I_IXOFF(tty)) {
  1643. if (info->board->chip_flag) {
  1644. info->IER &= ~MOXA_MUST_RECV_ISR;
  1645. outb(info->IER, info->ioaddr + UART_IER);
  1646. } else {
  1647. info->x_char = STOP_CHAR(tty);
  1648. outb(0, info->ioaddr + UART_IER);
  1649. info->IER |= UART_IER_THRI;
  1650. outb(info->IER, info->ioaddr + UART_IER);
  1651. }
  1652. }
  1653. if (info->tty->termios->c_cflag & CRTSCTS) {
  1654. info->MCR &= ~UART_MCR_RTS;
  1655. outb(info->MCR, info->ioaddr + UART_MCR);
  1656. }
  1657. }
  1658. /*
  1659. * This routine is called by the upper-layer tty layer to signal that
  1660. * incoming characters should be throttled.
  1661. */
  1662. static void mxser_throttle(struct tty_struct *tty)
  1663. {
  1664. mxser_stoprx(tty);
  1665. }
  1666. static void mxser_unthrottle(struct tty_struct *tty)
  1667. {
  1668. struct mxser_port *info = tty->driver_data;
  1669. /* startrx */
  1670. info->ldisc_stop_rx = 0;
  1671. if (I_IXOFF(tty)) {
  1672. if (info->x_char)
  1673. info->x_char = 0;
  1674. else {
  1675. if (info->board->chip_flag) {
  1676. info->IER |= MOXA_MUST_RECV_ISR;
  1677. outb(info->IER, info->ioaddr + UART_IER);
  1678. } else {
  1679. info->x_char = START_CHAR(tty);
  1680. outb(0, info->ioaddr + UART_IER);
  1681. info->IER |= UART_IER_THRI;
  1682. outb(info->IER, info->ioaddr + UART_IER);
  1683. }
  1684. }
  1685. }
  1686. if (info->tty->termios->c_cflag & CRTSCTS) {
  1687. info->MCR |= UART_MCR_RTS;
  1688. outb(info->MCR, info->ioaddr + UART_MCR);
  1689. }
  1690. }
  1691. /*
  1692. * mxser_stop() and mxser_start()
  1693. *
  1694. * This routines are called before setting or resetting tty->stopped.
  1695. * They enable or disable transmitter interrupts, as necessary.
  1696. */
  1697. static void mxser_stop(struct tty_struct *tty)
  1698. {
  1699. struct mxser_port *info = tty->driver_data;
  1700. unsigned long flags;
  1701. spin_lock_irqsave(&info->slock, flags);
  1702. if (info->IER & UART_IER_THRI) {
  1703. info->IER &= ~UART_IER_THRI;
  1704. outb(info->IER, info->ioaddr + UART_IER);
  1705. }
  1706. spin_unlock_irqrestore(&info->slock, flags);
  1707. }
  1708. static void mxser_start(struct tty_struct *tty)
  1709. {
  1710. struct mxser_port *info = tty->driver_data;
  1711. unsigned long flags;
  1712. spin_lock_irqsave(&info->slock, flags);
  1713. if (info->xmit_cnt && info->xmit_buf) {
  1714. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1715. info->IER |= UART_IER_THRI;
  1716. outb(info->IER, info->ioaddr + UART_IER);
  1717. }
  1718. spin_unlock_irqrestore(&info->slock, flags);
  1719. }
  1720. static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1721. {
  1722. struct mxser_port *info = tty->driver_data;
  1723. unsigned long flags;
  1724. if ((tty->termios->c_cflag != old_termios->c_cflag) ||
  1725. (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
  1726. mxser_change_speed(info, old_termios);
  1727. if ((old_termios->c_cflag & CRTSCTS) &&
  1728. !(tty->termios->c_cflag & CRTSCTS)) {
  1729. tty->hw_stopped = 0;
  1730. mxser_start(tty);
  1731. }
  1732. }
  1733. /* Handle sw stopped */
  1734. if ((old_termios->c_iflag & IXON) &&
  1735. !(tty->termios->c_iflag & IXON)) {
  1736. tty->stopped = 0;
  1737. if (info->board->chip_flag) {
  1738. spin_lock_irqsave(&info->slock, flags);
  1739. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  1740. spin_unlock_irqrestore(&info->slock, flags);
  1741. }
  1742. mxser_start(tty);
  1743. }
  1744. }
  1745. /*
  1746. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1747. */
  1748. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1749. {
  1750. struct mxser_port *info = tty->driver_data;
  1751. unsigned long orig_jiffies, char_time;
  1752. int lsr;
  1753. if (info->type == PORT_UNKNOWN)
  1754. return;
  1755. if (info->xmit_fifo_size == 0)
  1756. return; /* Just in case.... */
  1757. orig_jiffies = jiffies;
  1758. /*
  1759. * Set the check interval to be 1/5 of the estimated time to
  1760. * send a single character, and make it at least 1. The check
  1761. * interval should also be less than the timeout.
  1762. *
  1763. * Note: we have to use pretty tight timings here to satisfy
  1764. * the NIST-PCTS.
  1765. */
  1766. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1767. char_time = char_time / 5;
  1768. if (char_time == 0)
  1769. char_time = 1;
  1770. if (timeout && timeout < char_time)
  1771. char_time = timeout;
  1772. /*
  1773. * If the transmitter hasn't cleared in twice the approximate
  1774. * amount of time to send the entire FIFO, it probably won't
  1775. * ever clear. This assumes the UART isn't doing flow
  1776. * control, which is currently the case. Hence, if it ever
  1777. * takes longer than info->timeout, this is probably due to a
  1778. * UART bug of some kind. So, we clamp the timeout parameter at
  1779. * 2*info->timeout.
  1780. */
  1781. if (!timeout || timeout > 2 * info->timeout)
  1782. timeout = 2 * info->timeout;
  1783. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1784. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1785. timeout, char_time);
  1786. printk("jiff=%lu...", jiffies);
  1787. #endif
  1788. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1789. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1790. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1791. #endif
  1792. schedule_timeout_interruptible(char_time);
  1793. if (signal_pending(current))
  1794. break;
  1795. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1796. break;
  1797. }
  1798. set_current_state(TASK_RUNNING);
  1799. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1800. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1801. #endif
  1802. }
  1803. /*
  1804. * This routine is called by tty_hangup() when a hangup is signaled.
  1805. */
  1806. void mxser_hangup(struct tty_struct *tty)
  1807. {
  1808. struct mxser_port *info = tty->driver_data;
  1809. mxser_flush_buffer(tty);
  1810. mxser_shutdown(info);
  1811. info->event = 0;
  1812. info->count = 0;
  1813. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1814. info->tty = NULL;
  1815. wake_up_interruptible(&info->open_wait);
  1816. }
  1817. /*
  1818. * mxser_rs_break() --- routine which turns the break handling on or off
  1819. */
  1820. static void mxser_rs_break(struct tty_struct *tty, int break_state)
  1821. {
  1822. struct mxser_port *info = tty->driver_data;
  1823. unsigned long flags;
  1824. spin_lock_irqsave(&info->slock, flags);
  1825. if (break_state == -1)
  1826. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1827. info->ioaddr + UART_LCR);
  1828. else
  1829. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1830. info->ioaddr + UART_LCR);
  1831. spin_unlock_irqrestore(&info->slock, flags);
  1832. }
  1833. static void mxser_receive_chars(struct mxser_port *port, int *status)
  1834. {
  1835. struct tty_struct *tty = port->tty;
  1836. unsigned char ch, gdl;
  1837. int ignored = 0;
  1838. int cnt = 0;
  1839. int recv_room;
  1840. int max = 256;
  1841. unsigned long flags;
  1842. spin_lock_irqsave(&port->slock, flags);
  1843. recv_room = tty->receive_room;
  1844. if ((recv_room == 0) && (!port->ldisc_stop_rx))
  1845. mxser_stoprx(tty);
  1846. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1847. if (*status & UART_LSR_SPECIAL)
  1848. goto intr_old;
  1849. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1850. (*status & MOXA_MUST_LSR_RERR))
  1851. goto intr_old;
  1852. if (*status & MOXA_MUST_LSR_RERR)
  1853. goto intr_old;
  1854. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1855. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1856. gdl &= MOXA_MUST_GDL_MASK;
  1857. if (gdl >= recv_room) {
  1858. if (!port->ldisc_stop_rx)
  1859. mxser_stoprx(tty);
  1860. }
  1861. while (gdl--) {
  1862. ch = inb(port->ioaddr + UART_RX);
  1863. tty_insert_flip_char(tty, ch, 0);
  1864. cnt++;
  1865. }
  1866. goto end_intr;
  1867. }
  1868. intr_old:
  1869. do {
  1870. if (max-- < 0)
  1871. break;
  1872. ch = inb(port->ioaddr + UART_RX);
  1873. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1874. outb(0x23, port->ioaddr + UART_FCR);
  1875. *status &= port->read_status_mask;
  1876. if (*status & port->ignore_status_mask) {
  1877. if (++ignored > 100)
  1878. break;
  1879. } else {
  1880. char flag = 0;
  1881. if (*status & UART_LSR_SPECIAL) {
  1882. if (*status & UART_LSR_BI) {
  1883. flag = TTY_BREAK;
  1884. port->icount.brk++;
  1885. if (port->flags & ASYNC_SAK)
  1886. do_SAK(tty);
  1887. } else if (*status & UART_LSR_PE) {
  1888. flag = TTY_PARITY;
  1889. port->icount.parity++;
  1890. } else if (*status & UART_LSR_FE) {
  1891. flag = TTY_FRAME;
  1892. port->icount.frame++;
  1893. } else if (*status & UART_LSR_OE) {
  1894. flag = TTY_OVERRUN;
  1895. port->icount.overrun++;
  1896. }
  1897. }
  1898. tty_insert_flip_char(tty, ch, flag);
  1899. cnt++;
  1900. if (cnt >= recv_room) {
  1901. if (!port->ldisc_stop_rx)
  1902. mxser_stoprx(tty);
  1903. break;
  1904. }
  1905. }
  1906. if (port->board->chip_flag)
  1907. break;
  1908. *status = inb(port->ioaddr + UART_LSR);
  1909. } while (*status & UART_LSR_DR);
  1910. end_intr:
  1911. mxvar_log.rxcnt[port->tty->index] += cnt;
  1912. port->mon_data.rxcnt += cnt;
  1913. port->mon_data.up_rxcnt += cnt;
  1914. spin_unlock_irqrestore(&port->slock, flags);
  1915. tty_flip_buffer_push(tty);
  1916. }
  1917. static void mxser_transmit_chars(struct mxser_port *port)
  1918. {
  1919. int count, cnt;
  1920. unsigned long flags;
  1921. spin_lock_irqsave(&port->slock, flags);
  1922. if (port->x_char) {
  1923. outb(port->x_char, port->ioaddr + UART_TX);
  1924. port->x_char = 0;
  1925. mxvar_log.txcnt[port->tty->index]++;
  1926. port->mon_data.txcnt++;
  1927. port->mon_data.up_txcnt++;
  1928. port->icount.tx++;
  1929. goto unlock;
  1930. }
  1931. if (port->xmit_buf == 0)
  1932. goto unlock;
  1933. if ((port->xmit_cnt <= 0) || port->tty->stopped ||
  1934. (port->tty->hw_stopped &&
  1935. (port->type != PORT_16550A) &&
  1936. (!port->board->chip_flag))) {
  1937. port->IER &= ~UART_IER_THRI;
  1938. outb(port->IER, port->ioaddr + UART_IER);
  1939. goto unlock;
  1940. }
  1941. cnt = port->xmit_cnt;
  1942. count = port->xmit_fifo_size;
  1943. do {
  1944. outb(port->xmit_buf[port->xmit_tail++],
  1945. port->ioaddr + UART_TX);
  1946. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1947. if (--port->xmit_cnt <= 0)
  1948. break;
  1949. } while (--count > 0);
  1950. mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt);
  1951. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1952. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1953. port->icount.tx += (cnt - port->xmit_cnt);
  1954. if (port->xmit_cnt < WAKEUP_CHARS) {
  1955. set_bit(MXSER_EVENT_TXLOW, &port->event);
  1956. schedule_work(&port->tqueue);
  1957. }
  1958. if (port->xmit_cnt <= 0) {
  1959. port->IER &= ~UART_IER_THRI;
  1960. outb(port->IER, port->ioaddr + UART_IER);
  1961. }
  1962. unlock:
  1963. spin_unlock_irqrestore(&port->slock, flags);
  1964. }
  1965. /*
  1966. * This is the serial driver's generic interrupt routine
  1967. */
  1968. static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1969. {
  1970. int status, iir, i;
  1971. struct mxser_board *brd = NULL;
  1972. struct mxser_port *port;
  1973. int max, irqbits, bits, msr;
  1974. int pass_counter = 0;
  1975. unsigned int int_cnt;
  1976. int handled = IRQ_NONE;
  1977. for (i = 0; i < MXSER_BOARDS; i++)
  1978. if (dev_id == &mxser_boards[i]) {
  1979. brd = dev_id;
  1980. break;
  1981. }
  1982. if (i == MXSER_BOARDS)
  1983. goto irq_stop;
  1984. if (brd == NULL)
  1985. goto irq_stop;
  1986. max = brd->info->nports;
  1987. while (1) {
  1988. irqbits = inb(brd->vector) & brd->vector_mask;
  1989. if (irqbits == brd->vector_mask)
  1990. break;
  1991. handled = IRQ_HANDLED;
  1992. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1993. if (irqbits == brd->vector_mask)
  1994. break;
  1995. if (bits & irqbits)
  1996. continue;
  1997. port = &brd->ports[i];
  1998. int_cnt = 0;
  1999. do {
  2000. iir = inb(port->ioaddr + UART_IIR);
  2001. if (iir & UART_IIR_NO_INT)
  2002. break;
  2003. iir &= MOXA_MUST_IIR_MASK;
  2004. if (!port->tty) {
  2005. status = inb(port->ioaddr + UART_LSR);
  2006. outb(0x27, port->ioaddr + UART_FCR);
  2007. inb(port->ioaddr + UART_MSR);
  2008. break;
  2009. }
  2010. status = inb(port->ioaddr + UART_LSR);
  2011. if (status & UART_LSR_PE)
  2012. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2013. if (status & UART_LSR_FE)
  2014. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2015. if (status & UART_LSR_OE)
  2016. port->err_shadow |=
  2017. NPPI_NOTIFY_HW_OVERRUN;
  2018. if (status & UART_LSR_BI)
  2019. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2020. if (port->board->chip_flag) {
  2021. if (iir == MOXA_MUST_IIR_GDA ||
  2022. iir == MOXA_MUST_IIR_RDA ||
  2023. iir == MOXA_MUST_IIR_RTO ||
  2024. iir == MOXA_MUST_IIR_LSR)
  2025. mxser_receive_chars(port,
  2026. &status);
  2027. } else {
  2028. status &= port->read_status_mask;
  2029. if (status & UART_LSR_DR)
  2030. mxser_receive_chars(port,
  2031. &status);
  2032. }
  2033. msr = inb(port->ioaddr + UART_MSR);
  2034. if (msr & UART_MSR_ANY_DELTA)
  2035. mxser_check_modem_status(port, msr);
  2036. if (port->board->chip_flag) {
  2037. if (iir == 0x02 && (status &
  2038. UART_LSR_THRE))
  2039. mxser_transmit_chars(port);
  2040. } else {
  2041. if (status & UART_LSR_THRE)
  2042. mxser_transmit_chars(port);
  2043. }
  2044. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2045. }
  2046. if (pass_counter++ > MXSER_ISR_PASS_LIMIT)
  2047. break; /* Prevent infinite loops */
  2048. }
  2049. irq_stop:
  2050. return handled;
  2051. }
  2052. static const struct tty_operations mxser_ops = {
  2053. .open = mxser_open,
  2054. .close = mxser_close,
  2055. .write = mxser_write,
  2056. .put_char = mxser_put_char,
  2057. .flush_chars = mxser_flush_chars,
  2058. .write_room = mxser_write_room,
  2059. .chars_in_buffer = mxser_chars_in_buffer,
  2060. .flush_buffer = mxser_flush_buffer,
  2061. .ioctl = mxser_ioctl,
  2062. .throttle = mxser_throttle,
  2063. .unthrottle = mxser_unthrottle,
  2064. .set_termios = mxser_set_termios,
  2065. .stop = mxser_stop,
  2066. .start = mxser_start,
  2067. .hangup = mxser_hangup,
  2068. .break_ctl = mxser_rs_break,
  2069. .wait_until_sent = mxser_wait_until_sent,
  2070. .tiocmget = mxser_tiocmget,
  2071. .tiocmset = mxser_tiocmset,
  2072. };
  2073. /*
  2074. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2075. */
  2076. static void mxser_release_res(struct mxser_board *brd, unsigned int irq)
  2077. {
  2078. struct pci_dev *pdev = brd->pdev;
  2079. if (irq)
  2080. free_irq(brd->irq, brd);
  2081. if (pdev != NULL) { /* PCI */
  2082. pci_release_region(pdev, 2);
  2083. pci_release_region(pdev, 3);
  2084. pci_dev_put(pdev);
  2085. } else {
  2086. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2087. release_region(brd->vector, 1);
  2088. }
  2089. }
  2090. static int __devinit mxser_initbrd(struct mxser_board *brd)
  2091. {
  2092. struct mxser_port *info;
  2093. unsigned int i;
  2094. int retval;
  2095. printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
  2096. for (i = 0; i < brd->info->nports; i++) {
  2097. info = &brd->ports[i];
  2098. info->board = brd;
  2099. info->stop_rx = 0;
  2100. info->ldisc_stop_rx = 0;
  2101. /* Enhance mode enabled here */
  2102. if (brd->chip_flag != MOXA_OTHER_UART)
  2103. ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr);
  2104. info->flags = ASYNC_SHARE_IRQ;
  2105. info->type = brd->uart_type;
  2106. process_txrx_fifo(info);
  2107. info->custom_divisor = info->baud_base * 16;
  2108. info->close_delay = 5 * HZ / 10;
  2109. info->closing_wait = 30 * HZ;
  2110. INIT_WORK(&info->tqueue, mxser_do_softint, info);
  2111. info->normal_termios = mxvar_sdriver->init_termios;
  2112. init_waitqueue_head(&info->open_wait);
  2113. init_waitqueue_head(&info->close_wait);
  2114. init_waitqueue_head(&info->delta_msr_wait);
  2115. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2116. info->err_shadow = 0;
  2117. spin_lock_init(&info->slock);
  2118. /* before set INT ISR, disable all int */
  2119. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2120. info->ioaddr + UART_IER);
  2121. }
  2122. /*
  2123. * Allocate the IRQ if necessary
  2124. */
  2125. retval = request_irq(brd->irq, mxser_interrupt,
  2126. (brd->ports[0].flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED :
  2127. IRQF_DISABLED, "mxser", brd);
  2128. if (retval) {
  2129. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2130. "conflict with another device.\n",
  2131. brd->info->name, brd->irq);
  2132. /* We hold resources, we need to release them. */
  2133. mxser_release_res(brd, 0);
  2134. return retval;
  2135. }
  2136. return 0;
  2137. }
  2138. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2139. {
  2140. int id, i, bits;
  2141. unsigned short regs[16], irq;
  2142. unsigned char scratch, scratch2;
  2143. brd->chip_flag = MOXA_OTHER_UART;
  2144. id = mxser_read_register(cap, regs);
  2145. switch (id) {
  2146. case C168_ASIC_ID:
  2147. brd->info = &mxser_cards[0];
  2148. break;
  2149. case C104_ASIC_ID:
  2150. brd->info = &mxser_cards[1];
  2151. break;
  2152. case CI104J_ASIC_ID:
  2153. brd->info = &mxser_cards[2];
  2154. break;
  2155. case C102_ASIC_ID:
  2156. brd->info = &mxser_cards[5];
  2157. break;
  2158. case CI132_ASIC_ID:
  2159. brd->info = &mxser_cards[6];
  2160. break;
  2161. case CI134_ASIC_ID:
  2162. brd->info = &mxser_cards[7];
  2163. break;
  2164. default:
  2165. return 0;
  2166. }
  2167. irq = 0;
  2168. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2169. Flag-hack checks if configuration should be read as 2-port here. */
  2170. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2171. irq = regs[9] & 0xF000;
  2172. irq = irq | (irq >> 4);
  2173. if (irq != (regs[9] & 0xFF00))
  2174. return MXSER_ERR_IRQ_CONFLIT;
  2175. } else if (brd->info->nports == 4) {
  2176. irq = regs[9] & 0xF000;
  2177. irq = irq | (irq >> 4);
  2178. irq = irq | (irq >> 8);
  2179. if (irq != regs[9])
  2180. return MXSER_ERR_IRQ_CONFLIT;
  2181. } else if (brd->info->nports == 8) {
  2182. irq = regs[9] & 0xF000;
  2183. irq = irq | (irq >> 4);
  2184. irq = irq | (irq >> 8);
  2185. if ((irq != regs[9]) || (irq != regs[10]))
  2186. return MXSER_ERR_IRQ_CONFLIT;
  2187. }
  2188. if (!irq)
  2189. return MXSER_ERR_IRQ;
  2190. brd->irq = ((int)(irq & 0xF000) >> 12);
  2191. for (i = 0; i < 8; i++)
  2192. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2193. if ((regs[12] & 0x80) == 0)
  2194. return MXSER_ERR_VECTOR;
  2195. brd->vector = (int)regs[11]; /* interrupt vector */
  2196. if (id == 1)
  2197. brd->vector_mask = 0x00FF;
  2198. else
  2199. brd->vector_mask = 0x000F;
  2200. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2201. if (regs[12] & bits) {
  2202. brd->ports[i].baud_base = 921600;
  2203. brd->ports[i].max_baud = 921600;
  2204. } else {
  2205. brd->ports[i].baud_base = 115200;
  2206. brd->ports[i].max_baud = 115200;
  2207. }
  2208. }
  2209. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2210. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2211. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2212. outb(scratch2, cap + UART_LCR);
  2213. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2214. scratch = inb(cap + UART_IIR);
  2215. if (scratch & 0xC0)
  2216. brd->uart_type = PORT_16550A;
  2217. else
  2218. brd->uart_type = PORT_16450;
  2219. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2220. "mxser(IO)"))
  2221. return MXSER_ERR_IOADDR;
  2222. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2223. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2224. return MXSER_ERR_VECTOR;
  2225. }
  2226. return brd->info->nports;
  2227. }
  2228. static int __init mxser_get_PCI_conf(const struct pci_device_id *ent,
  2229. struct mxser_board *brd, struct pci_dev *pdev)
  2230. {
  2231. unsigned int i, j;
  2232. unsigned long ioaddress;
  2233. int retval;
  2234. /* io address */
  2235. brd->info = &mxser_cards[ent->driver_data];
  2236. ioaddress = pci_resource_start(pdev, 2);
  2237. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2238. if (retval)
  2239. goto err;
  2240. for (i = 0; i < brd->info->nports; i++)
  2241. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2242. /* vector */
  2243. ioaddress = pci_resource_start(pdev, 3);
  2244. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2245. if (retval)
  2246. goto err_relio;
  2247. brd->vector = ioaddress;
  2248. /* irq */
  2249. brd->irq = pdev->irq;
  2250. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2251. brd->uart_type = PORT_16550A;
  2252. brd->vector_mask = 0;
  2253. for (i = 0; i < brd->info->nports; i++) {
  2254. for (j = 0; j < UART_INFO_NUM; j++) {
  2255. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2256. brd->ports[i].max_baud =
  2257. Gpci_uart_info[j].max_baud;
  2258. /* exception....CP-102 */
  2259. if (brd->info->flags & MXSER_HIGHBAUD)
  2260. brd->ports[i].max_baud = 921600;
  2261. break;
  2262. }
  2263. }
  2264. }
  2265. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2266. for (i = 0; i < brd->info->nports; i++) {
  2267. if (i < 4)
  2268. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2269. else
  2270. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2271. }
  2272. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2273. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2274. }
  2275. for (i = 0; i < brd->info->nports; i++) {
  2276. brd->vector_mask |= (1 << i);
  2277. brd->ports[i].baud_base = 921600;
  2278. }
  2279. return 0;
  2280. err_relio:
  2281. pci_release_region(pdev, 2);
  2282. err:
  2283. return retval;
  2284. }
  2285. static int __init mxser_module_init(void)
  2286. {
  2287. struct pci_dev *pdev = NULL;
  2288. struct mxser_board *brd;
  2289. unsigned long cap;
  2290. unsigned int i, m, isaloop;
  2291. int retval, b, n;
  2292. pr_debug("Loading module mxser ...\n");
  2293. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2294. if (!mxvar_sdriver)
  2295. return -ENOMEM;
  2296. spin_lock_init(&gm_lock);
  2297. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2298. MXSER_VERSION);
  2299. /* Initialize the tty_driver structure */
  2300. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2301. mxvar_sdriver->name = "ttyM";
  2302. mxvar_sdriver->major = ttymajor;
  2303. mxvar_sdriver->minor_start = 0;
  2304. mxvar_sdriver->num = MXSER_PORTS + 1;
  2305. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2306. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2307. mxvar_sdriver->init_termios = tty_std_termios;
  2308. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2309. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2310. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2311. mxvar_sdriver->ttys = mxvar_tty;
  2312. mxvar_sdriver->termios = mxvar_termios;
  2313. mxvar_sdriver->termios_locked = mxvar_termios_locked;
  2314. retval = tty_register_driver(mxvar_sdriver);
  2315. if (retval) {
  2316. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2317. "tty driver !\n");
  2318. goto err_put;
  2319. }
  2320. mxvar_diagflag = 0;
  2321. m = 0;
  2322. /* Start finding ISA boards here */
  2323. for (isaloop = 0; isaloop < 2; isaloop++)
  2324. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  2325. if (!isaloop)
  2326. cap = mxserBoardCAP[b]; /* predefined */
  2327. else
  2328. cap = ioaddr[b]; /* module param */
  2329. if (!cap)
  2330. continue;
  2331. brd = &mxser_boards[m];
  2332. retval = mxser_get_ISA_conf(cap, brd);
  2333. if (retval != 0)
  2334. printk(KERN_INFO "Found MOXA %s board "
  2335. "(CAP=0x%x)\n",
  2336. brd->info->name, ioaddr[b]);
  2337. if (retval <= 0) {
  2338. if (retval == MXSER_ERR_IRQ)
  2339. printk(KERN_ERR "Invalid interrupt "
  2340. "number, board not "
  2341. "configured\n");
  2342. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  2343. printk(KERN_ERR "Invalid interrupt "
  2344. "number, board not "
  2345. "configured\n");
  2346. else if (retval == MXSER_ERR_VECTOR)
  2347. printk(KERN_ERR "Invalid interrupt "
  2348. "vector, board not "
  2349. "configured\n");
  2350. else if (retval == MXSER_ERR_IOADDR)
  2351. printk(KERN_ERR "Invalid I/O address, "
  2352. "board not configured\n");
  2353. continue;
  2354. }
  2355. brd->pdev = NULL;
  2356. /* mxser_initbrd will hook ISR. */
  2357. if (mxser_initbrd(brd) < 0)
  2358. continue;
  2359. for (i = 0; i < brd->info->nports; i++)
  2360. tty_register_device(mxvar_sdriver,
  2361. m * MXSER_PORTS_PER_BOARD + i, NULL);
  2362. m++;
  2363. }
  2364. /* start finding PCI board here */
  2365. n = ARRAY_SIZE(mxser_pcibrds) - 1;
  2366. b = 0;
  2367. while (b < n) {
  2368. pdev = pci_get_device(mxser_pcibrds[b].vendor,
  2369. mxser_pcibrds[b].device, pdev);
  2370. if (pdev == NULL) {
  2371. b++;
  2372. continue;
  2373. }
  2374. printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
  2375. mxser_cards[mxser_pcibrds[b].driver_data].name,
  2376. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2377. if (m >= MXSER_BOARDS)
  2378. printk(KERN_ERR
  2379. "Too many Smartio/Industio family boards find "
  2380. "(maximum %d), board not configured\n",
  2381. MXSER_BOARDS);
  2382. else {
  2383. if (pci_enable_device(pdev)) {
  2384. printk(KERN_ERR "Moxa SmartI/O PCI enable "
  2385. "fail !\n");
  2386. continue;
  2387. }
  2388. brd = &mxser_boards[m];
  2389. brd->pdev = pdev;
  2390. retval = mxser_get_PCI_conf(&mxser_pcibrds[b],
  2391. brd, pdev);
  2392. if (retval < 0) {
  2393. if (retval == MXSER_ERR_IRQ)
  2394. printk(KERN_ERR
  2395. "Invalid interrupt number, "
  2396. "board not configured\n");
  2397. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  2398. printk(KERN_ERR
  2399. "Invalid interrupt number, "
  2400. "board not configured\n");
  2401. else if (retval == MXSER_ERR_VECTOR)
  2402. printk(KERN_ERR
  2403. "Invalid interrupt vector, "
  2404. "board not configured\n");
  2405. else if (retval == MXSER_ERR_IOADDR)
  2406. printk(KERN_ERR
  2407. "Invalid I/O address, "
  2408. "board not configured\n");
  2409. continue;
  2410. }
  2411. /* mxser_initbrd will hook ISR. */
  2412. if (mxser_initbrd(brd) < 0)
  2413. continue;
  2414. for (i = 0; i < brd->info->nports; i++)
  2415. tty_register_device(mxvar_sdriver,
  2416. m * MXSER_PORTS_PER_BOARD + i,
  2417. &pdev->dev);
  2418. m++;
  2419. /* Keep an extra reference if we succeeded. It will
  2420. be returned at unload time */
  2421. pci_dev_get(pdev);
  2422. }
  2423. }
  2424. if (!m) {
  2425. retval = -ENODEV;
  2426. goto err_unr;
  2427. }
  2428. pr_debug("Done.\n");
  2429. return 0;
  2430. err_unr:
  2431. tty_unregister_driver(mxvar_sdriver);
  2432. err_put:
  2433. put_tty_driver(mxvar_sdriver);
  2434. return retval;
  2435. }
  2436. static void __exit mxser_module_exit(void)
  2437. {
  2438. unsigned int i;
  2439. pr_debug("Unloading module mxser ...\n");
  2440. for (i = 0; i < MXSER_PORTS; i++)
  2441. tty_unregister_device(mxvar_sdriver, i);
  2442. tty_unregister_driver(mxvar_sdriver);
  2443. put_tty_driver(mxvar_sdriver);
  2444. for (i = 0; i < MXSER_BOARDS; i++)
  2445. if (mxser_boards[i].info != NULL)
  2446. mxser_release_res(&mxser_boards[i], 1);
  2447. pr_debug("Done.\n");
  2448. }
  2449. module_init(mxser_module_init);
  2450. module_exit(mxser_module_exit);