tridentfb.c 35 KB

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  1. /*
  2. * Frame buffer driver for Trident Blade and Image series
  3. *
  4. * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro>
  5. *
  6. *
  7. * CREDITS:(in order of appearance)
  8. * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
  9. * Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10. * much inspired by the XFree86 4.x Trident driver sources
  11. * by Alan Hourihane the FreeVGA project
  12. * Francesco Salvestrini <salvestrini@users.sf.net> XP support,
  13. * code, suggestions
  14. * TODO:
  15. * timing value tweaking so it looks good on every monitor in every mode
  16. * TGUI acceleration
  17. */
  18. #include <linux/module.h>
  19. #include <linux/fb.h>
  20. #include <linux/init.h>
  21. #include <linux/pci.h>
  22. #include <linux/delay.h>
  23. #include <video/trident.h>
  24. #define VERSION "0.7.9-NEWAPI"
  25. struct tridentfb_par {
  26. void __iomem *io_virt; /* iospace virtual memory address */
  27. u32 pseudo_pal[16];
  28. int chip_id;
  29. int flatpanel;
  30. };
  31. static unsigned char eng_oper; /* engine operation... */
  32. static struct fb_ops tridentfb_ops;
  33. static struct fb_fix_screeninfo tridentfb_fix = {
  34. .id = "Trident",
  35. .type = FB_TYPE_PACKED_PIXELS,
  36. .ypanstep = 1,
  37. .visual = FB_VISUAL_PSEUDOCOLOR,
  38. .accel = FB_ACCEL_NONE,
  39. };
  40. /* defaults which are normally overriden by user values */
  41. /* video mode */
  42. static char *mode_option __devinitdata = "640x480";
  43. static int bpp __devinitdata = 8;
  44. static int noaccel __devinitdata;
  45. static int center;
  46. static int stretch;
  47. static int fp __devinitdata;
  48. static int crt __devinitdata;
  49. static int memsize __devinitdata;
  50. static int memdiff __devinitdata;
  51. static int nativex;
  52. module_param(mode_option, charp, 0);
  53. MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
  54. module_param_named(mode, mode_option, charp, 0);
  55. MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
  56. module_param(bpp, int, 0);
  57. module_param(center, int, 0);
  58. module_param(stretch, int, 0);
  59. module_param(noaccel, int, 0);
  60. module_param(memsize, int, 0);
  61. module_param(memdiff, int, 0);
  62. module_param(nativex, int, 0);
  63. module_param(fp, int, 0);
  64. MODULE_PARM_DESC(fp, "Define if flatpanel is connected");
  65. module_param(crt, int, 0);
  66. MODULE_PARM_DESC(crt, "Define if CRT is connected");
  67. static int is_blade(int id)
  68. {
  69. return (id == BLADE3D) ||
  70. (id == CYBERBLADEE4) ||
  71. (id == CYBERBLADEi7) ||
  72. (id == CYBERBLADEi7D) ||
  73. (id == CYBERBLADEi1) ||
  74. (id == CYBERBLADEi1D) ||
  75. (id == CYBERBLADEAi1) ||
  76. (id == CYBERBLADEAi1D);
  77. }
  78. static int is_xp(int id)
  79. {
  80. return (id == CYBERBLADEXPAi1) ||
  81. (id == CYBERBLADEXPm8) ||
  82. (id == CYBERBLADEXPm16);
  83. }
  84. static int is3Dchip(int id)
  85. {
  86. return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
  87. (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
  88. (id == CYBER9397) || (id == CYBER9397DVD) ||
  89. (id == CYBER9520) || (id == CYBER9525DVD) ||
  90. (id == IMAGE975) || (id == IMAGE985) ||
  91. (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
  92. (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
  93. (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
  94. (id == CYBERBLADEXPAi1));
  95. }
  96. static int iscyber(int id)
  97. {
  98. switch (id) {
  99. case CYBER9388:
  100. case CYBER9382:
  101. case CYBER9385:
  102. case CYBER9397:
  103. case CYBER9397DVD:
  104. case CYBER9520:
  105. case CYBER9525DVD:
  106. case CYBERBLADEE4:
  107. case CYBERBLADEi7D:
  108. case CYBERBLADEi1:
  109. case CYBERBLADEi1D:
  110. case CYBERBLADEAi1:
  111. case CYBERBLADEAi1D:
  112. case CYBERBLADEXPAi1:
  113. return 1;
  114. case CYBER9320:
  115. case TGUI9660:
  116. case IMAGE975:
  117. case IMAGE985:
  118. case BLADE3D:
  119. case CYBERBLADEi7: /* VIA MPV4 integrated version */
  120. default:
  121. /* case CYBERBLDAEXPm8: Strange */
  122. /* case CYBERBLDAEXPm16: Strange */
  123. return 0;
  124. }
  125. }
  126. #define CRT 0x3D0 /* CRTC registers offset for color display */
  127. static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
  128. {
  129. fb_writeb(val, p->io_virt + reg);
  130. }
  131. static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
  132. {
  133. return fb_readb(p->io_virt + reg);
  134. }
  135. static struct accel_switch {
  136. void (*init_accel) (struct tridentfb_par *, int, int);
  137. void (*wait_engine) (struct tridentfb_par *);
  138. void (*fill_rect)
  139. (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  140. void (*copy_rect)
  141. (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  142. } *acc;
  143. static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
  144. {
  145. fb_writel(v, par->io_virt + r);
  146. }
  147. static inline u32 readmmr(struct tridentfb_par *par, u16 r)
  148. {
  149. return fb_readl(par->io_virt + r);
  150. }
  151. /*
  152. * Blade specific acceleration.
  153. */
  154. #define point(x, y) ((y) << 16 | (x))
  155. #define STA 0x2120
  156. #define CMD 0x2144
  157. #define ROP 0x2148
  158. #define CLR 0x2160
  159. #define SR1 0x2100
  160. #define SR2 0x2104
  161. #define DR1 0x2108
  162. #define DR2 0x210C
  163. #define ROP_S 0xCC
  164. static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
  165. {
  166. int v1 = (pitch >> 3) << 20;
  167. int tmp = 0, v2;
  168. switch (bpp) {
  169. case 8:
  170. tmp = 0;
  171. break;
  172. case 15:
  173. tmp = 5;
  174. break;
  175. case 16:
  176. tmp = 1;
  177. break;
  178. case 24:
  179. case 32:
  180. tmp = 2;
  181. break;
  182. }
  183. v2 = v1 | (tmp << 29);
  184. writemmr(par, 0x21C0, v2);
  185. writemmr(par, 0x21C4, v2);
  186. writemmr(par, 0x21B8, v2);
  187. writemmr(par, 0x21BC, v2);
  188. writemmr(par, 0x21D0, v1);
  189. writemmr(par, 0x21D4, v1);
  190. writemmr(par, 0x21C8, v1);
  191. writemmr(par, 0x21CC, v1);
  192. writemmr(par, 0x216C, 0);
  193. }
  194. static void blade_wait_engine(struct tridentfb_par *par)
  195. {
  196. while (readmmr(par, STA) & 0xFA800000) ;
  197. }
  198. static void blade_fill_rect(struct tridentfb_par *par,
  199. u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
  200. {
  201. writemmr(par, CLR, c);
  202. writemmr(par, ROP, rop ? 0x66 : ROP_S);
  203. writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
  204. writemmr(par, DR1, point(x, y));
  205. writemmr(par, DR2, point(x + w - 1, y + h - 1));
  206. }
  207. static void blade_copy_rect(struct tridentfb_par *par,
  208. u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
  209. {
  210. u32 s1, s2, d1, d2;
  211. int direction = 2;
  212. s1 = point(x1, y1);
  213. s2 = point(x1 + w - 1, y1 + h - 1);
  214. d1 = point(x2, y2);
  215. d2 = point(x2 + w - 1, y2 + h - 1);
  216. if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
  217. direction = 0;
  218. writemmr(par, ROP, ROP_S);
  219. writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
  220. writemmr(par, SR1, direction ? s2 : s1);
  221. writemmr(par, SR2, direction ? s1 : s2);
  222. writemmr(par, DR1, direction ? d2 : d1);
  223. writemmr(par, DR2, direction ? d1 : d2);
  224. }
  225. static struct accel_switch accel_blade = {
  226. blade_init_accel,
  227. blade_wait_engine,
  228. blade_fill_rect,
  229. blade_copy_rect,
  230. };
  231. /*
  232. * BladeXP specific acceleration functions
  233. */
  234. #define ROP_P 0xF0
  235. #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff))
  236. static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
  237. {
  238. int tmp = 0, v1;
  239. unsigned char x = 0;
  240. switch (bpp) {
  241. case 8:
  242. x = 0;
  243. break;
  244. case 16:
  245. x = 1;
  246. break;
  247. case 24:
  248. x = 3;
  249. break;
  250. case 32:
  251. x = 2;
  252. break;
  253. }
  254. switch (pitch << (bpp >> 3)) {
  255. case 8192:
  256. case 512:
  257. x |= 0x00;
  258. break;
  259. case 1024:
  260. x |= 0x04;
  261. break;
  262. case 2048:
  263. x |= 0x08;
  264. break;
  265. case 4096:
  266. x |= 0x0C;
  267. break;
  268. }
  269. t_outb(par, x, 0x2125);
  270. eng_oper = x | 0x40;
  271. switch (bpp) {
  272. case 8:
  273. tmp = 18;
  274. break;
  275. case 15:
  276. case 16:
  277. tmp = 19;
  278. break;
  279. case 24:
  280. case 32:
  281. tmp = 20;
  282. break;
  283. }
  284. v1 = pitch << tmp;
  285. writemmr(par, 0x2154, v1);
  286. writemmr(par, 0x2150, v1);
  287. t_outb(par, 3, 0x2126);
  288. }
  289. static void xp_wait_engine(struct tridentfb_par *par)
  290. {
  291. int busy;
  292. int count, timeout;
  293. count = 0;
  294. timeout = 0;
  295. for (;;) {
  296. busy = t_inb(par, STA) & 0x80;
  297. if (busy != 0x80)
  298. return;
  299. count++;
  300. if (count == 10000000) {
  301. /* Timeout */
  302. count = 9990000;
  303. timeout++;
  304. if (timeout == 8) {
  305. /* Reset engine */
  306. t_outb(par, 0x00, 0x2120);
  307. return;
  308. }
  309. }
  310. }
  311. }
  312. static void xp_fill_rect(struct tridentfb_par *par,
  313. u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
  314. {
  315. writemmr(par, 0x2127, ROP_P);
  316. writemmr(par, 0x2158, c);
  317. writemmr(par, 0x2128, 0x4000);
  318. writemmr(par, 0x2140, masked_point(h, w));
  319. writemmr(par, 0x2138, masked_point(y, x));
  320. t_outb(par, 0x01, 0x2124);
  321. t_outb(par, eng_oper, 0x2125);
  322. }
  323. static void xp_copy_rect(struct tridentfb_par *par,
  324. u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
  325. {
  326. int direction;
  327. u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
  328. direction = 0x0004;
  329. if ((x1 < x2) && (y1 == y2)) {
  330. direction |= 0x0200;
  331. x1_tmp = x1 + w - 1;
  332. x2_tmp = x2 + w - 1;
  333. } else {
  334. x1_tmp = x1;
  335. x2_tmp = x2;
  336. }
  337. if (y1 < y2) {
  338. direction |= 0x0100;
  339. y1_tmp = y1 + h - 1;
  340. y2_tmp = y2 + h - 1;
  341. } else {
  342. y1_tmp = y1;
  343. y2_tmp = y2;
  344. }
  345. writemmr(par, 0x2128, direction);
  346. t_outb(par, ROP_S, 0x2127);
  347. writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp));
  348. writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp));
  349. writemmr(par, 0x2140, masked_point(h, w));
  350. t_outb(par, 0x01, 0x2124);
  351. }
  352. static struct accel_switch accel_xp = {
  353. xp_init_accel,
  354. xp_wait_engine,
  355. xp_fill_rect,
  356. xp_copy_rect,
  357. };
  358. /*
  359. * Image specific acceleration functions
  360. */
  361. static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
  362. {
  363. int tmp = 0;
  364. switch (bpp) {
  365. case 8:
  366. tmp = 0;
  367. break;
  368. case 15:
  369. tmp = 5;
  370. break;
  371. case 16:
  372. tmp = 1;
  373. break;
  374. case 24:
  375. case 32:
  376. tmp = 2;
  377. break;
  378. }
  379. writemmr(par, 0x2120, 0xF0000000);
  380. writemmr(par, 0x2120, 0x40000000 | tmp);
  381. writemmr(par, 0x2120, 0x80000000);
  382. writemmr(par, 0x2144, 0x00000000);
  383. writemmr(par, 0x2148, 0x00000000);
  384. writemmr(par, 0x2150, 0x00000000);
  385. writemmr(par, 0x2154, 0x00000000);
  386. writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
  387. writemmr(par, 0x216C, 0x00000000);
  388. writemmr(par, 0x2170, 0x00000000);
  389. writemmr(par, 0x217C, 0x00000000);
  390. writemmr(par, 0x2120, 0x10000000);
  391. writemmr(par, 0x2130, (2047 << 16) | 2047);
  392. }
  393. static void image_wait_engine(struct tridentfb_par *par)
  394. {
  395. while (readmmr(par, 0x2164) & 0xF0000000) ;
  396. }
  397. static void image_fill_rect(struct tridentfb_par *par,
  398. u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
  399. {
  400. writemmr(par, 0x2120, 0x80000000);
  401. writemmr(par, 0x2120, 0x90000000 | ROP_S);
  402. writemmr(par, 0x2144, c);
  403. writemmr(par, DR1, point(x, y));
  404. writemmr(par, DR2, point(x + w - 1, y + h - 1));
  405. writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
  406. }
  407. static void image_copy_rect(struct tridentfb_par *par,
  408. u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
  409. {
  410. u32 s1, s2, d1, d2;
  411. int direction = 2;
  412. s1 = point(x1, y1);
  413. s2 = point(x1 + w - 1, y1 + h - 1);
  414. d1 = point(x2, y2);
  415. d2 = point(x2 + w - 1, y2 + h - 1);
  416. if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
  417. direction = 0;
  418. writemmr(par, 0x2120, 0x80000000);
  419. writemmr(par, 0x2120, 0x90000000 | ROP_S);
  420. writemmr(par, SR1, direction ? s2 : s1);
  421. writemmr(par, SR2, direction ? s1 : s2);
  422. writemmr(par, DR1, direction ? d2 : d1);
  423. writemmr(par, DR2, direction ? d1 : d2);
  424. writemmr(par, 0x2124,
  425. 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
  426. }
  427. static struct accel_switch accel_image = {
  428. image_init_accel,
  429. image_wait_engine,
  430. image_fill_rect,
  431. image_copy_rect,
  432. };
  433. /*
  434. * Accel functions called by the upper layers
  435. */
  436. #ifdef CONFIG_FB_TRIDENT_ACCEL
  437. static void tridentfb_fillrect(struct fb_info *info,
  438. const struct fb_fillrect *fr)
  439. {
  440. struct tridentfb_par *par = info->par;
  441. int bpp = info->var.bits_per_pixel;
  442. int col = 0;
  443. switch (bpp) {
  444. default:
  445. case 8:
  446. col |= fr->color;
  447. col |= col << 8;
  448. col |= col << 16;
  449. break;
  450. case 16:
  451. col = ((u32 *)(info->pseudo_palette))[fr->color];
  452. break;
  453. case 32:
  454. col = ((u32 *)(info->pseudo_palette))[fr->color];
  455. break;
  456. }
  457. acc->fill_rect(par, fr->dx, fr->dy, fr->width,
  458. fr->height, col, fr->rop);
  459. acc->wait_engine(par);
  460. }
  461. static void tridentfb_copyarea(struct fb_info *info,
  462. const struct fb_copyarea *ca)
  463. {
  464. struct tridentfb_par *par = info->par;
  465. acc->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
  466. ca->width, ca->height);
  467. acc->wait_engine(par);
  468. }
  469. #else /* !CONFIG_FB_TRIDENT_ACCEL */
  470. #define tridentfb_fillrect cfb_fillrect
  471. #define tridentfb_copyarea cfb_copyarea
  472. #endif /* CONFIG_FB_TRIDENT_ACCEL */
  473. /*
  474. * Hardware access functions
  475. */
  476. static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
  477. {
  478. writeb(reg, par->io_virt + CRT + 4);
  479. return readb(par->io_virt + CRT + 5);
  480. }
  481. static inline void write3X4(struct tridentfb_par *par, int reg,
  482. unsigned char val)
  483. {
  484. writeb(reg, par->io_virt + CRT + 4);
  485. writeb(val, par->io_virt + CRT + 5);
  486. }
  487. static inline unsigned char read3C4(struct tridentfb_par *par, int reg)
  488. {
  489. t_outb(par, reg, 0x3C4);
  490. return t_inb(par, 0x3C5);
  491. }
  492. static inline void write3C4(struct tridentfb_par *par, int reg,
  493. unsigned char val)
  494. {
  495. t_outb(par, reg, 0x3C4);
  496. t_outb(par, val, 0x3C5);
  497. }
  498. static inline unsigned char read3CE(struct tridentfb_par *par, int reg)
  499. {
  500. t_outb(par, reg, 0x3CE);
  501. return t_inb(par, 0x3CF);
  502. }
  503. static inline void writeAttr(struct tridentfb_par *par, int reg,
  504. unsigned char val)
  505. {
  506. fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
  507. t_outb(par, reg, 0x3C0);
  508. t_outb(par, val, 0x3C0);
  509. }
  510. static inline void write3CE(struct tridentfb_par *par, int reg,
  511. unsigned char val)
  512. {
  513. t_outb(par, reg, 0x3CE);
  514. t_outb(par, val, 0x3CF);
  515. }
  516. static void enable_mmio(void)
  517. {
  518. /* Goto New Mode */
  519. outb(0x0B, 0x3C4);
  520. inb(0x3C5);
  521. /* Unprotect registers */
  522. outb(NewMode1, 0x3C4);
  523. outb(0x80, 0x3C5);
  524. /* Enable MMIO */
  525. outb(PCIReg, 0x3D4);
  526. outb(inb(0x3D5) | 0x01, 0x3D5);
  527. }
  528. static void disable_mmio(struct tridentfb_par *par)
  529. {
  530. /* Goto New Mode */
  531. t_outb(par, 0x0B, 0x3C4);
  532. t_inb(par, 0x3C5);
  533. /* Unprotect registers */
  534. t_outb(par, NewMode1, 0x3C4);
  535. t_outb(par, 0x80, 0x3C5);
  536. /* Disable MMIO */
  537. t_outb(par, PCIReg, 0x3D4);
  538. t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
  539. }
  540. static void crtc_unlock(struct tridentfb_par *par)
  541. {
  542. write3X4(par, CRTVSyncEnd, read3X4(par, CRTVSyncEnd) & 0x7F);
  543. }
  544. /* Return flat panel's maximum x resolution */
  545. static int __devinit get_nativex(struct tridentfb_par *par)
  546. {
  547. int x, y, tmp;
  548. if (nativex)
  549. return nativex;
  550. tmp = (read3CE(par, VertStretch) >> 4) & 3;
  551. switch (tmp) {
  552. case 0:
  553. x = 1280; y = 1024;
  554. break;
  555. case 2:
  556. x = 1024; y = 768;
  557. break;
  558. case 3:
  559. x = 800; y = 600;
  560. break;
  561. case 4:
  562. x = 1400; y = 1050;
  563. break;
  564. case 1:
  565. default:
  566. x = 640; y = 480;
  567. break;
  568. }
  569. output("%dx%d flat panel found\n", x, y);
  570. return x;
  571. }
  572. /* Set pitch */
  573. static void set_lwidth(struct tridentfb_par *par, int width)
  574. {
  575. write3X4(par, Offset, width & 0xFF);
  576. write3X4(par, AddColReg,
  577. (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
  578. }
  579. /* For resolutions smaller than FP resolution stretch */
  580. static void screen_stretch(struct tridentfb_par *par)
  581. {
  582. if (par->chip_id != CYBERBLADEXPAi1)
  583. write3CE(par, BiosReg, 0);
  584. else
  585. write3CE(par, BiosReg, 8);
  586. write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
  587. write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
  588. }
  589. /* For resolutions smaller than FP resolution center */
  590. static void screen_center(struct tridentfb_par *par)
  591. {
  592. write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
  593. write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
  594. }
  595. /* Address of first shown pixel in display memory */
  596. static void set_screen_start(struct tridentfb_par *par, int base)
  597. {
  598. u8 tmp;
  599. write3X4(par, StartAddrLow, base & 0xFF);
  600. write3X4(par, StartAddrHigh, (base & 0xFF00) >> 8);
  601. tmp = read3X4(par, CRTCModuleTest) & 0xDF;
  602. write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
  603. tmp = read3X4(par, CRTHiOrd) & 0xF8;
  604. write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
  605. }
  606. /* Set dotclock frequency */
  607. static void set_vclk(struct tridentfb_par *par, unsigned long freq)
  608. {
  609. int m, n, k;
  610. unsigned long f, fi, d, di;
  611. unsigned char lo = 0, hi = 0;
  612. d = 20000;
  613. for (k = 2; k >= 0; k--)
  614. for (m = 0; m < 63; m++)
  615. for (n = 0; n < 128; n++) {
  616. fi = ((14318l * (n + 8)) / (m + 2)) >> k;
  617. if ((di = abs(fi - freq)) < d) {
  618. d = di;
  619. f = fi;
  620. lo = n;
  621. hi = (k << 6) | m;
  622. }
  623. if (fi > freq)
  624. break;
  625. }
  626. if (is3Dchip(par->chip_id)) {
  627. write3C4(par, ClockHigh, hi);
  628. write3C4(par, ClockLow, lo);
  629. } else {
  630. outb(lo, 0x43C8);
  631. outb(hi, 0x43C9);
  632. }
  633. debug("VCLK = %X %X\n", hi, lo);
  634. }
  635. /* Set number of lines for flat panels*/
  636. static void set_number_of_lines(struct tridentfb_par *par, int lines)
  637. {
  638. int tmp = read3CE(par, CyberEnhance) & 0x8F;
  639. if (lines > 1024)
  640. tmp |= 0x50;
  641. else if (lines > 768)
  642. tmp |= 0x30;
  643. else if (lines > 600)
  644. tmp |= 0x20;
  645. else if (lines > 480)
  646. tmp |= 0x10;
  647. write3CE(par, CyberEnhance, tmp);
  648. }
  649. /*
  650. * If we see that FP is active we assume we have one.
  651. * Otherwise we have a CRT display. User can override.
  652. */
  653. static int __devinit is_flatpanel(struct tridentfb_par *par)
  654. {
  655. if (fp)
  656. return 1;
  657. if (crt || !iscyber(par->chip_id))
  658. return 0;
  659. return (read3CE(par, FPConfig) & 0x10) ? 1 : 0;
  660. }
  661. /* Try detecting the video memory size */
  662. static unsigned int __devinit get_memsize(struct tridentfb_par *par)
  663. {
  664. unsigned char tmp, tmp2;
  665. unsigned int k;
  666. /* If memory size provided by user */
  667. if (memsize)
  668. k = memsize * Kb;
  669. else
  670. switch (par->chip_id) {
  671. case CYBER9525DVD:
  672. k = 2560 * Kb;
  673. break;
  674. default:
  675. tmp = read3X4(par, SPR) & 0x0F;
  676. switch (tmp) {
  677. case 0x01:
  678. k = 512 * Kb;
  679. break;
  680. case 0x02:
  681. k = 6 * Mb; /* XP */
  682. break;
  683. case 0x03:
  684. k = 1 * Mb;
  685. break;
  686. case 0x04:
  687. k = 8 * Mb;
  688. break;
  689. case 0x06:
  690. k = 10 * Mb; /* XP */
  691. break;
  692. case 0x07:
  693. k = 2 * Mb;
  694. break;
  695. case 0x08:
  696. k = 12 * Mb; /* XP */
  697. break;
  698. case 0x0A:
  699. k = 14 * Mb; /* XP */
  700. break;
  701. case 0x0C:
  702. k = 16 * Mb; /* XP */
  703. break;
  704. case 0x0E: /* XP */
  705. tmp2 = read3C4(par, 0xC1);
  706. switch (tmp2) {
  707. case 0x00:
  708. k = 20 * Mb;
  709. break;
  710. case 0x01:
  711. k = 24 * Mb;
  712. break;
  713. case 0x10:
  714. k = 28 * Mb;
  715. break;
  716. case 0x11:
  717. k = 32 * Mb;
  718. break;
  719. default:
  720. k = 1 * Mb;
  721. break;
  722. }
  723. break;
  724. case 0x0F:
  725. k = 4 * Mb;
  726. break;
  727. default:
  728. k = 1 * Mb;
  729. break;
  730. }
  731. }
  732. k -= memdiff * Kb;
  733. output("framebuffer size = %d Kb\n", k / Kb);
  734. return k;
  735. }
  736. /* See if we can handle the video mode described in var */
  737. static int tridentfb_check_var(struct fb_var_screeninfo *var,
  738. struct fb_info *info)
  739. {
  740. struct tridentfb_par *par = info->par;
  741. int bpp = var->bits_per_pixel;
  742. debug("enter\n");
  743. /* check color depth */
  744. if (bpp == 24)
  745. bpp = var->bits_per_pixel = 32;
  746. /* check whether resolution fits on panel and in memory */
  747. if (par->flatpanel && nativex && var->xres > nativex)
  748. return -EINVAL;
  749. if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len)
  750. return -EINVAL;
  751. switch (bpp) {
  752. case 8:
  753. var->red.offset = 0;
  754. var->green.offset = 0;
  755. var->blue.offset = 0;
  756. var->red.length = 6;
  757. var->green.length = 6;
  758. var->blue.length = 6;
  759. break;
  760. case 16:
  761. var->red.offset = 11;
  762. var->green.offset = 5;
  763. var->blue.offset = 0;
  764. var->red.length = 5;
  765. var->green.length = 6;
  766. var->blue.length = 5;
  767. break;
  768. case 32:
  769. var->red.offset = 16;
  770. var->green.offset = 8;
  771. var->blue.offset = 0;
  772. var->red.length = 8;
  773. var->green.length = 8;
  774. var->blue.length = 8;
  775. break;
  776. default:
  777. return -EINVAL;
  778. }
  779. debug("exit\n");
  780. return 0;
  781. }
  782. /* Pan the display */
  783. static int tridentfb_pan_display(struct fb_var_screeninfo *var,
  784. struct fb_info *info)
  785. {
  786. struct tridentfb_par *par = info->par;
  787. unsigned int offset;
  788. debug("enter\n");
  789. offset = (var->xoffset + (var->yoffset * var->xres))
  790. * var->bits_per_pixel / 32;
  791. info->var.xoffset = var->xoffset;
  792. info->var.yoffset = var->yoffset;
  793. set_screen_start(par, offset);
  794. debug("exit\n");
  795. return 0;
  796. }
  797. static void shadowmode_on(struct tridentfb_par *par)
  798. {
  799. write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
  800. }
  801. static void shadowmode_off(struct tridentfb_par *par)
  802. {
  803. write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
  804. }
  805. /* Set the hardware to the requested video mode */
  806. static int tridentfb_set_par(struct fb_info *info)
  807. {
  808. struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
  809. u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
  810. u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
  811. struct fb_var_screeninfo *var = &info->var;
  812. int bpp = var->bits_per_pixel;
  813. unsigned char tmp;
  814. unsigned long vclk;
  815. debug("enter\n");
  816. hdispend = var->xres / 8 - 1;
  817. hsyncstart = (var->xres + var->right_margin) / 8;
  818. hsyncend = var->hsync_len / 8;
  819. htotal =
  820. (var->xres + var->left_margin + var->right_margin +
  821. var->hsync_len) / 8 - 10;
  822. hblankstart = hdispend + 1;
  823. hblankend = htotal + 5;
  824. vdispend = var->yres - 1;
  825. vsyncstart = var->yres + var->lower_margin;
  826. vsyncend = var->vsync_len;
  827. vtotal = var->upper_margin + vsyncstart + vsyncend - 2;
  828. vblankstart = var->yres;
  829. vblankend = vtotal + 2;
  830. crtc_unlock(par);
  831. write3CE(par, CyberControl, 8);
  832. if (par->flatpanel && var->xres < nativex) {
  833. /*
  834. * on flat panels with native size larger
  835. * than requested resolution decide whether
  836. * we stretch or center
  837. */
  838. t_outb(par, 0xEB, 0x3C2);
  839. shadowmode_on(par);
  840. if (center)
  841. screen_center(par);
  842. else if (stretch)
  843. screen_stretch(par);
  844. } else {
  845. t_outb(par, 0x2B, 0x3C2);
  846. write3CE(par, CyberControl, 8);
  847. }
  848. /* vertical timing values */
  849. write3X4(par, CRTVTotal, vtotal & 0xFF);
  850. write3X4(par, CRTVDispEnd, vdispend & 0xFF);
  851. write3X4(par, CRTVSyncStart, vsyncstart & 0xFF);
  852. write3X4(par, CRTVSyncEnd, (vsyncend & 0x0F));
  853. write3X4(par, CRTVBlankStart, vblankstart & 0xFF);
  854. write3X4(par, CRTVBlankEnd, 0 /* p->vblankend & 0xFF */);
  855. /* horizontal timing values */
  856. write3X4(par, CRTHTotal, htotal & 0xFF);
  857. write3X4(par, CRTHDispEnd, hdispend & 0xFF);
  858. write3X4(par, CRTHSyncStart, hsyncstart & 0xFF);
  859. write3X4(par, CRTHSyncEnd,
  860. (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
  861. write3X4(par, CRTHBlankStart, hblankstart & 0xFF);
  862. write3X4(par, CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */);
  863. /* higher bits of vertical timing values */
  864. tmp = 0x10;
  865. if (vtotal & 0x100) tmp |= 0x01;
  866. if (vdispend & 0x100) tmp |= 0x02;
  867. if (vsyncstart & 0x100) tmp |= 0x04;
  868. if (vblankstart & 0x100) tmp |= 0x08;
  869. if (vtotal & 0x200) tmp |= 0x20;
  870. if (vdispend & 0x200) tmp |= 0x40;
  871. if (vsyncstart & 0x200) tmp |= 0x80;
  872. write3X4(par, CRTOverflow, tmp);
  873. tmp = read3X4(par, CRTHiOrd) | 0x08; /* line compare bit 10 */
  874. if (vtotal & 0x400) tmp |= 0x80;
  875. if (vblankstart & 0x400) tmp |= 0x40;
  876. if (vsyncstart & 0x400) tmp |= 0x20;
  877. if (vdispend & 0x400) tmp |= 0x10;
  878. write3X4(par, CRTHiOrd, tmp);
  879. tmp = 0;
  880. if (htotal & 0x800) tmp |= 0x800 >> 11;
  881. if (hblankstart & 0x800) tmp |= 0x800 >> 7;
  882. write3X4(par, HorizOverflow, tmp);
  883. tmp = 0x40;
  884. if (vblankstart & 0x200) tmp |= 0x20;
  885. //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */
  886. write3X4(par, CRTMaxScanLine, tmp);
  887. write3X4(par, CRTLineCompare, 0xFF);
  888. write3X4(par, CRTPRowScan, 0);
  889. write3X4(par, CRTModeControl, 0xC3);
  890. write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */
  891. tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
  892. /* enable access extended memory */
  893. write3X4(par, CRTCModuleTest, tmp);
  894. /* enable GE for text acceleration */
  895. write3X4(par, GraphEngReg, 0x80);
  896. #ifdef CONFIG_FB_TRIDENT_ACCEL
  897. acc->init_accel(par, info->var.xres, bpp);
  898. #endif
  899. switch (bpp) {
  900. case 8:
  901. tmp = 0x00;
  902. break;
  903. case 16:
  904. tmp = 0x05;
  905. break;
  906. case 24:
  907. tmp = 0x29;
  908. break;
  909. case 32:
  910. tmp = 0x09;
  911. break;
  912. }
  913. write3X4(par, PixelBusReg, tmp);
  914. tmp = 0x10;
  915. if (iscyber(par->chip_id))
  916. tmp |= 0x20;
  917. write3X4(par, DRAMControl, tmp); /* both IO, linear enable */
  918. write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
  919. write3X4(par, Performance, 0x92);
  920. /* MMIO & PCI read and write burst enable */
  921. write3X4(par, PCIReg, 0x07);
  922. /* convert from picoseconds to kHz */
  923. vclk = PICOS2KHZ(info->var.pixclock);
  924. if (bpp == 32)
  925. vclk *= 2;
  926. set_vclk(par, vclk);
  927. write3C4(par, 0, 3);
  928. write3C4(par, 1, 1); /* set char clock 8 dots wide */
  929. /* enable 4 maps because needed in chain4 mode */
  930. write3C4(par, 2, 0x0F);
  931. write3C4(par, 3, 0);
  932. write3C4(par, 4, 0x0E); /* memory mode enable bitmaps ?? */
  933. /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
  934. write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12);
  935. write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */
  936. write3CE(par, 0x6, 0x05); /* graphics mode */
  937. write3CE(par, 0x7, 0x0F); /* planes? */
  938. if (par->chip_id == CYBERBLADEXPAi1) {
  939. /* This fixes snow-effect in 32 bpp */
  940. write3X4(par, CRTHSyncStart, 0x84);
  941. }
  942. /* graphics mode and support 256 color modes */
  943. writeAttr(par, 0x10, 0x41);
  944. writeAttr(par, 0x12, 0x0F); /* planes */
  945. writeAttr(par, 0x13, 0); /* horizontal pel panning */
  946. /* colors */
  947. for (tmp = 0; tmp < 0x10; tmp++)
  948. writeAttr(par, tmp, tmp);
  949. fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */
  950. t_outb(par, 0x20, 0x3C0); /* enable attr */
  951. switch (bpp) {
  952. case 8:
  953. tmp = 0;
  954. break;
  955. case 15:
  956. tmp = 0x10;
  957. break;
  958. case 16:
  959. tmp = 0x30;
  960. break;
  961. case 24:
  962. case 32:
  963. tmp = 0xD0;
  964. break;
  965. }
  966. t_inb(par, 0x3C8);
  967. t_inb(par, 0x3C6);
  968. t_inb(par, 0x3C6);
  969. t_inb(par, 0x3C6);
  970. t_inb(par, 0x3C6);
  971. t_outb(par, tmp, 0x3C6);
  972. t_inb(par, 0x3C8);
  973. if (par->flatpanel)
  974. set_number_of_lines(par, info->var.yres);
  975. set_lwidth(par, info->var.xres * bpp / (4 * 16));
  976. info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
  977. info->fix.line_length = info->var.xres * (bpp >> 3);
  978. info->cmap.len = (bpp == 8) ? 256 : 16;
  979. debug("exit\n");
  980. return 0;
  981. }
  982. /* Set one color register */
  983. static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
  984. unsigned blue, unsigned transp,
  985. struct fb_info *info)
  986. {
  987. int bpp = info->var.bits_per_pixel;
  988. struct tridentfb_par *par = info->par;
  989. if (regno >= info->cmap.len)
  990. return 1;
  991. if (bpp == 8) {
  992. t_outb(par, 0xFF, 0x3C6);
  993. t_outb(par, regno, 0x3C8);
  994. t_outb(par, red >> 10, 0x3C9);
  995. t_outb(par, green >> 10, 0x3C9);
  996. t_outb(par, blue >> 10, 0x3C9);
  997. } else if (regno < 16) {
  998. if (bpp == 16) { /* RGB 565 */
  999. u32 col;
  1000. col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
  1001. ((blue & 0xF800) >> 11);
  1002. col |= col << 16;
  1003. ((u32 *)(info->pseudo_palette))[regno] = col;
  1004. } else if (bpp == 32) /* ARGB 8888 */
  1005. ((u32*)info->pseudo_palette)[regno] =
  1006. ((transp & 0xFF00) << 16) |
  1007. ((red & 0xFF00) << 8) |
  1008. ((green & 0xFF00)) |
  1009. ((blue & 0xFF00) >> 8);
  1010. }
  1011. /* debug("exit\n"); */
  1012. return 0;
  1013. }
  1014. /* Try blanking the screen.For flat panels it does nothing */
  1015. static int tridentfb_blank(int blank_mode, struct fb_info *info)
  1016. {
  1017. unsigned char PMCont, DPMSCont;
  1018. struct tridentfb_par *par = info->par;
  1019. debug("enter\n");
  1020. if (par->flatpanel)
  1021. return 0;
  1022. t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
  1023. PMCont = t_inb(par, 0x83C6) & 0xFC;
  1024. DPMSCont = read3CE(par, PowerStatus) & 0xFC;
  1025. switch (blank_mode) {
  1026. case FB_BLANK_UNBLANK:
  1027. /* Screen: On, HSync: On, VSync: On */
  1028. case FB_BLANK_NORMAL:
  1029. /* Screen: Off, HSync: On, VSync: On */
  1030. PMCont |= 0x03;
  1031. DPMSCont |= 0x00;
  1032. break;
  1033. case FB_BLANK_HSYNC_SUSPEND:
  1034. /* Screen: Off, HSync: Off, VSync: On */
  1035. PMCont |= 0x02;
  1036. DPMSCont |= 0x01;
  1037. break;
  1038. case FB_BLANK_VSYNC_SUSPEND:
  1039. /* Screen: Off, HSync: On, VSync: Off */
  1040. PMCont |= 0x02;
  1041. DPMSCont |= 0x02;
  1042. break;
  1043. case FB_BLANK_POWERDOWN:
  1044. /* Screen: Off, HSync: Off, VSync: Off */
  1045. PMCont |= 0x00;
  1046. DPMSCont |= 0x03;
  1047. break;
  1048. }
  1049. write3CE(par, PowerStatus, DPMSCont);
  1050. t_outb(par, 4, 0x83C8);
  1051. t_outb(par, PMCont, 0x83C6);
  1052. debug("exit\n");
  1053. /* let fbcon do a softblank for us */
  1054. return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
  1055. }
  1056. static struct fb_ops tridentfb_ops = {
  1057. .owner = THIS_MODULE,
  1058. .fb_setcolreg = tridentfb_setcolreg,
  1059. .fb_pan_display = tridentfb_pan_display,
  1060. .fb_blank = tridentfb_blank,
  1061. .fb_check_var = tridentfb_check_var,
  1062. .fb_set_par = tridentfb_set_par,
  1063. .fb_fillrect = tridentfb_fillrect,
  1064. .fb_copyarea = tridentfb_copyarea,
  1065. .fb_imageblit = cfb_imageblit,
  1066. };
  1067. static int __devinit trident_pci_probe(struct pci_dev *dev,
  1068. const struct pci_device_id *id)
  1069. {
  1070. int err;
  1071. unsigned char revision;
  1072. struct fb_info *info;
  1073. struct tridentfb_par *default_par;
  1074. int defaultaccel;
  1075. int chip3D;
  1076. int chip_id;
  1077. err = pci_enable_device(dev);
  1078. if (err)
  1079. return err;
  1080. info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
  1081. if (!info)
  1082. return -ENOMEM;
  1083. default_par = info->par;
  1084. chip_id = id->device;
  1085. if (chip_id == CYBERBLADEi1)
  1086. output("*** Please do use cyblafb, Cyberblade/i1 support "
  1087. "will soon be removed from tridentfb!\n");
  1088. /* If PCI id is 0x9660 then further detect chip type */
  1089. if (chip_id == TGUI9660) {
  1090. outb(RevisionID, 0x3C4);
  1091. revision = inb(0x3C5);
  1092. switch (revision) {
  1093. case 0x22:
  1094. case 0x23:
  1095. chip_id = CYBER9397;
  1096. break;
  1097. case 0x2A:
  1098. chip_id = CYBER9397DVD;
  1099. break;
  1100. case 0x30:
  1101. case 0x33:
  1102. case 0x34:
  1103. case 0x35:
  1104. case 0x38:
  1105. case 0x3A:
  1106. case 0xB3:
  1107. chip_id = CYBER9385;
  1108. break;
  1109. case 0x40 ... 0x43:
  1110. chip_id = CYBER9382;
  1111. break;
  1112. case 0x4A:
  1113. chip_id = CYBER9388;
  1114. break;
  1115. default:
  1116. break;
  1117. }
  1118. }
  1119. chip3D = is3Dchip(chip_id);
  1120. if (is_xp(chip_id)) {
  1121. acc = &accel_xp;
  1122. } else if (is_blade(chip_id)) {
  1123. acc = &accel_blade;
  1124. } else {
  1125. acc = &accel_image;
  1126. }
  1127. default_par->chip_id = chip_id;
  1128. /* acceleration is on by default for 3D chips */
  1129. defaultaccel = chip3D && !noaccel;
  1130. /* setup MMIO region */
  1131. tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
  1132. tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
  1133. if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
  1134. debug("request_region failed!\n");
  1135. return -1;
  1136. }
  1137. default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
  1138. tridentfb_fix.mmio_len);
  1139. if (!default_par->io_virt) {
  1140. debug("ioremap failed\n");
  1141. err = -1;
  1142. goto out_unmap1;
  1143. }
  1144. enable_mmio();
  1145. /* setup framebuffer memory */
  1146. tridentfb_fix.smem_start = pci_resource_start(dev, 0);
  1147. tridentfb_fix.smem_len = get_memsize(default_par);
  1148. if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
  1149. debug("request_mem_region failed!\n");
  1150. disable_mmio(info->par);
  1151. err = -1;
  1152. goto out_unmap1;
  1153. }
  1154. info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
  1155. tridentfb_fix.smem_len);
  1156. if (!info->screen_base) {
  1157. debug("ioremap failed\n");
  1158. err = -1;
  1159. goto out_unmap2;
  1160. }
  1161. output("%s board found\n", pci_name(dev));
  1162. default_par->flatpanel = is_flatpanel(default_par);
  1163. if (default_par->flatpanel)
  1164. nativex = get_nativex(default_par);
  1165. info->fix = tridentfb_fix;
  1166. info->fbops = &tridentfb_ops;
  1167. info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
  1168. #ifdef CONFIG_FB_TRIDENT_ACCEL
  1169. info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
  1170. #endif
  1171. if (!fb_find_mode(&info->var, info,
  1172. mode_option, NULL, 0, NULL, bpp)) {
  1173. err = -EINVAL;
  1174. goto out_unmap2;
  1175. }
  1176. err = fb_alloc_cmap(&info->cmap, 256, 0);
  1177. if (err < 0)
  1178. goto out_unmap2;
  1179. if (defaultaccel && acc)
  1180. info->var.accel_flags |= FB_ACCELF_TEXT;
  1181. else
  1182. info->var.accel_flags &= ~FB_ACCELF_TEXT;
  1183. info->var.activate |= FB_ACTIVATE_NOW;
  1184. info->device = &dev->dev;
  1185. if (register_framebuffer(info) < 0) {
  1186. printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
  1187. fb_dealloc_cmap(&info->cmap);
  1188. err = -EINVAL;
  1189. goto out_unmap2;
  1190. }
  1191. output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
  1192. info->node, info->fix.id, info->var.xres,
  1193. info->var.yres, info->var.bits_per_pixel);
  1194. pci_set_drvdata(dev, info);
  1195. return 0;
  1196. out_unmap2:
  1197. if (info->screen_base)
  1198. iounmap(info->screen_base);
  1199. release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
  1200. disable_mmio(info->par);
  1201. out_unmap1:
  1202. if (default_par->io_virt)
  1203. iounmap(default_par->io_virt);
  1204. release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
  1205. framebuffer_release(info);
  1206. return err;
  1207. }
  1208. static void __devexit trident_pci_remove(struct pci_dev *dev)
  1209. {
  1210. struct fb_info *info = pci_get_drvdata(dev);
  1211. struct tridentfb_par *par = info->par;
  1212. unregister_framebuffer(info);
  1213. iounmap(par->io_virt);
  1214. iounmap(info->screen_base);
  1215. release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
  1216. release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
  1217. pci_set_drvdata(dev, NULL);
  1218. framebuffer_release(info);
  1219. }
  1220. /* List of boards that we are trying to support */
  1221. static struct pci_device_id trident_devices[] = {
  1222. {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1223. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1224. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1225. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1226. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1227. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1228. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1229. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1230. {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1231. {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1232. {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1233. {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1234. {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1235. {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1236. {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1237. {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1238. {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1239. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1240. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1241. {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  1242. {0,}
  1243. };
  1244. MODULE_DEVICE_TABLE(pci, trident_devices);
  1245. static struct pci_driver tridentfb_pci_driver = {
  1246. .name = "tridentfb",
  1247. .id_table = trident_devices,
  1248. .probe = trident_pci_probe,
  1249. .remove = __devexit_p(trident_pci_remove)
  1250. };
  1251. /*
  1252. * Parse user specified options (`video=trident:')
  1253. * example:
  1254. * video=trident:800x600,bpp=16,noaccel
  1255. */
  1256. #ifndef MODULE
  1257. static int __init tridentfb_setup(char *options)
  1258. {
  1259. char *opt;
  1260. if (!options || !*options)
  1261. return 0;
  1262. while ((opt = strsep(&options, ",")) != NULL) {
  1263. if (!*opt)
  1264. continue;
  1265. if (!strncmp(opt, "noaccel", 7))
  1266. noaccel = 1;
  1267. else if (!strncmp(opt, "fp", 2))
  1268. fp = 1;
  1269. else if (!strncmp(opt, "crt", 3))
  1270. fp = 0;
  1271. else if (!strncmp(opt, "bpp=", 4))
  1272. bpp = simple_strtoul(opt + 4, NULL, 0);
  1273. else if (!strncmp(opt, "center", 6))
  1274. center = 1;
  1275. else if (!strncmp(opt, "stretch", 7))
  1276. stretch = 1;
  1277. else if (!strncmp(opt, "memsize=", 8))
  1278. memsize = simple_strtoul(opt + 8, NULL, 0);
  1279. else if (!strncmp(opt, "memdiff=", 8))
  1280. memdiff = simple_strtoul(opt + 8, NULL, 0);
  1281. else if (!strncmp(opt, "nativex=", 8))
  1282. nativex = simple_strtoul(opt + 8, NULL, 0);
  1283. else
  1284. mode_option = opt;
  1285. }
  1286. return 0;
  1287. }
  1288. #endif
  1289. static int __init tridentfb_init(void)
  1290. {
  1291. #ifndef MODULE
  1292. char *option = NULL;
  1293. if (fb_get_options("tridentfb", &option))
  1294. return -ENODEV;
  1295. tridentfb_setup(option);
  1296. #endif
  1297. output("Trident framebuffer %s initializing\n", VERSION);
  1298. return pci_register_driver(&tridentfb_pci_driver);
  1299. }
  1300. static void __exit tridentfb_exit(void)
  1301. {
  1302. pci_unregister_driver(&tridentfb_pci_driver);
  1303. }
  1304. module_init(tridentfb_init);
  1305. module_exit(tridentfb_exit);
  1306. MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
  1307. MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
  1308. MODULE_LICENSE("GPL");