rt2x00queue.c 24 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  4. <http://rt2x00.serialmonkey.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the
  15. Free Software Foundation, Inc.,
  16. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. /*
  19. Module: rt2x00lib
  20. Abstract: rt2x00 queue specific routines.
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/dma-mapping.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00lib.h"
  28. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  29. struct queue_entry *entry)
  30. {
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = entry->queue->data_size + entry->queue->desc_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. skbdesc->entry = entry;
  74. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  75. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  76. skb->data,
  77. skb->len,
  78. DMA_FROM_DEVICE);
  79. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  80. }
  81. return skb;
  82. }
  83. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  84. {
  85. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  86. /*
  87. * If device has requested headroom, we should make sure that
  88. * is also mapped to the DMA so it can be used for transfering
  89. * additional descriptor information to the hardware.
  90. */
  91. skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
  92. skbdesc->skb_dma =
  93. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  94. /*
  95. * Restore data pointer to original location again.
  96. */
  97. skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
  98. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  99. }
  100. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  101. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  102. {
  103. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  104. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  105. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  106. DMA_FROM_DEVICE);
  107. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  108. }
  109. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  110. /*
  111. * Add headroom to the skb length, it has been removed
  112. * by the driver, but it was actually mapped to DMA.
  113. */
  114. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  115. skb->len + rt2x00dev->ops->extra_tx_headroom,
  116. DMA_TO_DEVICE);
  117. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  118. }
  119. }
  120. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  121. {
  122. if (!skb)
  123. return;
  124. rt2x00queue_unmap_skb(rt2x00dev, skb);
  125. dev_kfree_skb_any(skb);
  126. }
  127. void rt2x00queue_align_frame(struct sk_buff *skb)
  128. {
  129. unsigned int frame_length = skb->len;
  130. unsigned int align = ALIGN_SIZE(skb, 0);
  131. if (!align)
  132. return;
  133. skb_push(skb, align);
  134. memmove(skb->data, skb->data + align, frame_length);
  135. skb_trim(skb, frame_length);
  136. }
  137. void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
  138. {
  139. unsigned int frame_length = skb->len;
  140. unsigned int align = ALIGN_SIZE(skb, header_length);
  141. if (!align)
  142. return;
  143. skb_push(skb, align);
  144. memmove(skb->data, skb->data + align, frame_length);
  145. skb_trim(skb, frame_length);
  146. }
  147. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  148. {
  149. unsigned int payload_length = skb->len - header_length;
  150. unsigned int header_align = ALIGN_SIZE(skb, 0);
  151. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  152. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  153. /*
  154. * Adjust the header alignment if the payload needs to be moved more
  155. * than the header.
  156. */
  157. if (payload_align > header_align)
  158. header_align += 4;
  159. /* There is nothing to do if no alignment is needed */
  160. if (!header_align)
  161. return;
  162. /* Reserve the amount of space needed in front of the frame */
  163. skb_push(skb, header_align);
  164. /*
  165. * Move the header.
  166. */
  167. memmove(skb->data, skb->data + header_align, header_length);
  168. /* Move the payload, if present and if required */
  169. if (payload_length && payload_align)
  170. memmove(skb->data + header_length + l2pad,
  171. skb->data + header_length + l2pad + payload_align,
  172. payload_length);
  173. /* Trim the skb to the correct size */
  174. skb_trim(skb, header_length + l2pad + payload_length);
  175. }
  176. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  177. {
  178. unsigned int l2pad = L2PAD_SIZE(header_length);
  179. if (!l2pad)
  180. return;
  181. memmove(skb->data + l2pad, skb->data, header_length);
  182. skb_pull(skb, l2pad);
  183. }
  184. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  185. struct txentry_desc *txdesc)
  186. {
  187. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  188. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  189. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  190. unsigned long irqflags;
  191. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
  192. unlikely(!tx_info->control.vif))
  193. return;
  194. /*
  195. * Hardware should insert sequence counter.
  196. * FIXME: We insert a software sequence counter first for
  197. * hardware that doesn't support hardware sequence counting.
  198. *
  199. * This is wrong because beacons are not getting sequence
  200. * numbers assigned properly.
  201. *
  202. * A secondary problem exists for drivers that cannot toggle
  203. * sequence counting per-frame, since those will override the
  204. * sequence counter given by mac80211.
  205. */
  206. spin_lock_irqsave(&intf->seqlock, irqflags);
  207. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  208. intf->seqno += 0x10;
  209. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  210. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  211. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  212. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  213. }
  214. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  215. struct txentry_desc *txdesc,
  216. const struct rt2x00_rate *hwrate)
  217. {
  218. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  219. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  220. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  221. unsigned int data_length;
  222. unsigned int duration;
  223. unsigned int residual;
  224. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  225. data_length = entry->skb->len + 4;
  226. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  227. /*
  228. * PLCP setup
  229. * Length calculation depends on OFDM/CCK rate.
  230. */
  231. txdesc->signal = hwrate->plcp;
  232. txdesc->service = 0x04;
  233. if (hwrate->flags & DEV_RATE_OFDM) {
  234. txdesc->length_high = (data_length >> 6) & 0x3f;
  235. txdesc->length_low = data_length & 0x3f;
  236. } else {
  237. /*
  238. * Convert length to microseconds.
  239. */
  240. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  241. duration = GET_DURATION(data_length, hwrate->bitrate);
  242. if (residual != 0) {
  243. duration++;
  244. /*
  245. * Check if we need to set the Length Extension
  246. */
  247. if (hwrate->bitrate == 110 && residual <= 30)
  248. txdesc->service |= 0x80;
  249. }
  250. txdesc->length_high = (duration >> 8) & 0xff;
  251. txdesc->length_low = duration & 0xff;
  252. /*
  253. * When preamble is enabled we should set the
  254. * preamble bit for the signal.
  255. */
  256. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  257. txdesc->signal |= 0x08;
  258. }
  259. }
  260. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  261. struct txentry_desc *txdesc)
  262. {
  263. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  264. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  265. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  266. struct ieee80211_rate *rate =
  267. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  268. const struct rt2x00_rate *hwrate;
  269. memset(txdesc, 0, sizeof(*txdesc));
  270. /*
  271. * Initialize information from queue
  272. */
  273. txdesc->queue = entry->queue->qid;
  274. txdesc->cw_min = entry->queue->cw_min;
  275. txdesc->cw_max = entry->queue->cw_max;
  276. txdesc->aifs = entry->queue->aifs;
  277. /*
  278. * Header and frame information.
  279. */
  280. txdesc->length = entry->skb->len;
  281. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  282. /*
  283. * Check whether this frame is to be acked.
  284. */
  285. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  286. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  287. /*
  288. * Check if this is a RTS/CTS frame
  289. */
  290. if (ieee80211_is_rts(hdr->frame_control) ||
  291. ieee80211_is_cts(hdr->frame_control)) {
  292. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  293. if (ieee80211_is_rts(hdr->frame_control))
  294. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  295. else
  296. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  297. if (tx_info->control.rts_cts_rate_idx >= 0)
  298. rate =
  299. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  300. }
  301. /*
  302. * Determine retry information.
  303. */
  304. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  305. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  306. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  307. /*
  308. * Check if more fragments are pending
  309. */
  310. if (ieee80211_has_morefrags(hdr->frame_control) ||
  311. (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
  312. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  313. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  314. }
  315. /*
  316. * Beacons and probe responses require the tsf timestamp
  317. * to be inserted into the frame, except for a frame that has been injected
  318. * through a monitor interface. This latter is needed for testing a
  319. * monitor interface.
  320. */
  321. if ((ieee80211_is_beacon(hdr->frame_control) ||
  322. ieee80211_is_probe_resp(hdr->frame_control)) &&
  323. (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
  324. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  325. /*
  326. * Determine with what IFS priority this frame should be send.
  327. * Set ifs to IFS_SIFS when the this is not the first fragment,
  328. * or this fragment came after RTS/CTS.
  329. */
  330. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  331. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  332. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  333. txdesc->ifs = IFS_BACKOFF;
  334. } else
  335. txdesc->ifs = IFS_SIFS;
  336. /*
  337. * Determine rate modulation.
  338. */
  339. hwrate = rt2x00_get_rate(rate->hw_value);
  340. txdesc->rate_mode = RATE_MODE_CCK;
  341. if (hwrate->flags & DEV_RATE_OFDM)
  342. txdesc->rate_mode = RATE_MODE_OFDM;
  343. /*
  344. * Apply TX descriptor handling by components
  345. */
  346. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  347. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  348. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  349. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  350. }
  351. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  352. struct txentry_desc *txdesc)
  353. {
  354. struct data_queue *queue = entry->queue;
  355. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  356. enum rt2x00_dump_type dump_type;
  357. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  358. /*
  359. * All processing on the frame has been completed, this means
  360. * it is now ready to be dumped to userspace through debugfs.
  361. */
  362. dump_type = (txdesc->queue == QID_BEACON) ?
  363. DUMP_FRAME_BEACON : DUMP_FRAME_TX;
  364. rt2x00debug_dump_frame(rt2x00dev, dump_type, entry->skb);
  365. }
  366. static void rt2x00queue_kick_tx_queue(struct queue_entry *entry,
  367. struct txentry_desc *txdesc)
  368. {
  369. struct data_queue *queue = entry->queue;
  370. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  371. /*
  372. * Check if we need to kick the queue, there are however a few rules
  373. * 1) Don't kick unless this is the last in frame in a burst.
  374. * When the burst flag is set, this frame is always followed
  375. * by another frame which in some way are related to eachother.
  376. * This is true for fragments, RTS or CTS-to-self frames.
  377. * 2) Rule 1 can be broken when the available entries
  378. * in the queue are less then a certain threshold.
  379. */
  380. if (rt2x00queue_threshold(queue) ||
  381. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  382. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  383. }
  384. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  385. bool local)
  386. {
  387. struct ieee80211_tx_info *tx_info;
  388. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  389. struct txentry_desc txdesc;
  390. struct skb_frame_desc *skbdesc;
  391. u8 rate_idx, rate_flags;
  392. if (unlikely(rt2x00queue_full(queue)))
  393. return -ENOBUFS;
  394. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  395. ERROR(queue->rt2x00dev,
  396. "Arrived at non-free entry in the non-full queue %d.\n"
  397. "Please file bug report to %s.\n",
  398. queue->qid, DRV_PROJECT);
  399. return -EINVAL;
  400. }
  401. /*
  402. * Copy all TX descriptor information into txdesc,
  403. * after that we are free to use the skb->cb array
  404. * for our information.
  405. */
  406. entry->skb = skb;
  407. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  408. /*
  409. * All information is retrieved from the skb->cb array,
  410. * now we should claim ownership of the driver part of that
  411. * array, preserving the bitrate index and flags.
  412. */
  413. tx_info = IEEE80211_SKB_CB(skb);
  414. rate_idx = tx_info->control.rates[0].idx;
  415. rate_flags = tx_info->control.rates[0].flags;
  416. skbdesc = get_skb_frame_desc(skb);
  417. memset(skbdesc, 0, sizeof(*skbdesc));
  418. skbdesc->entry = entry;
  419. skbdesc->tx_rate_idx = rate_idx;
  420. skbdesc->tx_rate_flags = rate_flags;
  421. if (local)
  422. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  423. /*
  424. * When hardware encryption is supported, and this frame
  425. * is to be encrypted, we should strip the IV/EIV data from
  426. * the frame so we can provide it to the driver separately.
  427. */
  428. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  429. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  430. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  431. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  432. else
  433. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  434. }
  435. /*
  436. * When DMA allocation is required we should guarentee to the
  437. * driver that the DMA is aligned to a 4-byte boundary.
  438. * However some drivers require L2 padding to pad the payload
  439. * rather then the header. This could be a requirement for
  440. * PCI and USB devices, while header alignment only is valid
  441. * for PCI devices.
  442. */
  443. if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
  444. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  445. else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  446. rt2x00queue_align_frame(entry->skb);
  447. /*
  448. * It could be possible that the queue was corrupted and this
  449. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  450. * this frame will simply be dropped.
  451. */
  452. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry,
  453. &txdesc))) {
  454. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  455. entry->skb = NULL;
  456. return -EIO;
  457. }
  458. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  459. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  460. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  461. rt2x00queue_index_inc(queue, Q_INDEX);
  462. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  463. rt2x00queue_kick_tx_queue(entry, &txdesc);
  464. return 0;
  465. }
  466. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  467. struct ieee80211_vif *vif,
  468. const bool enable_beacon)
  469. {
  470. struct rt2x00_intf *intf = vif_to_intf(vif);
  471. struct skb_frame_desc *skbdesc;
  472. struct txentry_desc txdesc;
  473. if (unlikely(!intf->beacon))
  474. return -ENOBUFS;
  475. mutex_lock(&intf->beacon_skb_mutex);
  476. /*
  477. * Clean up the beacon skb.
  478. */
  479. rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
  480. intf->beacon->skb = NULL;
  481. if (!enable_beacon) {
  482. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
  483. mutex_unlock(&intf->beacon_skb_mutex);
  484. return 0;
  485. }
  486. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  487. if (!intf->beacon->skb) {
  488. mutex_unlock(&intf->beacon_skb_mutex);
  489. return -ENOMEM;
  490. }
  491. /*
  492. * Copy all TX descriptor information into txdesc,
  493. * after that we are free to use the skb->cb array
  494. * for our information.
  495. */
  496. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  497. /*
  498. * Fill in skb descriptor
  499. */
  500. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  501. memset(skbdesc, 0, sizeof(*skbdesc));
  502. skbdesc->entry = intf->beacon;
  503. /*
  504. * Write TX descriptor into reserved room in front of the beacon.
  505. */
  506. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  507. /*
  508. * Send beacon to hardware and enable beacon genaration..
  509. */
  510. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  511. mutex_unlock(&intf->beacon_skb_mutex);
  512. return 0;
  513. }
  514. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  515. const enum data_queue_qid queue)
  516. {
  517. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  518. if (queue == QID_RX)
  519. return rt2x00dev->rx;
  520. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  521. return &rt2x00dev->tx[queue];
  522. if (!rt2x00dev->bcn)
  523. return NULL;
  524. if (queue == QID_BEACON)
  525. return &rt2x00dev->bcn[0];
  526. else if (queue == QID_ATIM && atim)
  527. return &rt2x00dev->bcn[1];
  528. return NULL;
  529. }
  530. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  531. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  532. enum queue_index index)
  533. {
  534. struct queue_entry *entry;
  535. unsigned long irqflags;
  536. if (unlikely(index >= Q_INDEX_MAX)) {
  537. ERROR(queue->rt2x00dev,
  538. "Entry requested from invalid index type (%d)\n", index);
  539. return NULL;
  540. }
  541. spin_lock_irqsave(&queue->lock, irqflags);
  542. entry = &queue->entries[queue->index[index]];
  543. spin_unlock_irqrestore(&queue->lock, irqflags);
  544. return entry;
  545. }
  546. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  547. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  548. {
  549. unsigned long irqflags;
  550. if (unlikely(index >= Q_INDEX_MAX)) {
  551. ERROR(queue->rt2x00dev,
  552. "Index change on invalid index type (%d)\n", index);
  553. return;
  554. }
  555. spin_lock_irqsave(&queue->lock, irqflags);
  556. queue->index[index]++;
  557. if (queue->index[index] >= queue->limit)
  558. queue->index[index] = 0;
  559. if (index == Q_INDEX) {
  560. queue->length++;
  561. } else if (index == Q_INDEX_DONE) {
  562. queue->length--;
  563. queue->count++;
  564. }
  565. spin_unlock_irqrestore(&queue->lock, irqflags);
  566. }
  567. static void rt2x00queue_reset(struct data_queue *queue)
  568. {
  569. unsigned long irqflags;
  570. spin_lock_irqsave(&queue->lock, irqflags);
  571. queue->count = 0;
  572. queue->length = 0;
  573. memset(queue->index, 0, sizeof(queue->index));
  574. spin_unlock_irqrestore(&queue->lock, irqflags);
  575. }
  576. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  577. {
  578. struct data_queue *queue;
  579. txall_queue_for_each(rt2x00dev, queue)
  580. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
  581. }
  582. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  583. {
  584. struct data_queue *queue;
  585. unsigned int i;
  586. queue_for_each(rt2x00dev, queue) {
  587. rt2x00queue_reset(queue);
  588. for (i = 0; i < queue->limit; i++) {
  589. queue->entries[i].flags = 0;
  590. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  591. }
  592. }
  593. }
  594. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  595. const struct data_queue_desc *qdesc)
  596. {
  597. struct queue_entry *entries;
  598. unsigned int entry_size;
  599. unsigned int i;
  600. rt2x00queue_reset(queue);
  601. queue->limit = qdesc->entry_num;
  602. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  603. queue->data_size = qdesc->data_size;
  604. queue->desc_size = qdesc->desc_size;
  605. /*
  606. * Allocate all queue entries.
  607. */
  608. entry_size = sizeof(*entries) + qdesc->priv_size;
  609. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  610. if (!entries)
  611. return -ENOMEM;
  612. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  613. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  614. ((__index) * (__psize)) )
  615. for (i = 0; i < queue->limit; i++) {
  616. entries[i].flags = 0;
  617. entries[i].queue = queue;
  618. entries[i].skb = NULL;
  619. entries[i].entry_idx = i;
  620. entries[i].priv_data =
  621. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  622. sizeof(*entries), qdesc->priv_size);
  623. }
  624. #undef QUEUE_ENTRY_PRIV_OFFSET
  625. queue->entries = entries;
  626. return 0;
  627. }
  628. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  629. struct data_queue *queue)
  630. {
  631. unsigned int i;
  632. if (!queue->entries)
  633. return;
  634. for (i = 0; i < queue->limit; i++) {
  635. if (queue->entries[i].skb)
  636. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  637. }
  638. }
  639. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  640. struct data_queue *queue)
  641. {
  642. unsigned int i;
  643. struct sk_buff *skb;
  644. for (i = 0; i < queue->limit; i++) {
  645. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  646. if (!skb)
  647. return -ENOMEM;
  648. queue->entries[i].skb = skb;
  649. }
  650. return 0;
  651. }
  652. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  653. {
  654. struct data_queue *queue;
  655. int status;
  656. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  657. if (status)
  658. goto exit;
  659. tx_queue_for_each(rt2x00dev, queue) {
  660. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  661. if (status)
  662. goto exit;
  663. }
  664. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  665. if (status)
  666. goto exit;
  667. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  668. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  669. rt2x00dev->ops->atim);
  670. if (status)
  671. goto exit;
  672. }
  673. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  674. if (status)
  675. goto exit;
  676. return 0;
  677. exit:
  678. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  679. rt2x00queue_uninitialize(rt2x00dev);
  680. return status;
  681. }
  682. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  683. {
  684. struct data_queue *queue;
  685. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  686. queue_for_each(rt2x00dev, queue) {
  687. kfree(queue->entries);
  688. queue->entries = NULL;
  689. }
  690. }
  691. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  692. struct data_queue *queue, enum data_queue_qid qid)
  693. {
  694. spin_lock_init(&queue->lock);
  695. queue->rt2x00dev = rt2x00dev;
  696. queue->qid = qid;
  697. queue->txop = 0;
  698. queue->aifs = 2;
  699. queue->cw_min = 5;
  700. queue->cw_max = 10;
  701. }
  702. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  703. {
  704. struct data_queue *queue;
  705. enum data_queue_qid qid;
  706. unsigned int req_atim =
  707. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  708. /*
  709. * We need the following queues:
  710. * RX: 1
  711. * TX: ops->tx_queues
  712. * Beacon: 1
  713. * Atim: 1 (if required)
  714. */
  715. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  716. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  717. if (!queue) {
  718. ERROR(rt2x00dev, "Queue allocation failed.\n");
  719. return -ENOMEM;
  720. }
  721. /*
  722. * Initialize pointers
  723. */
  724. rt2x00dev->rx = queue;
  725. rt2x00dev->tx = &queue[1];
  726. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  727. /*
  728. * Initialize queue parameters.
  729. * RX: qid = QID_RX
  730. * TX: qid = QID_AC_BE + index
  731. * TX: cw_min: 2^5 = 32.
  732. * TX: cw_max: 2^10 = 1024.
  733. * BCN: qid = QID_BEACON
  734. * ATIM: qid = QID_ATIM
  735. */
  736. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  737. qid = QID_AC_BE;
  738. tx_queue_for_each(rt2x00dev, queue)
  739. rt2x00queue_init(rt2x00dev, queue, qid++);
  740. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  741. if (req_atim)
  742. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  743. return 0;
  744. }
  745. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  746. {
  747. kfree(rt2x00dev->rx);
  748. rt2x00dev->rx = NULL;
  749. rt2x00dev->tx = NULL;
  750. rt2x00dev->bcn = NULL;
  751. }