main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_cache_conf_rate(struct ath_softc *sc,
  20. struct ieee80211_conf *conf)
  21. {
  22. switch (conf->channel->band) {
  23. case IEEE80211_BAND_2GHZ:
  24. if (conf_is_ht20(conf))
  25. sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  26. else if (conf_is_ht40_minus(conf))
  27. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  28. else if (conf_is_ht40_plus(conf))
  29. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  30. else
  31. sc->cur_rate_mode = ATH9K_MODE_11G;
  32. break;
  33. case IEEE80211_BAND_5GHZ:
  34. if (conf_is_ht20(conf))
  35. sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  36. else if (conf_is_ht40_minus(conf))
  37. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  38. else if (conf_is_ht40_plus(conf))
  39. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  40. else
  41. sc->cur_rate_mode = ATH9K_MODE_11A;
  42. break;
  43. default:
  44. BUG_ON(1);
  45. break;
  46. }
  47. }
  48. static void ath_update_txpow(struct ath_softc *sc)
  49. {
  50. struct ath_hw *ah = sc->sc_ah;
  51. u32 txpow;
  52. if (sc->curtxpow != sc->config.txpowlimit) {
  53. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  54. /* read back in case value is clamped */
  55. ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  56. sc->curtxpow = txpow;
  57. }
  58. }
  59. static u8 parse_mpdudensity(u8 mpdudensity)
  60. {
  61. /*
  62. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  63. * 0 for no restriction
  64. * 1 for 1/4 us
  65. * 2 for 1/2 us
  66. * 3 for 1 us
  67. * 4 for 2 us
  68. * 5 for 4 us
  69. * 6 for 8 us
  70. * 7 for 16 us
  71. */
  72. switch (mpdudensity) {
  73. case 0:
  74. return 0;
  75. case 1:
  76. case 2:
  77. case 3:
  78. /* Our lower layer calculations limit our precision to
  79. 1 microsecond */
  80. return 1;
  81. case 4:
  82. return 2;
  83. case 5:
  84. return 4;
  85. case 6:
  86. return 8;
  87. case 7:
  88. return 16;
  89. default:
  90. return 0;
  91. }
  92. }
  93. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  94. struct ieee80211_hw *hw)
  95. {
  96. struct ieee80211_channel *curchan = hw->conf.channel;
  97. struct ath9k_channel *channel;
  98. u8 chan_idx;
  99. chan_idx = curchan->hw_value;
  100. channel = &sc->sc_ah->channels[chan_idx];
  101. ath9k_update_ichannel(sc, hw, channel);
  102. return channel;
  103. }
  104. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  105. {
  106. unsigned long flags;
  107. bool ret;
  108. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  109. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  110. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  111. return ret;
  112. }
  113. void ath9k_ps_wakeup(struct ath_softc *sc)
  114. {
  115. unsigned long flags;
  116. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  117. if (++sc->ps_usecount != 1)
  118. goto unlock;
  119. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  120. unlock:
  121. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  122. }
  123. void ath9k_ps_restore(struct ath_softc *sc)
  124. {
  125. unsigned long flags;
  126. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  127. if (--sc->ps_usecount != 0)
  128. goto unlock;
  129. if (sc->ps_idle)
  130. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  131. else if (sc->ps_enabled &&
  132. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  133. PS_WAIT_FOR_CAB |
  134. PS_WAIT_FOR_PSPOLL_DATA |
  135. PS_WAIT_FOR_TX_ACK)))
  136. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  137. unlock:
  138. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  139. }
  140. /*
  141. * Set/change channels. If the channel is really being changed, it's done
  142. * by reseting the chip. To accomplish this we must first cleanup any pending
  143. * DMA, then restart stuff.
  144. */
  145. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  146. struct ath9k_channel *hchan)
  147. {
  148. struct ath_hw *ah = sc->sc_ah;
  149. struct ath_common *common = ath9k_hw_common(ah);
  150. struct ieee80211_conf *conf = &common->hw->conf;
  151. bool fastcc = true, stopped;
  152. struct ieee80211_channel *channel = hw->conf.channel;
  153. int r;
  154. if (sc->sc_flags & SC_OP_INVALID)
  155. return -EIO;
  156. ath9k_ps_wakeup(sc);
  157. /*
  158. * This is only performed if the channel settings have
  159. * actually changed.
  160. *
  161. * To switch channels clear any pending DMA operations;
  162. * wait long enough for the RX fifo to drain, reset the
  163. * hardware at the new frequency, and then re-enable
  164. * the relevant bits of the h/w.
  165. */
  166. ath9k_hw_set_interrupts(ah, 0);
  167. ath_drain_all_txq(sc, false);
  168. stopped = ath_stoprecv(sc);
  169. /* XXX: do not flush receive queue here. We don't want
  170. * to flush data frames already in queue because of
  171. * changing channel. */
  172. if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
  173. fastcc = false;
  174. ath_print(common, ATH_DBG_CONFIG,
  175. "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
  176. sc->sc_ah->curchan->channel,
  177. channel->center_freq, conf_is_ht40(conf));
  178. spin_lock_bh(&sc->sc_resetlock);
  179. r = ath9k_hw_reset(ah, hchan, fastcc);
  180. if (r) {
  181. ath_print(common, ATH_DBG_FATAL,
  182. "Unable to reset channel (%u MHz), "
  183. "reset status %d\n",
  184. channel->center_freq, r);
  185. spin_unlock_bh(&sc->sc_resetlock);
  186. goto ps_restore;
  187. }
  188. spin_unlock_bh(&sc->sc_resetlock);
  189. sc->sc_flags &= ~SC_OP_FULL_RESET;
  190. if (ath_startrecv(sc) != 0) {
  191. ath_print(common, ATH_DBG_FATAL,
  192. "Unable to restart recv logic\n");
  193. r = -EIO;
  194. goto ps_restore;
  195. }
  196. ath_cache_conf_rate(sc, &hw->conf);
  197. ath_update_txpow(sc);
  198. ath9k_hw_set_interrupts(ah, ah->imask);
  199. ps_restore:
  200. ath9k_ps_restore(sc);
  201. return r;
  202. }
  203. /*
  204. * This routine performs the periodic noise floor calibration function
  205. * that is used to adjust and optimize the chip performance. This
  206. * takes environmental changes (location, temperature) into account.
  207. * When the task is complete, it reschedules itself depending on the
  208. * appropriate interval that was calculated.
  209. */
  210. void ath_ani_calibrate(unsigned long data)
  211. {
  212. struct ath_softc *sc = (struct ath_softc *)data;
  213. struct ath_hw *ah = sc->sc_ah;
  214. struct ath_common *common = ath9k_hw_common(ah);
  215. bool longcal = false;
  216. bool shortcal = false;
  217. bool aniflag = false;
  218. unsigned int timestamp = jiffies_to_msecs(jiffies);
  219. u32 cal_interval, short_cal_interval;
  220. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  221. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  222. /* Only calibrate if awake */
  223. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  224. goto set_timer;
  225. ath9k_ps_wakeup(sc);
  226. /* Long calibration runs independently of short calibration. */
  227. if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
  228. longcal = true;
  229. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  230. common->ani.longcal_timer = timestamp;
  231. }
  232. /* Short calibration applies only while caldone is false */
  233. if (!common->ani.caldone) {
  234. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  235. shortcal = true;
  236. ath_print(common, ATH_DBG_ANI,
  237. "shortcal @%lu\n", jiffies);
  238. common->ani.shortcal_timer = timestamp;
  239. common->ani.resetcal_timer = timestamp;
  240. }
  241. } else {
  242. if ((timestamp - common->ani.resetcal_timer) >=
  243. ATH_RESTART_CALINTERVAL) {
  244. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  245. if (common->ani.caldone)
  246. common->ani.resetcal_timer = timestamp;
  247. }
  248. }
  249. /* Verify whether we must check ANI */
  250. if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
  251. aniflag = true;
  252. common->ani.checkani_timer = timestamp;
  253. }
  254. /* Skip all processing if there's nothing to do. */
  255. if (longcal || shortcal || aniflag) {
  256. /* Call ANI routine if necessary */
  257. if (aniflag)
  258. ath9k_hw_ani_monitor(ah, ah->curchan);
  259. /* Perform calibration if necessary */
  260. if (longcal || shortcal) {
  261. common->ani.caldone =
  262. ath9k_hw_calibrate(ah,
  263. ah->curchan,
  264. common->rx_chainmask,
  265. longcal);
  266. if (longcal)
  267. common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
  268. ah->curchan);
  269. ath_print(common, ATH_DBG_ANI,
  270. " calibrate chan %u/%x nf: %d\n",
  271. ah->curchan->channel,
  272. ah->curchan->channelFlags,
  273. common->ani.noise_floor);
  274. }
  275. }
  276. ath9k_ps_restore(sc);
  277. set_timer:
  278. /*
  279. * Set timer interval based on previous results.
  280. * The interval must be the shortest necessary to satisfy ANI,
  281. * short calibration and long calibration.
  282. */
  283. cal_interval = ATH_LONG_CALINTERVAL;
  284. if (sc->sc_ah->config.enable_ani)
  285. cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
  286. if (!common->ani.caldone)
  287. cal_interval = min(cal_interval, (u32)short_cal_interval);
  288. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  289. }
  290. static void ath_start_ani(struct ath_common *common)
  291. {
  292. unsigned long timestamp = jiffies_to_msecs(jiffies);
  293. struct ath_softc *sc = (struct ath_softc *) common->priv;
  294. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  295. return;
  296. common->ani.longcal_timer = timestamp;
  297. common->ani.shortcal_timer = timestamp;
  298. common->ani.checkani_timer = timestamp;
  299. mod_timer(&common->ani.timer,
  300. jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
  301. }
  302. /*
  303. * Update tx/rx chainmask. For legacy association,
  304. * hard code chainmask to 1x1, for 11n association, use
  305. * the chainmask configuration, for bt coexistence, use
  306. * the chainmask configuration even in legacy mode.
  307. */
  308. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  309. {
  310. struct ath_hw *ah = sc->sc_ah;
  311. struct ath_common *common = ath9k_hw_common(ah);
  312. if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
  313. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  314. common->tx_chainmask = ah->caps.tx_chainmask;
  315. common->rx_chainmask = ah->caps.rx_chainmask;
  316. } else {
  317. common->tx_chainmask = 1;
  318. common->rx_chainmask = 1;
  319. }
  320. ath_print(common, ATH_DBG_CONFIG,
  321. "tx chmask: %d, rx chmask: %d\n",
  322. common->tx_chainmask,
  323. common->rx_chainmask);
  324. }
  325. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  326. {
  327. struct ath_node *an;
  328. an = (struct ath_node *)sta->drv_priv;
  329. if (sc->sc_flags & SC_OP_TXAGGR) {
  330. ath_tx_node_init(sc, an);
  331. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  332. sta->ht_cap.ampdu_factor);
  333. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  334. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  335. }
  336. }
  337. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  338. {
  339. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  340. if (sc->sc_flags & SC_OP_TXAGGR)
  341. ath_tx_node_cleanup(sc, an);
  342. }
  343. void ath9k_tasklet(unsigned long data)
  344. {
  345. struct ath_softc *sc = (struct ath_softc *)data;
  346. struct ath_hw *ah = sc->sc_ah;
  347. struct ath_common *common = ath9k_hw_common(ah);
  348. u32 status = sc->intrstatus;
  349. u32 rxmask;
  350. ath9k_ps_wakeup(sc);
  351. if ((status & ATH9K_INT_FATAL) ||
  352. !ath9k_hw_check_alive(ah)) {
  353. ath_reset(sc, false);
  354. ath9k_ps_restore(sc);
  355. return;
  356. }
  357. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  358. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  359. ATH9K_INT_RXORN);
  360. else
  361. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  362. if (status & rxmask) {
  363. spin_lock_bh(&sc->rx.rxflushlock);
  364. /* Check for high priority Rx first */
  365. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  366. (status & ATH9K_INT_RXHP))
  367. ath_rx_tasklet(sc, 0, true);
  368. ath_rx_tasklet(sc, 0, false);
  369. spin_unlock_bh(&sc->rx.rxflushlock);
  370. }
  371. if (status & ATH9K_INT_TX) {
  372. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  373. ath_tx_edma_tasklet(sc);
  374. else
  375. ath_tx_tasklet(sc);
  376. }
  377. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  378. /*
  379. * TSF sync does not look correct; remain awake to sync with
  380. * the next Beacon.
  381. */
  382. ath_print(common, ATH_DBG_PS,
  383. "TSFOOR - Sync with next Beacon\n");
  384. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  385. }
  386. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  387. if (status & ATH9K_INT_GENTIMER)
  388. ath_gen_timer_isr(sc->sc_ah);
  389. /* re-enable hardware interrupt */
  390. ath9k_hw_set_interrupts(ah, ah->imask);
  391. ath9k_ps_restore(sc);
  392. }
  393. irqreturn_t ath_isr(int irq, void *dev)
  394. {
  395. #define SCHED_INTR ( \
  396. ATH9K_INT_FATAL | \
  397. ATH9K_INT_RXORN | \
  398. ATH9K_INT_RXEOL | \
  399. ATH9K_INT_RX | \
  400. ATH9K_INT_RXLP | \
  401. ATH9K_INT_RXHP | \
  402. ATH9K_INT_TX | \
  403. ATH9K_INT_BMISS | \
  404. ATH9K_INT_CST | \
  405. ATH9K_INT_TSFOOR | \
  406. ATH9K_INT_GENTIMER)
  407. struct ath_softc *sc = dev;
  408. struct ath_hw *ah = sc->sc_ah;
  409. enum ath9k_int status;
  410. bool sched = false;
  411. /*
  412. * The hardware is not ready/present, don't
  413. * touch anything. Note this can happen early
  414. * on if the IRQ is shared.
  415. */
  416. if (sc->sc_flags & SC_OP_INVALID)
  417. return IRQ_NONE;
  418. /* shared irq, not for us */
  419. if (!ath9k_hw_intrpend(ah))
  420. return IRQ_NONE;
  421. /*
  422. * Figure out the reason(s) for the interrupt. Note
  423. * that the hal returns a pseudo-ISR that may include
  424. * bits we haven't explicitly enabled so we mask the
  425. * value to insure we only process bits we requested.
  426. */
  427. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  428. status &= ah->imask; /* discard unasked-for bits */
  429. /*
  430. * If there are no status bits set, then this interrupt was not
  431. * for me (should have been caught above).
  432. */
  433. if (!status)
  434. return IRQ_NONE;
  435. /* Cache the status */
  436. sc->intrstatus = status;
  437. if (status & SCHED_INTR)
  438. sched = true;
  439. /*
  440. * If a FATAL or RXORN interrupt is received, we have to reset the
  441. * chip immediately.
  442. */
  443. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  444. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  445. goto chip_reset;
  446. if (status & ATH9K_INT_SWBA)
  447. tasklet_schedule(&sc->bcon_tasklet);
  448. if (status & ATH9K_INT_TXURN)
  449. ath9k_hw_updatetxtriglevel(ah, true);
  450. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  451. if (status & ATH9K_INT_RXEOL) {
  452. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  453. ath9k_hw_set_interrupts(ah, ah->imask);
  454. }
  455. }
  456. if (status & ATH9K_INT_MIB) {
  457. /*
  458. * Disable interrupts until we service the MIB
  459. * interrupt; otherwise it will continue to
  460. * fire.
  461. */
  462. ath9k_hw_set_interrupts(ah, 0);
  463. /*
  464. * Let the hal handle the event. We assume
  465. * it will clear whatever condition caused
  466. * the interrupt.
  467. */
  468. ath9k_hw_procmibevent(ah);
  469. ath9k_hw_set_interrupts(ah, ah->imask);
  470. }
  471. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  472. if (status & ATH9K_INT_TIM_TIMER) {
  473. /* Clear RxAbort bit so that we can
  474. * receive frames */
  475. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  476. ath9k_hw_setrxabort(sc->sc_ah, 0);
  477. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  478. }
  479. chip_reset:
  480. ath_debug_stat_interrupt(sc, status);
  481. if (sched) {
  482. /* turn off every interrupt except SWBA */
  483. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  484. tasklet_schedule(&sc->intr_tq);
  485. }
  486. return IRQ_HANDLED;
  487. #undef SCHED_INTR
  488. }
  489. static u32 ath_get_extchanmode(struct ath_softc *sc,
  490. struct ieee80211_channel *chan,
  491. enum nl80211_channel_type channel_type)
  492. {
  493. u32 chanmode = 0;
  494. switch (chan->band) {
  495. case IEEE80211_BAND_2GHZ:
  496. switch(channel_type) {
  497. case NL80211_CHAN_NO_HT:
  498. case NL80211_CHAN_HT20:
  499. chanmode = CHANNEL_G_HT20;
  500. break;
  501. case NL80211_CHAN_HT40PLUS:
  502. chanmode = CHANNEL_G_HT40PLUS;
  503. break;
  504. case NL80211_CHAN_HT40MINUS:
  505. chanmode = CHANNEL_G_HT40MINUS;
  506. break;
  507. }
  508. break;
  509. case IEEE80211_BAND_5GHZ:
  510. switch(channel_type) {
  511. case NL80211_CHAN_NO_HT:
  512. case NL80211_CHAN_HT20:
  513. chanmode = CHANNEL_A_HT20;
  514. break;
  515. case NL80211_CHAN_HT40PLUS:
  516. chanmode = CHANNEL_A_HT40PLUS;
  517. break;
  518. case NL80211_CHAN_HT40MINUS:
  519. chanmode = CHANNEL_A_HT40MINUS;
  520. break;
  521. }
  522. break;
  523. default:
  524. break;
  525. }
  526. return chanmode;
  527. }
  528. static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
  529. struct ath9k_keyval *hk, const u8 *addr,
  530. bool authenticator)
  531. {
  532. struct ath_hw *ah = common->ah;
  533. const u8 *key_rxmic;
  534. const u8 *key_txmic;
  535. key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
  536. key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
  537. if (addr == NULL) {
  538. /*
  539. * Group key installation - only two key cache entries are used
  540. * regardless of splitmic capability since group key is only
  541. * used either for TX or RX.
  542. */
  543. if (authenticator) {
  544. memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
  545. memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
  546. } else {
  547. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  548. memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
  549. }
  550. return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
  551. }
  552. if (!common->splitmic) {
  553. /* TX and RX keys share the same key cache entry. */
  554. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  555. memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
  556. return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
  557. }
  558. /* Separate key cache entries for TX and RX */
  559. /* TX key goes at first index, RX key at +32. */
  560. memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
  561. if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
  562. /* TX MIC entry failed. No need to proceed further */
  563. ath_print(common, ATH_DBG_FATAL,
  564. "Setting TX MIC Key Failed\n");
  565. return 0;
  566. }
  567. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  568. /* XXX delete tx key on failure? */
  569. return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
  570. }
  571. static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
  572. {
  573. int i;
  574. for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
  575. if (test_bit(i, common->keymap) ||
  576. test_bit(i + 64, common->keymap))
  577. continue; /* At least one part of TKIP key allocated */
  578. if (common->splitmic &&
  579. (test_bit(i + 32, common->keymap) ||
  580. test_bit(i + 64 + 32, common->keymap)))
  581. continue; /* At least one part of TKIP key allocated */
  582. /* Found a free slot for a TKIP key */
  583. return i;
  584. }
  585. return -1;
  586. }
  587. static int ath_reserve_key_cache_slot(struct ath_common *common)
  588. {
  589. int i;
  590. /* First, try to find slots that would not be available for TKIP. */
  591. if (common->splitmic) {
  592. for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
  593. if (!test_bit(i, common->keymap) &&
  594. (test_bit(i + 32, common->keymap) ||
  595. test_bit(i + 64, common->keymap) ||
  596. test_bit(i + 64 + 32, common->keymap)))
  597. return i;
  598. if (!test_bit(i + 32, common->keymap) &&
  599. (test_bit(i, common->keymap) ||
  600. test_bit(i + 64, common->keymap) ||
  601. test_bit(i + 64 + 32, common->keymap)))
  602. return i + 32;
  603. if (!test_bit(i + 64, common->keymap) &&
  604. (test_bit(i , common->keymap) ||
  605. test_bit(i + 32, common->keymap) ||
  606. test_bit(i + 64 + 32, common->keymap)))
  607. return i + 64;
  608. if (!test_bit(i + 64 + 32, common->keymap) &&
  609. (test_bit(i, common->keymap) ||
  610. test_bit(i + 32, common->keymap) ||
  611. test_bit(i + 64, common->keymap)))
  612. return i + 64 + 32;
  613. }
  614. } else {
  615. for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
  616. if (!test_bit(i, common->keymap) &&
  617. test_bit(i + 64, common->keymap))
  618. return i;
  619. if (test_bit(i, common->keymap) &&
  620. !test_bit(i + 64, common->keymap))
  621. return i + 64;
  622. }
  623. }
  624. /* No partially used TKIP slots, pick any available slot */
  625. for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
  626. /* Do not allow slots that could be needed for TKIP group keys
  627. * to be used. This limitation could be removed if we know that
  628. * TKIP will not be used. */
  629. if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
  630. continue;
  631. if (common->splitmic) {
  632. if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
  633. continue;
  634. if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
  635. continue;
  636. }
  637. if (!test_bit(i, common->keymap))
  638. return i; /* Found a free slot for a key */
  639. }
  640. /* No free slot found */
  641. return -1;
  642. }
  643. static int ath_key_config(struct ath_common *common,
  644. struct ieee80211_vif *vif,
  645. struct ieee80211_sta *sta,
  646. struct ieee80211_key_conf *key)
  647. {
  648. struct ath_hw *ah = common->ah;
  649. struct ath9k_keyval hk;
  650. const u8 *mac = NULL;
  651. int ret = 0;
  652. int idx;
  653. memset(&hk, 0, sizeof(hk));
  654. switch (key->alg) {
  655. case ALG_WEP:
  656. hk.kv_type = ATH9K_CIPHER_WEP;
  657. break;
  658. case ALG_TKIP:
  659. hk.kv_type = ATH9K_CIPHER_TKIP;
  660. break;
  661. case ALG_CCMP:
  662. hk.kv_type = ATH9K_CIPHER_AES_CCM;
  663. break;
  664. default:
  665. return -EOPNOTSUPP;
  666. }
  667. hk.kv_len = key->keylen;
  668. memcpy(hk.kv_val, key->key, key->keylen);
  669. if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  670. /* For now, use the default keys for broadcast keys. This may
  671. * need to change with virtual interfaces. */
  672. idx = key->keyidx;
  673. } else if (key->keyidx) {
  674. if (WARN_ON(!sta))
  675. return -EOPNOTSUPP;
  676. mac = sta->addr;
  677. if (vif->type != NL80211_IFTYPE_AP) {
  678. /* Only keyidx 0 should be used with unicast key, but
  679. * allow this for client mode for now. */
  680. idx = key->keyidx;
  681. } else
  682. return -EIO;
  683. } else {
  684. if (WARN_ON(!sta))
  685. return -EOPNOTSUPP;
  686. mac = sta->addr;
  687. if (key->alg == ALG_TKIP)
  688. idx = ath_reserve_key_cache_slot_tkip(common);
  689. else
  690. idx = ath_reserve_key_cache_slot(common);
  691. if (idx < 0)
  692. return -ENOSPC; /* no free key cache entries */
  693. }
  694. if (key->alg == ALG_TKIP)
  695. ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
  696. vif->type == NL80211_IFTYPE_AP);
  697. else
  698. ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
  699. if (!ret)
  700. return -EIO;
  701. set_bit(idx, common->keymap);
  702. if (key->alg == ALG_TKIP) {
  703. set_bit(idx + 64, common->keymap);
  704. if (common->splitmic) {
  705. set_bit(idx + 32, common->keymap);
  706. set_bit(idx + 64 + 32, common->keymap);
  707. }
  708. }
  709. return idx;
  710. }
  711. static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
  712. {
  713. struct ath_hw *ah = common->ah;
  714. ath9k_hw_keyreset(ah, key->hw_key_idx);
  715. if (key->hw_key_idx < IEEE80211_WEP_NKID)
  716. return;
  717. clear_bit(key->hw_key_idx, common->keymap);
  718. if (key->alg != ALG_TKIP)
  719. return;
  720. clear_bit(key->hw_key_idx + 64, common->keymap);
  721. if (common->splitmic) {
  722. ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
  723. clear_bit(key->hw_key_idx + 32, common->keymap);
  724. clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
  725. }
  726. }
  727. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  728. struct ieee80211_vif *vif,
  729. struct ieee80211_bss_conf *bss_conf)
  730. {
  731. struct ath_hw *ah = sc->sc_ah;
  732. struct ath_common *common = ath9k_hw_common(ah);
  733. if (bss_conf->assoc) {
  734. ath_print(common, ATH_DBG_CONFIG,
  735. "Bss Info ASSOC %d, bssid: %pM\n",
  736. bss_conf->aid, common->curbssid);
  737. /* New association, store aid */
  738. common->curaid = bss_conf->aid;
  739. ath9k_hw_write_associd(ah);
  740. /*
  741. * Request a re-configuration of Beacon related timers
  742. * on the receipt of the first Beacon frame (i.e.,
  743. * after time sync with the AP).
  744. */
  745. sc->ps_flags |= PS_BEACON_SYNC;
  746. /* Configure the beacon */
  747. ath_beacon_config(sc, vif);
  748. /* Reset rssi stats */
  749. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  750. sc->sc_flags |= SC_OP_ANI_RUN;
  751. ath_start_ani(common);
  752. } else {
  753. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  754. common->curaid = 0;
  755. /* Stop ANI */
  756. sc->sc_flags &= ~SC_OP_ANI_RUN;
  757. del_timer_sync(&common->ani.timer);
  758. }
  759. }
  760. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  761. {
  762. struct ath_hw *ah = sc->sc_ah;
  763. struct ath_common *common = ath9k_hw_common(ah);
  764. struct ieee80211_channel *channel = hw->conf.channel;
  765. int r;
  766. ath9k_ps_wakeup(sc);
  767. ath9k_hw_configpcipowersave(ah, 0, 0);
  768. if (!ah->curchan)
  769. ah->curchan = ath_get_curchannel(sc, sc->hw);
  770. spin_lock_bh(&sc->sc_resetlock);
  771. r = ath9k_hw_reset(ah, ah->curchan, false);
  772. if (r) {
  773. ath_print(common, ATH_DBG_FATAL,
  774. "Unable to reset channel (%u MHz), "
  775. "reset status %d\n",
  776. channel->center_freq, r);
  777. }
  778. spin_unlock_bh(&sc->sc_resetlock);
  779. ath_update_txpow(sc);
  780. if (ath_startrecv(sc) != 0) {
  781. ath_print(common, ATH_DBG_FATAL,
  782. "Unable to restart recv logic\n");
  783. return;
  784. }
  785. if (sc->sc_flags & SC_OP_BEACONS)
  786. ath_beacon_config(sc, NULL); /* restart beacons */
  787. /* Re-Enable interrupts */
  788. ath9k_hw_set_interrupts(ah, ah->imask);
  789. /* Enable LED */
  790. ath9k_hw_cfg_output(ah, ah->led_pin,
  791. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  792. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  793. ieee80211_wake_queues(hw);
  794. ath9k_ps_restore(sc);
  795. }
  796. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  797. {
  798. struct ath_hw *ah = sc->sc_ah;
  799. struct ieee80211_channel *channel = hw->conf.channel;
  800. int r;
  801. ath9k_ps_wakeup(sc);
  802. ieee80211_stop_queues(hw);
  803. /* Disable LED */
  804. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  805. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  806. /* Disable interrupts */
  807. ath9k_hw_set_interrupts(ah, 0);
  808. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  809. ath_stoprecv(sc); /* turn off frame recv */
  810. ath_flushrecv(sc); /* flush recv queue */
  811. if (!ah->curchan)
  812. ah->curchan = ath_get_curchannel(sc, hw);
  813. spin_lock_bh(&sc->sc_resetlock);
  814. r = ath9k_hw_reset(ah, ah->curchan, false);
  815. if (r) {
  816. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  817. "Unable to reset channel (%u MHz), "
  818. "reset status %d\n",
  819. channel->center_freq, r);
  820. }
  821. spin_unlock_bh(&sc->sc_resetlock);
  822. ath9k_hw_phy_disable(ah);
  823. ath9k_hw_configpcipowersave(ah, 1, 1);
  824. ath9k_ps_restore(sc);
  825. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  826. }
  827. int ath_reset(struct ath_softc *sc, bool retry_tx)
  828. {
  829. struct ath_hw *ah = sc->sc_ah;
  830. struct ath_common *common = ath9k_hw_common(ah);
  831. struct ieee80211_hw *hw = sc->hw;
  832. int r;
  833. /* Stop ANI */
  834. del_timer_sync(&common->ani.timer);
  835. ieee80211_stop_queues(hw);
  836. ath9k_hw_set_interrupts(ah, 0);
  837. ath_drain_all_txq(sc, retry_tx);
  838. ath_stoprecv(sc);
  839. ath_flushrecv(sc);
  840. spin_lock_bh(&sc->sc_resetlock);
  841. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
  842. if (r)
  843. ath_print(common, ATH_DBG_FATAL,
  844. "Unable to reset hardware; reset status %d\n", r);
  845. spin_unlock_bh(&sc->sc_resetlock);
  846. if (ath_startrecv(sc) != 0)
  847. ath_print(common, ATH_DBG_FATAL,
  848. "Unable to start recv logic\n");
  849. /*
  850. * We may be doing a reset in response to a request
  851. * that changes the channel so update any state that
  852. * might change as a result.
  853. */
  854. ath_cache_conf_rate(sc, &hw->conf);
  855. ath_update_txpow(sc);
  856. if (sc->sc_flags & SC_OP_BEACONS)
  857. ath_beacon_config(sc, NULL); /* restart beacons */
  858. ath9k_hw_set_interrupts(ah, ah->imask);
  859. if (retry_tx) {
  860. int i;
  861. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  862. if (ATH_TXQ_SETUP(sc, i)) {
  863. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  864. ath_txq_schedule(sc, &sc->tx.txq[i]);
  865. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  866. }
  867. }
  868. }
  869. ieee80211_wake_queues(hw);
  870. /* Start ANI */
  871. ath_start_ani(common);
  872. return r;
  873. }
  874. int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  875. {
  876. int qnum;
  877. switch (queue) {
  878. case 0:
  879. qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
  880. break;
  881. case 1:
  882. qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
  883. break;
  884. case 2:
  885. qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
  886. break;
  887. case 3:
  888. qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
  889. break;
  890. default:
  891. qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
  892. break;
  893. }
  894. return qnum;
  895. }
  896. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  897. {
  898. int qnum;
  899. switch (queue) {
  900. case ATH9K_WME_AC_VO:
  901. qnum = 0;
  902. break;
  903. case ATH9K_WME_AC_VI:
  904. qnum = 1;
  905. break;
  906. case ATH9K_WME_AC_BE:
  907. qnum = 2;
  908. break;
  909. case ATH9K_WME_AC_BK:
  910. qnum = 3;
  911. break;
  912. default:
  913. qnum = -1;
  914. break;
  915. }
  916. return qnum;
  917. }
  918. /* XXX: Remove me once we don't depend on ath9k_channel for all
  919. * this redundant data */
  920. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  921. struct ath9k_channel *ichan)
  922. {
  923. struct ieee80211_channel *chan = hw->conf.channel;
  924. struct ieee80211_conf *conf = &hw->conf;
  925. ichan->channel = chan->center_freq;
  926. ichan->chan = chan;
  927. if (chan->band == IEEE80211_BAND_2GHZ) {
  928. ichan->chanmode = CHANNEL_G;
  929. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  930. } else {
  931. ichan->chanmode = CHANNEL_A;
  932. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  933. }
  934. if (conf_is_ht(conf))
  935. ichan->chanmode = ath_get_extchanmode(sc, chan,
  936. conf->channel_type);
  937. }
  938. /**********************/
  939. /* mac80211 callbacks */
  940. /**********************/
  941. static int ath9k_start(struct ieee80211_hw *hw)
  942. {
  943. struct ath_wiphy *aphy = hw->priv;
  944. struct ath_softc *sc = aphy->sc;
  945. struct ath_hw *ah = sc->sc_ah;
  946. struct ath_common *common = ath9k_hw_common(ah);
  947. struct ieee80211_channel *curchan = hw->conf.channel;
  948. struct ath9k_channel *init_channel;
  949. int r;
  950. ath_print(common, ATH_DBG_CONFIG,
  951. "Starting driver with initial channel: %d MHz\n",
  952. curchan->center_freq);
  953. mutex_lock(&sc->mutex);
  954. if (ath9k_wiphy_started(sc)) {
  955. if (sc->chan_idx == curchan->hw_value) {
  956. /*
  957. * Already on the operational channel, the new wiphy
  958. * can be marked active.
  959. */
  960. aphy->state = ATH_WIPHY_ACTIVE;
  961. ieee80211_wake_queues(hw);
  962. } else {
  963. /*
  964. * Another wiphy is on another channel, start the new
  965. * wiphy in paused state.
  966. */
  967. aphy->state = ATH_WIPHY_PAUSED;
  968. ieee80211_stop_queues(hw);
  969. }
  970. mutex_unlock(&sc->mutex);
  971. return 0;
  972. }
  973. aphy->state = ATH_WIPHY_ACTIVE;
  974. /* setup initial channel */
  975. sc->chan_idx = curchan->hw_value;
  976. init_channel = ath_get_curchannel(sc, hw);
  977. /* Reset SERDES registers */
  978. ath9k_hw_configpcipowersave(ah, 0, 0);
  979. /*
  980. * The basic interface to setting the hardware in a good
  981. * state is ``reset''. On return the hardware is known to
  982. * be powered up and with interrupts disabled. This must
  983. * be followed by initialization of the appropriate bits
  984. * and then setup of the interrupt mask.
  985. */
  986. spin_lock_bh(&sc->sc_resetlock);
  987. r = ath9k_hw_reset(ah, init_channel, false);
  988. if (r) {
  989. ath_print(common, ATH_DBG_FATAL,
  990. "Unable to reset hardware; reset status %d "
  991. "(freq %u MHz)\n", r,
  992. curchan->center_freq);
  993. spin_unlock_bh(&sc->sc_resetlock);
  994. goto mutex_unlock;
  995. }
  996. spin_unlock_bh(&sc->sc_resetlock);
  997. /*
  998. * This is needed only to setup initial state
  999. * but it's best done after a reset.
  1000. */
  1001. ath_update_txpow(sc);
  1002. /*
  1003. * Setup the hardware after reset:
  1004. * The receive engine is set going.
  1005. * Frame transmit is handled entirely
  1006. * in the frame output path; there's nothing to do
  1007. * here except setup the interrupt mask.
  1008. */
  1009. if (ath_startrecv(sc) != 0) {
  1010. ath_print(common, ATH_DBG_FATAL,
  1011. "Unable to start recv logic\n");
  1012. r = -EIO;
  1013. goto mutex_unlock;
  1014. }
  1015. /* Setup our intr mask. */
  1016. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  1017. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  1018. ATH9K_INT_GLOBAL;
  1019. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  1020. ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP;
  1021. else
  1022. ah->imask |= ATH9K_INT_RX;
  1023. if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
  1024. ah->imask |= ATH9K_INT_GTT;
  1025. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  1026. ah->imask |= ATH9K_INT_CST;
  1027. ath_cache_conf_rate(sc, &hw->conf);
  1028. sc->sc_flags &= ~SC_OP_INVALID;
  1029. /* Disable BMISS interrupt when we're not associated */
  1030. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  1031. ath9k_hw_set_interrupts(ah, ah->imask);
  1032. ieee80211_wake_queues(hw);
  1033. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  1034. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  1035. !ah->btcoex_hw.enabled) {
  1036. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  1037. AR_STOMP_LOW_WLAN_WGHT);
  1038. ath9k_hw_btcoex_enable(ah);
  1039. if (common->bus_ops->bt_coex_prep)
  1040. common->bus_ops->bt_coex_prep(common);
  1041. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1042. ath9k_btcoex_timer_resume(sc);
  1043. }
  1044. mutex_unlock:
  1045. mutex_unlock(&sc->mutex);
  1046. return r;
  1047. }
  1048. static int ath9k_tx(struct ieee80211_hw *hw,
  1049. struct sk_buff *skb)
  1050. {
  1051. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1052. struct ath_wiphy *aphy = hw->priv;
  1053. struct ath_softc *sc = aphy->sc;
  1054. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1055. struct ath_tx_control txctl;
  1056. int padpos, padsize;
  1057. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1058. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1059. ath_print(common, ATH_DBG_XMIT,
  1060. "ath9k: %s: TX in unexpected wiphy state "
  1061. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1062. goto exit;
  1063. }
  1064. if (sc->ps_enabled) {
  1065. /*
  1066. * mac80211 does not set PM field for normal data frames, so we
  1067. * need to update that based on the current PS mode.
  1068. */
  1069. if (ieee80211_is_data(hdr->frame_control) &&
  1070. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1071. !ieee80211_has_pm(hdr->frame_control)) {
  1072. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1073. "while in PS mode\n");
  1074. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1075. }
  1076. }
  1077. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1078. /*
  1079. * We are using PS-Poll and mac80211 can request TX while in
  1080. * power save mode. Need to wake up hardware for the TX to be
  1081. * completed and if needed, also for RX of buffered frames.
  1082. */
  1083. ath9k_ps_wakeup(sc);
  1084. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1085. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1086. ath_print(common, ATH_DBG_PS,
  1087. "Sending PS-Poll to pick a buffered frame\n");
  1088. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1089. } else {
  1090. ath_print(common, ATH_DBG_PS,
  1091. "Wake up to complete TX\n");
  1092. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1093. }
  1094. /*
  1095. * The actual restore operation will happen only after
  1096. * the sc_flags bit is cleared. We are just dropping
  1097. * the ps_usecount here.
  1098. */
  1099. ath9k_ps_restore(sc);
  1100. }
  1101. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1102. /*
  1103. * As a temporary workaround, assign seq# here; this will likely need
  1104. * to be cleaned up to work better with Beacon transmission and virtual
  1105. * BSSes.
  1106. */
  1107. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1108. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1109. sc->tx.seq_no += 0x10;
  1110. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1111. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1112. }
  1113. /* Add the padding after the header if this is not already done */
  1114. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1115. padsize = padpos & 3;
  1116. if (padsize && skb->len>padpos) {
  1117. if (skb_headroom(skb) < padsize)
  1118. return -1;
  1119. skb_push(skb, padsize);
  1120. memmove(skb->data, skb->data + padsize, padpos);
  1121. }
  1122. /* Check if a tx queue is available */
  1123. txctl.txq = ath_test_get_txq(sc, skb);
  1124. if (!txctl.txq)
  1125. goto exit;
  1126. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1127. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1128. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1129. goto exit;
  1130. }
  1131. return 0;
  1132. exit:
  1133. dev_kfree_skb_any(skb);
  1134. return 0;
  1135. }
  1136. static void ath9k_stop(struct ieee80211_hw *hw)
  1137. {
  1138. struct ath_wiphy *aphy = hw->priv;
  1139. struct ath_softc *sc = aphy->sc;
  1140. struct ath_hw *ah = sc->sc_ah;
  1141. struct ath_common *common = ath9k_hw_common(ah);
  1142. mutex_lock(&sc->mutex);
  1143. aphy->state = ATH_WIPHY_INACTIVE;
  1144. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1145. cancel_delayed_work_sync(&sc->tx_complete_work);
  1146. if (!sc->num_sec_wiphy) {
  1147. cancel_delayed_work_sync(&sc->wiphy_work);
  1148. cancel_work_sync(&sc->chan_work);
  1149. }
  1150. if (sc->sc_flags & SC_OP_INVALID) {
  1151. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1152. mutex_unlock(&sc->mutex);
  1153. return;
  1154. }
  1155. if (ath9k_wiphy_started(sc)) {
  1156. mutex_unlock(&sc->mutex);
  1157. return; /* another wiphy still in use */
  1158. }
  1159. /* Ensure HW is awake when we try to shut it down. */
  1160. ath9k_ps_wakeup(sc);
  1161. if (ah->btcoex_hw.enabled) {
  1162. ath9k_hw_btcoex_disable(ah);
  1163. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1164. ath9k_btcoex_timer_pause(sc);
  1165. }
  1166. /* make sure h/w will not generate any interrupt
  1167. * before setting the invalid flag. */
  1168. ath9k_hw_set_interrupts(ah, 0);
  1169. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1170. ath_drain_all_txq(sc, false);
  1171. ath_stoprecv(sc);
  1172. ath9k_hw_phy_disable(ah);
  1173. } else
  1174. sc->rx.rxlink = NULL;
  1175. /* disable HAL and put h/w to sleep */
  1176. ath9k_hw_disable(ah);
  1177. ath9k_hw_configpcipowersave(ah, 1, 1);
  1178. ath9k_ps_restore(sc);
  1179. /* Finally, put the chip in FULL SLEEP mode */
  1180. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1181. sc->sc_flags |= SC_OP_INVALID;
  1182. mutex_unlock(&sc->mutex);
  1183. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1184. }
  1185. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1186. struct ieee80211_vif *vif)
  1187. {
  1188. struct ath_wiphy *aphy = hw->priv;
  1189. struct ath_softc *sc = aphy->sc;
  1190. struct ath_hw *ah = sc->sc_ah;
  1191. struct ath_common *common = ath9k_hw_common(ah);
  1192. struct ath_vif *avp = (void *)vif->drv_priv;
  1193. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1194. int ret = 0;
  1195. mutex_lock(&sc->mutex);
  1196. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
  1197. sc->nvifs > 0) {
  1198. ret = -ENOBUFS;
  1199. goto out;
  1200. }
  1201. switch (vif->type) {
  1202. case NL80211_IFTYPE_STATION:
  1203. ic_opmode = NL80211_IFTYPE_STATION;
  1204. break;
  1205. case NL80211_IFTYPE_ADHOC:
  1206. case NL80211_IFTYPE_AP:
  1207. case NL80211_IFTYPE_MESH_POINT:
  1208. if (sc->nbcnvifs >= ATH_BCBUF) {
  1209. ret = -ENOBUFS;
  1210. goto out;
  1211. }
  1212. ic_opmode = vif->type;
  1213. break;
  1214. default:
  1215. ath_print(common, ATH_DBG_FATAL,
  1216. "Interface type %d not yet supported\n", vif->type);
  1217. ret = -EOPNOTSUPP;
  1218. goto out;
  1219. }
  1220. ath_print(common, ATH_DBG_CONFIG,
  1221. "Attach a VIF of type: %d\n", ic_opmode);
  1222. /* Set the VIF opmode */
  1223. avp->av_opmode = ic_opmode;
  1224. avp->av_bslot = -1;
  1225. sc->nvifs++;
  1226. if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
  1227. ath9k_set_bssid_mask(hw);
  1228. if (sc->nvifs > 1)
  1229. goto out; /* skip global settings for secondary vif */
  1230. if (ic_opmode == NL80211_IFTYPE_AP) {
  1231. ath9k_hw_set_tsfadjust(ah, 1);
  1232. sc->sc_flags |= SC_OP_TSF_RESET;
  1233. }
  1234. /* Set the device opmode */
  1235. ah->opmode = ic_opmode;
  1236. /*
  1237. * Enable MIB interrupts when there are hardware phy counters.
  1238. * Note we only do this (at the moment) for station mode.
  1239. */
  1240. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1241. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1242. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1243. if (ah->config.enable_ani)
  1244. ah->imask |= ATH9K_INT_MIB;
  1245. ah->imask |= ATH9K_INT_TSFOOR;
  1246. }
  1247. ath9k_hw_set_interrupts(ah, ah->imask);
  1248. if (vif->type == NL80211_IFTYPE_AP ||
  1249. vif->type == NL80211_IFTYPE_ADHOC ||
  1250. vif->type == NL80211_IFTYPE_MONITOR) {
  1251. sc->sc_flags |= SC_OP_ANI_RUN;
  1252. ath_start_ani(common);
  1253. }
  1254. out:
  1255. mutex_unlock(&sc->mutex);
  1256. return ret;
  1257. }
  1258. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1259. struct ieee80211_vif *vif)
  1260. {
  1261. struct ath_wiphy *aphy = hw->priv;
  1262. struct ath_softc *sc = aphy->sc;
  1263. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1264. struct ath_vif *avp = (void *)vif->drv_priv;
  1265. int i;
  1266. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1267. mutex_lock(&sc->mutex);
  1268. /* Stop ANI */
  1269. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1270. del_timer_sync(&common->ani.timer);
  1271. /* Reclaim beacon resources */
  1272. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1273. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1274. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1275. ath9k_ps_wakeup(sc);
  1276. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1277. ath9k_ps_restore(sc);
  1278. }
  1279. ath_beacon_return(sc, avp);
  1280. sc->sc_flags &= ~SC_OP_BEACONS;
  1281. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1282. if (sc->beacon.bslot[i] == vif) {
  1283. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1284. "slot\n", __func__);
  1285. sc->beacon.bslot[i] = NULL;
  1286. sc->beacon.bslot_aphy[i] = NULL;
  1287. }
  1288. }
  1289. sc->nvifs--;
  1290. mutex_unlock(&sc->mutex);
  1291. }
  1292. void ath9k_enable_ps(struct ath_softc *sc)
  1293. {
  1294. struct ath_hw *ah = sc->sc_ah;
  1295. sc->ps_enabled = true;
  1296. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1297. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1298. ah->imask |= ATH9K_INT_TIM_TIMER;
  1299. ath9k_hw_set_interrupts(ah, ah->imask);
  1300. }
  1301. }
  1302. ath9k_hw_setrxabort(ah, 1);
  1303. }
  1304. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1305. {
  1306. struct ath_wiphy *aphy = hw->priv;
  1307. struct ath_softc *sc = aphy->sc;
  1308. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1309. struct ieee80211_conf *conf = &hw->conf;
  1310. struct ath_hw *ah = sc->sc_ah;
  1311. bool disable_radio;
  1312. mutex_lock(&sc->mutex);
  1313. /*
  1314. * Leave this as the first check because we need to turn on the
  1315. * radio if it was disabled before prior to processing the rest
  1316. * of the changes. Likewise we must only disable the radio towards
  1317. * the end.
  1318. */
  1319. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1320. bool enable_radio;
  1321. bool all_wiphys_idle;
  1322. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1323. spin_lock_bh(&sc->wiphy_lock);
  1324. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1325. ath9k_set_wiphy_idle(aphy, idle);
  1326. enable_radio = (!idle && all_wiphys_idle);
  1327. /*
  1328. * After we unlock here its possible another wiphy
  1329. * can be re-renabled so to account for that we will
  1330. * only disable the radio toward the end of this routine
  1331. * if by then all wiphys are still idle.
  1332. */
  1333. spin_unlock_bh(&sc->wiphy_lock);
  1334. if (enable_radio) {
  1335. sc->ps_idle = false;
  1336. ath_radio_enable(sc, hw);
  1337. ath_print(common, ATH_DBG_CONFIG,
  1338. "not-idle: enabling radio\n");
  1339. }
  1340. }
  1341. /*
  1342. * We just prepare to enable PS. We have to wait until our AP has
  1343. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1344. * those ACKs and end up retransmitting the same null data frames.
  1345. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1346. */
  1347. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1348. if (conf->flags & IEEE80211_CONF_PS) {
  1349. sc->ps_flags |= PS_ENABLED;
  1350. /*
  1351. * At this point we know hardware has received an ACK
  1352. * of a previously sent null data frame.
  1353. */
  1354. if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
  1355. sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
  1356. ath9k_enable_ps(sc);
  1357. }
  1358. } else {
  1359. sc->ps_enabled = false;
  1360. sc->ps_flags &= ~(PS_ENABLED |
  1361. PS_NULLFUNC_COMPLETED);
  1362. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  1363. if (!(ah->caps.hw_caps &
  1364. ATH9K_HW_CAP_AUTOSLEEP)) {
  1365. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1366. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1367. PS_WAIT_FOR_CAB |
  1368. PS_WAIT_FOR_PSPOLL_DATA |
  1369. PS_WAIT_FOR_TX_ACK);
  1370. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1371. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1372. ath9k_hw_set_interrupts(sc->sc_ah,
  1373. ah->imask);
  1374. }
  1375. }
  1376. }
  1377. }
  1378. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1379. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1380. ath_print(common, ATH_DBG_CONFIG,
  1381. "HW opmode set to Monitor mode\n");
  1382. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1383. }
  1384. }
  1385. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1386. struct ieee80211_channel *curchan = hw->conf.channel;
  1387. int pos = curchan->hw_value;
  1388. aphy->chan_idx = pos;
  1389. aphy->chan_is_ht = conf_is_ht(conf);
  1390. if (aphy->state == ATH_WIPHY_SCAN ||
  1391. aphy->state == ATH_WIPHY_ACTIVE)
  1392. ath9k_wiphy_pause_all_forced(sc, aphy);
  1393. else {
  1394. /*
  1395. * Do not change operational channel based on a paused
  1396. * wiphy changes.
  1397. */
  1398. goto skip_chan_change;
  1399. }
  1400. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1401. curchan->center_freq);
  1402. /* XXX: remove me eventualy */
  1403. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1404. ath_update_chainmask(sc, conf_is_ht(conf));
  1405. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1406. ath_print(common, ATH_DBG_FATAL,
  1407. "Unable to set channel\n");
  1408. mutex_unlock(&sc->mutex);
  1409. return -EINVAL;
  1410. }
  1411. }
  1412. skip_chan_change:
  1413. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1414. sc->config.txpowlimit = 2 * conf->power_level;
  1415. ath_update_txpow(sc);
  1416. }
  1417. spin_lock_bh(&sc->wiphy_lock);
  1418. disable_radio = ath9k_all_wiphys_idle(sc);
  1419. spin_unlock_bh(&sc->wiphy_lock);
  1420. if (disable_radio) {
  1421. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1422. sc->ps_idle = true;
  1423. ath_radio_disable(sc, hw);
  1424. }
  1425. mutex_unlock(&sc->mutex);
  1426. return 0;
  1427. }
  1428. #define SUPPORTED_FILTERS \
  1429. (FIF_PROMISC_IN_BSS | \
  1430. FIF_ALLMULTI | \
  1431. FIF_CONTROL | \
  1432. FIF_PSPOLL | \
  1433. FIF_OTHER_BSS | \
  1434. FIF_BCN_PRBRESP_PROMISC | \
  1435. FIF_FCSFAIL)
  1436. /* FIXME: sc->sc_full_reset ? */
  1437. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1438. unsigned int changed_flags,
  1439. unsigned int *total_flags,
  1440. u64 multicast)
  1441. {
  1442. struct ath_wiphy *aphy = hw->priv;
  1443. struct ath_softc *sc = aphy->sc;
  1444. u32 rfilt;
  1445. changed_flags &= SUPPORTED_FILTERS;
  1446. *total_flags &= SUPPORTED_FILTERS;
  1447. sc->rx.rxfilter = *total_flags;
  1448. ath9k_ps_wakeup(sc);
  1449. rfilt = ath_calcrxfilter(sc);
  1450. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1451. ath9k_ps_restore(sc);
  1452. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1453. "Set HW RX filter: 0x%x\n", rfilt);
  1454. }
  1455. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1456. struct ieee80211_vif *vif,
  1457. struct ieee80211_sta *sta)
  1458. {
  1459. struct ath_wiphy *aphy = hw->priv;
  1460. struct ath_softc *sc = aphy->sc;
  1461. ath_node_attach(sc, sta);
  1462. return 0;
  1463. }
  1464. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1465. struct ieee80211_vif *vif,
  1466. struct ieee80211_sta *sta)
  1467. {
  1468. struct ath_wiphy *aphy = hw->priv;
  1469. struct ath_softc *sc = aphy->sc;
  1470. ath_node_detach(sc, sta);
  1471. return 0;
  1472. }
  1473. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1474. const struct ieee80211_tx_queue_params *params)
  1475. {
  1476. struct ath_wiphy *aphy = hw->priv;
  1477. struct ath_softc *sc = aphy->sc;
  1478. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1479. struct ath9k_tx_queue_info qi;
  1480. int ret = 0, qnum;
  1481. if (queue >= WME_NUM_AC)
  1482. return 0;
  1483. mutex_lock(&sc->mutex);
  1484. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1485. qi.tqi_aifs = params->aifs;
  1486. qi.tqi_cwmin = params->cw_min;
  1487. qi.tqi_cwmax = params->cw_max;
  1488. qi.tqi_burstTime = params->txop;
  1489. qnum = ath_get_hal_qnum(queue, sc);
  1490. ath_print(common, ATH_DBG_CONFIG,
  1491. "Configure tx [queue/halq] [%d/%d], "
  1492. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1493. queue, qnum, params->aifs, params->cw_min,
  1494. params->cw_max, params->txop);
  1495. ret = ath_txq_update(sc, qnum, &qi);
  1496. if (ret)
  1497. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1498. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1499. if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
  1500. ath_beaconq_config(sc);
  1501. mutex_unlock(&sc->mutex);
  1502. return ret;
  1503. }
  1504. static int ath9k_set_key(struct ieee80211_hw *hw,
  1505. enum set_key_cmd cmd,
  1506. struct ieee80211_vif *vif,
  1507. struct ieee80211_sta *sta,
  1508. struct ieee80211_key_conf *key)
  1509. {
  1510. struct ath_wiphy *aphy = hw->priv;
  1511. struct ath_softc *sc = aphy->sc;
  1512. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1513. int ret = 0;
  1514. if (modparam_nohwcrypt)
  1515. return -ENOSPC;
  1516. mutex_lock(&sc->mutex);
  1517. ath9k_ps_wakeup(sc);
  1518. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1519. switch (cmd) {
  1520. case SET_KEY:
  1521. ret = ath_key_config(common, vif, sta, key);
  1522. if (ret >= 0) {
  1523. key->hw_key_idx = ret;
  1524. /* push IV and Michael MIC generation to stack */
  1525. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1526. if (key->alg == ALG_TKIP)
  1527. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1528. if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
  1529. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1530. ret = 0;
  1531. }
  1532. break;
  1533. case DISABLE_KEY:
  1534. ath_key_delete(common, key);
  1535. break;
  1536. default:
  1537. ret = -EINVAL;
  1538. }
  1539. ath9k_ps_restore(sc);
  1540. mutex_unlock(&sc->mutex);
  1541. return ret;
  1542. }
  1543. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1544. struct ieee80211_vif *vif,
  1545. struct ieee80211_bss_conf *bss_conf,
  1546. u32 changed)
  1547. {
  1548. struct ath_wiphy *aphy = hw->priv;
  1549. struct ath_softc *sc = aphy->sc;
  1550. struct ath_hw *ah = sc->sc_ah;
  1551. struct ath_common *common = ath9k_hw_common(ah);
  1552. struct ath_vif *avp = (void *)vif->drv_priv;
  1553. int slottime;
  1554. int error;
  1555. mutex_lock(&sc->mutex);
  1556. if (changed & BSS_CHANGED_BSSID) {
  1557. /* Set BSSID */
  1558. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1559. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1560. common->curaid = 0;
  1561. ath9k_hw_write_associd(ah);
  1562. /* Set aggregation protection mode parameters */
  1563. sc->config.ath_aggr_prot = 0;
  1564. /* Only legacy IBSS for now */
  1565. if (vif->type == NL80211_IFTYPE_ADHOC)
  1566. ath_update_chainmask(sc, 0);
  1567. ath_print(common, ATH_DBG_CONFIG,
  1568. "BSSID: %pM aid: 0x%x\n",
  1569. common->curbssid, common->curaid);
  1570. /* need to reconfigure the beacon */
  1571. sc->sc_flags &= ~SC_OP_BEACONS ;
  1572. }
  1573. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1574. if ((changed & BSS_CHANGED_BEACON) ||
  1575. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1576. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1577. error = ath_beacon_alloc(aphy, vif);
  1578. if (!error)
  1579. ath_beacon_config(sc, vif);
  1580. }
  1581. if (changed & BSS_CHANGED_ERP_SLOT) {
  1582. if (bss_conf->use_short_slot)
  1583. slottime = 9;
  1584. else
  1585. slottime = 20;
  1586. if (vif->type == NL80211_IFTYPE_AP) {
  1587. /*
  1588. * Defer update, so that connected stations can adjust
  1589. * their settings at the same time.
  1590. * See beacon.c for more details
  1591. */
  1592. sc->beacon.slottime = slottime;
  1593. sc->beacon.updateslot = UPDATE;
  1594. } else {
  1595. ah->slottime = slottime;
  1596. ath9k_hw_init_global_settings(ah);
  1597. }
  1598. }
  1599. /* Disable transmission of beacons */
  1600. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1601. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1602. if (changed & BSS_CHANGED_BEACON_INT) {
  1603. sc->beacon_interval = bss_conf->beacon_int;
  1604. /*
  1605. * In case of AP mode, the HW TSF has to be reset
  1606. * when the beacon interval changes.
  1607. */
  1608. if (vif->type == NL80211_IFTYPE_AP) {
  1609. sc->sc_flags |= SC_OP_TSF_RESET;
  1610. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1611. error = ath_beacon_alloc(aphy, vif);
  1612. if (!error)
  1613. ath_beacon_config(sc, vif);
  1614. } else {
  1615. ath_beacon_config(sc, vif);
  1616. }
  1617. }
  1618. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1619. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1620. bss_conf->use_short_preamble);
  1621. if (bss_conf->use_short_preamble)
  1622. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1623. else
  1624. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1625. }
  1626. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1627. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1628. bss_conf->use_cts_prot);
  1629. if (bss_conf->use_cts_prot &&
  1630. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1631. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1632. else
  1633. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1634. }
  1635. if (changed & BSS_CHANGED_ASSOC) {
  1636. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1637. bss_conf->assoc);
  1638. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1639. }
  1640. mutex_unlock(&sc->mutex);
  1641. }
  1642. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1643. {
  1644. u64 tsf;
  1645. struct ath_wiphy *aphy = hw->priv;
  1646. struct ath_softc *sc = aphy->sc;
  1647. mutex_lock(&sc->mutex);
  1648. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1649. mutex_unlock(&sc->mutex);
  1650. return tsf;
  1651. }
  1652. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1653. {
  1654. struct ath_wiphy *aphy = hw->priv;
  1655. struct ath_softc *sc = aphy->sc;
  1656. mutex_lock(&sc->mutex);
  1657. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1658. mutex_unlock(&sc->mutex);
  1659. }
  1660. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1661. {
  1662. struct ath_wiphy *aphy = hw->priv;
  1663. struct ath_softc *sc = aphy->sc;
  1664. mutex_lock(&sc->mutex);
  1665. ath9k_ps_wakeup(sc);
  1666. ath9k_hw_reset_tsf(sc->sc_ah);
  1667. ath9k_ps_restore(sc);
  1668. mutex_unlock(&sc->mutex);
  1669. }
  1670. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1671. struct ieee80211_vif *vif,
  1672. enum ieee80211_ampdu_mlme_action action,
  1673. struct ieee80211_sta *sta,
  1674. u16 tid, u16 *ssn)
  1675. {
  1676. struct ath_wiphy *aphy = hw->priv;
  1677. struct ath_softc *sc = aphy->sc;
  1678. int ret = 0;
  1679. switch (action) {
  1680. case IEEE80211_AMPDU_RX_START:
  1681. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1682. ret = -ENOTSUPP;
  1683. break;
  1684. case IEEE80211_AMPDU_RX_STOP:
  1685. break;
  1686. case IEEE80211_AMPDU_TX_START:
  1687. ath9k_ps_wakeup(sc);
  1688. ath_tx_aggr_start(sc, sta, tid, ssn);
  1689. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1690. ath9k_ps_restore(sc);
  1691. break;
  1692. case IEEE80211_AMPDU_TX_STOP:
  1693. ath9k_ps_wakeup(sc);
  1694. ath_tx_aggr_stop(sc, sta, tid);
  1695. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1696. ath9k_ps_restore(sc);
  1697. break;
  1698. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1699. ath9k_ps_wakeup(sc);
  1700. ath_tx_aggr_resume(sc, sta, tid);
  1701. ath9k_ps_restore(sc);
  1702. break;
  1703. default:
  1704. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1705. "Unknown AMPDU action\n");
  1706. }
  1707. return ret;
  1708. }
  1709. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1710. struct survey_info *survey)
  1711. {
  1712. struct ath_wiphy *aphy = hw->priv;
  1713. struct ath_softc *sc = aphy->sc;
  1714. struct ath_hw *ah = sc->sc_ah;
  1715. struct ath_common *common = ath9k_hw_common(ah);
  1716. struct ieee80211_conf *conf = &hw->conf;
  1717. if (idx != 0)
  1718. return -ENOENT;
  1719. survey->channel = conf->channel;
  1720. survey->filled = SURVEY_INFO_NOISE_DBM;
  1721. survey->noise = common->ani.noise_floor;
  1722. return 0;
  1723. }
  1724. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1725. {
  1726. struct ath_wiphy *aphy = hw->priv;
  1727. struct ath_softc *sc = aphy->sc;
  1728. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1729. mutex_lock(&sc->mutex);
  1730. if (ath9k_wiphy_scanning(sc)) {
  1731. printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
  1732. "same time\n");
  1733. /*
  1734. * Do not allow the concurrent scanning state for now. This
  1735. * could be improved with scanning control moved into ath9k.
  1736. */
  1737. mutex_unlock(&sc->mutex);
  1738. return;
  1739. }
  1740. aphy->state = ATH_WIPHY_SCAN;
  1741. ath9k_wiphy_pause_all_forced(sc, aphy);
  1742. sc->sc_flags |= SC_OP_SCANNING;
  1743. del_timer_sync(&common->ani.timer);
  1744. cancel_delayed_work_sync(&sc->tx_complete_work);
  1745. mutex_unlock(&sc->mutex);
  1746. }
  1747. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1748. {
  1749. struct ath_wiphy *aphy = hw->priv;
  1750. struct ath_softc *sc = aphy->sc;
  1751. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1752. mutex_lock(&sc->mutex);
  1753. aphy->state = ATH_WIPHY_ACTIVE;
  1754. sc->sc_flags &= ~SC_OP_SCANNING;
  1755. sc->sc_flags |= SC_OP_FULL_RESET;
  1756. ath_start_ani(common);
  1757. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  1758. ath_beacon_config(sc, NULL);
  1759. mutex_unlock(&sc->mutex);
  1760. }
  1761. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1762. {
  1763. struct ath_wiphy *aphy = hw->priv;
  1764. struct ath_softc *sc = aphy->sc;
  1765. struct ath_hw *ah = sc->sc_ah;
  1766. mutex_lock(&sc->mutex);
  1767. ah->coverage_class = coverage_class;
  1768. ath9k_hw_init_global_settings(ah);
  1769. mutex_unlock(&sc->mutex);
  1770. }
  1771. struct ieee80211_ops ath9k_ops = {
  1772. .tx = ath9k_tx,
  1773. .start = ath9k_start,
  1774. .stop = ath9k_stop,
  1775. .add_interface = ath9k_add_interface,
  1776. .remove_interface = ath9k_remove_interface,
  1777. .config = ath9k_config,
  1778. .configure_filter = ath9k_configure_filter,
  1779. .sta_add = ath9k_sta_add,
  1780. .sta_remove = ath9k_sta_remove,
  1781. .conf_tx = ath9k_conf_tx,
  1782. .bss_info_changed = ath9k_bss_info_changed,
  1783. .set_key = ath9k_set_key,
  1784. .get_tsf = ath9k_get_tsf,
  1785. .set_tsf = ath9k_set_tsf,
  1786. .reset_tsf = ath9k_reset_tsf,
  1787. .ampdu_action = ath9k_ampdu_action,
  1788. .get_survey = ath9k_get_survey,
  1789. .sw_scan_start = ath9k_sw_scan_start,
  1790. .sw_scan_complete = ath9k_sw_scan_complete,
  1791. .rfkill_poll = ath9k_rfkill_poll_state,
  1792. .set_coverage_class = ath9k_set_coverage_class,
  1793. };