mlx4.h 11 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. */
  36. #ifndef MLX4_H
  37. #define MLX4_H
  38. #include <linux/mutex.h>
  39. #include <linux/radix-tree.h>
  40. #include <linux/timer.h>
  41. #include <linux/semaphore.h>
  42. #include <linux/workqueue.h>
  43. #include <linux/mlx4/device.h>
  44. #include <linux/mlx4/driver.h>
  45. #include <linux/mlx4/doorbell.h>
  46. #define DRV_NAME "mlx4_core"
  47. #define PFX DRV_NAME ": "
  48. #define DRV_VERSION "0.01"
  49. #define DRV_RELDATE "May 1, 2007"
  50. enum {
  51. MLX4_HCR_BASE = 0x80680,
  52. MLX4_HCR_SIZE = 0x0001c,
  53. MLX4_CLR_INT_SIZE = 0x00008
  54. };
  55. enum {
  56. MLX4_MGM_ENTRY_SIZE = 0x100,
  57. MLX4_QP_PER_MGM = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2),
  58. MLX4_MTT_ENTRY_PER_SEG = 8
  59. };
  60. enum {
  61. MLX4_NUM_PDS = 1 << 15
  62. };
  63. enum {
  64. MLX4_CMPT_TYPE_QP = 0,
  65. MLX4_CMPT_TYPE_SRQ = 1,
  66. MLX4_CMPT_TYPE_CQ = 2,
  67. MLX4_CMPT_TYPE_EQ = 3,
  68. MLX4_CMPT_NUM_TYPE
  69. };
  70. enum {
  71. MLX4_CMPT_SHIFT = 24,
  72. MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT
  73. };
  74. #ifdef CONFIG_MLX4_DEBUG
  75. extern int mlx4_debug_level;
  76. #else /* CONFIG_MLX4_DEBUG */
  77. #define mlx4_debug_level (0)
  78. #endif /* CONFIG_MLX4_DEBUG */
  79. #define mlx4_dbg(mdev, format, arg...) \
  80. do { \
  81. if (mlx4_debug_level) \
  82. dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
  83. } while (0)
  84. #define mlx4_err(mdev, format, arg...) \
  85. dev_err(&mdev->pdev->dev, format, ## arg)
  86. #define mlx4_info(mdev, format, arg...) \
  87. dev_info(&mdev->pdev->dev, format, ## arg)
  88. #define mlx4_warn(mdev, format, arg...) \
  89. dev_warn(&mdev->pdev->dev, format, ## arg)
  90. struct mlx4_bitmap {
  91. u32 last;
  92. u32 top;
  93. u32 max;
  94. u32 reserved_top;
  95. u32 mask;
  96. spinlock_t lock;
  97. unsigned long *table;
  98. };
  99. struct mlx4_buddy {
  100. unsigned long **bits;
  101. unsigned int *num_free;
  102. int max_order;
  103. spinlock_t lock;
  104. };
  105. struct mlx4_icm;
  106. struct mlx4_icm_table {
  107. u64 virt;
  108. int num_icm;
  109. int num_obj;
  110. int obj_size;
  111. int lowmem;
  112. int coherent;
  113. struct mutex mutex;
  114. struct mlx4_icm **icm;
  115. };
  116. struct mlx4_eq {
  117. struct mlx4_dev *dev;
  118. void __iomem *doorbell;
  119. int eqn;
  120. u32 cons_index;
  121. u16 irq;
  122. u16 have_irq;
  123. int nent;
  124. struct mlx4_buf_list *page_list;
  125. struct mlx4_mtt mtt;
  126. };
  127. struct mlx4_profile {
  128. int num_qp;
  129. int rdmarc_per_qp;
  130. int num_srq;
  131. int num_cq;
  132. int num_mcg;
  133. int num_mpt;
  134. int num_mtt;
  135. };
  136. struct mlx4_fw {
  137. u64 clr_int_base;
  138. u64 catas_offset;
  139. struct mlx4_icm *fw_icm;
  140. struct mlx4_icm *aux_icm;
  141. u32 catas_size;
  142. u16 fw_pages;
  143. u8 clr_int_bar;
  144. u8 catas_bar;
  145. };
  146. struct mlx4_cmd {
  147. struct pci_pool *pool;
  148. void __iomem *hcr;
  149. struct mutex hcr_mutex;
  150. struct semaphore poll_sem;
  151. struct semaphore event_sem;
  152. int max_cmds;
  153. spinlock_t context_lock;
  154. int free_head;
  155. struct mlx4_cmd_context *context;
  156. u16 token_mask;
  157. u8 use_events;
  158. u8 toggle;
  159. };
  160. struct mlx4_uar_table {
  161. struct mlx4_bitmap bitmap;
  162. };
  163. struct mlx4_mr_table {
  164. struct mlx4_bitmap mpt_bitmap;
  165. struct mlx4_buddy mtt_buddy;
  166. u64 mtt_base;
  167. u64 mpt_base;
  168. struct mlx4_icm_table mtt_table;
  169. struct mlx4_icm_table dmpt_table;
  170. };
  171. struct mlx4_cq_table {
  172. struct mlx4_bitmap bitmap;
  173. spinlock_t lock;
  174. struct radix_tree_root tree;
  175. struct mlx4_icm_table table;
  176. struct mlx4_icm_table cmpt_table;
  177. };
  178. struct mlx4_eq_table {
  179. struct mlx4_bitmap bitmap;
  180. char *irq_names;
  181. void __iomem *clr_int;
  182. void __iomem **uar_map;
  183. u32 clr_mask;
  184. struct mlx4_eq *eq;
  185. struct mlx4_icm_table table;
  186. struct mlx4_icm_table cmpt_table;
  187. int have_irq;
  188. u8 inta_pin;
  189. };
  190. struct mlx4_srq_table {
  191. struct mlx4_bitmap bitmap;
  192. spinlock_t lock;
  193. struct radix_tree_root tree;
  194. struct mlx4_icm_table table;
  195. struct mlx4_icm_table cmpt_table;
  196. };
  197. struct mlx4_qp_table {
  198. struct mlx4_bitmap bitmap;
  199. u32 rdmarc_base;
  200. int rdmarc_shift;
  201. spinlock_t lock;
  202. struct mlx4_icm_table qp_table;
  203. struct mlx4_icm_table auxc_table;
  204. struct mlx4_icm_table altc_table;
  205. struct mlx4_icm_table rdmarc_table;
  206. struct mlx4_icm_table cmpt_table;
  207. };
  208. struct mlx4_mcg_table {
  209. struct mutex mutex;
  210. struct mlx4_bitmap bitmap;
  211. struct mlx4_icm_table table;
  212. };
  213. struct mlx4_catas_err {
  214. u32 __iomem *map;
  215. struct timer_list timer;
  216. struct list_head list;
  217. };
  218. #define MLX4_MAX_MAC_NUM 128
  219. #define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3)
  220. struct mlx4_mac_table {
  221. __be64 entries[MLX4_MAX_MAC_NUM];
  222. int refs[MLX4_MAX_MAC_NUM];
  223. struct mutex mutex;
  224. int total;
  225. int max;
  226. };
  227. #define MLX4_MAX_VLAN_NUM 128
  228. #define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2)
  229. struct mlx4_vlan_table {
  230. __be32 entries[MLX4_MAX_VLAN_NUM];
  231. int refs[MLX4_MAX_VLAN_NUM];
  232. struct mutex mutex;
  233. int total;
  234. int max;
  235. };
  236. struct mlx4_port_info {
  237. struct mlx4_dev *dev;
  238. int port;
  239. char dev_name[16];
  240. struct device_attribute port_attr;
  241. enum mlx4_port_type tmp_type;
  242. struct mlx4_mac_table mac_table;
  243. struct mlx4_vlan_table vlan_table;
  244. };
  245. struct mlx4_sense {
  246. struct mlx4_dev *dev;
  247. u8 do_sense_port[MLX4_MAX_PORTS + 1];
  248. u8 sense_allowed[MLX4_MAX_PORTS + 1];
  249. struct delayed_work sense_poll;
  250. };
  251. struct mlx4_priv {
  252. struct mlx4_dev dev;
  253. struct list_head dev_list;
  254. struct list_head ctx_list;
  255. spinlock_t ctx_lock;
  256. struct list_head pgdir_list;
  257. struct mutex pgdir_mutex;
  258. struct mlx4_fw fw;
  259. struct mlx4_cmd cmd;
  260. struct mlx4_bitmap pd_bitmap;
  261. struct mlx4_uar_table uar_table;
  262. struct mlx4_mr_table mr_table;
  263. struct mlx4_cq_table cq_table;
  264. struct mlx4_eq_table eq_table;
  265. struct mlx4_srq_table srq_table;
  266. struct mlx4_qp_table qp_table;
  267. struct mlx4_mcg_table mcg_table;
  268. struct mlx4_catas_err catas_err;
  269. void __iomem *clr_base;
  270. struct mlx4_uar driver_uar;
  271. void __iomem *kar;
  272. struct mlx4_port_info port[MLX4_MAX_PORTS + 1];
  273. struct mlx4_sense sense;
  274. struct mutex port_mutex;
  275. };
  276. static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
  277. {
  278. return container_of(dev, struct mlx4_priv, dev);
  279. }
  280. #define MLX4_SENSE_RANGE (HZ * 3)
  281. extern struct workqueue_struct *mlx4_wq;
  282. u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
  283. void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);
  284. u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align);
  285. void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt);
  286. int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
  287. u32 reserved_bot, u32 resetrved_top);
  288. void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);
  289. int mlx4_reset(struct mlx4_dev *dev);
  290. int mlx4_alloc_eq_table(struct mlx4_dev *dev);
  291. void mlx4_free_eq_table(struct mlx4_dev *dev);
  292. int mlx4_init_pd_table(struct mlx4_dev *dev);
  293. int mlx4_init_uar_table(struct mlx4_dev *dev);
  294. int mlx4_init_mr_table(struct mlx4_dev *dev);
  295. int mlx4_init_eq_table(struct mlx4_dev *dev);
  296. int mlx4_init_cq_table(struct mlx4_dev *dev);
  297. int mlx4_init_qp_table(struct mlx4_dev *dev);
  298. int mlx4_init_srq_table(struct mlx4_dev *dev);
  299. int mlx4_init_mcg_table(struct mlx4_dev *dev);
  300. void mlx4_cleanup_pd_table(struct mlx4_dev *dev);
  301. void mlx4_cleanup_uar_table(struct mlx4_dev *dev);
  302. void mlx4_cleanup_mr_table(struct mlx4_dev *dev);
  303. void mlx4_cleanup_eq_table(struct mlx4_dev *dev);
  304. void mlx4_cleanup_cq_table(struct mlx4_dev *dev);
  305. void mlx4_cleanup_qp_table(struct mlx4_dev *dev);
  306. void mlx4_cleanup_srq_table(struct mlx4_dev *dev);
  307. void mlx4_cleanup_mcg_table(struct mlx4_dev *dev);
  308. void mlx4_start_catas_poll(struct mlx4_dev *dev);
  309. void mlx4_stop_catas_poll(struct mlx4_dev *dev);
  310. void mlx4_catas_init(void);
  311. int mlx4_restart_one(struct pci_dev *pdev);
  312. int mlx4_register_device(struct mlx4_dev *dev);
  313. void mlx4_unregister_device(struct mlx4_dev *dev);
  314. void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port);
  315. struct mlx4_dev_cap;
  316. struct mlx4_init_hca_param;
  317. u64 mlx4_make_profile(struct mlx4_dev *dev,
  318. struct mlx4_profile *request,
  319. struct mlx4_dev_cap *dev_cap,
  320. struct mlx4_init_hca_param *init_hca);
  321. int mlx4_cmd_init(struct mlx4_dev *dev);
  322. void mlx4_cmd_cleanup(struct mlx4_dev *dev);
  323. void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
  324. int mlx4_cmd_use_events(struct mlx4_dev *dev);
  325. void mlx4_cmd_use_polling(struct mlx4_dev *dev);
  326. void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
  327. void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
  328. void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
  329. void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
  330. void mlx4_handle_catas_err(struct mlx4_dev *dev);
  331. void mlx4_do_sense_ports(struct mlx4_dev *dev,
  332. enum mlx4_port_type *stype,
  333. enum mlx4_port_type *defaults);
  334. void mlx4_start_sense(struct mlx4_dev *dev);
  335. void mlx4_stop_sense(struct mlx4_dev *dev);
  336. void mlx4_sense_init(struct mlx4_dev *dev);
  337. int mlx4_check_port_params(struct mlx4_dev *dev,
  338. enum mlx4_port_type *port_type);
  339. int mlx4_change_port_types(struct mlx4_dev *dev,
  340. enum mlx4_port_type *port_types);
  341. void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
  342. void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
  343. int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port);
  344. int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);
  345. #endif /* MLX4_H */