board-cm-t35.c 22 KB

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  1. /*
  2. * board-cm-t35.c (CompuLab CM-T35 module)
  3. *
  4. * Copyright (C) 2009 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/input.h>
  26. #include <linux/input/matrix_keypad.h>
  27. #include <linux/delay.h>
  28. #include <linux/gpio.h>
  29. #include <linux/i2c/at24.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/regulator/machine.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/tdo24m.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <plat/board.h>
  38. #include <plat/common.h>
  39. #include <plat/nand.h>
  40. #include <plat/gpmc.h>
  41. #include <plat/usb.h>
  42. #include <plat/display.h>
  43. #include <plat/mcspi.h>
  44. #include <mach/hardware.h>
  45. #include "mux.h"
  46. #include "sdram-micron-mt46h32m32lf-6.h"
  47. #include "hsmmc.h"
  48. #define CM_T35_GPIO_PENDOWN 57
  49. #define CM_T35_SMSC911X_CS 5
  50. #define CM_T35_SMSC911X_GPIO 163
  51. #define SB_T35_SMSC911X_CS 4
  52. #define SB_T35_SMSC911X_GPIO 65
  53. #define NAND_BLOCK_SIZE SZ_128K
  54. #define GPMC_CS0_BASE 0x60
  55. #define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE)
  56. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  57. #include <linux/smsc911x.h>
  58. static struct smsc911x_platform_config cm_t35_smsc911x_config = {
  59. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  60. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  61. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  62. .phy_interface = PHY_INTERFACE_MODE_MII,
  63. };
  64. static struct resource cm_t35_smsc911x_resources[] = {
  65. {
  66. .flags = IORESOURCE_MEM,
  67. },
  68. {
  69. .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
  70. .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
  71. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  72. },
  73. };
  74. static struct platform_device cm_t35_smsc911x_device = {
  75. .name = "smsc911x",
  76. .id = 0,
  77. .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
  78. .resource = cm_t35_smsc911x_resources,
  79. .dev = {
  80. .platform_data = &cm_t35_smsc911x_config,
  81. },
  82. };
  83. static struct resource sb_t35_smsc911x_resources[] = {
  84. {
  85. .flags = IORESOURCE_MEM,
  86. },
  87. {
  88. .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
  89. .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
  90. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  91. },
  92. };
  93. static struct platform_device sb_t35_smsc911x_device = {
  94. .name = "smsc911x",
  95. .id = 1,
  96. .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
  97. .resource = sb_t35_smsc911x_resources,
  98. .dev = {
  99. .platform_data = &cm_t35_smsc911x_config,
  100. },
  101. };
  102. static void __init cm_t35_init_smsc911x(struct platform_device *dev,
  103. int cs, int irq_gpio)
  104. {
  105. unsigned long cs_mem_base;
  106. if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
  107. pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
  108. return;
  109. }
  110. dev->resource[0].start = cs_mem_base + 0x0;
  111. dev->resource[0].end = cs_mem_base + 0xff;
  112. if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
  113. (gpio_direction_input(irq_gpio) == 0)) {
  114. gpio_export(irq_gpio, 0);
  115. } else {
  116. pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
  117. return;
  118. }
  119. platform_device_register(dev);
  120. }
  121. static void __init cm_t35_init_ethernet(void)
  122. {
  123. cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
  124. CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
  125. cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
  126. SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
  127. }
  128. #else
  129. static inline void __init cm_t35_init_ethernet(void) { return; }
  130. #endif
  131. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  132. #include <linux/leds.h>
  133. static struct gpio_led cm_t35_leds[] = {
  134. [0] = {
  135. .gpio = 186,
  136. .name = "cm-t35:green",
  137. .default_trigger = "heartbeat",
  138. .active_low = 0,
  139. },
  140. };
  141. static struct gpio_led_platform_data cm_t35_led_pdata = {
  142. .num_leds = ARRAY_SIZE(cm_t35_leds),
  143. .leds = cm_t35_leds,
  144. };
  145. static struct platform_device cm_t35_led_device = {
  146. .name = "leds-gpio",
  147. .id = -1,
  148. .dev = {
  149. .platform_data = &cm_t35_led_pdata,
  150. },
  151. };
  152. static void __init cm_t35_init_led(void)
  153. {
  154. platform_device_register(&cm_t35_led_device);
  155. }
  156. #else
  157. static inline void cm_t35_init_led(void) {}
  158. #endif
  159. #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  160. #include <linux/mtd/mtd.h>
  161. #include <linux/mtd/nand.h>
  162. #include <linux/mtd/partitions.h>
  163. static struct mtd_partition cm_t35_nand_partitions[] = {
  164. {
  165. .name = "xloader",
  166. .offset = 0, /* Offset = 0x00000 */
  167. .size = 4 * NAND_BLOCK_SIZE,
  168. .mask_flags = MTD_WRITEABLE
  169. },
  170. {
  171. .name = "uboot",
  172. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  173. .size = 15 * NAND_BLOCK_SIZE,
  174. },
  175. {
  176. .name = "uboot environment",
  177. .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
  178. .size = 2 * NAND_BLOCK_SIZE,
  179. },
  180. {
  181. .name = "linux",
  182. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  183. .size = 32 * NAND_BLOCK_SIZE,
  184. },
  185. {
  186. .name = "rootfs",
  187. .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
  188. .size = MTDPART_SIZ_FULL,
  189. },
  190. };
  191. static struct omap_nand_platform_data cm_t35_nand_data = {
  192. .parts = cm_t35_nand_partitions,
  193. .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
  194. .dma_channel = -1, /* disable DMA in OMAP NAND driver */
  195. .cs = 0,
  196. .gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR,
  197. .gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT,
  198. };
  199. static struct resource cm_t35_nand_resource = {
  200. .flags = IORESOURCE_MEM,
  201. };
  202. static struct platform_device cm_t35_nand_device = {
  203. .name = "omap2-nand",
  204. .id = -1,
  205. .num_resources = 1,
  206. .resource = &cm_t35_nand_resource,
  207. .dev = {
  208. .platform_data = &cm_t35_nand_data,
  209. },
  210. };
  211. static void __init cm_t35_init_nand(void)
  212. {
  213. if (platform_device_register(&cm_t35_nand_device) < 0)
  214. pr_err("CM-T35: Unable to register NAND device\n");
  215. }
  216. #else
  217. static inline void cm_t35_init_nand(void) {}
  218. #endif
  219. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
  220. defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  221. #include <linux/spi/ads7846.h>
  222. #include <plat/mcspi.h>
  223. static struct omap2_mcspi_device_config ads7846_mcspi_config = {
  224. .turbo_mode = 0,
  225. .single_channel = 1, /* 0: slave, 1: master */
  226. };
  227. static int ads7846_get_pendown_state(void)
  228. {
  229. return !gpio_get_value(CM_T35_GPIO_PENDOWN);
  230. }
  231. static struct ads7846_platform_data ads7846_config = {
  232. .x_max = 0x0fff,
  233. .y_max = 0x0fff,
  234. .x_plate_ohms = 180,
  235. .pressure_max = 255,
  236. .debounce_max = 10,
  237. .debounce_tol = 3,
  238. .debounce_rep = 1,
  239. .get_pendown_state = ads7846_get_pendown_state,
  240. .keep_vref_on = 1,
  241. };
  242. static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
  243. {
  244. .modalias = "ads7846",
  245. .bus_num = 1,
  246. .chip_select = 0,
  247. .max_speed_hz = 1500000,
  248. .controller_data = &ads7846_mcspi_config,
  249. .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
  250. .platform_data = &ads7846_config,
  251. },
  252. };
  253. static void __init cm_t35_init_ads7846(void)
  254. {
  255. if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
  256. (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
  257. gpio_export(CM_T35_GPIO_PENDOWN, 0);
  258. } else {
  259. pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
  260. return;
  261. }
  262. spi_register_board_info(cm_t35_spi_board_info,
  263. ARRAY_SIZE(cm_t35_spi_board_info));
  264. }
  265. #else
  266. static inline void cm_t35_init_ads7846(void) {}
  267. #endif
  268. #define CM_T35_LCD_EN_GPIO 157
  269. #define CM_T35_LCD_BL_GPIO 58
  270. #define CM_T35_DVI_EN_GPIO 54
  271. static int lcd_bl_gpio;
  272. static int lcd_en_gpio;
  273. static int dvi_en_gpio;
  274. static int lcd_enabled;
  275. static int dvi_enabled;
  276. static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
  277. {
  278. if (dvi_enabled) {
  279. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  280. return -EINVAL;
  281. }
  282. gpio_set_value(lcd_en_gpio, 1);
  283. gpio_set_value(lcd_bl_gpio, 1);
  284. lcd_enabled = 1;
  285. return 0;
  286. }
  287. static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
  288. {
  289. lcd_enabled = 0;
  290. gpio_set_value(lcd_bl_gpio, 0);
  291. gpio_set_value(lcd_en_gpio, 0);
  292. }
  293. static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
  294. {
  295. if (lcd_enabled) {
  296. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  297. return -EINVAL;
  298. }
  299. gpio_set_value(dvi_en_gpio, 0);
  300. dvi_enabled = 1;
  301. return 0;
  302. }
  303. static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
  304. {
  305. gpio_set_value(dvi_en_gpio, 1);
  306. dvi_enabled = 0;
  307. }
  308. static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
  309. {
  310. return 0;
  311. }
  312. static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
  313. {
  314. }
  315. static struct omap_dss_device cm_t35_lcd_device = {
  316. .name = "lcd",
  317. .driver_name = "toppoly_tdo35s_panel",
  318. .type = OMAP_DISPLAY_TYPE_DPI,
  319. .phy.dpi.data_lines = 18,
  320. .platform_enable = cm_t35_panel_enable_lcd,
  321. .platform_disable = cm_t35_panel_disable_lcd,
  322. };
  323. static struct omap_dss_device cm_t35_dvi_device = {
  324. .name = "dvi",
  325. .driver_name = "generic_panel",
  326. .type = OMAP_DISPLAY_TYPE_DPI,
  327. .phy.dpi.data_lines = 24,
  328. .platform_enable = cm_t35_panel_enable_dvi,
  329. .platform_disable = cm_t35_panel_disable_dvi,
  330. };
  331. static struct omap_dss_device cm_t35_tv_device = {
  332. .name = "tv",
  333. .driver_name = "venc",
  334. .type = OMAP_DISPLAY_TYPE_VENC,
  335. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  336. .platform_enable = cm_t35_panel_enable_tv,
  337. .platform_disable = cm_t35_panel_disable_tv,
  338. };
  339. static struct omap_dss_device *cm_t35_dss_devices[] = {
  340. &cm_t35_lcd_device,
  341. &cm_t35_dvi_device,
  342. &cm_t35_tv_device,
  343. };
  344. static struct omap_dss_board_info cm_t35_dss_data = {
  345. .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
  346. .devices = cm_t35_dss_devices,
  347. .default_device = &cm_t35_dvi_device,
  348. };
  349. static struct platform_device cm_t35_dss_device = {
  350. .name = "omapdss",
  351. .id = -1,
  352. .dev = {
  353. .platform_data = &cm_t35_dss_data,
  354. },
  355. };
  356. static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
  357. .turbo_mode = 0,
  358. .single_channel = 1, /* 0: slave, 1: master */
  359. };
  360. static struct tdo24m_platform_data tdo24m_config = {
  361. .model = TDO35S,
  362. };
  363. static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
  364. {
  365. .modalias = "tdo24m",
  366. .bus_num = 4,
  367. .chip_select = 0,
  368. .max_speed_hz = 1000000,
  369. .controller_data = &tdo24m_mcspi_config,
  370. .platform_data = &tdo24m_config,
  371. },
  372. };
  373. static void __init cm_t35_init_display(void)
  374. {
  375. int err;
  376. lcd_en_gpio = CM_T35_LCD_EN_GPIO;
  377. lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
  378. dvi_en_gpio = CM_T35_DVI_EN_GPIO;
  379. spi_register_board_info(cm_t35_lcd_spi_board_info,
  380. ARRAY_SIZE(cm_t35_lcd_spi_board_info));
  381. err = gpio_request(lcd_en_gpio, "LCD RST");
  382. if (err) {
  383. pr_err("CM-T35: failed to get LCD reset GPIO\n");
  384. goto out;
  385. }
  386. err = gpio_request(lcd_bl_gpio, "LCD BL");
  387. if (err) {
  388. pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
  389. goto err_lcd_bl;
  390. }
  391. err = gpio_request(dvi_en_gpio, "DVI EN");
  392. if (err) {
  393. pr_err("CM-T35: failed to get DVI reset GPIO\n");
  394. goto err_dvi_en;
  395. }
  396. gpio_export(lcd_en_gpio, 0);
  397. gpio_export(lcd_bl_gpio, 0);
  398. gpio_export(dvi_en_gpio, 0);
  399. gpio_direction_output(lcd_en_gpio, 0);
  400. gpio_direction_output(lcd_bl_gpio, 0);
  401. gpio_direction_output(dvi_en_gpio, 1);
  402. msleep(50);
  403. gpio_set_value(lcd_en_gpio, 1);
  404. err = platform_device_register(&cm_t35_dss_device);
  405. if (err) {
  406. pr_err("CM-T35: failed to register DSS device\n");
  407. goto err_dev_reg;
  408. }
  409. return;
  410. err_dev_reg:
  411. gpio_free(dvi_en_gpio);
  412. err_dvi_en:
  413. gpio_free(lcd_bl_gpio);
  414. err_lcd_bl:
  415. gpio_free(lcd_en_gpio);
  416. out:
  417. return;
  418. }
  419. static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
  420. .supply = "vmmc",
  421. };
  422. static struct regulator_consumer_supply cm_t35_vsim_supply = {
  423. .supply = "vmmc_aux",
  424. };
  425. static struct regulator_consumer_supply cm_t35_vdac_supply = {
  426. .supply = "vdda_dac",
  427. .dev = &cm_t35_dss_device.dev,
  428. };
  429. static struct regulator_consumer_supply cm_t35_vdvi_supply = {
  430. .supply = "vdvi",
  431. .dev = &cm_t35_dss_device.dev,
  432. };
  433. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  434. static struct regulator_init_data cm_t35_vmmc1 = {
  435. .constraints = {
  436. .min_uV = 1850000,
  437. .max_uV = 3150000,
  438. .valid_modes_mask = REGULATOR_MODE_NORMAL
  439. | REGULATOR_MODE_STANDBY,
  440. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  441. | REGULATOR_CHANGE_MODE
  442. | REGULATOR_CHANGE_STATUS,
  443. },
  444. .num_consumer_supplies = 1,
  445. .consumer_supplies = &cm_t35_vmmc1_supply,
  446. };
  447. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  448. static struct regulator_init_data cm_t35_vsim = {
  449. .constraints = {
  450. .min_uV = 1800000,
  451. .max_uV = 3000000,
  452. .valid_modes_mask = REGULATOR_MODE_NORMAL
  453. | REGULATOR_MODE_STANDBY,
  454. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  455. | REGULATOR_CHANGE_MODE
  456. | REGULATOR_CHANGE_STATUS,
  457. },
  458. .num_consumer_supplies = 1,
  459. .consumer_supplies = &cm_t35_vsim_supply,
  460. };
  461. /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
  462. static struct regulator_init_data cm_t35_vdac = {
  463. .constraints = {
  464. .min_uV = 1800000,
  465. .max_uV = 1800000,
  466. .valid_modes_mask = REGULATOR_MODE_NORMAL
  467. | REGULATOR_MODE_STANDBY,
  468. .valid_ops_mask = REGULATOR_CHANGE_MODE
  469. | REGULATOR_CHANGE_STATUS,
  470. },
  471. .num_consumer_supplies = 1,
  472. .consumer_supplies = &cm_t35_vdac_supply,
  473. };
  474. /* VPLL2 for digital video outputs */
  475. static struct regulator_init_data cm_t35_vpll2 = {
  476. .constraints = {
  477. .name = "VDVI",
  478. .min_uV = 1800000,
  479. .max_uV = 1800000,
  480. .valid_modes_mask = REGULATOR_MODE_NORMAL
  481. | REGULATOR_MODE_STANDBY,
  482. .valid_ops_mask = REGULATOR_CHANGE_MODE
  483. | REGULATOR_CHANGE_STATUS,
  484. },
  485. .num_consumer_supplies = 1,
  486. .consumer_supplies = &cm_t35_vdvi_supply,
  487. };
  488. static struct twl4030_usb_data cm_t35_usb_data = {
  489. .usb_mode = T2_USB_MODE_ULPI,
  490. };
  491. static int cm_t35_keymap[] = {
  492. KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
  493. KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
  494. KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
  495. };
  496. static struct matrix_keymap_data cm_t35_keymap_data = {
  497. .keymap = cm_t35_keymap,
  498. .keymap_size = ARRAY_SIZE(cm_t35_keymap),
  499. };
  500. static struct twl4030_keypad_data cm_t35_kp_data = {
  501. .keymap_data = &cm_t35_keymap_data,
  502. .rows = 3,
  503. .cols = 3,
  504. .rep = 1,
  505. };
  506. static struct omap2_hsmmc_info mmc[] = {
  507. {
  508. .mmc = 1,
  509. .wires = 4,
  510. .gpio_cd = -EINVAL,
  511. .gpio_wp = -EINVAL,
  512. },
  513. {
  514. .mmc = 2,
  515. .wires = 4,
  516. .transceiver = 1,
  517. .gpio_cd = -EINVAL,
  518. .gpio_wp = -EINVAL,
  519. .ocr_mask = 0x00100000, /* 3.3V */
  520. },
  521. {} /* Terminator */
  522. };
  523. static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
  524. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  525. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  526. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  527. .phy_reset = true,
  528. .reset_gpio_port[0] = -EINVAL,
  529. .reset_gpio_port[1] = -EINVAL,
  530. .reset_gpio_port[2] = -EINVAL
  531. };
  532. static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
  533. unsigned ngpio)
  534. {
  535. int wlan_rst = gpio + 2;
  536. if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
  537. (gpio_direction_output(wlan_rst, 1) == 0)) {
  538. gpio_export(wlan_rst, 0);
  539. udelay(10);
  540. gpio_set_value(wlan_rst, 0);
  541. udelay(10);
  542. gpio_set_value(wlan_rst, 1);
  543. } else {
  544. pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
  545. }
  546. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  547. mmc[0].gpio_cd = gpio + 0;
  548. omap2_hsmmc_init(mmc);
  549. /* link regulators to MMC adapters */
  550. cm_t35_vmmc1_supply.dev = mmc[0].dev;
  551. cm_t35_vsim_supply.dev = mmc[0].dev;
  552. /* setup USB with proper PHY reset GPIOs */
  553. ehci_pdata.reset_gpio_port[0] = gpio + 6;
  554. ehci_pdata.reset_gpio_port[1] = gpio + 7;
  555. usb_ehci_init(&ehci_pdata);
  556. return 0;
  557. }
  558. static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
  559. .gpio_base = OMAP_MAX_GPIO_LINES,
  560. .irq_base = TWL4030_GPIO_IRQ_BASE,
  561. .irq_end = TWL4030_GPIO_IRQ_END,
  562. .setup = cm_t35_twl_gpio_setup,
  563. };
  564. static struct twl4030_platform_data cm_t35_twldata = {
  565. .irq_base = TWL4030_IRQ_BASE,
  566. .irq_end = TWL4030_IRQ_END,
  567. /* platform_data for children goes here */
  568. .keypad = &cm_t35_kp_data,
  569. .usb = &cm_t35_usb_data,
  570. .gpio = &cm_t35_gpio_data,
  571. .vmmc1 = &cm_t35_vmmc1,
  572. .vsim = &cm_t35_vsim,
  573. .vdac = &cm_t35_vdac,
  574. .vpll2 = &cm_t35_vpll2,
  575. };
  576. static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
  577. {
  578. I2C_BOARD_INFO("tps65930", 0x48),
  579. .flags = I2C_CLIENT_WAKE,
  580. .irq = INT_34XX_SYS_NIRQ,
  581. .platform_data = &cm_t35_twldata,
  582. },
  583. };
  584. static void __init cm_t35_init_i2c(void)
  585. {
  586. omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
  587. ARRAY_SIZE(cm_t35_i2c_boardinfo));
  588. }
  589. static struct omap_board_config_kernel cm_t35_config[] __initdata = {
  590. };
  591. static void __init cm_t35_init_irq(void)
  592. {
  593. omap_board_config = cm_t35_config;
  594. omap_board_config_size = ARRAY_SIZE(cm_t35_config);
  595. omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
  596. mt46h32m32lf6_sdrc_params);
  597. omap_init_irq();
  598. omap_gpio_init();
  599. }
  600. static void __init cm_t35_map_io(void)
  601. {
  602. omap2_set_globals_343x();
  603. omap34xx_map_common_io();
  604. }
  605. static struct omap_board_mux board_mux[] __initdata = {
  606. /* nCS and IRQ for CM-T35 ethernet */
  607. OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
  608. OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  609. /* nCS and IRQ for SB-T35 ethernet */
  610. OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
  611. OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  612. /* PENDOWN GPIO */
  613. OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  614. /* mUSB */
  615. OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  616. OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  617. OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  618. OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  619. OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  620. OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  621. OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  622. OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  623. OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  624. OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  625. OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  626. OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  627. /* MMC 2 */
  628. OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  629. OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  630. OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  631. OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  632. /* McSPI 1 */
  633. OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  634. OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  635. OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  636. OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
  637. /* McSPI 4 */
  638. OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  639. OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  640. OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  641. OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
  642. /* McBSP 2 */
  643. OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  644. OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  645. OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  646. OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  647. /* serial ports */
  648. OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  649. OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  650. OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  651. OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  652. /* DSS */
  653. OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  654. OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  655. OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  656. OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  657. OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  658. OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  659. OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  660. OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  661. OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  662. OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  663. OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  664. OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  665. OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  666. OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  667. OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  668. OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  669. OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  670. OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  671. OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  672. OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  673. OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  674. OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  675. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  676. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  677. OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  678. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  679. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  680. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  681. /* display controls */
  682. OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  683. OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  684. OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  685. /* TPS IRQ */
  686. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
  687. OMAP_PIN_INPUT_PULLUP),
  688. { .reg_offset = OMAP_MUX_TERMINATOR },
  689. };
  690. static struct omap_musb_board_data musb_board_data = {
  691. .interface_type = MUSB_INTERFACE_ULPI,
  692. .mode = MUSB_OTG,
  693. .power = 100,
  694. };
  695. static void __init cm_t35_init(void)
  696. {
  697. omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
  698. omap_serial_init();
  699. cm_t35_init_i2c();
  700. cm_t35_init_nand();
  701. cm_t35_init_ads7846();
  702. cm_t35_init_ethernet();
  703. cm_t35_init_led();
  704. cm_t35_init_display();
  705. usb_musb_init(&musb_board_data);
  706. }
  707. MACHINE_START(CM_T35, "Compulab CM-T35")
  708. .phys_io = 0x48000000,
  709. .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
  710. .boot_params = 0x80000100,
  711. .map_io = cm_t35_map_io,
  712. .init_irq = cm_t35_init_irq,
  713. .init_machine = cm_t35_init,
  714. .timer = &omap_timer,
  715. MACHINE_END