qla_isr.c 69 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/slab.h>
  10. #include <scsi/scsi_tcq.h>
  11. #include <scsi/scsi_bsg_fc.h>
  12. #include <scsi/scsi_eh.h>
  13. static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
  14. static void qla2x00_process_completed_request(struct scsi_qla_host *,
  15. struct req_que *, uint32_t);
  16. static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
  17. static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
  18. static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
  19. sts_entry_t *);
  20. /**
  21. * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
  22. * @irq:
  23. * @dev_id: SCSI driver HA context
  24. *
  25. * Called by system whenever the host adapter generates an interrupt.
  26. *
  27. * Returns handled flag.
  28. */
  29. irqreturn_t
  30. qla2100_intr_handler(int irq, void *dev_id)
  31. {
  32. scsi_qla_host_t *vha;
  33. struct qla_hw_data *ha;
  34. struct device_reg_2xxx __iomem *reg;
  35. int status;
  36. unsigned long iter;
  37. uint16_t hccr;
  38. uint16_t mb[4];
  39. struct rsp_que *rsp;
  40. unsigned long flags;
  41. rsp = (struct rsp_que *) dev_id;
  42. if (!rsp) {
  43. printk(KERN_INFO
  44. "%s(): NULL response queue pointer.\n", __func__);
  45. return (IRQ_NONE);
  46. }
  47. ha = rsp->hw;
  48. reg = &ha->iobase->isp;
  49. status = 0;
  50. spin_lock_irqsave(&ha->hardware_lock, flags);
  51. vha = pci_get_drvdata(ha->pdev);
  52. for (iter = 50; iter--; ) {
  53. hccr = RD_REG_WORD(&reg->hccr);
  54. if (hccr & HCCR_RISC_PAUSE) {
  55. if (pci_channel_offline(ha->pdev))
  56. break;
  57. /*
  58. * Issue a "HARD" reset in order for the RISC interrupt
  59. * bit to be cleared. Schedule a big hammer to get
  60. * out of the RISC PAUSED state.
  61. */
  62. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  63. RD_REG_WORD(&reg->hccr);
  64. ha->isp_ops->fw_dump(vha, 1);
  65. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  66. break;
  67. } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
  68. break;
  69. if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
  70. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  71. RD_REG_WORD(&reg->hccr);
  72. /* Get mailbox data. */
  73. mb[0] = RD_MAILBOX_REG(ha, reg, 0);
  74. if (mb[0] > 0x3fff && mb[0] < 0x8000) {
  75. qla2x00_mbx_completion(vha, mb[0]);
  76. status |= MBX_INTERRUPT;
  77. } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
  78. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  79. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  80. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  81. qla2x00_async_event(vha, rsp, mb);
  82. } else {
  83. /*EMPTY*/
  84. ql_dbg(ql_dbg_async, vha, 0x5025,
  85. "Unrecognized interrupt type (%d).\n",
  86. mb[0]);
  87. }
  88. /* Release mailbox registers. */
  89. WRT_REG_WORD(&reg->semaphore, 0);
  90. RD_REG_WORD(&reg->semaphore);
  91. } else {
  92. qla2x00_process_response_queue(rsp);
  93. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  94. RD_REG_WORD(&reg->hccr);
  95. }
  96. }
  97. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  98. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  99. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  100. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  101. complete(&ha->mbx_intr_comp);
  102. }
  103. return (IRQ_HANDLED);
  104. }
  105. /**
  106. * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
  107. * @irq:
  108. * @dev_id: SCSI driver HA context
  109. *
  110. * Called by system whenever the host adapter generates an interrupt.
  111. *
  112. * Returns handled flag.
  113. */
  114. irqreturn_t
  115. qla2300_intr_handler(int irq, void *dev_id)
  116. {
  117. scsi_qla_host_t *vha;
  118. struct device_reg_2xxx __iomem *reg;
  119. int status;
  120. unsigned long iter;
  121. uint32_t stat;
  122. uint16_t hccr;
  123. uint16_t mb[4];
  124. struct rsp_que *rsp;
  125. struct qla_hw_data *ha;
  126. unsigned long flags;
  127. rsp = (struct rsp_que *) dev_id;
  128. if (!rsp) {
  129. printk(KERN_INFO
  130. "%s(): NULL response queue pointer.\n", __func__);
  131. return (IRQ_NONE);
  132. }
  133. ha = rsp->hw;
  134. reg = &ha->iobase->isp;
  135. status = 0;
  136. spin_lock_irqsave(&ha->hardware_lock, flags);
  137. vha = pci_get_drvdata(ha->pdev);
  138. for (iter = 50; iter--; ) {
  139. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  140. if (stat & HSR_RISC_PAUSED) {
  141. if (unlikely(pci_channel_offline(ha->pdev)))
  142. break;
  143. hccr = RD_REG_WORD(&reg->hccr);
  144. if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
  145. ql_log(ql_log_warn, vha, 0x5026,
  146. "Parity error -- HCCR=%x, Dumping "
  147. "firmware.\n", hccr);
  148. else
  149. ql_log(ql_log_warn, vha, 0x5027,
  150. "RISC paused -- HCCR=%x, Dumping "
  151. "firmware.\n", hccr);
  152. /*
  153. * Issue a "HARD" reset in order for the RISC
  154. * interrupt bit to be cleared. Schedule a big
  155. * hammer to get out of the RISC PAUSED state.
  156. */
  157. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  158. RD_REG_WORD(&reg->hccr);
  159. ha->isp_ops->fw_dump(vha, 1);
  160. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  161. break;
  162. } else if ((stat & HSR_RISC_INT) == 0)
  163. break;
  164. switch (stat & 0xff) {
  165. case 0x1:
  166. case 0x2:
  167. case 0x10:
  168. case 0x11:
  169. qla2x00_mbx_completion(vha, MSW(stat));
  170. status |= MBX_INTERRUPT;
  171. /* Release mailbox registers. */
  172. WRT_REG_WORD(&reg->semaphore, 0);
  173. break;
  174. case 0x12:
  175. mb[0] = MSW(stat);
  176. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  177. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  178. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  179. qla2x00_async_event(vha, rsp, mb);
  180. break;
  181. case 0x13:
  182. qla2x00_process_response_queue(rsp);
  183. break;
  184. case 0x15:
  185. mb[0] = MBA_CMPLT_1_16BIT;
  186. mb[1] = MSW(stat);
  187. qla2x00_async_event(vha, rsp, mb);
  188. break;
  189. case 0x16:
  190. mb[0] = MBA_SCSI_COMPLETION;
  191. mb[1] = MSW(stat);
  192. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  193. qla2x00_async_event(vha, rsp, mb);
  194. break;
  195. default:
  196. ql_dbg(ql_dbg_async, vha, 0x5028,
  197. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  198. break;
  199. }
  200. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  201. RD_REG_WORD_RELAXED(&reg->hccr);
  202. }
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  205. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  206. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  207. complete(&ha->mbx_intr_comp);
  208. }
  209. return (IRQ_HANDLED);
  210. }
  211. /**
  212. * qla2x00_mbx_completion() - Process mailbox command completions.
  213. * @ha: SCSI driver HA context
  214. * @mb0: Mailbox0 register
  215. */
  216. static void
  217. qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  218. {
  219. uint16_t cnt;
  220. uint16_t __iomem *wptr;
  221. struct qla_hw_data *ha = vha->hw;
  222. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  223. /* Load return mailbox registers. */
  224. ha->flags.mbox_int = 1;
  225. ha->mailbox_out[0] = mb0;
  226. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
  227. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  228. if (IS_QLA2200(ha) && cnt == 8)
  229. wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
  230. if (cnt == 4 || cnt == 5)
  231. ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
  232. else
  233. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  234. wptr++;
  235. }
  236. if (ha->mcp) {
  237. ql_dbg(ql_dbg_async, vha, 0x5000,
  238. "Got mbx completion. cmd=%x.\n", ha->mcp->mb[0]);
  239. } else {
  240. ql_dbg(ql_dbg_async, vha, 0x5001,
  241. "MBX pointer ERROR.\n");
  242. }
  243. }
  244. static void
  245. qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
  246. {
  247. static char *event[] =
  248. { "Complete", "Request Notification", "Time Extension" };
  249. int rval;
  250. struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
  251. uint16_t __iomem *wptr;
  252. uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
  253. /* Seed data -- mailbox1 -> mailbox7. */
  254. wptr = (uint16_t __iomem *)&reg24->mailbox1;
  255. for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
  256. mb[cnt] = RD_REG_WORD(wptr);
  257. ql_dbg(ql_dbg_async, vha, 0x5021,
  258. "Inter-Driver Commucation %s -- "
  259. "%04x %04x %04x %04x %04x %04x %04x.\n",
  260. event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
  261. mb[4], mb[5], mb[6]);
  262. /* Acknowledgement needed? [Notify && non-zero timeout]. */
  263. timeout = (descr >> 8) & 0xf;
  264. if (aen != MBA_IDC_NOTIFY || !timeout)
  265. return;
  266. ql_dbg(ql_dbg_async, vha, 0x5022,
  267. "Inter-Driver Commucation %s -- ACK timeout=%d.\n",
  268. vha->host_no, event[aen & 0xff], timeout);
  269. rval = qla2x00_post_idc_ack_work(vha, mb);
  270. if (rval != QLA_SUCCESS)
  271. ql_log(ql_log_warn, vha, 0x5023,
  272. "IDC failed to post ACK.\n");
  273. }
  274. /**
  275. * qla2x00_async_event() - Process aynchronous events.
  276. * @ha: SCSI driver HA context
  277. * @mb: Mailbox registers (0 - 3)
  278. */
  279. void
  280. qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
  281. {
  282. #define LS_UNKNOWN 2
  283. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  284. char *link_speed;
  285. uint16_t handle_cnt;
  286. uint16_t cnt, mbx;
  287. uint32_t handles[5];
  288. struct qla_hw_data *ha = vha->hw;
  289. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  290. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  291. struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
  292. uint32_t rscn_entry, host_pid;
  293. uint8_t rscn_queue_index;
  294. unsigned long flags;
  295. /* Setup to process RIO completion. */
  296. handle_cnt = 0;
  297. if (IS_QLA8XXX_TYPE(ha))
  298. goto skip_rio;
  299. switch (mb[0]) {
  300. case MBA_SCSI_COMPLETION:
  301. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  302. handle_cnt = 1;
  303. break;
  304. case MBA_CMPLT_1_16BIT:
  305. handles[0] = mb[1];
  306. handle_cnt = 1;
  307. mb[0] = MBA_SCSI_COMPLETION;
  308. break;
  309. case MBA_CMPLT_2_16BIT:
  310. handles[0] = mb[1];
  311. handles[1] = mb[2];
  312. handle_cnt = 2;
  313. mb[0] = MBA_SCSI_COMPLETION;
  314. break;
  315. case MBA_CMPLT_3_16BIT:
  316. handles[0] = mb[1];
  317. handles[1] = mb[2];
  318. handles[2] = mb[3];
  319. handle_cnt = 3;
  320. mb[0] = MBA_SCSI_COMPLETION;
  321. break;
  322. case MBA_CMPLT_4_16BIT:
  323. handles[0] = mb[1];
  324. handles[1] = mb[2];
  325. handles[2] = mb[3];
  326. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  327. handle_cnt = 4;
  328. mb[0] = MBA_SCSI_COMPLETION;
  329. break;
  330. case MBA_CMPLT_5_16BIT:
  331. handles[0] = mb[1];
  332. handles[1] = mb[2];
  333. handles[2] = mb[3];
  334. handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
  335. handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
  336. handle_cnt = 5;
  337. mb[0] = MBA_SCSI_COMPLETION;
  338. break;
  339. case MBA_CMPLT_2_32BIT:
  340. handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
  341. handles[1] = le32_to_cpu(
  342. ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
  343. RD_MAILBOX_REG(ha, reg, 6));
  344. handle_cnt = 2;
  345. mb[0] = MBA_SCSI_COMPLETION;
  346. break;
  347. default:
  348. break;
  349. }
  350. skip_rio:
  351. switch (mb[0]) {
  352. case MBA_SCSI_COMPLETION: /* Fast Post */
  353. if (!vha->flags.online)
  354. break;
  355. for (cnt = 0; cnt < handle_cnt; cnt++)
  356. qla2x00_process_completed_request(vha, rsp->req,
  357. handles[cnt]);
  358. break;
  359. case MBA_RESET: /* Reset */
  360. ql_dbg(ql_dbg_async, vha, 0x5002,
  361. "Asynchronous RESET.\n");
  362. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  363. break;
  364. case MBA_SYSTEM_ERR: /* System Error */
  365. mbx = IS_QLA81XX(ha) ? RD_REG_WORD(&reg24->mailbox7) : 0;
  366. ql_log(ql_log_warn, vha, 0x5003,
  367. "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
  368. "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
  369. ha->isp_ops->fw_dump(vha, 1);
  370. if (IS_FWI2_CAPABLE(ha)) {
  371. if (mb[1] == 0 && mb[2] == 0) {
  372. ql_log(ql_log_fatal, vha, 0x5004,
  373. "Unrecoverable Hardware Error: adapter "
  374. "marked OFFLINE!\n");
  375. vha->flags.online = 0;
  376. } else {
  377. /* Check to see if MPI timeout occurred */
  378. if ((mbx & MBX_3) && (ha->flags.port0))
  379. set_bit(MPI_RESET_NEEDED,
  380. &vha->dpc_flags);
  381. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  382. }
  383. } else if (mb[1] == 0) {
  384. ql_log(ql_log_fatal, vha, 0x5005,
  385. "Unrecoverable Hardware Error: adapter marked "
  386. "OFFLINE!\n");
  387. vha->flags.online = 0;
  388. } else
  389. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  390. break;
  391. case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
  392. ql_log(ql_log_warn, vha, 0x5006,
  393. "ISP Request Transfer Error (%x).\n", mb[1]);
  394. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  395. break;
  396. case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
  397. ql_log(ql_log_warn, vha, 0x5007,
  398. "ISP Response Transfer Error.\n");
  399. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  400. break;
  401. case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
  402. ql_dbg(ql_dbg_async, vha, 0x5008,
  403. "Asynchronous WAKEUP_THRES.\n");
  404. break;
  405. case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
  406. ql_log(ql_log_info, vha, 0x5009,
  407. "LIP occurred (%x).\n", mb[1]);
  408. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  409. atomic_set(&vha->loop_state, LOOP_DOWN);
  410. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  411. qla2x00_mark_all_devices_lost(vha, 1);
  412. }
  413. if (vha->vp_idx) {
  414. atomic_set(&vha->vp_state, VP_FAILED);
  415. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  416. }
  417. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  418. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  419. vha->flags.management_server_logged_in = 0;
  420. qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
  421. break;
  422. case MBA_LOOP_UP: /* Loop Up Event */
  423. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  424. link_speed = link_speeds[0];
  425. ha->link_data_rate = PORT_SPEED_1GB;
  426. } else {
  427. link_speed = link_speeds[LS_UNKNOWN];
  428. if (mb[1] < 5)
  429. link_speed = link_speeds[mb[1]];
  430. else if (mb[1] == 0x13)
  431. link_speed = link_speeds[5];
  432. ha->link_data_rate = mb[1];
  433. }
  434. ql_log(ql_log_info, vha, 0x500a,
  435. "LOOP UP detected (%s Gbps).\n", link_speed);
  436. vha->flags.management_server_logged_in = 0;
  437. qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
  438. break;
  439. case MBA_LOOP_DOWN: /* Loop Down Event */
  440. mbx = IS_QLA81XX(ha) ? RD_REG_WORD(&reg24->mailbox4) : 0;
  441. mbx = IS_QLA82XX(ha) ? RD_REG_WORD(&reg82->mailbox_out[4]) : mbx;
  442. ql_log(ql_log_info, vha, 0x500b,
  443. "LOOP DOWN detected (%x %x %x %x).\n",
  444. mb[1], mb[2], mb[3], mbx);
  445. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  446. atomic_set(&vha->loop_state, LOOP_DOWN);
  447. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  448. vha->device_flags |= DFLG_NO_CABLE;
  449. qla2x00_mark_all_devices_lost(vha, 1);
  450. }
  451. if (vha->vp_idx) {
  452. atomic_set(&vha->vp_state, VP_FAILED);
  453. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  454. }
  455. vha->flags.management_server_logged_in = 0;
  456. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  457. qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
  458. break;
  459. case MBA_LIP_RESET: /* LIP reset occurred */
  460. ql_log(ql_log_info, vha, 0x500c,
  461. "LIP reset occurred (%x).\n", mb[1]);
  462. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  463. atomic_set(&vha->loop_state, LOOP_DOWN);
  464. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  465. qla2x00_mark_all_devices_lost(vha, 1);
  466. }
  467. if (vha->vp_idx) {
  468. atomic_set(&vha->vp_state, VP_FAILED);
  469. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  470. }
  471. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  472. ha->operating_mode = LOOP;
  473. vha->flags.management_server_logged_in = 0;
  474. qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
  475. break;
  476. /* case MBA_DCBX_COMPLETE: */
  477. case MBA_POINT_TO_POINT: /* Point-to-Point */
  478. if (IS_QLA2100(ha))
  479. break;
  480. if (IS_QLA8XXX_TYPE(ha)) {
  481. ql_dbg(ql_dbg_async, vha, 0x500d,
  482. "DCBX Completed -- %04x %04x %04x.\n",
  483. mb[1], mb[2], mb[3]);
  484. if (ha->notify_dcbx_comp)
  485. complete(&ha->dcbx_comp);
  486. } else
  487. ql_dbg(ql_dbg_async, vha, 0x500e,
  488. "Asynchronous P2P MODE received.\n");
  489. /*
  490. * Until there's a transition from loop down to loop up, treat
  491. * this as loop down only.
  492. */
  493. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  494. atomic_set(&vha->loop_state, LOOP_DOWN);
  495. if (!atomic_read(&vha->loop_down_timer))
  496. atomic_set(&vha->loop_down_timer,
  497. LOOP_DOWN_TIME);
  498. qla2x00_mark_all_devices_lost(vha, 1);
  499. }
  500. if (vha->vp_idx) {
  501. atomic_set(&vha->vp_state, VP_FAILED);
  502. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  503. }
  504. if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
  505. set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  506. set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
  507. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  508. ha->flags.gpsc_supported = 1;
  509. vha->flags.management_server_logged_in = 0;
  510. break;
  511. case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
  512. if (IS_QLA2100(ha))
  513. break;
  514. ql_log(ql_log_info, vha, 0x500f,
  515. "Configuration change detected: value=%x.\n", mb[1]);
  516. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  517. atomic_set(&vha->loop_state, LOOP_DOWN);
  518. if (!atomic_read(&vha->loop_down_timer))
  519. atomic_set(&vha->loop_down_timer,
  520. LOOP_DOWN_TIME);
  521. qla2x00_mark_all_devices_lost(vha, 1);
  522. }
  523. if (vha->vp_idx) {
  524. atomic_set(&vha->vp_state, VP_FAILED);
  525. fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
  526. }
  527. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  528. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  529. break;
  530. case MBA_PORT_UPDATE: /* Port database update */
  531. /*
  532. * Handle only global and vn-port update events
  533. *
  534. * Relevant inputs:
  535. * mb[1] = N_Port handle of changed port
  536. * OR 0xffff for global event
  537. * mb[2] = New login state
  538. * 7 = Port logged out
  539. * mb[3] = LSB is vp_idx, 0xff = all vps
  540. *
  541. * Skip processing if:
  542. * Event is global, vp_idx is NOT all vps,
  543. * vp_idx does not match
  544. * Event is not global, vp_idx does not match
  545. */
  546. if (IS_QLA2XXX_MIDTYPE(ha) &&
  547. ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
  548. (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
  549. break;
  550. /* Global event -- port logout or port unavailable. */
  551. if (mb[1] == 0xffff && mb[2] == 0x7) {
  552. ql_dbg(ql_dbg_async, vha, 0x5010,
  553. "Port unavailable %04x %04x %04x.\n",
  554. mb[1], mb[2], mb[3]);
  555. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  556. atomic_set(&vha->loop_state, LOOP_DOWN);
  557. atomic_set(&vha->loop_down_timer,
  558. LOOP_DOWN_TIME);
  559. vha->device_flags |= DFLG_NO_CABLE;
  560. qla2x00_mark_all_devices_lost(vha, 1);
  561. }
  562. if (vha->vp_idx) {
  563. atomic_set(&vha->vp_state, VP_FAILED);
  564. fc_vport_set_state(vha->fc_vport,
  565. FC_VPORT_FAILED);
  566. qla2x00_mark_all_devices_lost(vha, 1);
  567. }
  568. vha->flags.management_server_logged_in = 0;
  569. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  570. break;
  571. }
  572. /*
  573. * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
  574. * event etc. earlier indicating loop is down) then process
  575. * it. Otherwise ignore it and Wait for RSCN to come in.
  576. */
  577. atomic_set(&vha->loop_down_timer, 0);
  578. if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
  579. atomic_read(&vha->loop_state) != LOOP_DEAD) {
  580. ql_dbg(ql_dbg_async, vha, 0x5011,
  581. "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
  582. mb[1], mb[2], mb[3]);
  583. break;
  584. }
  585. ql_dbg(ql_dbg_async, vha, 0x5012,
  586. "Port database changed %04x %04x %04x.\n",
  587. mb[1], mb[2], mb[3]);
  588. /*
  589. * Mark all devices as missing so we will login again.
  590. */
  591. atomic_set(&vha->loop_state, LOOP_UP);
  592. qla2x00_mark_all_devices_lost(vha, 1);
  593. vha->flags.rscn_queue_overflow = 1;
  594. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  595. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  596. break;
  597. case MBA_RSCN_UPDATE: /* State Change Registration */
  598. /* Check if the Vport has issued a SCR */
  599. if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
  600. break;
  601. /* Only handle SCNs for our Vport index. */
  602. if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
  603. break;
  604. ql_dbg(ql_dbg_async, vha, 0x5013,
  605. "RSCN database changed -- %04x %04x %04x.\n",
  606. mb[1], mb[2], mb[3]);
  607. rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
  608. host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
  609. | vha->d_id.b.al_pa;
  610. if (rscn_entry == host_pid) {
  611. ql_dbg(ql_dbg_async, vha, 0x5014,
  612. "Ignoring RSCN update to local host "
  613. "port ID (%06x).\n", host_pid);
  614. break;
  615. }
  616. /* Ignore reserved bits from RSCN-payload. */
  617. rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
  618. rscn_queue_index = vha->rscn_in_ptr + 1;
  619. if (rscn_queue_index == MAX_RSCN_COUNT)
  620. rscn_queue_index = 0;
  621. if (rscn_queue_index != vha->rscn_out_ptr) {
  622. vha->rscn_queue[vha->rscn_in_ptr] = rscn_entry;
  623. vha->rscn_in_ptr = rscn_queue_index;
  624. } else {
  625. vha->flags.rscn_queue_overflow = 1;
  626. }
  627. atomic_set(&vha->loop_state, LOOP_UPDATE);
  628. atomic_set(&vha->loop_down_timer, 0);
  629. vha->flags.management_server_logged_in = 0;
  630. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  631. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  632. qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
  633. break;
  634. /* case MBA_RIO_RESPONSE: */
  635. case MBA_ZIO_RESPONSE:
  636. ql_dbg(ql_dbg_async, vha, 0x5015,
  637. "[R|Z]IO update completion.\n");
  638. if (IS_FWI2_CAPABLE(ha))
  639. qla24xx_process_response_queue(vha, rsp);
  640. else
  641. qla2x00_process_response_queue(rsp);
  642. break;
  643. case MBA_DISCARD_RND_FRAME:
  644. ql_dbg(ql_dbg_async, vha, 0x5016,
  645. "Discard RND Frame -- %04x %04x %04x.\n",
  646. mb[1], mb[2], mb[3]);
  647. break;
  648. case MBA_TRACE_NOTIFICATION:
  649. ql_dbg(ql_dbg_async, vha, 0x5017,
  650. "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
  651. break;
  652. case MBA_ISP84XX_ALERT:
  653. ql_dbg(ql_dbg_async, vha, 0x5018,
  654. "ISP84XX Alert Notification -- %04x %04x %04x.\n",
  655. mb[1], mb[2], mb[3]);
  656. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  657. switch (mb[1]) {
  658. case A84_PANIC_RECOVERY:
  659. ql_log(ql_log_info, vha, 0x5019,
  660. "Alert 84XX: panic recovery %04x %04x.\n",
  661. mb[2], mb[3]);
  662. break;
  663. case A84_OP_LOGIN_COMPLETE:
  664. ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
  665. ql_log(ql_log_info, vha, 0x501a,
  666. "Alert 84XX: firmware version %x.\n",
  667. ha->cs84xx->op_fw_version);
  668. break;
  669. case A84_DIAG_LOGIN_COMPLETE:
  670. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  671. ql_log(ql_log_info, vha, 0x501b,
  672. "Alert 84XX: diagnostic firmware version %x.\n",
  673. ha->cs84xx->diag_fw_version);
  674. break;
  675. case A84_GOLD_LOGIN_COMPLETE:
  676. ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
  677. ha->cs84xx->fw_update = 1;
  678. ql_log(ql_log_info, vha, 0x501c,
  679. "Alert 84XX: gold firmware version %x.\n",
  680. ha->cs84xx->gold_fw_version);
  681. break;
  682. default:
  683. ql_log(ql_log_warn, vha, 0x501d,
  684. "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
  685. mb[1], mb[2], mb[3]);
  686. }
  687. spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
  688. break;
  689. case MBA_DCBX_START:
  690. ql_dbg(ql_dbg_async, vha, 0x501e,
  691. "DCBX Started -- %04x %04x %04x.\n",
  692. mb[1], mb[2], mb[3]);
  693. break;
  694. case MBA_DCBX_PARAM_UPDATE:
  695. ql_dbg(ql_dbg_async, vha, 0x501f,
  696. "DCBX Parameters Updated -- %04x %04x %04x.\n",
  697. mb[1], mb[2], mb[3]);
  698. break;
  699. case MBA_FCF_CONF_ERR:
  700. ql_dbg(ql_dbg_async, vha, 0x5020,
  701. "FCF Configuration Error -- %04x %04x %04x.\n",
  702. mb[1], mb[2], mb[3]);
  703. break;
  704. case MBA_IDC_COMPLETE:
  705. case MBA_IDC_NOTIFY:
  706. case MBA_IDC_TIME_EXT:
  707. qla81xx_idc_event(vha, mb[0], mb[1]);
  708. break;
  709. }
  710. if (!vha->vp_idx && ha->num_vhosts)
  711. qla2x00_alert_all_vps(rsp, mb);
  712. }
  713. /**
  714. * qla2x00_process_completed_request() - Process a Fast Post response.
  715. * @ha: SCSI driver HA context
  716. * @index: SRB index
  717. */
  718. static void
  719. qla2x00_process_completed_request(struct scsi_qla_host *vha,
  720. struct req_que *req, uint32_t index)
  721. {
  722. srb_t *sp;
  723. struct qla_hw_data *ha = vha->hw;
  724. /* Validate handle. */
  725. if (index >= MAX_OUTSTANDING_COMMANDS) {
  726. ql_log(ql_log_warn, vha, 0x3014,
  727. "Invalid SCSI command index (%x).\n", index);
  728. if (IS_QLA82XX(ha))
  729. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  730. else
  731. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  732. return;
  733. }
  734. sp = req->outstanding_cmds[index];
  735. if (sp) {
  736. /* Free outstanding command slot. */
  737. req->outstanding_cmds[index] = NULL;
  738. /* Save ISP completion status */
  739. sp->cmd->result = DID_OK << 16;
  740. qla2x00_sp_compl(ha, sp);
  741. } else {
  742. ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
  743. if (IS_QLA82XX(ha))
  744. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  745. else
  746. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  747. }
  748. }
  749. static srb_t *
  750. qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
  751. struct req_que *req, void *iocb)
  752. {
  753. struct qla_hw_data *ha = vha->hw;
  754. sts_entry_t *pkt = iocb;
  755. srb_t *sp = NULL;
  756. uint16_t index;
  757. index = LSW(pkt->handle);
  758. if (index >= MAX_OUTSTANDING_COMMANDS) {
  759. ql_log(ql_log_warn, vha, 0x5031,
  760. "Invalid command index (%x).\n", index);
  761. if (IS_QLA82XX(ha))
  762. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  763. else
  764. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  765. goto done;
  766. }
  767. sp = req->outstanding_cmds[index];
  768. if (!sp) {
  769. ql_log(ql_log_warn, vha, 0x5032,
  770. "Invalid completion handle (%x) -- timed-out.\n", index);
  771. return sp;
  772. }
  773. if (sp->handle != index) {
  774. ql_log(ql_log_warn, vha, 0x5033,
  775. "SRB handle (%x) mismatch %x.\n", sp->handle, index);
  776. return NULL;
  777. }
  778. req->outstanding_cmds[index] = NULL;
  779. done:
  780. return sp;
  781. }
  782. static void
  783. qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  784. struct mbx_entry *mbx)
  785. {
  786. const char func[] = "MBX-IOCB";
  787. const char *type;
  788. fc_port_t *fcport;
  789. srb_t *sp;
  790. struct srb_iocb *lio;
  791. struct srb_ctx *ctx;
  792. uint16_t *data;
  793. uint16_t status;
  794. sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
  795. if (!sp)
  796. return;
  797. ctx = sp->ctx;
  798. lio = ctx->u.iocb_cmd;
  799. type = ctx->name;
  800. fcport = sp->fcport;
  801. data = lio->u.logio.data;
  802. data[0] = MBS_COMMAND_ERROR;
  803. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  804. QLA_LOGIO_LOGIN_RETRIED : 0;
  805. if (mbx->entry_status) {
  806. ql_dbg(ql_dbg_async, vha, 0x5043,
  807. "Async-%s error entry - portid=%02x%02x%02x "
  808. "entry-status=%x status=%x state-flag=%x "
  809. "status-flags=%x.\n",
  810. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  811. fcport->d_id.b.al_pa, mbx->entry_status,
  812. le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
  813. le16_to_cpu(mbx->status_flags));
  814. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5057,
  815. (uint8_t *)mbx, sizeof(*mbx));
  816. goto logio_done;
  817. }
  818. status = le16_to_cpu(mbx->status);
  819. if (status == 0x30 && ctx->type == SRB_LOGIN_CMD &&
  820. le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
  821. status = 0;
  822. if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
  823. ql_dbg(ql_dbg_async, vha, 0x5045,
  824. "Async-%s complete - portid=%02x%02x%02x mbx1=%x.\n",
  825. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  826. fcport->d_id.b.al_pa, le16_to_cpu(mbx->mb1));
  827. data[0] = MBS_COMMAND_COMPLETE;
  828. if (ctx->type == SRB_LOGIN_CMD) {
  829. fcport->port_type = FCT_TARGET;
  830. if (le16_to_cpu(mbx->mb1) & BIT_0)
  831. fcport->port_type = FCT_INITIATOR;
  832. else if (le16_to_cpu(mbx->mb1) & BIT_1)
  833. fcport->flags |= FCF_FCP2_DEVICE;
  834. }
  835. goto logio_done;
  836. }
  837. data[0] = le16_to_cpu(mbx->mb0);
  838. switch (data[0]) {
  839. case MBS_PORT_ID_USED:
  840. data[1] = le16_to_cpu(mbx->mb1);
  841. break;
  842. case MBS_LOOP_ID_USED:
  843. break;
  844. default:
  845. data[0] = MBS_COMMAND_ERROR;
  846. break;
  847. }
  848. ql_log(ql_log_warn, vha, 0x5046,
  849. "Async-%s failed - portid=%02x%02x%02x status=%x "
  850. "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n",
  851. type, fcport->d_id.b.domain,
  852. fcport->d_id.b.area, fcport->d_id.b.al_pa, status,
  853. le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
  854. le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
  855. le16_to_cpu(mbx->mb7));
  856. logio_done:
  857. lio->done(sp);
  858. }
  859. static void
  860. qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  861. sts_entry_t *pkt, int iocb_type)
  862. {
  863. const char func[] = "CT_IOCB";
  864. const char *type;
  865. struct qla_hw_data *ha = vha->hw;
  866. srb_t *sp;
  867. struct srb_ctx *sp_bsg;
  868. struct fc_bsg_job *bsg_job;
  869. uint16_t comp_status;
  870. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  871. if (!sp)
  872. return;
  873. sp_bsg = sp->ctx;
  874. bsg_job = sp_bsg->u.bsg_job;
  875. type = NULL;
  876. switch (sp_bsg->type) {
  877. case SRB_CT_CMD:
  878. type = "ct pass-through";
  879. break;
  880. default:
  881. ql_log(ql_log_warn, vha, 0x5047,
  882. "Unrecognized SRB: (%p) type=%d.\n", sp, sp_bsg->type);
  883. return;
  884. }
  885. comp_status = le16_to_cpu(pkt->comp_status);
  886. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  887. * fc payload to the caller
  888. */
  889. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  890. bsg_job->reply_len = sizeof(struct fc_bsg_reply);
  891. if (comp_status != CS_COMPLETE) {
  892. if (comp_status == CS_DATA_UNDERRUN) {
  893. bsg_job->reply->result = DID_OK << 16;
  894. bsg_job->reply->reply_payload_rcv_len =
  895. le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
  896. ql_log(ql_log_warn, vha, 0x5048,
  897. "CT pass-through-%s error "
  898. "comp_status-status=0x%x total_byte = 0x%x.\n",
  899. type, comp_status,
  900. bsg_job->reply->reply_payload_rcv_len);
  901. } else {
  902. ql_log(ql_log_warn, vha, 0x5049,
  903. "CT pass-through-%s error "
  904. "comp_status-status=0x%x.\n", type, comp_status);
  905. bsg_job->reply->result = DID_ERROR << 16;
  906. bsg_job->reply->reply_payload_rcv_len = 0;
  907. }
  908. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5058,
  909. (uint8_t *)pkt, sizeof(*pkt));
  910. } else {
  911. bsg_job->reply->result = DID_OK << 16;
  912. bsg_job->reply->reply_payload_rcv_len =
  913. bsg_job->reply_payload.payload_len;
  914. bsg_job->reply_len = 0;
  915. }
  916. dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list,
  917. bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
  918. dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list,
  919. bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
  920. if (sp_bsg->type == SRB_ELS_CMD_HST || sp_bsg->type == SRB_CT_CMD)
  921. kfree(sp->fcport);
  922. kfree(sp->ctx);
  923. mempool_free(sp, ha->srb_mempool);
  924. bsg_job->job_done(bsg_job);
  925. }
  926. static void
  927. qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
  928. struct sts_entry_24xx *pkt, int iocb_type)
  929. {
  930. const char func[] = "ELS_CT_IOCB";
  931. const char *type;
  932. struct qla_hw_data *ha = vha->hw;
  933. srb_t *sp;
  934. struct srb_ctx *sp_bsg;
  935. struct fc_bsg_job *bsg_job;
  936. uint16_t comp_status;
  937. uint32_t fw_status[3];
  938. uint8_t* fw_sts_ptr;
  939. sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
  940. if (!sp)
  941. return;
  942. sp_bsg = sp->ctx;
  943. bsg_job = sp_bsg->u.bsg_job;
  944. type = NULL;
  945. switch (sp_bsg->type) {
  946. case SRB_ELS_CMD_RPT:
  947. case SRB_ELS_CMD_HST:
  948. type = "els";
  949. break;
  950. case SRB_CT_CMD:
  951. type = "ct pass-through";
  952. break;
  953. default:
  954. ql_log(ql_log_warn, vha, 0x503e,
  955. "Unrecognized SRB: (%p) type=%d.\n", sp, sp_bsg->type);
  956. return;
  957. }
  958. comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
  959. fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
  960. fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
  961. /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
  962. * fc payload to the caller
  963. */
  964. bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
  965. bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
  966. if (comp_status != CS_COMPLETE) {
  967. if (comp_status == CS_DATA_UNDERRUN) {
  968. bsg_job->reply->result = DID_OK << 16;
  969. bsg_job->reply->reply_payload_rcv_len =
  970. le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->total_byte_count);
  971. ql_log(ql_log_info, vha, 0x503f,
  972. "ELS-CT pass-through-%s error comp_status-status=0x%x "
  973. "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
  974. type, comp_status, fw_status[1], fw_status[2],
  975. le16_to_cpu(((struct els_sts_entry_24xx *)
  976. pkt)->total_byte_count));
  977. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  978. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  979. }
  980. else {
  981. ql_log(ql_log_info, vha, 0x5040,
  982. "ELS-CT pass-through-%s error comp_status-status=0x%x "
  983. "error subcode 1=0x%x error subcode 2=0x%x.\n",
  984. type, comp_status,
  985. le16_to_cpu(((struct els_sts_entry_24xx *)
  986. pkt)->error_subcode_1),
  987. le16_to_cpu(((struct els_sts_entry_24xx *)
  988. pkt)->error_subcode_2));
  989. bsg_job->reply->result = DID_ERROR << 16;
  990. bsg_job->reply->reply_payload_rcv_len = 0;
  991. fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
  992. memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
  993. }
  994. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5056,
  995. (uint8_t *)pkt, sizeof(*pkt));
  996. }
  997. else {
  998. bsg_job->reply->result = DID_OK << 16;
  999. bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
  1000. bsg_job->reply_len = 0;
  1001. }
  1002. dma_unmap_sg(&ha->pdev->dev,
  1003. bsg_job->request_payload.sg_list,
  1004. bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE);
  1005. dma_unmap_sg(&ha->pdev->dev,
  1006. bsg_job->reply_payload.sg_list,
  1007. bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE);
  1008. if ((sp_bsg->type == SRB_ELS_CMD_HST) ||
  1009. (sp_bsg->type == SRB_CT_CMD))
  1010. kfree(sp->fcport);
  1011. kfree(sp->ctx);
  1012. mempool_free(sp, ha->srb_mempool);
  1013. bsg_job->job_done(bsg_job);
  1014. }
  1015. static void
  1016. qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
  1017. struct logio_entry_24xx *logio)
  1018. {
  1019. const char func[] = "LOGIO-IOCB";
  1020. const char *type;
  1021. fc_port_t *fcport;
  1022. srb_t *sp;
  1023. struct srb_iocb *lio;
  1024. struct srb_ctx *ctx;
  1025. uint16_t *data;
  1026. uint32_t iop[2];
  1027. sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
  1028. if (!sp)
  1029. return;
  1030. ctx = sp->ctx;
  1031. lio = ctx->u.iocb_cmd;
  1032. type = ctx->name;
  1033. fcport = sp->fcport;
  1034. data = lio->u.logio.data;
  1035. data[0] = MBS_COMMAND_ERROR;
  1036. data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  1037. QLA_LOGIO_LOGIN_RETRIED : 0;
  1038. if (logio->entry_status) {
  1039. ql_log(ql_log_warn, vha, 0x5034,
  1040. "Async-%s error entry - "
  1041. "portid=%02x%02x%02x entry-status=%x.\n",
  1042. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  1043. fcport->d_id.b.al_pa, logio->entry_status);
  1044. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5059,
  1045. (uint8_t *)logio, sizeof(*logio));
  1046. goto logio_done;
  1047. }
  1048. if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
  1049. ql_dbg(ql_dbg_async, vha, 0x5036,
  1050. "Async-%s complete - portid=%02x%02x%02x "
  1051. "iop0=%x.\n",
  1052. type, fcport->d_id.b.domain, fcport->d_id.b.area,
  1053. fcport->d_id.b.al_pa,
  1054. le32_to_cpu(logio->io_parameter[0]));
  1055. data[0] = MBS_COMMAND_COMPLETE;
  1056. if (ctx->type != SRB_LOGIN_CMD)
  1057. goto logio_done;
  1058. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1059. if (iop[0] & BIT_4) {
  1060. fcport->port_type = FCT_TARGET;
  1061. if (iop[0] & BIT_8)
  1062. fcport->flags |= FCF_FCP2_DEVICE;
  1063. } else if (iop[0] & BIT_5)
  1064. fcport->port_type = FCT_INITIATOR;
  1065. if (logio->io_parameter[7] || logio->io_parameter[8])
  1066. fcport->supported_classes |= FC_COS_CLASS2;
  1067. if (logio->io_parameter[9] || logio->io_parameter[10])
  1068. fcport->supported_classes |= FC_COS_CLASS3;
  1069. goto logio_done;
  1070. }
  1071. iop[0] = le32_to_cpu(logio->io_parameter[0]);
  1072. iop[1] = le32_to_cpu(logio->io_parameter[1]);
  1073. switch (iop[0]) {
  1074. case LSC_SCODE_PORTID_USED:
  1075. data[0] = MBS_PORT_ID_USED;
  1076. data[1] = LSW(iop[1]);
  1077. break;
  1078. case LSC_SCODE_NPORT_USED:
  1079. data[0] = MBS_LOOP_ID_USED;
  1080. break;
  1081. default:
  1082. data[0] = MBS_COMMAND_ERROR;
  1083. break;
  1084. }
  1085. ql_dbg(ql_dbg_async, vha, 0x5037,
  1086. "Async-%s failed - portid=%02x%02x%02x comp=%x "
  1087. "iop0=%x iop1=%x.\n",
  1088. type, fcport->d_id.b.domain,
  1089. fcport->d_id.b.area, fcport->d_id.b.al_pa,
  1090. le16_to_cpu(logio->comp_status),
  1091. le32_to_cpu(logio->io_parameter[0]),
  1092. le32_to_cpu(logio->io_parameter[1]));
  1093. logio_done:
  1094. lio->done(sp);
  1095. }
  1096. static void
  1097. qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
  1098. struct tsk_mgmt_entry *tsk)
  1099. {
  1100. const char func[] = "TMF-IOCB";
  1101. const char *type;
  1102. fc_port_t *fcport;
  1103. srb_t *sp;
  1104. struct srb_iocb *iocb;
  1105. struct srb_ctx *ctx;
  1106. struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
  1107. int error = 1;
  1108. sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
  1109. if (!sp)
  1110. return;
  1111. ctx = sp->ctx;
  1112. iocb = ctx->u.iocb_cmd;
  1113. type = ctx->name;
  1114. fcport = sp->fcport;
  1115. if (sts->entry_status) {
  1116. ql_log(ql_log_warn, vha, 0x5038,
  1117. "Async-%s error - entry-status(%x).\n",
  1118. type, sts->entry_status);
  1119. } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1120. ql_log(ql_log_warn, vha, 0x5039,
  1121. "Async-%s error - completion status(%x).\n",
  1122. type, sts->comp_status);
  1123. } else if (!(le16_to_cpu(sts->scsi_status) &
  1124. SS_RESPONSE_INFO_LEN_VALID)) {
  1125. ql_log(ql_log_warn, vha, 0x503a,
  1126. "Async-%s error - no response info(%x).\n",
  1127. type, sts->scsi_status);
  1128. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  1129. ql_log(ql_log_warn, vha, 0x503b,
  1130. "Async-%s error - not enough response(%d).\n",
  1131. type, sts->rsp_data_len);
  1132. } else if (sts->data[3]) {
  1133. ql_log(ql_log_warn, vha, 0x503c,
  1134. "Async-%s error - response(%x).\n",
  1135. type, sts->data[3]);
  1136. } else {
  1137. error = 0;
  1138. }
  1139. if (error) {
  1140. iocb->u.tmf.data = error;
  1141. ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
  1142. (uint8_t *)sts, sizeof(*sts));
  1143. }
  1144. iocb->done(sp);
  1145. }
  1146. /**
  1147. * qla2x00_process_response_queue() - Process response queue entries.
  1148. * @ha: SCSI driver HA context
  1149. */
  1150. void
  1151. qla2x00_process_response_queue(struct rsp_que *rsp)
  1152. {
  1153. struct scsi_qla_host *vha;
  1154. struct qla_hw_data *ha = rsp->hw;
  1155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1156. sts_entry_t *pkt;
  1157. uint16_t handle_cnt;
  1158. uint16_t cnt;
  1159. vha = pci_get_drvdata(ha->pdev);
  1160. if (!vha->flags.online)
  1161. return;
  1162. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1163. pkt = (sts_entry_t *)rsp->ring_ptr;
  1164. rsp->ring_index++;
  1165. if (rsp->ring_index == rsp->length) {
  1166. rsp->ring_index = 0;
  1167. rsp->ring_ptr = rsp->ring;
  1168. } else {
  1169. rsp->ring_ptr++;
  1170. }
  1171. if (pkt->entry_status != 0) {
  1172. ql_log(ql_log_warn, vha, 0x5035,
  1173. "Process error entry.\n");
  1174. qla2x00_error_entry(vha, rsp, pkt);
  1175. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1176. wmb();
  1177. continue;
  1178. }
  1179. switch (pkt->entry_type) {
  1180. case STATUS_TYPE:
  1181. qla2x00_status_entry(vha, rsp, pkt);
  1182. break;
  1183. case STATUS_TYPE_21:
  1184. handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
  1185. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1186. qla2x00_process_completed_request(vha, rsp->req,
  1187. ((sts21_entry_t *)pkt)->handle[cnt]);
  1188. }
  1189. break;
  1190. case STATUS_TYPE_22:
  1191. handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
  1192. for (cnt = 0; cnt < handle_cnt; cnt++) {
  1193. qla2x00_process_completed_request(vha, rsp->req,
  1194. ((sts22_entry_t *)pkt)->handle[cnt]);
  1195. }
  1196. break;
  1197. case STATUS_CONT_TYPE:
  1198. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1199. break;
  1200. case MBX_IOCB_TYPE:
  1201. qla2x00_mbx_iocb_entry(vha, rsp->req,
  1202. (struct mbx_entry *)pkt);
  1203. break;
  1204. case CT_IOCB_TYPE:
  1205. qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1206. break;
  1207. default:
  1208. /* Type Not Supported. */
  1209. ql_log(ql_log_warn, vha, 0x504a,
  1210. "Received unknown response pkt type %x "
  1211. "entry status=%x.\n",
  1212. pkt->entry_type, pkt->entry_status);
  1213. break;
  1214. }
  1215. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1216. wmb();
  1217. }
  1218. /* Adjust ring index */
  1219. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
  1220. }
  1221. static inline void
  1222. qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
  1223. uint32_t sense_len, struct rsp_que *rsp)
  1224. {
  1225. struct scsi_qla_host *vha = sp->fcport->vha;
  1226. struct scsi_cmnd *cp = sp->cmd;
  1227. if (sense_len >= SCSI_SENSE_BUFFERSIZE)
  1228. sense_len = SCSI_SENSE_BUFFERSIZE;
  1229. sp->request_sense_length = sense_len;
  1230. sp->request_sense_ptr = cp->sense_buffer;
  1231. if (sp->request_sense_length > par_sense_len)
  1232. sense_len = par_sense_len;
  1233. memcpy(cp->sense_buffer, sense_data, sense_len);
  1234. sp->request_sense_ptr += sense_len;
  1235. sp->request_sense_length -= sense_len;
  1236. if (sp->request_sense_length != 0)
  1237. rsp->status_srb = sp;
  1238. ql_dbg(ql_dbg_io, vha, 0x301c,
  1239. "Check condition Sense data, scsi(%ld:%d:%d:%d) cmd=%p.\n",
  1240. sp->fcport->vha->host_no, cp->device->channel, cp->device->id,
  1241. cp->device->lun, cp);
  1242. if (sense_len)
  1243. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
  1244. cp->sense_buffer, sense_len);
  1245. }
  1246. struct scsi_dif_tuple {
  1247. __be16 guard; /* Checksum */
  1248. __be16 app_tag; /* APPL identifer */
  1249. __be32 ref_tag; /* Target LBA or indirect LBA */
  1250. };
  1251. /*
  1252. * Checks the guard or meta-data for the type of error
  1253. * detected by the HBA. In case of errors, we set the
  1254. * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
  1255. * to indicate to the kernel that the HBA detected error.
  1256. */
  1257. static inline int
  1258. qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
  1259. {
  1260. struct scsi_qla_host *vha = sp->fcport->vha;
  1261. struct scsi_cmnd *cmd = sp->cmd;
  1262. uint8_t *ap = &sts24->data[12];
  1263. uint8_t *ep = &sts24->data[20];
  1264. uint32_t e_ref_tag, a_ref_tag;
  1265. uint16_t e_app_tag, a_app_tag;
  1266. uint16_t e_guard, a_guard;
  1267. /*
  1268. * swab32 of the "data" field in the beginning of qla2x00_status_entry()
  1269. * would make guard field appear at offset 2
  1270. */
  1271. a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
  1272. a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
  1273. a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
  1274. e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
  1275. e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
  1276. e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
  1277. ql_dbg(ql_dbg_io, vha, 0x3023,
  1278. "iocb(s) %p Returned STATUS.\n", sts24);
  1279. ql_dbg(ql_dbg_io, vha, 0x3024,
  1280. "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
  1281. " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
  1282. " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
  1283. cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
  1284. a_app_tag, e_app_tag, a_guard, e_guard);
  1285. /*
  1286. * Ignore sector if:
  1287. * For type 3: ref & app tag is all 'f's
  1288. * For type 0,1,2: app tag is all 'f's
  1289. */
  1290. if ((a_app_tag == 0xffff) &&
  1291. ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
  1292. (a_ref_tag == 0xffffffff))) {
  1293. uint32_t blocks_done, resid;
  1294. sector_t lba_s = scsi_get_lba(cmd);
  1295. /* 2TB boundary case covered automatically with this */
  1296. blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
  1297. resid = scsi_bufflen(cmd) - (blocks_done *
  1298. cmd->device->sector_size);
  1299. scsi_set_resid(cmd, resid);
  1300. cmd->result = DID_OK << 16;
  1301. /* Update protection tag */
  1302. if (scsi_prot_sg_count(cmd)) {
  1303. uint32_t i, j = 0, k = 0, num_ent;
  1304. struct scatterlist *sg;
  1305. struct sd_dif_tuple *spt;
  1306. /* Patch the corresponding protection tags */
  1307. scsi_for_each_prot_sg(cmd, sg,
  1308. scsi_prot_sg_count(cmd), i) {
  1309. num_ent = sg_dma_len(sg) / 8;
  1310. if (k + num_ent < blocks_done) {
  1311. k += num_ent;
  1312. continue;
  1313. }
  1314. j = blocks_done - k - 1;
  1315. k = blocks_done;
  1316. break;
  1317. }
  1318. if (k != blocks_done) {
  1319. qla_printk(KERN_WARNING, sp->fcport->vha->hw,
  1320. "unexpected tag values tag:lba=%x:%lx)\n",
  1321. e_ref_tag, lba_s);
  1322. return 1;
  1323. }
  1324. spt = page_address(sg_page(sg)) + sg->offset;
  1325. spt += j;
  1326. spt->app_tag = 0xffff;
  1327. if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
  1328. spt->ref_tag = 0xffffffff;
  1329. }
  1330. return 0;
  1331. }
  1332. /* check guard */
  1333. if (e_guard != a_guard) {
  1334. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1335. 0x10, 0x1);
  1336. set_driver_byte(cmd, DRIVER_SENSE);
  1337. set_host_byte(cmd, DID_ABORT);
  1338. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1339. return 1;
  1340. }
  1341. /* check ref tag */
  1342. if (e_ref_tag != a_ref_tag) {
  1343. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1344. 0x10, 0x3);
  1345. set_driver_byte(cmd, DRIVER_SENSE);
  1346. set_host_byte(cmd, DID_ABORT);
  1347. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1348. return 1;
  1349. }
  1350. /* check appl tag */
  1351. if (e_app_tag != a_app_tag) {
  1352. scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
  1353. 0x10, 0x2);
  1354. set_driver_byte(cmd, DRIVER_SENSE);
  1355. set_host_byte(cmd, DID_ABORT);
  1356. cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
  1357. return 1;
  1358. }
  1359. return 1;
  1360. }
  1361. /**
  1362. * qla2x00_status_entry() - Process a Status IOCB entry.
  1363. * @ha: SCSI driver HA context
  1364. * @pkt: Entry pointer
  1365. */
  1366. static void
  1367. qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
  1368. {
  1369. srb_t *sp;
  1370. fc_port_t *fcport;
  1371. struct scsi_cmnd *cp;
  1372. sts_entry_t *sts;
  1373. struct sts_entry_24xx *sts24;
  1374. uint16_t comp_status;
  1375. uint16_t scsi_status;
  1376. uint16_t ox_id;
  1377. uint8_t lscsi_status;
  1378. int32_t resid;
  1379. uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
  1380. fw_resid_len;
  1381. uint8_t *rsp_info, *sense_data;
  1382. struct qla_hw_data *ha = vha->hw;
  1383. uint32_t handle;
  1384. uint16_t que;
  1385. struct req_que *req;
  1386. int logit = 1;
  1387. sts = (sts_entry_t *) pkt;
  1388. sts24 = (struct sts_entry_24xx *) pkt;
  1389. if (IS_FWI2_CAPABLE(ha)) {
  1390. comp_status = le16_to_cpu(sts24->comp_status);
  1391. scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
  1392. } else {
  1393. comp_status = le16_to_cpu(sts->comp_status);
  1394. scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
  1395. }
  1396. handle = (uint32_t) LSW(sts->handle);
  1397. que = MSW(sts->handle);
  1398. req = ha->req_q_map[que];
  1399. /* Fast path completion. */
  1400. if (comp_status == CS_COMPLETE && scsi_status == 0) {
  1401. qla2x00_process_completed_request(vha, req, handle);
  1402. return;
  1403. }
  1404. /* Validate handle. */
  1405. if (handle < MAX_OUTSTANDING_COMMANDS) {
  1406. sp = req->outstanding_cmds[handle];
  1407. req->outstanding_cmds[handle] = NULL;
  1408. } else
  1409. sp = NULL;
  1410. if (sp == NULL) {
  1411. ql_log(ql_log_warn, vha, 0x3017,
  1412. "Invalid status handle (0x%x).\n", sts->handle);
  1413. if (IS_QLA82XX(ha))
  1414. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1415. else
  1416. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1417. qla2xxx_wake_dpc(vha);
  1418. return;
  1419. }
  1420. cp = sp->cmd;
  1421. if (cp == NULL) {
  1422. ql_log(ql_log_warn, vha, 0x3018,
  1423. "Command already returned (0x%x/%p).\n",
  1424. sts->handle, sp);
  1425. return;
  1426. }
  1427. lscsi_status = scsi_status & STATUS_MASK;
  1428. fcport = sp->fcport;
  1429. ox_id = 0;
  1430. sense_len = par_sense_len = rsp_info_len = resid_len =
  1431. fw_resid_len = 0;
  1432. if (IS_FWI2_CAPABLE(ha)) {
  1433. if (scsi_status & SS_SENSE_LEN_VALID)
  1434. sense_len = le32_to_cpu(sts24->sense_len);
  1435. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1436. rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
  1437. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
  1438. resid_len = le32_to_cpu(sts24->rsp_residual_count);
  1439. if (comp_status == CS_DATA_UNDERRUN)
  1440. fw_resid_len = le32_to_cpu(sts24->residual_len);
  1441. rsp_info = sts24->data;
  1442. sense_data = sts24->data;
  1443. host_to_fcp_swap(sts24->data, sizeof(sts24->data));
  1444. ox_id = le16_to_cpu(sts24->ox_id);
  1445. par_sense_len = sizeof(sts24->data);
  1446. } else {
  1447. if (scsi_status & SS_SENSE_LEN_VALID)
  1448. sense_len = le16_to_cpu(sts->req_sense_length);
  1449. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
  1450. rsp_info_len = le16_to_cpu(sts->rsp_info_len);
  1451. resid_len = le32_to_cpu(sts->residual_length);
  1452. rsp_info = sts->rsp_info;
  1453. sense_data = sts->req_sense_data;
  1454. par_sense_len = sizeof(sts->req_sense_data);
  1455. }
  1456. /* Check for any FCP transport errors. */
  1457. if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
  1458. /* Sense data lies beyond any FCP RESPONSE data. */
  1459. if (IS_FWI2_CAPABLE(ha)) {
  1460. sense_data += rsp_info_len;
  1461. par_sense_len -= rsp_info_len;
  1462. }
  1463. if (rsp_info_len > 3 && rsp_info[3]) {
  1464. ql_log(ql_log_warn, vha, 0x3019,
  1465. "FCP I/O protocol failure (0x%x/0x%x).\n",
  1466. rsp_info_len, rsp_info[3]);
  1467. cp->result = DID_BUS_BUSY << 16;
  1468. goto out;
  1469. }
  1470. }
  1471. /* Check for overrun. */
  1472. if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
  1473. scsi_status & SS_RESIDUAL_OVER)
  1474. comp_status = CS_DATA_OVERRUN;
  1475. /*
  1476. * Based on Host and scsi status generate status code for Linux
  1477. */
  1478. switch (comp_status) {
  1479. case CS_COMPLETE:
  1480. case CS_QUEUE_FULL:
  1481. if (scsi_status == 0) {
  1482. cp->result = DID_OK << 16;
  1483. break;
  1484. }
  1485. if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
  1486. resid = resid_len;
  1487. scsi_set_resid(cp, resid);
  1488. if (!lscsi_status &&
  1489. ((unsigned)(scsi_bufflen(cp) - resid) <
  1490. cp->underflow)) {
  1491. ql_log(ql_log_warn, vha, 0x301a,
  1492. "Mid-layer underflow "
  1493. "detected (0x%x of 0x%x bytes).\n",
  1494. resid, scsi_bufflen(cp));
  1495. cp->result = DID_ERROR << 16;
  1496. break;
  1497. }
  1498. }
  1499. cp->result = DID_OK << 16 | lscsi_status;
  1500. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1501. ql_log(ql_log_warn, vha, 0x301b,
  1502. "QUEUE FULL detected.\n");
  1503. break;
  1504. }
  1505. logit = 0;
  1506. if (lscsi_status != SS_CHECK_CONDITION)
  1507. break;
  1508. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1509. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1510. break;
  1511. qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
  1512. rsp);
  1513. break;
  1514. case CS_DATA_UNDERRUN:
  1515. /* Use F/W calculated residual length. */
  1516. resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
  1517. scsi_set_resid(cp, resid);
  1518. if (scsi_status & SS_RESIDUAL_UNDER) {
  1519. if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
  1520. ql_log(ql_log_warn, vha, 0x301d,
  1521. "Dropped frame(s) detected "
  1522. "(0x%x of 0x%x bytes).\n",
  1523. resid, scsi_bufflen(cp));
  1524. cp->result = DID_ERROR << 16 | lscsi_status;
  1525. break;
  1526. }
  1527. if (!lscsi_status &&
  1528. ((unsigned)(scsi_bufflen(cp) - resid) <
  1529. cp->underflow)) {
  1530. ql_log(ql_log_warn, vha, 0x301e,
  1531. "Mid-layer underflow "
  1532. "detected (0x%x of 0x%x bytes).\n",
  1533. resid, scsi_bufflen(cp));
  1534. cp->result = DID_ERROR << 16;
  1535. break;
  1536. }
  1537. } else {
  1538. ql_log(ql_log_warn, vha, 0x301f,
  1539. "Dropped frame(s) detected (0x%x "
  1540. "of 0x%x bytes).\n", resid, scsi_bufflen(cp));
  1541. cp->result = DID_ERROR << 16 | lscsi_status;
  1542. goto check_scsi_status;
  1543. }
  1544. cp->result = DID_OK << 16 | lscsi_status;
  1545. logit = 0;
  1546. check_scsi_status:
  1547. /*
  1548. * Check to see if SCSI Status is non zero. If so report SCSI
  1549. * Status.
  1550. */
  1551. if (lscsi_status != 0) {
  1552. if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
  1553. ql_log(ql_log_warn, vha, 0x3020,
  1554. "QUEUE FULL detected.\n");
  1555. logit = 1;
  1556. break;
  1557. }
  1558. if (lscsi_status != SS_CHECK_CONDITION)
  1559. break;
  1560. memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  1561. if (!(scsi_status & SS_SENSE_LEN_VALID))
  1562. break;
  1563. qla2x00_handle_sense(sp, sense_data, par_sense_len,
  1564. sense_len, rsp);
  1565. }
  1566. break;
  1567. case CS_PORT_LOGGED_OUT:
  1568. case CS_PORT_CONFIG_CHG:
  1569. case CS_PORT_BUSY:
  1570. case CS_INCOMPLETE:
  1571. case CS_PORT_UNAVAILABLE:
  1572. case CS_TIMEOUT:
  1573. case CS_RESET:
  1574. /*
  1575. * We are going to have the fc class block the rport
  1576. * while we try to recover so instruct the mid layer
  1577. * to requeue until the class decides how to handle this.
  1578. */
  1579. cp->result = DID_TRANSPORT_DISRUPTED << 16;
  1580. if (comp_status == CS_TIMEOUT) {
  1581. if (IS_FWI2_CAPABLE(ha))
  1582. break;
  1583. else if ((le16_to_cpu(sts->status_flags) &
  1584. SF_LOGOUT_SENT) == 0)
  1585. break;
  1586. }
  1587. ql_dbg(ql_dbg_io, vha, 0x3021,
  1588. "Port down status: port-state=0x%x.\n",
  1589. atomic_read(&fcport->state));
  1590. if (atomic_read(&fcport->state) == FCS_ONLINE)
  1591. qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
  1592. break;
  1593. case CS_ABORTED:
  1594. cp->result = DID_RESET << 16;
  1595. break;
  1596. case CS_DIF_ERROR:
  1597. logit = qla2x00_handle_dif_error(sp, sts24);
  1598. break;
  1599. default:
  1600. cp->result = DID_ERROR << 16;
  1601. break;
  1602. }
  1603. out:
  1604. if (logit)
  1605. ql_dbg(ql_dbg_io, vha, 0x3022,
  1606. "FCP command status: 0x%x-0x%x (0x%x) "
  1607. "oxid=0x%x cdb=%02x%02x%02x len=0x%x "
  1608. "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
  1609. comp_status, scsi_status, cp->result, ox_id, cp->cmnd[0],
  1610. cp->cmnd[1], cp->cmnd[2], scsi_bufflen(cp), rsp_info_len,
  1611. resid_len, fw_resid_len);
  1612. if (rsp->status_srb == NULL)
  1613. qla2x00_sp_compl(ha, sp);
  1614. }
  1615. /**
  1616. * qla2x00_status_cont_entry() - Process a Status Continuations entry.
  1617. * @ha: SCSI driver HA context
  1618. * @pkt: Entry pointer
  1619. *
  1620. * Extended sense data.
  1621. */
  1622. static void
  1623. qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
  1624. {
  1625. uint8_t sense_sz = 0;
  1626. struct qla_hw_data *ha = rsp->hw;
  1627. struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
  1628. srb_t *sp = rsp->status_srb;
  1629. struct scsi_cmnd *cp;
  1630. if (sp != NULL && sp->request_sense_length != 0) {
  1631. cp = sp->cmd;
  1632. if (cp == NULL) {
  1633. ql_log(ql_log_warn, vha, 0x3025,
  1634. "cmd is NULL: already returned to OS (sp=%p).\n",
  1635. sp);
  1636. rsp->status_srb = NULL;
  1637. return;
  1638. }
  1639. if (sp->request_sense_length > sizeof(pkt->data)) {
  1640. sense_sz = sizeof(pkt->data);
  1641. } else {
  1642. sense_sz = sp->request_sense_length;
  1643. }
  1644. /* Move sense data. */
  1645. if (IS_FWI2_CAPABLE(ha))
  1646. host_to_fcp_swap(pkt->data, sizeof(pkt->data));
  1647. memcpy(sp->request_sense_ptr, pkt->data, sense_sz);
  1648. ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
  1649. sp->request_sense_ptr, sense_sz);
  1650. sp->request_sense_ptr += sense_sz;
  1651. sp->request_sense_length -= sense_sz;
  1652. /* Place command on done queue. */
  1653. if (sp->request_sense_length == 0) {
  1654. rsp->status_srb = NULL;
  1655. qla2x00_sp_compl(ha, sp);
  1656. }
  1657. }
  1658. }
  1659. /**
  1660. * qla2x00_error_entry() - Process an error entry.
  1661. * @ha: SCSI driver HA context
  1662. * @pkt: Entry pointer
  1663. */
  1664. static void
  1665. qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
  1666. {
  1667. srb_t *sp;
  1668. struct qla_hw_data *ha = vha->hw;
  1669. uint32_t handle = LSW(pkt->handle);
  1670. uint16_t que = MSW(pkt->handle);
  1671. struct req_que *req = ha->req_q_map[que];
  1672. if (pkt->entry_status & RF_INV_E_ORDER)
  1673. ql_dbg(ql_dbg_async, vha, 0x502a,
  1674. "Invalid Entry Order.\n");
  1675. else if (pkt->entry_status & RF_INV_E_COUNT)
  1676. ql_dbg(ql_dbg_async, vha, 0x502b,
  1677. "Invalid Entry Count.\n");
  1678. else if (pkt->entry_status & RF_INV_E_PARAM)
  1679. ql_dbg(ql_dbg_async, vha, 0x502c,
  1680. "Invalid Entry Parameter.\n");
  1681. else if (pkt->entry_status & RF_INV_E_TYPE)
  1682. ql_dbg(ql_dbg_async, vha, 0x502d,
  1683. "Invalid Entry Type.\n");
  1684. else if (pkt->entry_status & RF_BUSY)
  1685. ql_dbg(ql_dbg_async, vha, 0x502e,
  1686. "Busy.\n");
  1687. else
  1688. ql_dbg(ql_dbg_async, vha, 0x502f,
  1689. "UNKNOWN flag error.\n");
  1690. /* Validate handle. */
  1691. if (handle < MAX_OUTSTANDING_COMMANDS)
  1692. sp = req->outstanding_cmds[handle];
  1693. else
  1694. sp = NULL;
  1695. if (sp) {
  1696. /* Free outstanding command slot. */
  1697. req->outstanding_cmds[handle] = NULL;
  1698. /* Bad payload or header */
  1699. if (pkt->entry_status &
  1700. (RF_INV_E_ORDER | RF_INV_E_COUNT |
  1701. RF_INV_E_PARAM | RF_INV_E_TYPE)) {
  1702. sp->cmd->result = DID_ERROR << 16;
  1703. } else if (pkt->entry_status & RF_BUSY) {
  1704. sp->cmd->result = DID_BUS_BUSY << 16;
  1705. } else {
  1706. sp->cmd->result = DID_ERROR << 16;
  1707. }
  1708. qla2x00_sp_compl(ha, sp);
  1709. } else if (pkt->entry_type == COMMAND_A64_TYPE || pkt->entry_type ==
  1710. COMMAND_TYPE || pkt->entry_type == COMMAND_TYPE_7
  1711. || pkt->entry_type == COMMAND_TYPE_6) {
  1712. ql_log(ql_log_warn, vha, 0x5030,
  1713. "Error entry - invalid handle.\n");
  1714. if (IS_QLA82XX(ha))
  1715. set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
  1716. else
  1717. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1718. qla2xxx_wake_dpc(vha);
  1719. }
  1720. }
  1721. /**
  1722. * qla24xx_mbx_completion() - Process mailbox command completions.
  1723. * @ha: SCSI driver HA context
  1724. * @mb0: Mailbox0 register
  1725. */
  1726. static void
  1727. qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
  1728. {
  1729. uint16_t cnt;
  1730. uint16_t __iomem *wptr;
  1731. struct qla_hw_data *ha = vha->hw;
  1732. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1733. /* Load return mailbox registers. */
  1734. ha->flags.mbox_int = 1;
  1735. ha->mailbox_out[0] = mb0;
  1736. wptr = (uint16_t __iomem *)&reg->mailbox1;
  1737. for (cnt = 1; cnt < ha->mbx_count; cnt++) {
  1738. ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
  1739. wptr++;
  1740. }
  1741. if (ha->mcp) {
  1742. ql_dbg(ql_dbg_async, vha, 0x504d,
  1743. "Got mailbox completion. cmd=%x.\n", ha->mcp->mb[0]);
  1744. } else {
  1745. ql_dbg(ql_dbg_async, vha, 0x504e,
  1746. "MBX pointer ERROR.\n");
  1747. }
  1748. }
  1749. /**
  1750. * qla24xx_process_response_queue() - Process response queue entries.
  1751. * @ha: SCSI driver HA context
  1752. */
  1753. void qla24xx_process_response_queue(struct scsi_qla_host *vha,
  1754. struct rsp_que *rsp)
  1755. {
  1756. struct sts_entry_24xx *pkt;
  1757. struct qla_hw_data *ha = vha->hw;
  1758. if (!vha->flags.online)
  1759. return;
  1760. while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
  1761. pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
  1762. rsp->ring_index++;
  1763. if (rsp->ring_index == rsp->length) {
  1764. rsp->ring_index = 0;
  1765. rsp->ring_ptr = rsp->ring;
  1766. } else {
  1767. rsp->ring_ptr++;
  1768. }
  1769. if (pkt->entry_status != 0) {
  1770. ql_dbg(ql_dbg_async, vha, 0x5029,
  1771. "Process error entry.\n");
  1772. qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
  1773. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1774. wmb();
  1775. continue;
  1776. }
  1777. switch (pkt->entry_type) {
  1778. case STATUS_TYPE:
  1779. qla2x00_status_entry(vha, rsp, pkt);
  1780. break;
  1781. case STATUS_CONT_TYPE:
  1782. qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
  1783. break;
  1784. case VP_RPT_ID_IOCB_TYPE:
  1785. qla24xx_report_id_acquisition(vha,
  1786. (struct vp_rpt_id_entry_24xx *)pkt);
  1787. break;
  1788. case LOGINOUT_PORT_IOCB_TYPE:
  1789. qla24xx_logio_entry(vha, rsp->req,
  1790. (struct logio_entry_24xx *)pkt);
  1791. break;
  1792. case TSK_MGMT_IOCB_TYPE:
  1793. qla24xx_tm_iocb_entry(vha, rsp->req,
  1794. (struct tsk_mgmt_entry *)pkt);
  1795. break;
  1796. case CT_IOCB_TYPE:
  1797. qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
  1798. clear_bit(MBX_INTERRUPT, &vha->hw->mbx_cmd_flags);
  1799. break;
  1800. case ELS_IOCB_TYPE:
  1801. qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
  1802. break;
  1803. default:
  1804. /* Type Not Supported. */
  1805. ql_dbg(ql_dbg_async, vha, 0x5042,
  1806. "Received unknown response pkt type %x "
  1807. "entry status=%x.\n",
  1808. pkt->entry_type, pkt->entry_status);
  1809. break;
  1810. }
  1811. ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
  1812. wmb();
  1813. }
  1814. /* Adjust ring index */
  1815. if (IS_QLA82XX(ha)) {
  1816. struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
  1817. WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
  1818. } else
  1819. WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
  1820. }
  1821. static void
  1822. qla2xxx_check_risc_status(scsi_qla_host_t *vha)
  1823. {
  1824. int rval;
  1825. uint32_t cnt;
  1826. struct qla_hw_data *ha = vha->hw;
  1827. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1828. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1829. return;
  1830. rval = QLA_SUCCESS;
  1831. WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
  1832. RD_REG_DWORD(&reg->iobase_addr);
  1833. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1834. for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1835. rval == QLA_SUCCESS; cnt--) {
  1836. if (cnt) {
  1837. WRT_REG_DWORD(&reg->iobase_window, 0x0001);
  1838. udelay(10);
  1839. } else
  1840. rval = QLA_FUNCTION_TIMEOUT;
  1841. }
  1842. if (rval == QLA_SUCCESS)
  1843. goto next_test;
  1844. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1845. for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
  1846. rval == QLA_SUCCESS; cnt--) {
  1847. if (cnt) {
  1848. WRT_REG_DWORD(&reg->iobase_window, 0x0003);
  1849. udelay(10);
  1850. } else
  1851. rval = QLA_FUNCTION_TIMEOUT;
  1852. }
  1853. if (rval != QLA_SUCCESS)
  1854. goto done;
  1855. next_test:
  1856. if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
  1857. ql_log(ql_log_info, vha, 0x504c,
  1858. "Additional code -- 0x55AA.\n");
  1859. done:
  1860. WRT_REG_DWORD(&reg->iobase_window, 0x0000);
  1861. RD_REG_DWORD(&reg->iobase_window);
  1862. }
  1863. /**
  1864. * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
  1865. * @irq:
  1866. * @dev_id: SCSI driver HA context
  1867. *
  1868. * Called by system whenever the host adapter generates an interrupt.
  1869. *
  1870. * Returns handled flag.
  1871. */
  1872. irqreturn_t
  1873. qla24xx_intr_handler(int irq, void *dev_id)
  1874. {
  1875. scsi_qla_host_t *vha;
  1876. struct qla_hw_data *ha;
  1877. struct device_reg_24xx __iomem *reg;
  1878. int status;
  1879. unsigned long iter;
  1880. uint32_t stat;
  1881. uint32_t hccr;
  1882. uint16_t mb[4];
  1883. struct rsp_que *rsp;
  1884. unsigned long flags;
  1885. rsp = (struct rsp_que *) dev_id;
  1886. if (!rsp) {
  1887. printk(KERN_INFO
  1888. "%s(): NULL response queue pointer.\n", __func__);
  1889. return IRQ_NONE;
  1890. }
  1891. ha = rsp->hw;
  1892. reg = &ha->iobase->isp24;
  1893. status = 0;
  1894. if (unlikely(pci_channel_offline(ha->pdev)))
  1895. return IRQ_HANDLED;
  1896. spin_lock_irqsave(&ha->hardware_lock, flags);
  1897. vha = pci_get_drvdata(ha->pdev);
  1898. for (iter = 50; iter--; ) {
  1899. stat = RD_REG_DWORD(&reg->host_status);
  1900. if (stat & HSRX_RISC_PAUSED) {
  1901. if (unlikely(pci_channel_offline(ha->pdev)))
  1902. break;
  1903. hccr = RD_REG_DWORD(&reg->hccr);
  1904. ql_log(ql_log_warn, vha, 0x504b,
  1905. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  1906. hccr);
  1907. qla2xxx_check_risc_status(vha);
  1908. ha->isp_ops->fw_dump(vha, 1);
  1909. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1910. break;
  1911. } else if ((stat & HSRX_RISC_INT) == 0)
  1912. break;
  1913. switch (stat & 0xff) {
  1914. case 0x1:
  1915. case 0x2:
  1916. case 0x10:
  1917. case 0x11:
  1918. qla24xx_mbx_completion(vha, MSW(stat));
  1919. status |= MBX_INTERRUPT;
  1920. break;
  1921. case 0x12:
  1922. mb[0] = MSW(stat);
  1923. mb[1] = RD_REG_WORD(&reg->mailbox1);
  1924. mb[2] = RD_REG_WORD(&reg->mailbox2);
  1925. mb[3] = RD_REG_WORD(&reg->mailbox3);
  1926. qla2x00_async_event(vha, rsp, mb);
  1927. break;
  1928. case 0x13:
  1929. case 0x14:
  1930. qla24xx_process_response_queue(vha, rsp);
  1931. break;
  1932. default:
  1933. ql_dbg(ql_dbg_async, vha, 0x504f,
  1934. "Unrecognized interrupt type (%d).\n", stat * 0xff);
  1935. break;
  1936. }
  1937. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1938. RD_REG_DWORD_RELAXED(&reg->hccr);
  1939. }
  1940. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1941. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  1942. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  1943. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  1944. complete(&ha->mbx_intr_comp);
  1945. }
  1946. return IRQ_HANDLED;
  1947. }
  1948. static irqreturn_t
  1949. qla24xx_msix_rsp_q(int irq, void *dev_id)
  1950. {
  1951. struct qla_hw_data *ha;
  1952. struct rsp_que *rsp;
  1953. struct device_reg_24xx __iomem *reg;
  1954. struct scsi_qla_host *vha;
  1955. unsigned long flags;
  1956. rsp = (struct rsp_que *) dev_id;
  1957. if (!rsp) {
  1958. printk(KERN_INFO
  1959. "%s(): NULL response queue pointer.\n", __func__);
  1960. return IRQ_NONE;
  1961. }
  1962. ha = rsp->hw;
  1963. reg = &ha->iobase->isp24;
  1964. spin_lock_irqsave(&ha->hardware_lock, flags);
  1965. vha = pci_get_drvdata(ha->pdev);
  1966. qla24xx_process_response_queue(vha, rsp);
  1967. if (!ha->flags.disable_msix_handshake) {
  1968. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1969. RD_REG_DWORD_RELAXED(&reg->hccr);
  1970. }
  1971. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1972. return IRQ_HANDLED;
  1973. }
  1974. static irqreturn_t
  1975. qla25xx_msix_rsp_q(int irq, void *dev_id)
  1976. {
  1977. struct qla_hw_data *ha;
  1978. struct rsp_que *rsp;
  1979. struct device_reg_24xx __iomem *reg;
  1980. unsigned long flags;
  1981. rsp = (struct rsp_que *) dev_id;
  1982. if (!rsp) {
  1983. printk(KERN_INFO
  1984. "%s(): NULL response queue pointer.\n", __func__);
  1985. return IRQ_NONE;
  1986. }
  1987. ha = rsp->hw;
  1988. /* Clear the interrupt, if enabled, for this response queue */
  1989. if (rsp->options & ~BIT_6) {
  1990. reg = &ha->iobase->isp24;
  1991. spin_lock_irqsave(&ha->hardware_lock, flags);
  1992. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  1993. RD_REG_DWORD_RELAXED(&reg->hccr);
  1994. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1995. }
  1996. queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
  1997. return IRQ_HANDLED;
  1998. }
  1999. static irqreturn_t
  2000. qla24xx_msix_default(int irq, void *dev_id)
  2001. {
  2002. scsi_qla_host_t *vha;
  2003. struct qla_hw_data *ha;
  2004. struct rsp_que *rsp;
  2005. struct device_reg_24xx __iomem *reg;
  2006. int status;
  2007. uint32_t stat;
  2008. uint32_t hccr;
  2009. uint16_t mb[4];
  2010. unsigned long flags;
  2011. rsp = (struct rsp_que *) dev_id;
  2012. if (!rsp) {
  2013. printk(KERN_INFO
  2014. "%s(): NULL response queue pointer.\n", __func__);
  2015. return IRQ_NONE;
  2016. }
  2017. ha = rsp->hw;
  2018. reg = &ha->iobase->isp24;
  2019. status = 0;
  2020. spin_lock_irqsave(&ha->hardware_lock, flags);
  2021. vha = pci_get_drvdata(ha->pdev);
  2022. do {
  2023. stat = RD_REG_DWORD(&reg->host_status);
  2024. if (stat & HSRX_RISC_PAUSED) {
  2025. if (unlikely(pci_channel_offline(ha->pdev)))
  2026. break;
  2027. hccr = RD_REG_DWORD(&reg->hccr);
  2028. ql_log(ql_log_info, vha, 0x5050,
  2029. "RISC paused -- HCCR=%x, Dumping firmware.\n",
  2030. hccr);
  2031. qla2xxx_check_risc_status(vha);
  2032. ha->isp_ops->fw_dump(vha, 1);
  2033. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2034. break;
  2035. } else if ((stat & HSRX_RISC_INT) == 0)
  2036. break;
  2037. switch (stat & 0xff) {
  2038. case 0x1:
  2039. case 0x2:
  2040. case 0x10:
  2041. case 0x11:
  2042. qla24xx_mbx_completion(vha, MSW(stat));
  2043. status |= MBX_INTERRUPT;
  2044. break;
  2045. case 0x12:
  2046. mb[0] = MSW(stat);
  2047. mb[1] = RD_REG_WORD(&reg->mailbox1);
  2048. mb[2] = RD_REG_WORD(&reg->mailbox2);
  2049. mb[3] = RD_REG_WORD(&reg->mailbox3);
  2050. qla2x00_async_event(vha, rsp, mb);
  2051. break;
  2052. case 0x13:
  2053. case 0x14:
  2054. qla24xx_process_response_queue(vha, rsp);
  2055. break;
  2056. default:
  2057. ql_dbg(ql_dbg_async, vha, 0x5051,
  2058. "Unrecognized interrupt type (%d).\n", stat & 0xff);
  2059. break;
  2060. }
  2061. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
  2062. } while (0);
  2063. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2064. if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
  2065. (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
  2066. set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  2067. complete(&ha->mbx_intr_comp);
  2068. }
  2069. return IRQ_HANDLED;
  2070. }
  2071. /* Interrupt handling helpers. */
  2072. struct qla_init_msix_entry {
  2073. const char *name;
  2074. irq_handler_t handler;
  2075. };
  2076. static struct qla_init_msix_entry msix_entries[3] = {
  2077. { "qla2xxx (default)", qla24xx_msix_default },
  2078. { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
  2079. { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
  2080. };
  2081. static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
  2082. { "qla2xxx (default)", qla82xx_msix_default },
  2083. { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
  2084. };
  2085. static void
  2086. qla24xx_disable_msix(struct qla_hw_data *ha)
  2087. {
  2088. int i;
  2089. struct qla_msix_entry *qentry;
  2090. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2091. for (i = 0; i < ha->msix_count; i++) {
  2092. qentry = &ha->msix_entries[i];
  2093. if (qentry->have_irq)
  2094. free_irq(qentry->vector, qentry->rsp);
  2095. }
  2096. pci_disable_msix(ha->pdev);
  2097. kfree(ha->msix_entries);
  2098. ha->msix_entries = NULL;
  2099. ha->flags.msix_enabled = 0;
  2100. ql_dbg(ql_dbg_init, vha, 0x0042,
  2101. "Disabled the MSI.\n");
  2102. }
  2103. static int
  2104. qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
  2105. {
  2106. #define MIN_MSIX_COUNT 2
  2107. int i, ret;
  2108. struct msix_entry *entries;
  2109. struct qla_msix_entry *qentry;
  2110. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2111. entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
  2112. GFP_KERNEL);
  2113. if (!entries) {
  2114. ql_log(ql_log_warn, vha, 0x00bc,
  2115. "Failed to allocate memory for msix_entry.\n");
  2116. return -ENOMEM;
  2117. }
  2118. for (i = 0; i < ha->msix_count; i++)
  2119. entries[i].entry = i;
  2120. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2121. if (ret) {
  2122. if (ret < MIN_MSIX_COUNT)
  2123. goto msix_failed;
  2124. ql_log(ql_log_warn, vha, 0x00c6,
  2125. "MSI-X: Failed to enable support "
  2126. "-- %d/%d\n Retry with %d vectors.\n",
  2127. ha->msix_count, ret, ret);
  2128. ha->msix_count = ret;
  2129. ret = pci_enable_msix(ha->pdev, entries, ha->msix_count);
  2130. if (ret) {
  2131. msix_failed:
  2132. ql_log(ql_log_fatal, vha, 0x00c7,
  2133. "MSI-X: Failed to enable support, "
  2134. "giving up -- %d/%d.\n",
  2135. ha->msix_count, ret);
  2136. goto msix_out;
  2137. }
  2138. ha->max_rsp_queues = ha->msix_count - 1;
  2139. }
  2140. ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
  2141. ha->msix_count, GFP_KERNEL);
  2142. if (!ha->msix_entries) {
  2143. ql_log(ql_log_fatal, vha, 0x00c8,
  2144. "Failed to allocate memory for ha->msix_entries.\n");
  2145. ret = -ENOMEM;
  2146. goto msix_out;
  2147. }
  2148. ha->flags.msix_enabled = 1;
  2149. for (i = 0; i < ha->msix_count; i++) {
  2150. qentry = &ha->msix_entries[i];
  2151. qentry->vector = entries[i].vector;
  2152. qentry->entry = entries[i].entry;
  2153. qentry->have_irq = 0;
  2154. qentry->rsp = NULL;
  2155. }
  2156. /* Enable MSI-X vectors for the base queue */
  2157. for (i = 0; i < 2; i++) {
  2158. qentry = &ha->msix_entries[i];
  2159. if (IS_QLA82XX(ha)) {
  2160. ret = request_irq(qentry->vector,
  2161. qla82xx_msix_entries[i].handler,
  2162. 0, qla82xx_msix_entries[i].name, rsp);
  2163. } else {
  2164. ret = request_irq(qentry->vector,
  2165. msix_entries[i].handler,
  2166. 0, msix_entries[i].name, rsp);
  2167. }
  2168. if (ret) {
  2169. ql_log(ql_log_fatal, vha, 0x00cb,
  2170. "MSI-X: unable to register handler -- %x/%d.\n",
  2171. qentry->vector, ret);
  2172. qla24xx_disable_msix(ha);
  2173. ha->mqenable = 0;
  2174. goto msix_out;
  2175. }
  2176. qentry->have_irq = 1;
  2177. qentry->rsp = rsp;
  2178. rsp->msix = qentry;
  2179. }
  2180. /* Enable MSI-X vector for response queue update for queue 0 */
  2181. if (ha->mqiobase && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
  2182. ha->mqenable = 1;
  2183. ql_dbg(ql_dbg_multiq, vha, 0xc005,
  2184. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2185. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2186. ql_dbg(ql_dbg_init, vha, 0x0055,
  2187. "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
  2188. ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
  2189. msix_out:
  2190. kfree(entries);
  2191. return ret;
  2192. }
  2193. int
  2194. qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
  2195. {
  2196. int ret;
  2197. device_reg_t __iomem *reg = ha->iobase;
  2198. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2199. /* If possible, enable MSI-X. */
  2200. if (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
  2201. !IS_QLA8432(ha) && !IS_QLA8XXX_TYPE(ha))
  2202. goto skip_msi;
  2203. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
  2204. (ha->pdev->subsystem_device == 0x7040 ||
  2205. ha->pdev->subsystem_device == 0x7041 ||
  2206. ha->pdev->subsystem_device == 0x1705)) {
  2207. ql_log(ql_log_warn, vha, 0x0034,
  2208. "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
  2209. ha->pdev->subsystem_vendor,
  2210. ha->pdev->subsystem_device);
  2211. goto skip_msi;
  2212. }
  2213. if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX ||
  2214. !QLA_MSIX_FW_MODE_1(ha->fw_attributes))) {
  2215. ql_log(ql_log_warn, vha, 0x0035,
  2216. "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
  2217. ha->pdev->revision, ha->fw_attributes);
  2218. goto skip_msix;
  2219. }
  2220. ret = qla24xx_enable_msix(ha, rsp);
  2221. if (!ret) {
  2222. ql_dbg(ql_dbg_init, vha, 0x0036,
  2223. "MSI-X: Enabled (0x%X, 0x%X).\n",
  2224. ha->chip_revision, ha->fw_attributes);
  2225. goto clear_risc_ints;
  2226. }
  2227. ql_log(ql_log_info, vha, 0x0037,
  2228. "MSI-X Falling back-to MSI mode -%d.\n", ret);
  2229. skip_msix:
  2230. if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
  2231. !IS_QLA8001(ha))
  2232. goto skip_msi;
  2233. ret = pci_enable_msi(ha->pdev);
  2234. if (!ret) {
  2235. ql_dbg(ql_dbg_init, vha, 0x0038,
  2236. "MSI: Enabled.\n");
  2237. ha->flags.msi_enabled = 1;
  2238. } else
  2239. ql_log(ql_log_warn, vha, 0x0039,
  2240. "MSI-X; Falling back-to INTa mode -- %d.\n", ret);
  2241. skip_msi:
  2242. ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
  2243. ha->flags.msi_enabled ? 0 : IRQF_SHARED,
  2244. QLA2XXX_DRIVER_NAME, rsp);
  2245. if (ret) {
  2246. ql_log(ql_log_warn, vha, 0x003a,
  2247. "Failed to reserve interrupt %d already in use.\n",
  2248. ha->pdev->irq);
  2249. goto fail;
  2250. }
  2251. clear_risc_ints:
  2252. /*
  2253. * FIXME: Noted that 8014s were being dropped during NK testing.
  2254. * Timing deltas during MSI-X/INTa transitions?
  2255. */
  2256. if (IS_QLA81XX(ha) || IS_QLA82XX(ha))
  2257. goto fail;
  2258. spin_lock_irq(&ha->hardware_lock);
  2259. if (IS_FWI2_CAPABLE(ha)) {
  2260. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_HOST_INT);
  2261. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_CLR_RISC_INT);
  2262. } else {
  2263. WRT_REG_WORD(&reg->isp.semaphore, 0);
  2264. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_RISC_INT);
  2265. WRT_REG_WORD(&reg->isp.hccr, HCCR_CLR_HOST_INT);
  2266. }
  2267. spin_unlock_irq(&ha->hardware_lock);
  2268. fail:
  2269. return ret;
  2270. }
  2271. void
  2272. qla2x00_free_irqs(scsi_qla_host_t *vha)
  2273. {
  2274. struct qla_hw_data *ha = vha->hw;
  2275. struct rsp_que *rsp = ha->rsp_q_map[0];
  2276. if (ha->flags.msix_enabled)
  2277. qla24xx_disable_msix(ha);
  2278. else if (ha->flags.msi_enabled) {
  2279. free_irq(ha->pdev->irq, rsp);
  2280. pci_disable_msi(ha->pdev);
  2281. } else
  2282. free_irq(ha->pdev->irq, rsp);
  2283. }
  2284. int qla25xx_request_irq(struct rsp_que *rsp)
  2285. {
  2286. struct qla_hw_data *ha = rsp->hw;
  2287. struct qla_init_msix_entry *intr = &msix_entries[2];
  2288. struct qla_msix_entry *msix = rsp->msix;
  2289. scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
  2290. int ret;
  2291. ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
  2292. if (ret) {
  2293. ql_log(ql_log_fatal, vha, 0x00e6,
  2294. "MSI-X: Unable to register handler -- %x/%d.\n",
  2295. msix->vector, ret);
  2296. return ret;
  2297. }
  2298. msix->have_irq = 1;
  2299. msix->rsp = rsp;
  2300. return ret;
  2301. }