core.c 18 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. unsigned int ath10k_debug_mask;
  28. static bool uart_print;
  29. static unsigned int ath10k_p2p;
  30. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  31. module_param(uart_print, bool, 0644);
  32. module_param_named(p2p, ath10k_p2p, uint, 0644);
  33. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  34. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  35. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  36. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  37. {
  38. .id = QCA988X_HW_2_0_VERSION,
  39. .name = "qca988x hw2.0",
  40. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  41. .fw = {
  42. .dir = QCA988X_HW_2_0_FW_DIR,
  43. .fw = QCA988X_HW_2_0_FW_FILE,
  44. .otp = QCA988X_HW_2_0_OTP_FILE,
  45. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  46. },
  47. },
  48. };
  49. static void ath10k_send_suspend_complete(struct ath10k *ar)
  50. {
  51. ath10k_dbg(ATH10K_DBG_CORE, "%s\n", __func__);
  52. ar->is_target_paused = true;
  53. wake_up(&ar->event_queue);
  54. }
  55. static int ath10k_check_fw_version(struct ath10k *ar)
  56. {
  57. char version[32];
  58. if (ar->fw_version_major >= SUPPORTED_FW_MAJOR &&
  59. ar->fw_version_minor >= SUPPORTED_FW_MINOR &&
  60. ar->fw_version_release >= SUPPORTED_FW_RELEASE &&
  61. ar->fw_version_build >= SUPPORTED_FW_BUILD)
  62. return 0;
  63. snprintf(version, sizeof(version), "%u.%u.%u.%u",
  64. SUPPORTED_FW_MAJOR, SUPPORTED_FW_MINOR,
  65. SUPPORTED_FW_RELEASE, SUPPORTED_FW_BUILD);
  66. ath10k_warn("WARNING: Firmware version %s is not officially supported.\n",
  67. ar->hw->wiphy->fw_version);
  68. ath10k_warn("Please upgrade to version %s (or newer)\n", version);
  69. return 0;
  70. }
  71. static int ath10k_init_connect_htc(struct ath10k *ar)
  72. {
  73. int status;
  74. status = ath10k_wmi_connect_htc_service(ar);
  75. if (status)
  76. goto conn_fail;
  77. /* Start HTC */
  78. status = ath10k_htc_start(&ar->htc);
  79. if (status)
  80. goto conn_fail;
  81. /* Wait for WMI event to be ready */
  82. status = ath10k_wmi_wait_for_service_ready(ar);
  83. if (status <= 0) {
  84. ath10k_warn("wmi service ready event not received");
  85. status = -ETIMEDOUT;
  86. goto timeout;
  87. }
  88. ath10k_dbg(ATH10K_DBG_CORE, "core wmi ready\n");
  89. return 0;
  90. timeout:
  91. ath10k_htc_stop(&ar->htc);
  92. conn_fail:
  93. return status;
  94. }
  95. static int ath10k_init_configure_target(struct ath10k *ar)
  96. {
  97. u32 param_host;
  98. int ret;
  99. /* tell target which HTC version it is used*/
  100. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  101. HTC_PROTOCOL_VERSION);
  102. if (ret) {
  103. ath10k_err("settings HTC version failed\n");
  104. return ret;
  105. }
  106. /* set the firmware mode to STA/IBSS/AP */
  107. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  108. if (ret) {
  109. ath10k_err("setting firmware mode (1/2) failed\n");
  110. return ret;
  111. }
  112. /* TODO following parameters need to be re-visited. */
  113. /* num_device */
  114. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  115. /* Firmware mode */
  116. /* FIXME: Why FW_MODE_AP ??.*/
  117. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  118. /* mac_addr_method */
  119. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  120. /* firmware_bridge */
  121. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  122. /* fwsubmode */
  123. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  124. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  125. if (ret) {
  126. ath10k_err("setting firmware mode (2/2) failed\n");
  127. return ret;
  128. }
  129. /* We do all byte-swapping on the host */
  130. ret = ath10k_bmi_write32(ar, hi_be, 0);
  131. if (ret) {
  132. ath10k_err("setting host CPU BE mode failed\n");
  133. return ret;
  134. }
  135. /* FW descriptor/Data swap flags */
  136. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  137. if (ret) {
  138. ath10k_err("setting FW data/desc swap flags failed\n");
  139. return ret;
  140. }
  141. return 0;
  142. }
  143. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  144. const char *dir,
  145. const char *file)
  146. {
  147. char filename[100];
  148. const struct firmware *fw;
  149. int ret;
  150. if (file == NULL)
  151. return ERR_PTR(-ENOENT);
  152. if (dir == NULL)
  153. dir = ".";
  154. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  155. ret = request_firmware(&fw, filename, ar->dev);
  156. if (ret)
  157. return ERR_PTR(ret);
  158. return fw;
  159. }
  160. static int ath10k_push_board_ext_data(struct ath10k *ar,
  161. const struct firmware *fw)
  162. {
  163. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  164. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  165. u32 board_ext_data_addr;
  166. int ret;
  167. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  168. if (ret) {
  169. ath10k_err("could not read board ext data addr (%d)\n", ret);
  170. return ret;
  171. }
  172. ath10k_dbg(ATH10K_DBG_CORE,
  173. "ath10k: Board extended Data download addr: 0x%x\n",
  174. board_ext_data_addr);
  175. if (board_ext_data_addr == 0)
  176. return 0;
  177. if (fw->size != (board_data_size + board_ext_data_size)) {
  178. ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
  179. fw->size, board_data_size, board_ext_data_size);
  180. return -EINVAL;
  181. }
  182. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  183. fw->data + board_data_size,
  184. board_ext_data_size);
  185. if (ret) {
  186. ath10k_err("could not write board ext data (%d)\n", ret);
  187. return ret;
  188. }
  189. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  190. (board_ext_data_size << 16) | 1);
  191. if (ret) {
  192. ath10k_err("could not write board ext data bit (%d)\n", ret);
  193. return ret;
  194. }
  195. return 0;
  196. }
  197. static int ath10k_download_board_data(struct ath10k *ar)
  198. {
  199. const struct firmware *fw = ar->board_data;
  200. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  201. u32 address;
  202. int ret;
  203. ret = ath10k_push_board_ext_data(ar, fw);
  204. if (ret) {
  205. ath10k_err("could not push board ext data (%d)\n", ret);
  206. goto exit;
  207. }
  208. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  209. if (ret) {
  210. ath10k_err("could not read board data addr (%d)\n", ret);
  211. goto exit;
  212. }
  213. ret = ath10k_bmi_write_memory(ar, address, fw->data,
  214. min_t(u32, board_data_size, fw->size));
  215. if (ret) {
  216. ath10k_err("could not write board data (%d)\n", ret);
  217. goto exit;
  218. }
  219. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  220. if (ret) {
  221. ath10k_err("could not write board data bit (%d)\n", ret);
  222. goto exit;
  223. }
  224. exit:
  225. return ret;
  226. }
  227. static int ath10k_download_and_run_otp(struct ath10k *ar)
  228. {
  229. const struct firmware *fw = ar->otp;
  230. u32 address = ar->hw_params.patch_load_addr;
  231. u32 exec_param;
  232. int ret;
  233. /* OTP is optional */
  234. if (!ar->otp)
  235. return 0;
  236. ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
  237. if (ret) {
  238. ath10k_err("could not write otp (%d)\n", ret);
  239. goto exit;
  240. }
  241. exec_param = 0;
  242. ret = ath10k_bmi_execute(ar, address, &exec_param);
  243. if (ret) {
  244. ath10k_err("could not execute otp (%d)\n", ret);
  245. goto exit;
  246. }
  247. exit:
  248. return ret;
  249. }
  250. static int ath10k_download_fw(struct ath10k *ar)
  251. {
  252. const struct firmware *fw = ar->firmware;
  253. u32 address;
  254. int ret;
  255. address = ar->hw_params.patch_load_addr;
  256. ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size);
  257. if (ret) {
  258. ath10k_err("could not write fw (%d)\n", ret);
  259. goto exit;
  260. }
  261. exit:
  262. return ret;
  263. }
  264. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  265. {
  266. if (ar->board_data && !IS_ERR(ar->board_data))
  267. release_firmware(ar->board_data);
  268. if (ar->otp && !IS_ERR(ar->otp))
  269. release_firmware(ar->otp);
  270. if (ar->firmware && !IS_ERR(ar->firmware))
  271. release_firmware(ar->firmware);
  272. ar->board_data = NULL;
  273. ar->otp = NULL;
  274. ar->firmware = NULL;
  275. }
  276. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  277. {
  278. int ret = 0;
  279. if (ar->hw_params.fw.fw == NULL) {
  280. ath10k_err("firmware file not defined\n");
  281. return -EINVAL;
  282. }
  283. if (ar->hw_params.fw.board == NULL) {
  284. ath10k_err("board data file not defined");
  285. return -EINVAL;
  286. }
  287. ar->board_data = ath10k_fetch_fw_file(ar,
  288. ar->hw_params.fw.dir,
  289. ar->hw_params.fw.board);
  290. if (IS_ERR(ar->board_data)) {
  291. ret = PTR_ERR(ar->board_data);
  292. ath10k_err("could not fetch board data (%d)\n", ret);
  293. goto err;
  294. }
  295. ar->firmware = ath10k_fetch_fw_file(ar,
  296. ar->hw_params.fw.dir,
  297. ar->hw_params.fw.fw);
  298. if (IS_ERR(ar->firmware)) {
  299. ret = PTR_ERR(ar->firmware);
  300. ath10k_err("could not fetch firmware (%d)\n", ret);
  301. goto err;
  302. }
  303. /* OTP may be undefined. If so, don't fetch it at all */
  304. if (ar->hw_params.fw.otp == NULL)
  305. return 0;
  306. ar->otp = ath10k_fetch_fw_file(ar,
  307. ar->hw_params.fw.dir,
  308. ar->hw_params.fw.otp);
  309. if (IS_ERR(ar->otp)) {
  310. ret = PTR_ERR(ar->otp);
  311. ath10k_err("could not fetch otp (%d)\n", ret);
  312. goto err;
  313. }
  314. return 0;
  315. err:
  316. ath10k_core_free_firmware_files(ar);
  317. return ret;
  318. }
  319. static int ath10k_init_download_firmware(struct ath10k *ar)
  320. {
  321. int ret;
  322. ret = ath10k_download_board_data(ar);
  323. if (ret)
  324. return ret;
  325. ret = ath10k_download_and_run_otp(ar);
  326. if (ret)
  327. return ret;
  328. ret = ath10k_download_fw(ar);
  329. if (ret)
  330. return ret;
  331. return ret;
  332. }
  333. static int ath10k_init_uart(struct ath10k *ar)
  334. {
  335. int ret;
  336. /*
  337. * Explicitly setting UART prints to zero as target turns it on
  338. * based on scratch registers.
  339. */
  340. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  341. if (ret) {
  342. ath10k_warn("could not disable UART prints (%d)\n", ret);
  343. return ret;
  344. }
  345. if (!uart_print) {
  346. ath10k_info("UART prints disabled\n");
  347. return 0;
  348. }
  349. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  350. if (ret) {
  351. ath10k_warn("could not enable UART prints (%d)\n", ret);
  352. return ret;
  353. }
  354. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  355. if (ret) {
  356. ath10k_warn("could not enable UART prints (%d)\n", ret);
  357. return ret;
  358. }
  359. ath10k_info("UART prints enabled\n");
  360. return 0;
  361. }
  362. static int ath10k_init_hw_params(struct ath10k *ar)
  363. {
  364. const struct ath10k_hw_params *uninitialized_var(hw_params);
  365. int i;
  366. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  367. hw_params = &ath10k_hw_params_list[i];
  368. if (hw_params->id == ar->target_version)
  369. break;
  370. }
  371. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  372. ath10k_err("Unsupported hardware version: 0x%x\n",
  373. ar->target_version);
  374. return -EINVAL;
  375. }
  376. ar->hw_params = *hw_params;
  377. ath10k_info("Hardware name %s version 0x%x\n",
  378. ar->hw_params.name, ar->target_version);
  379. return 0;
  380. }
  381. static void ath10k_core_restart(struct work_struct *work)
  382. {
  383. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  384. mutex_lock(&ar->conf_mutex);
  385. switch (ar->state) {
  386. case ATH10K_STATE_ON:
  387. ath10k_halt(ar);
  388. ar->state = ATH10K_STATE_RESTARTING;
  389. ieee80211_restart_hw(ar->hw);
  390. break;
  391. case ATH10K_STATE_OFF:
  392. /* this can happen if driver is being unloaded */
  393. ath10k_warn("cannot restart a device that hasn't been started\n");
  394. break;
  395. case ATH10K_STATE_RESTARTING:
  396. case ATH10K_STATE_RESTARTED:
  397. ar->state = ATH10K_STATE_WEDGED;
  398. /* fall through */
  399. case ATH10K_STATE_WEDGED:
  400. ath10k_warn("device is wedged, will not restart\n");
  401. break;
  402. }
  403. mutex_unlock(&ar->conf_mutex);
  404. }
  405. struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
  406. const struct ath10k_hif_ops *hif_ops)
  407. {
  408. struct ath10k *ar;
  409. ar = ath10k_mac_create();
  410. if (!ar)
  411. return NULL;
  412. ar->ath_common.priv = ar;
  413. ar->ath_common.hw = ar->hw;
  414. ar->p2p = !!ath10k_p2p;
  415. ar->dev = dev;
  416. ar->hif.priv = hif_priv;
  417. ar->hif.ops = hif_ops;
  418. init_completion(&ar->scan.started);
  419. init_completion(&ar->scan.completed);
  420. init_completion(&ar->scan.on_channel);
  421. init_completion(&ar->install_key_done);
  422. init_completion(&ar->vdev_setup_done);
  423. setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
  424. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  425. if (!ar->workqueue)
  426. goto err_wq;
  427. mutex_init(&ar->conf_mutex);
  428. spin_lock_init(&ar->data_lock);
  429. INIT_LIST_HEAD(&ar->peers);
  430. init_waitqueue_head(&ar->peer_mapping_wq);
  431. init_completion(&ar->offchan_tx_completed);
  432. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  433. skb_queue_head_init(&ar->offchan_tx_queue);
  434. init_waitqueue_head(&ar->event_queue);
  435. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  436. return ar;
  437. err_wq:
  438. ath10k_mac_destroy(ar);
  439. return NULL;
  440. }
  441. EXPORT_SYMBOL(ath10k_core_create);
  442. void ath10k_core_destroy(struct ath10k *ar)
  443. {
  444. flush_workqueue(ar->workqueue);
  445. destroy_workqueue(ar->workqueue);
  446. ath10k_mac_destroy(ar);
  447. }
  448. EXPORT_SYMBOL(ath10k_core_destroy);
  449. int ath10k_core_start(struct ath10k *ar)
  450. {
  451. int status;
  452. ath10k_bmi_start(ar);
  453. if (ath10k_init_configure_target(ar)) {
  454. status = -EINVAL;
  455. goto err;
  456. }
  457. status = ath10k_init_download_firmware(ar);
  458. if (status)
  459. goto err;
  460. status = ath10k_init_uart(ar);
  461. if (status)
  462. goto err;
  463. ar->htc.htc_ops.target_send_suspend_complete =
  464. ath10k_send_suspend_complete;
  465. status = ath10k_htc_init(ar);
  466. if (status) {
  467. ath10k_err("could not init HTC (%d)\n", status);
  468. goto err;
  469. }
  470. status = ath10k_bmi_done(ar);
  471. if (status)
  472. goto err;
  473. status = ath10k_wmi_attach(ar);
  474. if (status) {
  475. ath10k_err("WMI attach failed: %d\n", status);
  476. goto err;
  477. }
  478. status = ath10k_htc_wait_target(&ar->htc);
  479. if (status)
  480. goto err_wmi_detach;
  481. status = ath10k_htt_attach(ar);
  482. if (status) {
  483. ath10k_err("could not attach htt (%d)\n", status);
  484. goto err_wmi_detach;
  485. }
  486. status = ath10k_init_connect_htc(ar);
  487. if (status)
  488. goto err_htt_detach;
  489. ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version);
  490. status = ath10k_check_fw_version(ar);
  491. if (status)
  492. goto err_disconnect_htc;
  493. status = ath10k_wmi_cmd_init(ar);
  494. if (status) {
  495. ath10k_err("could not send WMI init command (%d)\n", status);
  496. goto err_disconnect_htc;
  497. }
  498. status = ath10k_wmi_wait_for_unified_ready(ar);
  499. if (status <= 0) {
  500. ath10k_err("wmi unified ready event not received\n");
  501. status = -ETIMEDOUT;
  502. goto err_disconnect_htc;
  503. }
  504. status = ath10k_htt_attach_target(&ar->htt);
  505. if (status)
  506. goto err_disconnect_htc;
  507. ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
  508. return 0;
  509. err_disconnect_htc:
  510. ath10k_htc_stop(&ar->htc);
  511. err_htt_detach:
  512. ath10k_htt_detach(&ar->htt);
  513. err_wmi_detach:
  514. ath10k_wmi_detach(ar);
  515. err:
  516. return status;
  517. }
  518. EXPORT_SYMBOL(ath10k_core_start);
  519. void ath10k_core_stop(struct ath10k *ar)
  520. {
  521. ath10k_htc_stop(&ar->htc);
  522. ath10k_htt_detach(&ar->htt);
  523. ath10k_wmi_detach(ar);
  524. }
  525. EXPORT_SYMBOL(ath10k_core_stop);
  526. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  527. * order to know what hw capabilities should be advertised to mac80211 it is
  528. * necessary to load the firmware (and tear it down immediately since start
  529. * hook will try to init it again) before registering */
  530. static int ath10k_core_probe_fw(struct ath10k *ar)
  531. {
  532. struct bmi_target_info target_info;
  533. int ret = 0;
  534. ret = ath10k_hif_power_up(ar);
  535. if (ret) {
  536. ath10k_err("could not start pci hif (%d)\n", ret);
  537. return ret;
  538. }
  539. memset(&target_info, 0, sizeof(target_info));
  540. ret = ath10k_bmi_get_target_info(ar, &target_info);
  541. if (ret) {
  542. ath10k_err("could not get target info (%d)\n", ret);
  543. ath10k_hif_power_down(ar);
  544. return ret;
  545. }
  546. ar->target_version = target_info.version;
  547. ar->hw->wiphy->hw_version = target_info.version;
  548. ret = ath10k_init_hw_params(ar);
  549. if (ret) {
  550. ath10k_err("could not get hw params (%d)\n", ret);
  551. ath10k_hif_power_down(ar);
  552. return ret;
  553. }
  554. ret = ath10k_core_fetch_firmware_files(ar);
  555. if (ret) {
  556. ath10k_err("could not fetch firmware files (%d)\n", ret);
  557. ath10k_hif_power_down(ar);
  558. return ret;
  559. }
  560. ret = ath10k_core_start(ar);
  561. if (ret) {
  562. ath10k_err("could not init core (%d)\n", ret);
  563. ath10k_core_free_firmware_files(ar);
  564. ath10k_hif_power_down(ar);
  565. return ret;
  566. }
  567. ath10k_core_stop(ar);
  568. ath10k_hif_power_down(ar);
  569. return 0;
  570. }
  571. static int ath10k_core_check_chip_id(struct ath10k *ar)
  572. {
  573. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  574. /* Check that we are not using hw1.0 (some of them have same pci id
  575. * as hw2.0) before doing anything else as ath10k crashes horribly
  576. * due to missing hw1.0 workarounds. */
  577. switch (hw_revision) {
  578. case QCA988X_HW_1_0_CHIP_ID_REV:
  579. ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
  580. return -EOPNOTSUPP;
  581. case QCA988X_HW_2_0_CHIP_ID_REV:
  582. /* known hardware revision, continue normally */
  583. return 0;
  584. default:
  585. ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
  586. ar->chip_id);
  587. return 0;
  588. }
  589. return 0;
  590. }
  591. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  592. {
  593. int status;
  594. ar->chip_id = chip_id;
  595. status = ath10k_core_check_chip_id(ar);
  596. if (status) {
  597. ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
  598. return status;
  599. }
  600. status = ath10k_core_probe_fw(ar);
  601. if (status) {
  602. ath10k_err("could not probe fw (%d)\n", status);
  603. return status;
  604. }
  605. status = ath10k_mac_register(ar);
  606. if (status) {
  607. ath10k_err("could not register to mac80211 (%d)\n", status);
  608. goto err_release_fw;
  609. }
  610. status = ath10k_debug_create(ar);
  611. if (status) {
  612. ath10k_err("unable to initialize debugfs\n");
  613. goto err_unregister_mac;
  614. }
  615. return 0;
  616. err_unregister_mac:
  617. ath10k_mac_unregister(ar);
  618. err_release_fw:
  619. ath10k_core_free_firmware_files(ar);
  620. return status;
  621. }
  622. EXPORT_SYMBOL(ath10k_core_register);
  623. void ath10k_core_unregister(struct ath10k *ar)
  624. {
  625. /* We must unregister from mac80211 before we stop HTC and HIF.
  626. * Otherwise we will fail to submit commands to FW and mac80211 will be
  627. * unhappy about callback failures. */
  628. ath10k_mac_unregister(ar);
  629. ath10k_core_free_firmware_files(ar);
  630. }
  631. EXPORT_SYMBOL(ath10k_core_unregister);
  632. MODULE_AUTHOR("Qualcomm Atheros");
  633. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  634. MODULE_LICENSE("Dual BSD/GPL");