iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #define DRV_NAME "iwl3945"
  45. #include "iwl-fh.h"
  46. #include "iwl-3945-fh.h"
  47. #include "iwl-commands.h"
  48. #include "iwl-sta.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .sw_crypto = 1,
  79. .restart_fw = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /**
  83. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  84. * @priv: eeprom and antenna fields are used to determine antenna flags
  85. *
  86. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  87. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  88. *
  89. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  90. * IWL_ANTENNA_MAIN - Force MAIN antenna
  91. * IWL_ANTENNA_AUX - Force AUX antenna
  92. */
  93. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  94. {
  95. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  96. switch (iwl3945_mod_params.antenna) {
  97. case IWL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IWL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IWL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  110. iwl3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  114. struct ieee80211_key_conf *keyconf,
  115. u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == priv->hw_params.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&priv->sta_lock, flags);
  128. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  129. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  131. keyconf->keylen);
  132. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  133. keyconf->keylen);
  134. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  135. == STA_KEY_FLG_NO_ENC)
  136. priv->stations[sta_id].sta.key.key_offset =
  137. iwl_get_free_ucode_key_index(priv);
  138. /* else, we are overriding an existing key => no need to allocated room
  139. * in uCode. */
  140. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  141. "no space for a new key");
  142. priv->stations[sta_id].sta.key.key_flags = key_flags;
  143. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  144. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  145. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  146. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  147. spin_unlock_irqrestore(&priv->sta_lock, flags);
  148. return ret;
  149. }
  150. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  151. struct ieee80211_key_conf *keyconf,
  152. u8 sta_id)
  153. {
  154. return -EOPNOTSUPP;
  155. }
  156. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  157. struct ieee80211_key_conf *keyconf,
  158. u8 sta_id)
  159. {
  160. return -EOPNOTSUPP;
  161. }
  162. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  163. {
  164. unsigned long flags;
  165. spin_lock_irqsave(&priv->sta_lock, flags);
  166. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  167. memset(&priv->stations[sta_id].sta.key, 0,
  168. sizeof(struct iwl4965_keyinfo));
  169. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  170. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  171. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  172. spin_unlock_irqrestore(&priv->sta_lock, flags);
  173. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  174. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  175. return 0;
  176. }
  177. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  178. struct ieee80211_key_conf *keyconf, u8 sta_id)
  179. {
  180. int ret = 0;
  181. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  182. switch (keyconf->alg) {
  183. case ALG_CCMP:
  184. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  185. break;
  186. case ALG_TKIP:
  187. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_WEP:
  190. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. default:
  193. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  194. ret = -EINVAL;
  195. }
  196. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  197. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  198. sta_id, ret);
  199. return ret;
  200. }
  201. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  202. {
  203. int ret = -EOPNOTSUPP;
  204. return ret;
  205. }
  206. static int iwl3945_set_static_key(struct iwl_priv *priv,
  207. struct ieee80211_key_conf *key)
  208. {
  209. if (key->alg == ALG_WEP)
  210. return -EOPNOTSUPP;
  211. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  212. return -EINVAL;
  213. }
  214. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  215. {
  216. struct list_head *element;
  217. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  218. priv->frames_count);
  219. while (!list_empty(&priv->free_frames)) {
  220. element = priv->free_frames.next;
  221. list_del(element);
  222. kfree(list_entry(element, struct iwl3945_frame, list));
  223. priv->frames_count--;
  224. }
  225. if (priv->frames_count) {
  226. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  227. priv->frames_count);
  228. priv->frames_count = 0;
  229. }
  230. }
  231. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  232. {
  233. struct iwl3945_frame *frame;
  234. struct list_head *element;
  235. if (list_empty(&priv->free_frames)) {
  236. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  237. if (!frame) {
  238. IWL_ERR(priv, "Could not allocate frame!\n");
  239. return NULL;
  240. }
  241. priv->frames_count++;
  242. return frame;
  243. }
  244. element = priv->free_frames.next;
  245. list_del(element);
  246. return list_entry(element, struct iwl3945_frame, list);
  247. }
  248. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  249. {
  250. memset(frame, 0, sizeof(*frame));
  251. list_add(&frame->list, &priv->free_frames);
  252. }
  253. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  254. struct ieee80211_hdr *hdr,
  255. int left)
  256. {
  257. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  258. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  259. (priv->iw_mode != NL80211_IFTYPE_AP)))
  260. return 0;
  261. if (priv->ibss_beacon->len > left)
  262. return 0;
  263. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  264. return priv->ibss_beacon->len;
  265. }
  266. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  267. {
  268. struct iwl3945_frame *frame;
  269. unsigned int frame_size;
  270. int rc;
  271. u8 rate;
  272. frame = iwl3945_get_free_frame(priv);
  273. if (!frame) {
  274. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  275. "command.\n");
  276. return -ENOMEM;
  277. }
  278. rate = iwl_rate_get_lowest_plcp(priv);
  279. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  280. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  281. &frame->u.cmd[0]);
  282. iwl3945_free_frame(priv, frame);
  283. return rc;
  284. }
  285. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  286. {
  287. if (priv->shared_virt)
  288. pci_free_consistent(priv->pci_dev,
  289. sizeof(struct iwl3945_shared),
  290. priv->shared_virt,
  291. priv->shared_phys);
  292. }
  293. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  294. struct ieee80211_tx_info *info,
  295. struct iwl_device_cmd *cmd,
  296. struct sk_buff *skb_frag,
  297. int sta_id)
  298. {
  299. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  300. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  301. switch (keyinfo->alg) {
  302. case ALG_CCMP:
  303. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  304. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  305. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  306. break;
  307. case ALG_TKIP:
  308. break;
  309. case ALG_WEP:
  310. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  311. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  312. if (keyinfo->keylen == 13)
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  315. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  316. "with key %d\n", info->control.hw_key->hw_key_idx);
  317. break;
  318. default:
  319. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  320. break;
  321. }
  322. }
  323. /*
  324. * handle build REPLY_TX command notification.
  325. */
  326. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  327. struct iwl_device_cmd *cmd,
  328. struct ieee80211_tx_info *info,
  329. struct ieee80211_hdr *hdr, u8 std_id)
  330. {
  331. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  332. __le32 tx_flags = tx_cmd->tx_flags;
  333. __le16 fc = hdr->frame_control;
  334. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  335. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  336. tx_flags |= TX_CMD_FLG_ACK_MSK;
  337. if (ieee80211_is_mgmt(fc))
  338. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  339. if (ieee80211_is_probe_resp(fc) &&
  340. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  341. tx_flags |= TX_CMD_FLG_TSF_MSK;
  342. } else {
  343. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. }
  346. tx_cmd->sta_id = std_id;
  347. if (ieee80211_has_morefrags(fc))
  348. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  349. if (ieee80211_is_data_qos(fc)) {
  350. u8 *qc = ieee80211_get_qos_ctl(hdr);
  351. tx_cmd->tid_tspec = qc[0] & 0xf;
  352. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  353. } else {
  354. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  355. }
  356. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  357. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  358. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  360. if (ieee80211_is_mgmt(fc)) {
  361. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  362. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  363. else
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  365. } else {
  366. tx_cmd->timeout.pm_frame_timeout = 0;
  367. }
  368. tx_cmd->driver_txop = 0;
  369. tx_cmd->tx_flags = tx_flags;
  370. tx_cmd->next_frame_len = 0;
  371. }
  372. /*
  373. * start REPLY_TX command process
  374. */
  375. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  376. {
  377. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  378. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  379. struct iwl3945_tx_cmd *tx_cmd;
  380. struct iwl_tx_queue *txq = NULL;
  381. struct iwl_queue *q = NULL;
  382. struct iwl_device_cmd *out_cmd;
  383. struct iwl_cmd_meta *out_meta;
  384. dma_addr_t phys_addr;
  385. dma_addr_t txcmd_phys;
  386. int txq_id = skb_get_queue_mapping(skb);
  387. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  388. u8 id;
  389. u8 unicast;
  390. u8 sta_id;
  391. u8 tid = 0;
  392. u16 seq_number = 0;
  393. __le16 fc;
  394. u8 wait_write_ptr = 0;
  395. u8 *qc = NULL;
  396. unsigned long flags;
  397. int rc;
  398. spin_lock_irqsave(&priv->lock, flags);
  399. if (iwl_is_rfkill(priv)) {
  400. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  401. goto drop_unlock;
  402. }
  403. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  404. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  405. goto drop_unlock;
  406. }
  407. unicast = !is_multicast_ether_addr(hdr->addr1);
  408. id = 0;
  409. fc = hdr->frame_control;
  410. #ifdef CONFIG_IWLWIFI_DEBUG
  411. if (ieee80211_is_auth(fc))
  412. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  413. else if (ieee80211_is_assoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  415. else if (ieee80211_is_reassoc_req(fc))
  416. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  417. #endif
  418. /* drop all non-injected data frame if we are not associated */
  419. if (ieee80211_is_data(fc) &&
  420. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  421. (!iwl_is_associated(priv) ||
  422. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  423. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  424. goto drop_unlock;
  425. }
  426. spin_unlock_irqrestore(&priv->lock, flags);
  427. hdr_len = ieee80211_hdrlen(fc);
  428. /* Find (or create) index into station table for destination station */
  429. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  430. sta_id = priv->hw_params.bcast_sta_id;
  431. else
  432. sta_id = iwl_get_sta_id(priv, hdr);
  433. if (sta_id == IWL_INVALID_STATION) {
  434. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  435. hdr->addr1);
  436. goto drop;
  437. }
  438. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  439. if (ieee80211_is_data_qos(fc)) {
  440. qc = ieee80211_get_qos_ctl(hdr);
  441. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  442. if (unlikely(tid >= MAX_TID_COUNT))
  443. goto drop;
  444. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  445. IEEE80211_SCTL_SEQ;
  446. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  447. (hdr->seq_ctrl &
  448. cpu_to_le16(IEEE80211_SCTL_FRAG));
  449. seq_number += 0x10;
  450. }
  451. /* Descriptor for chosen Tx queue */
  452. txq = &priv->txq[txq_id];
  453. q = &txq->q;
  454. spin_lock_irqsave(&priv->lock, flags);
  455. idx = get_cmd_index(q, q->write_ptr, 0);
  456. /* Set up driver data for this TFD */
  457. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  458. txq->txb[q->write_ptr].skb[0] = skb;
  459. /* Init first empty entry in queue's array of Tx/cmd buffers */
  460. out_cmd = txq->cmd[idx];
  461. out_meta = &txq->meta[idx];
  462. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  463. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  464. memset(tx_cmd, 0, sizeof(*tx_cmd));
  465. /*
  466. * Set up the Tx-command (not MAC!) header.
  467. * Store the chosen Tx queue and TFD index within the sequence field;
  468. * after Tx, uCode's Tx response will return this value so driver can
  469. * locate the frame within the tx queue and do post-tx processing.
  470. */
  471. out_cmd->hdr.cmd = REPLY_TX;
  472. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  473. INDEX_TO_SEQ(q->write_ptr)));
  474. /* Copy MAC header from skb into command buffer */
  475. memcpy(tx_cmd->hdr, hdr, hdr_len);
  476. if (info->control.hw_key)
  477. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  478. /* TODO need this for burst mode later on */
  479. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  480. /* set is_hcca to 0; it probably will never be implemented */
  481. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  482. /* Total # bytes to be transmitted */
  483. len = (u16)skb->len;
  484. tx_cmd->len = cpu_to_le16(len);
  485. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  486. iwl_update_stats(priv, true, fc, len);
  487. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  488. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  489. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  490. txq->need_update = 1;
  491. if (qc)
  492. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  493. } else {
  494. wait_write_ptr = 1;
  495. txq->need_update = 0;
  496. }
  497. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  498. le16_to_cpu(out_cmd->hdr.sequence));
  499. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  500. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  501. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  502. ieee80211_hdrlen(fc));
  503. /*
  504. * Use the first empty entry in this queue's command buffer array
  505. * to contain the Tx command and MAC header concatenated together
  506. * (payload data will be in another buffer).
  507. * Size of this varies, due to varying MAC header length.
  508. * If end is not dword aligned, we'll have 2 extra bytes at the end
  509. * of the MAC header (device reads on dword boundaries).
  510. * We'll tell device about this padding later.
  511. */
  512. len = sizeof(struct iwl3945_tx_cmd) +
  513. sizeof(struct iwl_cmd_header) + hdr_len;
  514. len_org = len;
  515. len = (len + 3) & ~3;
  516. if (len_org != len)
  517. len_org = 1;
  518. else
  519. len_org = 0;
  520. /* Physical address of this Tx command's header (not MAC header!),
  521. * within command buffer array. */
  522. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  523. len, PCI_DMA_TODEVICE);
  524. /* we do not map meta data ... so we can safely access address to
  525. * provide to unmap command*/
  526. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  527. pci_unmap_len_set(out_meta, len, len);
  528. /* Add buffer containing Tx command and MAC(!) header to TFD's
  529. * first entry */
  530. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  531. txcmd_phys, len, 1, 0);
  532. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  533. * if any (802.11 null frames have no payload). */
  534. len = skb->len - hdr_len;
  535. if (len) {
  536. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  537. len, PCI_DMA_TODEVICE);
  538. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  539. phys_addr, len,
  540. 0, U32_PAD(len));
  541. }
  542. /* Tell device the write index *just past* this latest filled TFD */
  543. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  544. rc = iwl_txq_update_write_ptr(priv, txq);
  545. spin_unlock_irqrestore(&priv->lock, flags);
  546. if (rc)
  547. return rc;
  548. if ((iwl_queue_space(q) < q->high_mark)
  549. && priv->mac80211_registered) {
  550. if (wait_write_ptr) {
  551. spin_lock_irqsave(&priv->lock, flags);
  552. txq->need_update = 1;
  553. iwl_txq_update_write_ptr(priv, txq);
  554. spin_unlock_irqrestore(&priv->lock, flags);
  555. }
  556. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  557. }
  558. return 0;
  559. drop_unlock:
  560. spin_unlock_irqrestore(&priv->lock, flags);
  561. drop:
  562. return -1;
  563. }
  564. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  565. #include "iwl-spectrum.h"
  566. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  567. #define BEACON_TIME_MASK_HIGH 0xFF000000
  568. #define TIME_UNIT 1024
  569. /*
  570. * extended beacon time format
  571. * time in usec will be changed into a 32-bit value in 8:24 format
  572. * the high 1 byte is the beacon counts
  573. * the lower 3 bytes is the time in usec within one beacon interval
  574. */
  575. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  576. {
  577. u32 quot;
  578. u32 rem;
  579. u32 interval = beacon_interval * 1024;
  580. if (!interval || !usec)
  581. return 0;
  582. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  583. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  584. return (quot << 24) + rem;
  585. }
  586. /* base is usually what we get from ucode with each received frame,
  587. * the same as HW timer counter counting down
  588. */
  589. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  590. {
  591. u32 base_low = base & BEACON_TIME_MASK_LOW;
  592. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  593. u32 interval = beacon_interval * TIME_UNIT;
  594. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  595. (addon & BEACON_TIME_MASK_HIGH);
  596. if (base_low > addon_low)
  597. res += base_low - addon_low;
  598. else if (base_low < addon_low) {
  599. res += interval + base_low - addon_low;
  600. res += (1 << 24);
  601. } else
  602. res += (1 << 24);
  603. return cpu_to_le32(res);
  604. }
  605. static int iwl3945_get_measurement(struct iwl_priv *priv,
  606. struct ieee80211_measurement_params *params,
  607. u8 type)
  608. {
  609. struct iwl_spectrum_cmd spectrum;
  610. struct iwl_rx_packet *pkt;
  611. struct iwl_host_cmd cmd = {
  612. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  613. .data = (void *)&spectrum,
  614. .flags = CMD_WANT_SKB,
  615. };
  616. u32 add_time = le64_to_cpu(params->start_time);
  617. int rc;
  618. int spectrum_resp_status;
  619. int duration = le16_to_cpu(params->duration);
  620. if (iwl_is_associated(priv))
  621. add_time =
  622. iwl3945_usecs_to_beacons(
  623. le64_to_cpu(params->start_time) - priv->last_tsf,
  624. le16_to_cpu(priv->rxon_timing.beacon_interval));
  625. memset(&spectrum, 0, sizeof(spectrum));
  626. spectrum.channel_count = cpu_to_le16(1);
  627. spectrum.flags =
  628. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  629. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  630. cmd.len = sizeof(spectrum);
  631. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  632. if (iwl_is_associated(priv))
  633. spectrum.start_time =
  634. iwl3945_add_beacon_time(priv->last_beacon_time,
  635. add_time,
  636. le16_to_cpu(priv->rxon_timing.beacon_interval));
  637. else
  638. spectrum.start_time = 0;
  639. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  640. spectrum.channels[0].channel = params->channel;
  641. spectrum.channels[0].type = type;
  642. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  643. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  644. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  645. rc = iwl_send_cmd_sync(priv, &cmd);
  646. if (rc)
  647. return rc;
  648. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  649. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  650. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  651. rc = -EIO;
  652. }
  653. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  654. switch (spectrum_resp_status) {
  655. case 0: /* Command will be handled */
  656. if (pkt->u.spectrum.id != 0xff) {
  657. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  658. pkt->u.spectrum.id);
  659. priv->measurement_status &= ~MEASUREMENT_READY;
  660. }
  661. priv->measurement_status |= MEASUREMENT_ACTIVE;
  662. rc = 0;
  663. break;
  664. case 1: /* Command will not be handled */
  665. rc = -EAGAIN;
  666. break;
  667. }
  668. free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
  669. return rc;
  670. }
  671. #endif
  672. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  673. struct iwl_rx_mem_buffer *rxb)
  674. {
  675. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  676. struct iwl_alive_resp *palive;
  677. struct delayed_work *pwork;
  678. palive = &pkt->u.alive_frame;
  679. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  680. "0x%01X 0x%01X\n",
  681. palive->is_valid, palive->ver_type,
  682. palive->ver_subtype);
  683. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  684. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  685. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  686. sizeof(struct iwl_alive_resp));
  687. pwork = &priv->init_alive_start;
  688. } else {
  689. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  690. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  691. sizeof(struct iwl_alive_resp));
  692. pwork = &priv->alive_start;
  693. iwl3945_disable_events(priv);
  694. }
  695. /* We delay the ALIVE response by 5ms to
  696. * give the HW RF Kill time to activate... */
  697. if (palive->is_valid == UCODE_VALID_OK)
  698. queue_delayed_work(priv->workqueue, pwork,
  699. msecs_to_jiffies(5));
  700. else
  701. IWL_WARN(priv, "uCode did not respond OK.\n");
  702. }
  703. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  704. struct iwl_rx_mem_buffer *rxb)
  705. {
  706. #ifdef CONFIG_IWLWIFI_DEBUG
  707. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  708. #endif
  709. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  710. return;
  711. }
  712. static void iwl3945_bg_beacon_update(struct work_struct *work)
  713. {
  714. struct iwl_priv *priv =
  715. container_of(work, struct iwl_priv, beacon_update);
  716. struct sk_buff *beacon;
  717. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  718. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  719. if (!beacon) {
  720. IWL_ERR(priv, "update beacon failed\n");
  721. return;
  722. }
  723. mutex_lock(&priv->mutex);
  724. /* new beacon skb is allocated every time; dispose previous.*/
  725. if (priv->ibss_beacon)
  726. dev_kfree_skb(priv->ibss_beacon);
  727. priv->ibss_beacon = beacon;
  728. mutex_unlock(&priv->mutex);
  729. iwl3945_send_beacon_cmd(priv);
  730. }
  731. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  732. struct iwl_rx_mem_buffer *rxb)
  733. {
  734. #ifdef CONFIG_IWLWIFI_DEBUG
  735. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  736. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  737. u8 rate = beacon->beacon_notify_hdr.rate;
  738. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  739. "tsf %d %d rate %d\n",
  740. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  741. beacon->beacon_notify_hdr.failure_frame,
  742. le32_to_cpu(beacon->ibss_mgr_status),
  743. le32_to_cpu(beacon->high_tsf),
  744. le32_to_cpu(beacon->low_tsf), rate);
  745. #endif
  746. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  747. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  748. queue_work(priv->workqueue, &priv->beacon_update);
  749. }
  750. /* Handle notification from uCode that card's power state is changing
  751. * due to software, hardware, or critical temperature RFKILL */
  752. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  753. struct iwl_rx_mem_buffer *rxb)
  754. {
  755. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  756. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  757. unsigned long status = priv->status;
  758. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  759. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  760. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  761. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  762. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  763. if (flags & HW_CARD_DISABLED)
  764. set_bit(STATUS_RF_KILL_HW, &priv->status);
  765. else
  766. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  767. iwl_scan_cancel(priv);
  768. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  769. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  770. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  771. test_bit(STATUS_RF_KILL_HW, &priv->status));
  772. else
  773. wake_up_interruptible(&priv->wait_command_queue);
  774. }
  775. /**
  776. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  777. *
  778. * Setup the RX handlers for each of the reply types sent from the uCode
  779. * to the host.
  780. *
  781. * This function chains into the hardware specific files for them to setup
  782. * any hardware specific handlers as well.
  783. */
  784. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  785. {
  786. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  787. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  788. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  789. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  790. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  791. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  792. iwl_rx_pm_debug_statistics_notif;
  793. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  794. /*
  795. * The same handler is used for both the REPLY to a discrete
  796. * statistics request from the host as well as for the periodic
  797. * statistics notifications (after received beacons) from the uCode.
  798. */
  799. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  800. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  801. iwl_setup_spectrum_handlers(priv);
  802. iwl_setup_rx_scan_handlers(priv);
  803. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  804. /* Set up hardware specific Rx handlers */
  805. iwl3945_hw_rx_handler_setup(priv);
  806. }
  807. /************************** RX-FUNCTIONS ****************************/
  808. /*
  809. * Rx theory of operation
  810. *
  811. * The host allocates 32 DMA target addresses and passes the host address
  812. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  813. * 0 to 31
  814. *
  815. * Rx Queue Indexes
  816. * The host/firmware share two index registers for managing the Rx buffers.
  817. *
  818. * The READ index maps to the first position that the firmware may be writing
  819. * to -- the driver can read up to (but not including) this position and get
  820. * good data.
  821. * The READ index is managed by the firmware once the card is enabled.
  822. *
  823. * The WRITE index maps to the last position the driver has read from -- the
  824. * position preceding WRITE is the last slot the firmware can place a packet.
  825. *
  826. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  827. * WRITE = READ.
  828. *
  829. * During initialization, the host sets up the READ queue position to the first
  830. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  831. *
  832. * When the firmware places a packet in a buffer, it will advance the READ index
  833. * and fire the RX interrupt. The driver can then query the READ index and
  834. * process as many packets as possible, moving the WRITE index forward as it
  835. * resets the Rx queue buffers with new memory.
  836. *
  837. * The management in the driver is as follows:
  838. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  839. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  840. * to replenish the iwl->rxq->rx_free.
  841. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  842. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  843. * 'processed' and 'read' driver indexes as well)
  844. * + A received packet is processed and handed to the kernel network stack,
  845. * detached from the iwl->rxq. The driver 'processed' index is updated.
  846. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  847. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  848. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  849. * were enough free buffers and RX_STALLED is set it is cleared.
  850. *
  851. *
  852. * Driver sequence:
  853. *
  854. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  855. * iwl3945_rx_queue_restock
  856. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  857. * queue, updates firmware pointers, and updates
  858. * the WRITE index. If insufficient rx_free buffers
  859. * are available, schedules iwl3945_rx_replenish
  860. *
  861. * -- enable interrupts --
  862. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  863. * READ INDEX, detaching the SKB from the pool.
  864. * Moves the packet buffer from queue to rx_used.
  865. * Calls iwl3945_rx_queue_restock to refill any empty
  866. * slots.
  867. * ...
  868. *
  869. */
  870. /**
  871. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  872. */
  873. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  874. dma_addr_t dma_addr)
  875. {
  876. return cpu_to_le32((u32)dma_addr);
  877. }
  878. /**
  879. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  880. *
  881. * If there are slots in the RX queue that need to be restocked,
  882. * and we have free pre-allocated buffers, fill the ranks as much
  883. * as we can, pulling from rx_free.
  884. *
  885. * This moves the 'write' index forward to catch up with 'processed', and
  886. * also updates the memory address in the firmware to reference the new
  887. * target buffer.
  888. */
  889. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  890. {
  891. struct iwl_rx_queue *rxq = &priv->rxq;
  892. struct list_head *element;
  893. struct iwl_rx_mem_buffer *rxb;
  894. unsigned long flags;
  895. int write, rc;
  896. spin_lock_irqsave(&rxq->lock, flags);
  897. write = rxq->write & ~0x7;
  898. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  899. /* Get next free Rx buffer, remove from free list */
  900. element = rxq->rx_free.next;
  901. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  902. list_del(element);
  903. /* Point to Rx buffer via next RBD in circular buffer */
  904. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  905. rxq->queue[rxq->write] = rxb;
  906. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  907. rxq->free_count--;
  908. }
  909. spin_unlock_irqrestore(&rxq->lock, flags);
  910. /* If the pre-allocated buffer pool is dropping low, schedule to
  911. * refill it */
  912. if (rxq->free_count <= RX_LOW_WATERMARK)
  913. queue_work(priv->workqueue, &priv->rx_replenish);
  914. /* If we've added more space for the firmware to place data, tell it.
  915. * Increment device's write pointer in multiples of 8. */
  916. if ((rxq->write_actual != (rxq->write & ~0x7))
  917. || (abs(rxq->write - rxq->read) > 7)) {
  918. spin_lock_irqsave(&rxq->lock, flags);
  919. rxq->need_update = 1;
  920. spin_unlock_irqrestore(&rxq->lock, flags);
  921. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  922. if (rc)
  923. return rc;
  924. }
  925. return 0;
  926. }
  927. /**
  928. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  929. *
  930. * When moving to rx_free an SKB is allocated for the slot.
  931. *
  932. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  933. * This is called as a scheduled work item (except for during initialization)
  934. */
  935. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  936. {
  937. struct iwl_rx_queue *rxq = &priv->rxq;
  938. struct list_head *element;
  939. struct iwl_rx_mem_buffer *rxb;
  940. struct page *page;
  941. unsigned long flags;
  942. gfp_t gfp_mask = priority;
  943. while (1) {
  944. spin_lock_irqsave(&rxq->lock, flags);
  945. if (list_empty(&rxq->rx_used)) {
  946. spin_unlock_irqrestore(&rxq->lock, flags);
  947. return;
  948. }
  949. spin_unlock_irqrestore(&rxq->lock, flags);
  950. if (rxq->free_count > RX_LOW_WATERMARK)
  951. gfp_mask |= __GFP_NOWARN;
  952. if (priv->hw_params.rx_page_order > 0)
  953. gfp_mask |= __GFP_COMP;
  954. /* Alloc a new receive buffer */
  955. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  956. if (!page) {
  957. if (net_ratelimit())
  958. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  959. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  960. net_ratelimit())
  961. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  962. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  963. rxq->free_count);
  964. /* We don't reschedule replenish work here -- we will
  965. * call the restock method and if it still needs
  966. * more buffers it will schedule replenish */
  967. break;
  968. }
  969. spin_lock_irqsave(&rxq->lock, flags);
  970. if (list_empty(&rxq->rx_used)) {
  971. spin_unlock_irqrestore(&rxq->lock, flags);
  972. __free_pages(page, priv->hw_params.rx_page_order);
  973. return;
  974. }
  975. element = rxq->rx_used.next;
  976. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  977. list_del(element);
  978. spin_unlock_irqrestore(&rxq->lock, flags);
  979. rxb->page = page;
  980. /* Get physical address of RB/SKB */
  981. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  982. PAGE_SIZE << priv->hw_params.rx_page_order,
  983. PCI_DMA_FROMDEVICE);
  984. spin_lock_irqsave(&rxq->lock, flags);
  985. list_add_tail(&rxb->list, &rxq->rx_free);
  986. rxq->free_count++;
  987. priv->alloc_rxb_page++;
  988. spin_unlock_irqrestore(&rxq->lock, flags);
  989. }
  990. }
  991. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  992. {
  993. unsigned long flags;
  994. int i;
  995. spin_lock_irqsave(&rxq->lock, flags);
  996. INIT_LIST_HEAD(&rxq->rx_free);
  997. INIT_LIST_HEAD(&rxq->rx_used);
  998. /* Fill the rx_used queue with _all_ of the Rx buffers */
  999. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1000. /* In the reset function, these buffers may have been allocated
  1001. * to an SKB, so we need to unmap and free potential storage */
  1002. if (rxq->pool[i].page != NULL) {
  1003. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1004. PAGE_SIZE << priv->hw_params.rx_page_order,
  1005. PCI_DMA_FROMDEVICE);
  1006. priv->alloc_rxb_page--;
  1007. __free_pages(rxq->pool[i].page,
  1008. priv->hw_params.rx_page_order);
  1009. rxq->pool[i].page = NULL;
  1010. }
  1011. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1012. }
  1013. /* Set us so that we have processed and used all buffers, but have
  1014. * not restocked the Rx queue with fresh buffers */
  1015. rxq->read = rxq->write = 0;
  1016. rxq->write_actual = 0;
  1017. rxq->free_count = 0;
  1018. spin_unlock_irqrestore(&rxq->lock, flags);
  1019. }
  1020. void iwl3945_rx_replenish(void *data)
  1021. {
  1022. struct iwl_priv *priv = data;
  1023. unsigned long flags;
  1024. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1025. spin_lock_irqsave(&priv->lock, flags);
  1026. iwl3945_rx_queue_restock(priv);
  1027. spin_unlock_irqrestore(&priv->lock, flags);
  1028. }
  1029. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1030. {
  1031. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1032. iwl3945_rx_queue_restock(priv);
  1033. }
  1034. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1035. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1036. * This free routine walks the list of POOL entries and if SKB is set to
  1037. * non NULL it is unmapped and freed
  1038. */
  1039. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1040. {
  1041. int i;
  1042. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1043. if (rxq->pool[i].page != NULL) {
  1044. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1045. PAGE_SIZE << priv->hw_params.rx_page_order,
  1046. PCI_DMA_FROMDEVICE);
  1047. __free_pages(rxq->pool[i].page,
  1048. priv->hw_params.rx_page_order);
  1049. rxq->pool[i].page = NULL;
  1050. priv->alloc_rxb_page--;
  1051. }
  1052. }
  1053. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1054. rxq->dma_addr);
  1055. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1056. rxq->rb_stts, rxq->rb_stts_dma);
  1057. rxq->bd = NULL;
  1058. rxq->rb_stts = NULL;
  1059. }
  1060. /* Convert linear signal-to-noise ratio into dB */
  1061. static u8 ratio2dB[100] = {
  1062. /* 0 1 2 3 4 5 6 7 8 9 */
  1063. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1064. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1065. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1066. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1067. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1068. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1069. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1070. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1071. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1072. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1073. };
  1074. /* Calculates a relative dB value from a ratio of linear
  1075. * (i.e. not dB) signal levels.
  1076. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1077. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1078. {
  1079. /* 1000:1 or higher just report as 60 dB */
  1080. if (sig_ratio >= 1000)
  1081. return 60;
  1082. /* 100:1 or higher, divide by 10 and use table,
  1083. * add 20 dB to make up for divide by 10 */
  1084. if (sig_ratio >= 100)
  1085. return 20 + (int)ratio2dB[sig_ratio/10];
  1086. /* We shouldn't see this */
  1087. if (sig_ratio < 1)
  1088. return 0;
  1089. /* Use table for ratios 1:1 - 99:1 */
  1090. return (int)ratio2dB[sig_ratio];
  1091. }
  1092. #define PERFECT_RSSI (-20) /* dBm */
  1093. #define WORST_RSSI (-95) /* dBm */
  1094. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1095. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1096. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1097. * about formulas used below. */
  1098. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1099. {
  1100. int sig_qual;
  1101. int degradation = PERFECT_RSSI - rssi_dbm;
  1102. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1103. * as indicator; formula is (signal dbm - noise dbm).
  1104. * SNR at or above 40 is a great signal (100%).
  1105. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1106. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1107. if (noise_dbm) {
  1108. if (rssi_dbm - noise_dbm >= 40)
  1109. return 100;
  1110. else if (rssi_dbm < noise_dbm)
  1111. return 0;
  1112. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1113. /* Else use just the signal level.
  1114. * This formula is a least squares fit of data points collected and
  1115. * compared with a reference system that had a percentage (%) display
  1116. * for signal quality. */
  1117. } else
  1118. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1119. (15 * RSSI_RANGE + 62 * degradation)) /
  1120. (RSSI_RANGE * RSSI_RANGE);
  1121. if (sig_qual > 100)
  1122. sig_qual = 100;
  1123. else if (sig_qual < 1)
  1124. sig_qual = 0;
  1125. return sig_qual;
  1126. }
  1127. /**
  1128. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1129. *
  1130. * Uses the priv->rx_handlers callback function array to invoke
  1131. * the appropriate handlers, including command responses,
  1132. * frame-received notifications, and other notifications.
  1133. */
  1134. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1135. {
  1136. struct iwl_rx_mem_buffer *rxb;
  1137. struct iwl_rx_packet *pkt;
  1138. struct iwl_rx_queue *rxq = &priv->rxq;
  1139. u32 r, i;
  1140. int reclaim;
  1141. unsigned long flags;
  1142. u8 fill_rx = 0;
  1143. u32 count = 8;
  1144. int total_empty = 0;
  1145. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1146. * buffer that the driver may process (last buffer filled by ucode). */
  1147. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1148. i = rxq->read;
  1149. /* calculate total frames need to be restock after handling RX */
  1150. total_empty = r - rxq->write_actual;
  1151. if (total_empty < 0)
  1152. total_empty += RX_QUEUE_SIZE;
  1153. if (total_empty > (RX_QUEUE_SIZE / 2))
  1154. fill_rx = 1;
  1155. /* Rx interrupt, but nothing sent from uCode */
  1156. if (i == r)
  1157. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1158. while (i != r) {
  1159. rxb = rxq->queue[i];
  1160. /* If an RXB doesn't have a Rx queue slot associated with it,
  1161. * then a bug has been introduced in the queue refilling
  1162. * routines -- catch it here */
  1163. BUG_ON(rxb == NULL);
  1164. rxq->queue[i] = NULL;
  1165. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1166. PAGE_SIZE << priv->hw_params.rx_page_order,
  1167. PCI_DMA_FROMDEVICE);
  1168. pkt = rxb_addr(rxb);
  1169. trace_iwlwifi_dev_rx(priv, pkt,
  1170. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1171. /* Reclaim a command buffer only if this packet is a response
  1172. * to a (driver-originated) command.
  1173. * If the packet (e.g. Rx frame) originated from uCode,
  1174. * there is no command buffer to reclaim.
  1175. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1176. * but apparently a few don't get set; catch them here. */
  1177. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1178. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1179. (pkt->hdr.cmd != REPLY_TX);
  1180. /* Based on type of command response or notification,
  1181. * handle those that need handling via function in
  1182. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1183. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1184. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1185. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1186. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1187. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1188. } else {
  1189. /* No handling needed */
  1190. IWL_DEBUG_RX(priv,
  1191. "r %d i %d No handler needed for %s, 0x%02x\n",
  1192. r, i, get_cmd_string(pkt->hdr.cmd),
  1193. pkt->hdr.cmd);
  1194. }
  1195. /*
  1196. * XXX: After here, we should always check rxb->page
  1197. * against NULL before touching it or its virtual
  1198. * memory (pkt). Because some rx_handler might have
  1199. * already taken or freed the pages.
  1200. */
  1201. if (reclaim) {
  1202. /* Invoke any callbacks, transfer the buffer to caller,
  1203. * and fire off the (possibly) blocking iwl_send_cmd()
  1204. * as we reclaim the driver command queue */
  1205. if (rxb->page)
  1206. iwl_tx_cmd_complete(priv, rxb);
  1207. else
  1208. IWL_WARN(priv, "Claim null rxb?\n");
  1209. }
  1210. /* Reuse the page if possible. For notification packets and
  1211. * SKBs that fail to Rx correctly, add them back into the
  1212. * rx_free list for reuse later. */
  1213. spin_lock_irqsave(&rxq->lock, flags);
  1214. if (rxb->page != NULL) {
  1215. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1216. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1217. PCI_DMA_FROMDEVICE);
  1218. list_add_tail(&rxb->list, &rxq->rx_free);
  1219. rxq->free_count++;
  1220. } else
  1221. list_add_tail(&rxb->list, &rxq->rx_used);
  1222. spin_unlock_irqrestore(&rxq->lock, flags);
  1223. i = (i + 1) & RX_QUEUE_MASK;
  1224. /* If there are a lot of unused frames,
  1225. * restock the Rx queue so ucode won't assert. */
  1226. if (fill_rx) {
  1227. count++;
  1228. if (count >= 8) {
  1229. rxq->read = i;
  1230. iwl3945_rx_replenish_now(priv);
  1231. count = 0;
  1232. }
  1233. }
  1234. }
  1235. /* Backtrack one entry */
  1236. rxq->read = i;
  1237. if (fill_rx)
  1238. iwl3945_rx_replenish_now(priv);
  1239. else
  1240. iwl3945_rx_queue_restock(priv);
  1241. }
  1242. /* call this function to flush any scheduled tasklet */
  1243. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1244. {
  1245. /* wait to make sure we flush pending tasklet*/
  1246. synchronize_irq(priv->pci_dev->irq);
  1247. tasklet_kill(&priv->irq_tasklet);
  1248. }
  1249. #ifdef CONFIG_IWLWIFI_DEBUG
  1250. static const char *desc_lookup(int i)
  1251. {
  1252. switch (i) {
  1253. case 1:
  1254. return "FAIL";
  1255. case 2:
  1256. return "BAD_PARAM";
  1257. case 3:
  1258. return "BAD_CHECKSUM";
  1259. case 4:
  1260. return "NMI_INTERRUPT";
  1261. case 5:
  1262. return "SYSASSERT";
  1263. case 6:
  1264. return "FATAL_ERROR";
  1265. }
  1266. return "UNKNOWN";
  1267. }
  1268. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1269. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1270. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1271. {
  1272. u32 i;
  1273. u32 desc, time, count, base, data1;
  1274. u32 blink1, blink2, ilink1, ilink2;
  1275. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1276. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1277. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1278. return;
  1279. }
  1280. count = iwl_read_targ_mem(priv, base);
  1281. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1282. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1283. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1284. priv->status, count);
  1285. }
  1286. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1287. "ilink1 nmiPC Line\n");
  1288. for (i = ERROR_START_OFFSET;
  1289. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1290. i += ERROR_ELEM_SIZE) {
  1291. desc = iwl_read_targ_mem(priv, base + i);
  1292. time =
  1293. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1294. blink1 =
  1295. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1296. blink2 =
  1297. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1298. ilink1 =
  1299. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1300. ilink2 =
  1301. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1302. data1 =
  1303. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1304. IWL_ERR(priv,
  1305. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1306. desc_lookup(desc), desc, time, blink1, blink2,
  1307. ilink1, ilink2, data1);
  1308. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1309. 0, blink1, blink2, ilink1, ilink2);
  1310. }
  1311. }
  1312. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1313. /**
  1314. * iwl3945_print_event_log - Dump error event log to syslog
  1315. *
  1316. */
  1317. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1318. u32 num_events, u32 mode)
  1319. {
  1320. u32 i;
  1321. u32 base; /* SRAM byte address of event log header */
  1322. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1323. u32 ptr; /* SRAM byte address of log data */
  1324. u32 ev, time, data; /* event log data */
  1325. unsigned long reg_flags;
  1326. if (num_events == 0)
  1327. return;
  1328. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1329. if (mode == 0)
  1330. event_size = 2 * sizeof(u32);
  1331. else
  1332. event_size = 3 * sizeof(u32);
  1333. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1334. /* Make sure device is powered up for SRAM reads */
  1335. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1336. iwl_grab_nic_access(priv);
  1337. /* Set starting address; reads will auto-increment */
  1338. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1339. rmb();
  1340. /* "time" is actually "data" for mode 0 (no timestamp).
  1341. * place event id # at far right for easier visual parsing. */
  1342. for (i = 0; i < num_events; i++) {
  1343. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1344. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1345. if (mode == 0) {
  1346. /* data, ev */
  1347. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1348. trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
  1349. } else {
  1350. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1351. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1352. trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
  1353. }
  1354. }
  1355. /* Allow device to power down */
  1356. iwl_release_nic_access(priv);
  1357. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1358. }
  1359. /* For sanity check only. Actual size is determined by uCode, typ. 512 */
  1360. #define IWL3945_MAX_EVENT_LOG_SIZE (512)
  1361. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1362. {
  1363. u32 base; /* SRAM byte address of event log header */
  1364. u32 capacity; /* event log capacity in # entries */
  1365. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1366. u32 num_wraps; /* # times uCode wrapped to top of log */
  1367. u32 next_entry; /* index of next entry to be written by uCode */
  1368. u32 size; /* # entries that we'll print */
  1369. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1370. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1371. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1372. return;
  1373. }
  1374. /* event log header */
  1375. capacity = iwl_read_targ_mem(priv, base);
  1376. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1377. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1378. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1379. if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
  1380. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1381. capacity, IWL3945_MAX_EVENT_LOG_SIZE);
  1382. capacity = IWL3945_MAX_EVENT_LOG_SIZE;
  1383. }
  1384. if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
  1385. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1386. next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
  1387. next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
  1388. }
  1389. size = num_wraps ? capacity : next_entry;
  1390. /* bail out if nothing in log */
  1391. if (size == 0) {
  1392. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1393. return;
  1394. }
  1395. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1396. size, num_wraps);
  1397. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1398. * i.e the next one that uCode would fill. */
  1399. if (num_wraps)
  1400. iwl3945_print_event_log(priv, next_entry,
  1401. capacity - next_entry, mode);
  1402. /* (then/else) start at top of log */
  1403. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1404. }
  1405. #else
  1406. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1407. {
  1408. }
  1409. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1410. {
  1411. }
  1412. #endif
  1413. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1414. {
  1415. u32 inta, handled = 0;
  1416. u32 inta_fh;
  1417. unsigned long flags;
  1418. #ifdef CONFIG_IWLWIFI_DEBUG
  1419. u32 inta_mask;
  1420. #endif
  1421. spin_lock_irqsave(&priv->lock, flags);
  1422. /* Ack/clear/reset pending uCode interrupts.
  1423. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1424. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1425. inta = iwl_read32(priv, CSR_INT);
  1426. iwl_write32(priv, CSR_INT, inta);
  1427. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1428. * Any new interrupts that happen after this, either while we're
  1429. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1430. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1431. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1432. #ifdef CONFIG_IWLWIFI_DEBUG
  1433. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1434. /* just for debug */
  1435. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1436. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1437. inta, inta_mask, inta_fh);
  1438. }
  1439. #endif
  1440. spin_unlock_irqrestore(&priv->lock, flags);
  1441. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1442. * atomic, make sure that inta covers all the interrupts that
  1443. * we've discovered, even if FH interrupt came in just after
  1444. * reading CSR_INT. */
  1445. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1446. inta |= CSR_INT_BIT_FH_RX;
  1447. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1448. inta |= CSR_INT_BIT_FH_TX;
  1449. /* Now service all interrupt bits discovered above. */
  1450. if (inta & CSR_INT_BIT_HW_ERR) {
  1451. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1452. /* Tell the device to stop sending interrupts */
  1453. iwl_disable_interrupts(priv);
  1454. priv->isr_stats.hw++;
  1455. iwl_irq_handle_error(priv);
  1456. handled |= CSR_INT_BIT_HW_ERR;
  1457. return;
  1458. }
  1459. #ifdef CONFIG_IWLWIFI_DEBUG
  1460. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1461. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1462. if (inta & CSR_INT_BIT_SCD) {
  1463. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1464. "the frame/frames.\n");
  1465. priv->isr_stats.sch++;
  1466. }
  1467. /* Alive notification via Rx interrupt will do the real work */
  1468. if (inta & CSR_INT_BIT_ALIVE) {
  1469. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1470. priv->isr_stats.alive++;
  1471. }
  1472. }
  1473. #endif
  1474. /* Safely ignore these bits for debug checks below */
  1475. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1476. /* Error detected by uCode */
  1477. if (inta & CSR_INT_BIT_SW_ERR) {
  1478. IWL_ERR(priv, "Microcode SW error detected. "
  1479. "Restarting 0x%X.\n", inta);
  1480. priv->isr_stats.sw++;
  1481. priv->isr_stats.sw_err = inta;
  1482. iwl_irq_handle_error(priv);
  1483. handled |= CSR_INT_BIT_SW_ERR;
  1484. }
  1485. /* uCode wakes up after power-down sleep */
  1486. if (inta & CSR_INT_BIT_WAKEUP) {
  1487. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1488. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1489. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1490. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1491. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1492. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1493. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1494. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1495. priv->isr_stats.wakeup++;
  1496. handled |= CSR_INT_BIT_WAKEUP;
  1497. }
  1498. /* All uCode command responses, including Tx command responses,
  1499. * Rx "responses" (frame-received notification), and other
  1500. * notifications from uCode come through here*/
  1501. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1502. iwl3945_rx_handle(priv);
  1503. priv->isr_stats.rx++;
  1504. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1505. }
  1506. if (inta & CSR_INT_BIT_FH_TX) {
  1507. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1508. priv->isr_stats.tx++;
  1509. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1510. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1511. (FH39_SRVC_CHNL), 0x0);
  1512. handled |= CSR_INT_BIT_FH_TX;
  1513. }
  1514. if (inta & ~handled) {
  1515. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1516. priv->isr_stats.unhandled++;
  1517. }
  1518. if (inta & ~priv->inta_mask) {
  1519. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1520. inta & ~priv->inta_mask);
  1521. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1522. }
  1523. /* Re-enable all interrupts */
  1524. /* only Re-enable if disabled by irq */
  1525. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1526. iwl_enable_interrupts(priv);
  1527. #ifdef CONFIG_IWLWIFI_DEBUG
  1528. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1529. inta = iwl_read32(priv, CSR_INT);
  1530. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1531. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1532. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1533. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1534. }
  1535. #endif
  1536. }
  1537. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1538. enum ieee80211_band band,
  1539. u8 is_active, u8 n_probes,
  1540. struct iwl3945_scan_channel *scan_ch)
  1541. {
  1542. struct ieee80211_channel *chan;
  1543. const struct ieee80211_supported_band *sband;
  1544. const struct iwl_channel_info *ch_info;
  1545. u16 passive_dwell = 0;
  1546. u16 active_dwell = 0;
  1547. int added, i;
  1548. sband = iwl_get_hw_mode(priv, band);
  1549. if (!sband)
  1550. return 0;
  1551. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1552. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1553. if (passive_dwell <= active_dwell)
  1554. passive_dwell = active_dwell + 1;
  1555. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1556. chan = priv->scan_request->channels[i];
  1557. if (chan->band != band)
  1558. continue;
  1559. scan_ch->channel = chan->hw_value;
  1560. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1561. if (!is_channel_valid(ch_info)) {
  1562. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1563. scan_ch->channel);
  1564. continue;
  1565. }
  1566. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1567. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1568. /* If passive , set up for auto-switch
  1569. * and use long active_dwell time.
  1570. */
  1571. if (!is_active || is_channel_passive(ch_info) ||
  1572. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1573. scan_ch->type = 0; /* passive */
  1574. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1575. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1576. } else {
  1577. scan_ch->type = 1; /* active */
  1578. }
  1579. /* Set direct probe bits. These may be used both for active
  1580. * scan channels (probes gets sent right away),
  1581. * or for passive channels (probes get se sent only after
  1582. * hearing clear Rx packet).*/
  1583. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1584. if (n_probes)
  1585. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1586. } else {
  1587. /* uCode v1 does not allow setting direct probe bits on
  1588. * passive channel. */
  1589. if ((scan_ch->type & 1) && n_probes)
  1590. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1591. }
  1592. /* Set txpower levels to defaults */
  1593. scan_ch->tpc.dsp_atten = 110;
  1594. /* scan_pwr_info->tpc.dsp_atten; */
  1595. /*scan_pwr_info->tpc.tx_gain; */
  1596. if (band == IEEE80211_BAND_5GHZ)
  1597. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1598. else {
  1599. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1600. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1601. * power level:
  1602. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1603. */
  1604. }
  1605. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1606. scan_ch->channel,
  1607. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1608. (scan_ch->type & 1) ?
  1609. active_dwell : passive_dwell);
  1610. scan_ch++;
  1611. added++;
  1612. }
  1613. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1614. return added;
  1615. }
  1616. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1617. struct ieee80211_rate *rates)
  1618. {
  1619. int i;
  1620. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1621. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1622. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1623. rates[i].hw_value_short = i;
  1624. rates[i].flags = 0;
  1625. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1626. /*
  1627. * If CCK != 1M then set short preamble rate flag.
  1628. */
  1629. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1630. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1631. }
  1632. }
  1633. }
  1634. /******************************************************************************
  1635. *
  1636. * uCode download functions
  1637. *
  1638. ******************************************************************************/
  1639. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1640. {
  1641. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1642. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1643. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1644. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1645. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1646. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1647. }
  1648. /**
  1649. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1650. * looking at all data.
  1651. */
  1652. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1653. {
  1654. u32 val;
  1655. u32 save_len = len;
  1656. int rc = 0;
  1657. u32 errcnt;
  1658. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1659. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1660. IWL39_RTC_INST_LOWER_BOUND);
  1661. errcnt = 0;
  1662. for (; len > 0; len -= sizeof(u32), image++) {
  1663. /* read data comes through single port, auto-incr addr */
  1664. /* NOTE: Use the debugless read so we don't flood kernel log
  1665. * if IWL_DL_IO is set */
  1666. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1667. if (val != le32_to_cpu(*image)) {
  1668. IWL_ERR(priv, "uCode INST section is invalid at "
  1669. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1670. save_len - len, val, le32_to_cpu(*image));
  1671. rc = -EIO;
  1672. errcnt++;
  1673. if (errcnt >= 20)
  1674. break;
  1675. }
  1676. }
  1677. if (!errcnt)
  1678. IWL_DEBUG_INFO(priv,
  1679. "ucode image in INSTRUCTION memory is good\n");
  1680. return rc;
  1681. }
  1682. /**
  1683. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1684. * using sample data 100 bytes apart. If these sample points are good,
  1685. * it's a pretty good bet that everything between them is good, too.
  1686. */
  1687. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1688. {
  1689. u32 val;
  1690. int rc = 0;
  1691. u32 errcnt = 0;
  1692. u32 i;
  1693. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1694. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1695. /* read data comes through single port, auto-incr addr */
  1696. /* NOTE: Use the debugless read so we don't flood kernel log
  1697. * if IWL_DL_IO is set */
  1698. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1699. i + IWL39_RTC_INST_LOWER_BOUND);
  1700. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1701. if (val != le32_to_cpu(*image)) {
  1702. #if 0 /* Enable this if you want to see details */
  1703. IWL_ERR(priv, "uCode INST section is invalid at "
  1704. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1705. i, val, *image);
  1706. #endif
  1707. rc = -EIO;
  1708. errcnt++;
  1709. if (errcnt >= 3)
  1710. break;
  1711. }
  1712. }
  1713. return rc;
  1714. }
  1715. /**
  1716. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1717. * and verify its contents
  1718. */
  1719. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1720. {
  1721. __le32 *image;
  1722. u32 len;
  1723. int rc = 0;
  1724. /* Try bootstrap */
  1725. image = (__le32 *)priv->ucode_boot.v_addr;
  1726. len = priv->ucode_boot.len;
  1727. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1728. if (rc == 0) {
  1729. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1730. return 0;
  1731. }
  1732. /* Try initialize */
  1733. image = (__le32 *)priv->ucode_init.v_addr;
  1734. len = priv->ucode_init.len;
  1735. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1736. if (rc == 0) {
  1737. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1738. return 0;
  1739. }
  1740. /* Try runtime/protocol */
  1741. image = (__le32 *)priv->ucode_code.v_addr;
  1742. len = priv->ucode_code.len;
  1743. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1744. if (rc == 0) {
  1745. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1746. return 0;
  1747. }
  1748. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1749. /* Since nothing seems to match, show first several data entries in
  1750. * instruction SRAM, so maybe visual inspection will give a clue.
  1751. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1752. image = (__le32 *)priv->ucode_boot.v_addr;
  1753. len = priv->ucode_boot.len;
  1754. rc = iwl3945_verify_inst_full(priv, image, len);
  1755. return rc;
  1756. }
  1757. static void iwl3945_nic_start(struct iwl_priv *priv)
  1758. {
  1759. /* Remove all resets to allow NIC to operate */
  1760. iwl_write32(priv, CSR_RESET, 0);
  1761. }
  1762. /**
  1763. * iwl3945_read_ucode - Read uCode images from disk file.
  1764. *
  1765. * Copy into buffers for card to fetch via bus-mastering
  1766. */
  1767. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1768. {
  1769. const struct iwl_ucode_header *ucode;
  1770. int ret = -EINVAL, index;
  1771. const struct firmware *ucode_raw;
  1772. /* firmware file name contains uCode/driver compatibility version */
  1773. const char *name_pre = priv->cfg->fw_name_pre;
  1774. const unsigned int api_max = priv->cfg->ucode_api_max;
  1775. const unsigned int api_min = priv->cfg->ucode_api_min;
  1776. char buf[25];
  1777. u8 *src;
  1778. size_t len;
  1779. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1780. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1781. * request_firmware() is synchronous, file is in memory on return. */
  1782. for (index = api_max; index >= api_min; index--) {
  1783. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1784. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1785. if (ret < 0) {
  1786. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1787. buf, ret);
  1788. if (ret == -ENOENT)
  1789. continue;
  1790. else
  1791. goto error;
  1792. } else {
  1793. if (index < api_max)
  1794. IWL_ERR(priv, "Loaded firmware %s, "
  1795. "which is deprecated. "
  1796. " Please use API v%u instead.\n",
  1797. buf, api_max);
  1798. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1799. "(%zd bytes) from disk\n",
  1800. buf, ucode_raw->size);
  1801. break;
  1802. }
  1803. }
  1804. if (ret < 0)
  1805. goto error;
  1806. /* Make sure that we got at least our header! */
  1807. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1808. IWL_ERR(priv, "File size way too small!\n");
  1809. ret = -EINVAL;
  1810. goto err_release;
  1811. }
  1812. /* Data from ucode file: header followed by uCode images */
  1813. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1814. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1815. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1816. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1817. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1818. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1819. init_data_size =
  1820. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1821. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1822. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1823. /* api_ver should match the api version forming part of the
  1824. * firmware filename ... but we don't check for that and only rely
  1825. * on the API version read from firmware header from here on forward */
  1826. if (api_ver < api_min || api_ver > api_max) {
  1827. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1828. "Driver supports v%u, firmware is v%u.\n",
  1829. api_max, api_ver);
  1830. priv->ucode_ver = 0;
  1831. ret = -EINVAL;
  1832. goto err_release;
  1833. }
  1834. if (api_ver != api_max)
  1835. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1836. "got %u. New firmware can be obtained "
  1837. "from http://www.intellinuxwireless.org.\n",
  1838. api_max, api_ver);
  1839. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1840. IWL_UCODE_MAJOR(priv->ucode_ver),
  1841. IWL_UCODE_MINOR(priv->ucode_ver),
  1842. IWL_UCODE_API(priv->ucode_ver),
  1843. IWL_UCODE_SERIAL(priv->ucode_ver));
  1844. snprintf(priv->hw->wiphy->fw_version,
  1845. sizeof(priv->hw->wiphy->fw_version),
  1846. "%u.%u.%u.%u",
  1847. IWL_UCODE_MAJOR(priv->ucode_ver),
  1848. IWL_UCODE_MINOR(priv->ucode_ver),
  1849. IWL_UCODE_API(priv->ucode_ver),
  1850. IWL_UCODE_SERIAL(priv->ucode_ver));
  1851. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1852. priv->ucode_ver);
  1853. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1854. inst_size);
  1855. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1856. data_size);
  1857. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1858. init_size);
  1859. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1860. init_data_size);
  1861. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1862. boot_size);
  1863. /* Verify size of file vs. image size info in file's header */
  1864. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1865. inst_size + data_size + init_size +
  1866. init_data_size + boot_size) {
  1867. IWL_DEBUG_INFO(priv,
  1868. "uCode file size %zd does not match expected size\n",
  1869. ucode_raw->size);
  1870. ret = -EINVAL;
  1871. goto err_release;
  1872. }
  1873. /* Verify that uCode images will fit in card's SRAM */
  1874. if (inst_size > IWL39_MAX_INST_SIZE) {
  1875. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1876. inst_size);
  1877. ret = -EINVAL;
  1878. goto err_release;
  1879. }
  1880. if (data_size > IWL39_MAX_DATA_SIZE) {
  1881. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1882. data_size);
  1883. ret = -EINVAL;
  1884. goto err_release;
  1885. }
  1886. if (init_size > IWL39_MAX_INST_SIZE) {
  1887. IWL_DEBUG_INFO(priv,
  1888. "uCode init instr len %d too large to fit in\n",
  1889. init_size);
  1890. ret = -EINVAL;
  1891. goto err_release;
  1892. }
  1893. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1894. IWL_DEBUG_INFO(priv,
  1895. "uCode init data len %d too large to fit in\n",
  1896. init_data_size);
  1897. ret = -EINVAL;
  1898. goto err_release;
  1899. }
  1900. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1901. IWL_DEBUG_INFO(priv,
  1902. "uCode boot instr len %d too large to fit in\n",
  1903. boot_size);
  1904. ret = -EINVAL;
  1905. goto err_release;
  1906. }
  1907. /* Allocate ucode buffers for card's bus-master loading ... */
  1908. /* Runtime instructions and 2 copies of data:
  1909. * 1) unmodified from disk
  1910. * 2) backup cache for save/restore during power-downs */
  1911. priv->ucode_code.len = inst_size;
  1912. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1913. priv->ucode_data.len = data_size;
  1914. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1915. priv->ucode_data_backup.len = data_size;
  1916. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1917. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1918. !priv->ucode_data_backup.v_addr)
  1919. goto err_pci_alloc;
  1920. /* Initialization instructions and data */
  1921. if (init_size && init_data_size) {
  1922. priv->ucode_init.len = init_size;
  1923. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1924. priv->ucode_init_data.len = init_data_size;
  1925. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1926. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1927. goto err_pci_alloc;
  1928. }
  1929. /* Bootstrap (instructions only, no data) */
  1930. if (boot_size) {
  1931. priv->ucode_boot.len = boot_size;
  1932. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1933. if (!priv->ucode_boot.v_addr)
  1934. goto err_pci_alloc;
  1935. }
  1936. /* Copy images into buffers for card's bus-master reads ... */
  1937. /* Runtime instructions (first block of data in file) */
  1938. len = inst_size;
  1939. IWL_DEBUG_INFO(priv,
  1940. "Copying (but not loading) uCode instr len %zd\n", len);
  1941. memcpy(priv->ucode_code.v_addr, src, len);
  1942. src += len;
  1943. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1944. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1945. /* Runtime data (2nd block)
  1946. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1947. len = data_size;
  1948. IWL_DEBUG_INFO(priv,
  1949. "Copying (but not loading) uCode data len %zd\n", len);
  1950. memcpy(priv->ucode_data.v_addr, src, len);
  1951. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1952. src += len;
  1953. /* Initialization instructions (3rd block) */
  1954. if (init_size) {
  1955. len = init_size;
  1956. IWL_DEBUG_INFO(priv,
  1957. "Copying (but not loading) init instr len %zd\n", len);
  1958. memcpy(priv->ucode_init.v_addr, src, len);
  1959. src += len;
  1960. }
  1961. /* Initialization data (4th block) */
  1962. if (init_data_size) {
  1963. len = init_data_size;
  1964. IWL_DEBUG_INFO(priv,
  1965. "Copying (but not loading) init data len %zd\n", len);
  1966. memcpy(priv->ucode_init_data.v_addr, src, len);
  1967. src += len;
  1968. }
  1969. /* Bootstrap instructions (5th block) */
  1970. len = boot_size;
  1971. IWL_DEBUG_INFO(priv,
  1972. "Copying (but not loading) boot instr len %zd\n", len);
  1973. memcpy(priv->ucode_boot.v_addr, src, len);
  1974. /* We have our copies now, allow OS release its copies */
  1975. release_firmware(ucode_raw);
  1976. return 0;
  1977. err_pci_alloc:
  1978. IWL_ERR(priv, "failed to allocate pci memory\n");
  1979. ret = -ENOMEM;
  1980. iwl3945_dealloc_ucode_pci(priv);
  1981. err_release:
  1982. release_firmware(ucode_raw);
  1983. error:
  1984. return ret;
  1985. }
  1986. /**
  1987. * iwl3945_set_ucode_ptrs - Set uCode address location
  1988. *
  1989. * Tell initialization uCode where to find runtime uCode.
  1990. *
  1991. * BSM registers initially contain pointers to initialization uCode.
  1992. * We need to replace them to load runtime uCode inst and data,
  1993. * and to save runtime data when powering down.
  1994. */
  1995. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1996. {
  1997. dma_addr_t pinst;
  1998. dma_addr_t pdata;
  1999. /* bits 31:0 for 3945 */
  2000. pinst = priv->ucode_code.p_addr;
  2001. pdata = priv->ucode_data_backup.p_addr;
  2002. /* Tell bootstrap uCode where to find image to load */
  2003. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2004. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2005. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2006. priv->ucode_data.len);
  2007. /* Inst byte count must be last to set up, bit 31 signals uCode
  2008. * that all new ptr/size info is in place */
  2009. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2010. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2011. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2012. return 0;
  2013. }
  2014. /**
  2015. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2016. *
  2017. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2018. *
  2019. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2020. */
  2021. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2022. {
  2023. /* Check alive response for "valid" sign from uCode */
  2024. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2025. /* We had an error bringing up the hardware, so take it
  2026. * all the way back down so we can try again */
  2027. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2028. goto restart;
  2029. }
  2030. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2031. * This is a paranoid check, because we would not have gotten the
  2032. * "initialize" alive if code weren't properly loaded. */
  2033. if (iwl3945_verify_ucode(priv)) {
  2034. /* Runtime instruction load was bad;
  2035. * take it all the way back down so we can try again */
  2036. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2037. goto restart;
  2038. }
  2039. /* Send pointers to protocol/runtime uCode image ... init code will
  2040. * load and launch runtime uCode, which will send us another "Alive"
  2041. * notification. */
  2042. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2043. if (iwl3945_set_ucode_ptrs(priv)) {
  2044. /* Runtime instruction load won't happen;
  2045. * take it all the way back down so we can try again */
  2046. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2047. goto restart;
  2048. }
  2049. return;
  2050. restart:
  2051. queue_work(priv->workqueue, &priv->restart);
  2052. }
  2053. /**
  2054. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2055. * from protocol/runtime uCode (initialization uCode's
  2056. * Alive gets handled by iwl3945_init_alive_start()).
  2057. */
  2058. static void iwl3945_alive_start(struct iwl_priv *priv)
  2059. {
  2060. int thermal_spin = 0;
  2061. u32 rfkill;
  2062. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2063. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2064. /* We had an error bringing up the hardware, so take it
  2065. * all the way back down so we can try again */
  2066. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2067. goto restart;
  2068. }
  2069. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2070. * This is a paranoid check, because we would not have gotten the
  2071. * "runtime" alive if code weren't properly loaded. */
  2072. if (iwl3945_verify_ucode(priv)) {
  2073. /* Runtime instruction load was bad;
  2074. * take it all the way back down so we can try again */
  2075. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2076. goto restart;
  2077. }
  2078. iwl_clear_stations_table(priv);
  2079. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2080. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2081. if (rfkill & 0x1) {
  2082. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2083. /* if RFKILL is not on, then wait for thermal
  2084. * sensor in adapter to kick in */
  2085. while (iwl3945_hw_get_temperature(priv) == 0) {
  2086. thermal_spin++;
  2087. udelay(10);
  2088. }
  2089. if (thermal_spin)
  2090. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2091. thermal_spin * 10);
  2092. } else
  2093. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2094. /* After the ALIVE response, we can send commands to 3945 uCode */
  2095. set_bit(STATUS_ALIVE, &priv->status);
  2096. if (iwl_is_rfkill(priv))
  2097. return;
  2098. ieee80211_wake_queues(priv->hw);
  2099. priv->active_rate = priv->rates_mask;
  2100. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2101. iwl_power_update_mode(priv, false);
  2102. if (iwl_is_associated(priv)) {
  2103. struct iwl3945_rxon_cmd *active_rxon =
  2104. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2105. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2106. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2107. } else {
  2108. /* Initialize our rx_config data */
  2109. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2110. }
  2111. /* Configure Bluetooth device coexistence support */
  2112. iwl_send_bt_config(priv);
  2113. /* Configure the adapter for unassociated operation */
  2114. iwlcore_commit_rxon(priv);
  2115. iwl3945_reg_txpower_periodic(priv);
  2116. iwl_leds_init(priv);
  2117. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2118. set_bit(STATUS_READY, &priv->status);
  2119. wake_up_interruptible(&priv->wait_command_queue);
  2120. /* reassociate for ADHOC mode */
  2121. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2122. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2123. priv->vif);
  2124. if (beacon)
  2125. iwl_mac_beacon_update(priv->hw, beacon);
  2126. }
  2127. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2128. iwl_set_mode(priv, priv->iw_mode);
  2129. return;
  2130. restart:
  2131. queue_work(priv->workqueue, &priv->restart);
  2132. }
  2133. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2134. static void __iwl3945_down(struct iwl_priv *priv)
  2135. {
  2136. unsigned long flags;
  2137. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2138. struct ieee80211_conf *conf = NULL;
  2139. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2140. conf = ieee80211_get_hw_conf(priv->hw);
  2141. if (!exit_pending)
  2142. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2143. iwl_clear_stations_table(priv);
  2144. /* Unblock any waiting calls */
  2145. wake_up_interruptible_all(&priv->wait_command_queue);
  2146. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2147. * exiting the module */
  2148. if (!exit_pending)
  2149. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2150. /* stop and reset the on-board processor */
  2151. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2152. /* tell the device to stop sending interrupts */
  2153. spin_lock_irqsave(&priv->lock, flags);
  2154. iwl_disable_interrupts(priv);
  2155. spin_unlock_irqrestore(&priv->lock, flags);
  2156. iwl_synchronize_irq(priv);
  2157. if (priv->mac80211_registered)
  2158. ieee80211_stop_queues(priv->hw);
  2159. /* If we have not previously called iwl3945_init() then
  2160. * clear all bits but the RF Kill bits and return */
  2161. if (!iwl_is_init(priv)) {
  2162. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2163. STATUS_RF_KILL_HW |
  2164. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2165. STATUS_GEO_CONFIGURED |
  2166. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2167. STATUS_EXIT_PENDING;
  2168. goto exit;
  2169. }
  2170. /* ...otherwise clear out all the status bits but the RF Kill
  2171. * bit and continue taking the NIC down. */
  2172. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2173. STATUS_RF_KILL_HW |
  2174. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2175. STATUS_GEO_CONFIGURED |
  2176. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2177. STATUS_FW_ERROR |
  2178. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2179. STATUS_EXIT_PENDING;
  2180. iwl3945_hw_txq_ctx_stop(priv);
  2181. iwl3945_hw_rxq_stop(priv);
  2182. /* Power-down device's busmaster DMA clocks */
  2183. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2184. udelay(5);
  2185. /* Stop the device, and put it in low power state */
  2186. priv->cfg->ops->lib->apm_ops.stop(priv);
  2187. exit:
  2188. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2189. if (priv->ibss_beacon)
  2190. dev_kfree_skb(priv->ibss_beacon);
  2191. priv->ibss_beacon = NULL;
  2192. /* clear out any free frames */
  2193. iwl3945_clear_free_frames(priv);
  2194. }
  2195. static void iwl3945_down(struct iwl_priv *priv)
  2196. {
  2197. mutex_lock(&priv->mutex);
  2198. __iwl3945_down(priv);
  2199. mutex_unlock(&priv->mutex);
  2200. iwl3945_cancel_deferred_work(priv);
  2201. }
  2202. #define MAX_HW_RESTARTS 5
  2203. static int __iwl3945_up(struct iwl_priv *priv)
  2204. {
  2205. int rc, i;
  2206. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2207. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2208. return -EIO;
  2209. }
  2210. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2211. IWL_ERR(priv, "ucode not available for device bring up\n");
  2212. return -EIO;
  2213. }
  2214. /* If platform's RF_KILL switch is NOT set to KILL */
  2215. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2216. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2217. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2218. else {
  2219. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2220. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2221. return -ENODEV;
  2222. }
  2223. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2224. rc = iwl3945_hw_nic_init(priv);
  2225. if (rc) {
  2226. IWL_ERR(priv, "Unable to int nic\n");
  2227. return rc;
  2228. }
  2229. /* make sure rfkill handshake bits are cleared */
  2230. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2231. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2232. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2233. /* clear (again), then enable host interrupts */
  2234. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2235. iwl_enable_interrupts(priv);
  2236. /* really make sure rfkill handshake bits are cleared */
  2237. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2238. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2239. /* Copy original ucode data image from disk into backup cache.
  2240. * This will be used to initialize the on-board processor's
  2241. * data SRAM for a clean start when the runtime program first loads. */
  2242. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2243. priv->ucode_data.len);
  2244. /* We return success when we resume from suspend and rf_kill is on. */
  2245. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2246. return 0;
  2247. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2248. iwl_clear_stations_table(priv);
  2249. /* load bootstrap state machine,
  2250. * load bootstrap program into processor's memory,
  2251. * prepare to load the "initialize" uCode */
  2252. priv->cfg->ops->lib->load_ucode(priv);
  2253. if (rc) {
  2254. IWL_ERR(priv,
  2255. "Unable to set up bootstrap uCode: %d\n", rc);
  2256. continue;
  2257. }
  2258. /* start card; "initialize" will load runtime ucode */
  2259. iwl3945_nic_start(priv);
  2260. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2261. return 0;
  2262. }
  2263. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2264. __iwl3945_down(priv);
  2265. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2266. /* tried to restart and config the device for as long as our
  2267. * patience could withstand */
  2268. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2269. return -EIO;
  2270. }
  2271. /*****************************************************************************
  2272. *
  2273. * Workqueue callbacks
  2274. *
  2275. *****************************************************************************/
  2276. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2277. {
  2278. struct iwl_priv *priv =
  2279. container_of(data, struct iwl_priv, init_alive_start.work);
  2280. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2281. return;
  2282. mutex_lock(&priv->mutex);
  2283. iwl3945_init_alive_start(priv);
  2284. mutex_unlock(&priv->mutex);
  2285. }
  2286. static void iwl3945_bg_alive_start(struct work_struct *data)
  2287. {
  2288. struct iwl_priv *priv =
  2289. container_of(data, struct iwl_priv, alive_start.work);
  2290. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2291. return;
  2292. mutex_lock(&priv->mutex);
  2293. iwl3945_alive_start(priv);
  2294. mutex_unlock(&priv->mutex);
  2295. }
  2296. /*
  2297. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2298. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2299. * *is* readable even when device has been SW_RESET into low power mode
  2300. * (e.g. during RF KILL).
  2301. */
  2302. static void iwl3945_rfkill_poll(struct work_struct *data)
  2303. {
  2304. struct iwl_priv *priv =
  2305. container_of(data, struct iwl_priv, rfkill_poll.work);
  2306. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2307. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2308. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2309. if (new_rfkill != old_rfkill) {
  2310. if (new_rfkill)
  2311. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2312. else
  2313. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2314. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2315. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2316. new_rfkill ? "disable radio" : "enable radio");
  2317. }
  2318. /* Keep this running, even if radio now enabled. This will be
  2319. * cancelled in mac_start() if system decides to start again */
  2320. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2321. round_jiffies_relative(2 * HZ));
  2322. }
  2323. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2324. static void iwl3945_bg_request_scan(struct work_struct *data)
  2325. {
  2326. struct iwl_priv *priv =
  2327. container_of(data, struct iwl_priv, request_scan);
  2328. struct iwl_host_cmd cmd = {
  2329. .id = REPLY_SCAN_CMD,
  2330. .len = sizeof(struct iwl3945_scan_cmd),
  2331. .flags = CMD_SIZE_HUGE,
  2332. };
  2333. int rc = 0;
  2334. struct iwl3945_scan_cmd *scan;
  2335. struct ieee80211_conf *conf = NULL;
  2336. u8 n_probes = 0;
  2337. enum ieee80211_band band;
  2338. bool is_active = false;
  2339. conf = ieee80211_get_hw_conf(priv->hw);
  2340. mutex_lock(&priv->mutex);
  2341. cancel_delayed_work(&priv->scan_check);
  2342. if (!iwl_is_ready(priv)) {
  2343. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2344. goto done;
  2345. }
  2346. /* Make sure the scan wasn't canceled before this queued work
  2347. * was given the chance to run... */
  2348. if (!test_bit(STATUS_SCANNING, &priv->status))
  2349. goto done;
  2350. /* This should never be called or scheduled if there is currently
  2351. * a scan active in the hardware. */
  2352. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2353. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2354. "Ignoring second request.\n");
  2355. rc = -EIO;
  2356. goto done;
  2357. }
  2358. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2359. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2360. goto done;
  2361. }
  2362. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2363. IWL_DEBUG_HC(priv,
  2364. "Scan request while abort pending. Queuing.\n");
  2365. goto done;
  2366. }
  2367. if (iwl_is_rfkill(priv)) {
  2368. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2369. goto done;
  2370. }
  2371. if (!test_bit(STATUS_READY, &priv->status)) {
  2372. IWL_DEBUG_HC(priv,
  2373. "Scan request while uninitialized. Queuing.\n");
  2374. goto done;
  2375. }
  2376. if (!priv->scan_bands) {
  2377. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2378. goto done;
  2379. }
  2380. if (!priv->scan) {
  2381. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2382. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2383. if (!priv->scan) {
  2384. rc = -ENOMEM;
  2385. goto done;
  2386. }
  2387. }
  2388. scan = priv->scan;
  2389. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2390. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2391. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2392. if (iwl_is_associated(priv)) {
  2393. u16 interval = 0;
  2394. u32 extra;
  2395. u32 suspend_time = 100;
  2396. u32 scan_suspend_time = 100;
  2397. unsigned long flags;
  2398. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2399. spin_lock_irqsave(&priv->lock, flags);
  2400. interval = priv->beacon_int;
  2401. spin_unlock_irqrestore(&priv->lock, flags);
  2402. scan->suspend_time = 0;
  2403. scan->max_out_time = cpu_to_le32(200 * 1024);
  2404. if (!interval)
  2405. interval = suspend_time;
  2406. /*
  2407. * suspend time format:
  2408. * 0-19: beacon interval in usec (time before exec.)
  2409. * 20-23: 0
  2410. * 24-31: number of beacons (suspend between channels)
  2411. */
  2412. extra = (suspend_time / interval) << 24;
  2413. scan_suspend_time = 0xFF0FFFFF &
  2414. (extra | ((suspend_time % interval) * 1024));
  2415. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2416. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2417. scan_suspend_time, interval);
  2418. }
  2419. if (priv->scan_request->n_ssids) {
  2420. int i, p = 0;
  2421. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2422. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2423. /* always does wildcard anyway */
  2424. if (!priv->scan_request->ssids[i].ssid_len)
  2425. continue;
  2426. scan->direct_scan[p].id = WLAN_EID_SSID;
  2427. scan->direct_scan[p].len =
  2428. priv->scan_request->ssids[i].ssid_len;
  2429. memcpy(scan->direct_scan[p].ssid,
  2430. priv->scan_request->ssids[i].ssid,
  2431. priv->scan_request->ssids[i].ssid_len);
  2432. n_probes++;
  2433. p++;
  2434. }
  2435. is_active = true;
  2436. } else
  2437. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2438. /* We don't build a direct scan probe request; the uCode will do
  2439. * that based on the direct_mask added to each channel entry */
  2440. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2441. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2442. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2443. /* flags + rate selection */
  2444. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2445. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2446. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2447. scan->good_CRC_th = 0;
  2448. band = IEEE80211_BAND_2GHZ;
  2449. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2450. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2451. /*
  2452. * If active scaning is requested but a certain channel
  2453. * is marked passive, we can do active scanning if we
  2454. * detect transmissions.
  2455. */
  2456. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2457. band = IEEE80211_BAND_5GHZ;
  2458. } else {
  2459. IWL_WARN(priv, "Invalid scan band count\n");
  2460. goto done;
  2461. }
  2462. scan->tx_cmd.len = cpu_to_le16(
  2463. iwl_fill_probe_req(priv,
  2464. (struct ieee80211_mgmt *)scan->data,
  2465. priv->scan_request->ie,
  2466. priv->scan_request->ie_len,
  2467. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2468. /* select Rx antennas */
  2469. scan->flags |= iwl3945_get_antenna_flags(priv);
  2470. if (iwl_is_monitor_mode(priv))
  2471. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2472. scan->channel_count =
  2473. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2474. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2475. if (scan->channel_count == 0) {
  2476. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2477. goto done;
  2478. }
  2479. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2480. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2481. cmd.data = scan;
  2482. scan->len = cpu_to_le16(cmd.len);
  2483. set_bit(STATUS_SCAN_HW, &priv->status);
  2484. rc = iwl_send_cmd_sync(priv, &cmd);
  2485. if (rc)
  2486. goto done;
  2487. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2488. IWL_SCAN_CHECK_WATCHDOG);
  2489. mutex_unlock(&priv->mutex);
  2490. return;
  2491. done:
  2492. /* can not perform scan make sure we clear scanning
  2493. * bits from status so next scan request can be performed.
  2494. * if we dont clear scanning status bit here all next scan
  2495. * will fail
  2496. */
  2497. clear_bit(STATUS_SCAN_HW, &priv->status);
  2498. clear_bit(STATUS_SCANNING, &priv->status);
  2499. /* inform mac80211 scan aborted */
  2500. queue_work(priv->workqueue, &priv->scan_completed);
  2501. mutex_unlock(&priv->mutex);
  2502. }
  2503. static void iwl3945_bg_up(struct work_struct *data)
  2504. {
  2505. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2506. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2507. return;
  2508. mutex_lock(&priv->mutex);
  2509. __iwl3945_up(priv);
  2510. mutex_unlock(&priv->mutex);
  2511. }
  2512. static void iwl3945_bg_restart(struct work_struct *data)
  2513. {
  2514. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2515. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2516. return;
  2517. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2518. mutex_lock(&priv->mutex);
  2519. priv->vif = NULL;
  2520. priv->is_open = 0;
  2521. mutex_unlock(&priv->mutex);
  2522. iwl3945_down(priv);
  2523. ieee80211_restart_hw(priv->hw);
  2524. } else {
  2525. iwl3945_down(priv);
  2526. queue_work(priv->workqueue, &priv->up);
  2527. }
  2528. }
  2529. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2530. {
  2531. struct iwl_priv *priv =
  2532. container_of(data, struct iwl_priv, rx_replenish);
  2533. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2534. return;
  2535. mutex_lock(&priv->mutex);
  2536. iwl3945_rx_replenish(priv);
  2537. mutex_unlock(&priv->mutex);
  2538. }
  2539. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2540. void iwl3945_post_associate(struct iwl_priv *priv)
  2541. {
  2542. int rc = 0;
  2543. struct ieee80211_conf *conf = NULL;
  2544. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2545. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2546. return;
  2547. }
  2548. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2549. priv->assoc_id, priv->active_rxon.bssid_addr);
  2550. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2551. return;
  2552. if (!priv->vif || !priv->is_open)
  2553. return;
  2554. iwl_scan_cancel_timeout(priv, 200);
  2555. conf = ieee80211_get_hw_conf(priv->hw);
  2556. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2557. iwlcore_commit_rxon(priv);
  2558. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2559. iwl_setup_rxon_timing(priv);
  2560. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2561. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2562. if (rc)
  2563. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2564. "Attempting to continue.\n");
  2565. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2566. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2567. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2568. priv->assoc_id, priv->beacon_int);
  2569. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2570. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2571. else
  2572. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2573. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2574. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2575. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2576. else
  2577. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2578. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2579. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2580. }
  2581. iwlcore_commit_rxon(priv);
  2582. switch (priv->iw_mode) {
  2583. case NL80211_IFTYPE_STATION:
  2584. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2585. break;
  2586. case NL80211_IFTYPE_ADHOC:
  2587. priv->assoc_id = 1;
  2588. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2589. iwl3945_sync_sta(priv, IWL_STA_ID,
  2590. (priv->band == IEEE80211_BAND_5GHZ) ?
  2591. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2592. CMD_ASYNC);
  2593. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2594. iwl3945_send_beacon_cmd(priv);
  2595. break;
  2596. default:
  2597. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2598. __func__, priv->iw_mode);
  2599. break;
  2600. }
  2601. iwl_activate_qos(priv, 0);
  2602. /* we have just associated, don't start scan too early */
  2603. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2604. }
  2605. /*****************************************************************************
  2606. *
  2607. * mac80211 entry point functions
  2608. *
  2609. *****************************************************************************/
  2610. #define UCODE_READY_TIMEOUT (2 * HZ)
  2611. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2612. {
  2613. struct iwl_priv *priv = hw->priv;
  2614. int ret;
  2615. IWL_DEBUG_MAC80211(priv, "enter\n");
  2616. /* we should be verifying the device is ready to be opened */
  2617. mutex_lock(&priv->mutex);
  2618. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2619. * ucode filename and max sizes are card-specific. */
  2620. if (!priv->ucode_code.len) {
  2621. ret = iwl3945_read_ucode(priv);
  2622. if (ret) {
  2623. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2624. mutex_unlock(&priv->mutex);
  2625. goto out_release_irq;
  2626. }
  2627. }
  2628. ret = __iwl3945_up(priv);
  2629. mutex_unlock(&priv->mutex);
  2630. if (ret)
  2631. goto out_release_irq;
  2632. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2633. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2634. * mac80211 will not be run successfully. */
  2635. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2636. test_bit(STATUS_READY, &priv->status),
  2637. UCODE_READY_TIMEOUT);
  2638. if (!ret) {
  2639. if (!test_bit(STATUS_READY, &priv->status)) {
  2640. IWL_ERR(priv,
  2641. "Wait for START_ALIVE timeout after %dms.\n",
  2642. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2643. ret = -ETIMEDOUT;
  2644. goto out_release_irq;
  2645. }
  2646. }
  2647. /* ucode is running and will send rfkill notifications,
  2648. * no need to poll the killswitch state anymore */
  2649. cancel_delayed_work(&priv->rfkill_poll);
  2650. iwl_led_start(priv);
  2651. priv->is_open = 1;
  2652. IWL_DEBUG_MAC80211(priv, "leave\n");
  2653. return 0;
  2654. out_release_irq:
  2655. priv->is_open = 0;
  2656. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2657. return ret;
  2658. }
  2659. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2660. {
  2661. struct iwl_priv *priv = hw->priv;
  2662. IWL_DEBUG_MAC80211(priv, "enter\n");
  2663. if (!priv->is_open) {
  2664. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2665. return;
  2666. }
  2667. priv->is_open = 0;
  2668. if (iwl_is_ready_rf(priv)) {
  2669. /* stop mac, cancel any scan request and clear
  2670. * RXON_FILTER_ASSOC_MSK BIT
  2671. */
  2672. mutex_lock(&priv->mutex);
  2673. iwl_scan_cancel_timeout(priv, 100);
  2674. mutex_unlock(&priv->mutex);
  2675. }
  2676. iwl3945_down(priv);
  2677. flush_workqueue(priv->workqueue);
  2678. /* start polling the killswitch state again */
  2679. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2680. round_jiffies_relative(2 * HZ));
  2681. IWL_DEBUG_MAC80211(priv, "leave\n");
  2682. }
  2683. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2684. {
  2685. struct iwl_priv *priv = hw->priv;
  2686. IWL_DEBUG_MAC80211(priv, "enter\n");
  2687. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2688. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2689. if (iwl3945_tx_skb(priv, skb))
  2690. dev_kfree_skb_any(skb);
  2691. IWL_DEBUG_MAC80211(priv, "leave\n");
  2692. return NETDEV_TX_OK;
  2693. }
  2694. void iwl3945_config_ap(struct iwl_priv *priv)
  2695. {
  2696. int rc = 0;
  2697. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2698. return;
  2699. /* The following should be done only at AP bring up */
  2700. if (!(iwl_is_associated(priv))) {
  2701. /* RXON - unassoc (to set timing command) */
  2702. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2703. iwlcore_commit_rxon(priv);
  2704. /* RXON Timing */
  2705. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2706. iwl_setup_rxon_timing(priv);
  2707. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2708. sizeof(priv->rxon_timing),
  2709. &priv->rxon_timing);
  2710. if (rc)
  2711. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2712. "Attempting to continue.\n");
  2713. /* FIXME: what should be the assoc_id for AP? */
  2714. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2715. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2716. priv->staging_rxon.flags |=
  2717. RXON_FLG_SHORT_PREAMBLE_MSK;
  2718. else
  2719. priv->staging_rxon.flags &=
  2720. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2721. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2722. if (priv->assoc_capability &
  2723. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2724. priv->staging_rxon.flags |=
  2725. RXON_FLG_SHORT_SLOT_MSK;
  2726. else
  2727. priv->staging_rxon.flags &=
  2728. ~RXON_FLG_SHORT_SLOT_MSK;
  2729. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2730. priv->staging_rxon.flags &=
  2731. ~RXON_FLG_SHORT_SLOT_MSK;
  2732. }
  2733. /* restore RXON assoc */
  2734. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2735. iwlcore_commit_rxon(priv);
  2736. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2737. }
  2738. iwl3945_send_beacon_cmd(priv);
  2739. /* FIXME - we need to add code here to detect a totally new
  2740. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2741. * clear sta table, add BCAST sta... */
  2742. }
  2743. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2744. struct ieee80211_vif *vif,
  2745. struct ieee80211_sta *sta,
  2746. struct ieee80211_key_conf *key)
  2747. {
  2748. struct iwl_priv *priv = hw->priv;
  2749. const u8 *addr;
  2750. int ret = 0;
  2751. u8 sta_id = IWL_INVALID_STATION;
  2752. u8 static_key;
  2753. IWL_DEBUG_MAC80211(priv, "enter\n");
  2754. if (iwl3945_mod_params.sw_crypto) {
  2755. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2756. return -EOPNOTSUPP;
  2757. }
  2758. addr = sta ? sta->addr : iwl_bcast_addr;
  2759. static_key = !iwl_is_associated(priv);
  2760. if (!static_key) {
  2761. sta_id = iwl_find_station(priv, addr);
  2762. if (sta_id == IWL_INVALID_STATION) {
  2763. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2764. addr);
  2765. return -EINVAL;
  2766. }
  2767. }
  2768. mutex_lock(&priv->mutex);
  2769. iwl_scan_cancel_timeout(priv, 100);
  2770. mutex_unlock(&priv->mutex);
  2771. switch (cmd) {
  2772. case SET_KEY:
  2773. if (static_key)
  2774. ret = iwl3945_set_static_key(priv, key);
  2775. else
  2776. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2777. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2778. break;
  2779. case DISABLE_KEY:
  2780. if (static_key)
  2781. ret = iwl3945_remove_static_key(priv);
  2782. else
  2783. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2784. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2785. break;
  2786. default:
  2787. ret = -EINVAL;
  2788. }
  2789. IWL_DEBUG_MAC80211(priv, "leave\n");
  2790. return ret;
  2791. }
  2792. /*****************************************************************************
  2793. *
  2794. * sysfs attributes
  2795. *
  2796. *****************************************************************************/
  2797. #ifdef CONFIG_IWLWIFI_DEBUG
  2798. /*
  2799. * The following adds a new attribute to the sysfs representation
  2800. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2801. * used for controlling the debug level.
  2802. *
  2803. * See the level definitions in iwl for details.
  2804. *
  2805. * The debug_level being managed using sysfs below is a per device debug
  2806. * level that is used instead of the global debug level if it (the per
  2807. * device debug level) is set.
  2808. */
  2809. static ssize_t show_debug_level(struct device *d,
  2810. struct device_attribute *attr, char *buf)
  2811. {
  2812. struct iwl_priv *priv = dev_get_drvdata(d);
  2813. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2814. }
  2815. static ssize_t store_debug_level(struct device *d,
  2816. struct device_attribute *attr,
  2817. const char *buf, size_t count)
  2818. {
  2819. struct iwl_priv *priv = dev_get_drvdata(d);
  2820. unsigned long val;
  2821. int ret;
  2822. ret = strict_strtoul(buf, 0, &val);
  2823. if (ret)
  2824. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2825. else {
  2826. priv->debug_level = val;
  2827. if (iwl_alloc_traffic_mem(priv))
  2828. IWL_ERR(priv,
  2829. "Not enough memory to generate traffic log\n");
  2830. }
  2831. return strnlen(buf, count);
  2832. }
  2833. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2834. show_debug_level, store_debug_level);
  2835. #endif /* CONFIG_IWLWIFI_DEBUG */
  2836. static ssize_t show_temperature(struct device *d,
  2837. struct device_attribute *attr, char *buf)
  2838. {
  2839. struct iwl_priv *priv = dev_get_drvdata(d);
  2840. if (!iwl_is_alive(priv))
  2841. return -EAGAIN;
  2842. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2843. }
  2844. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2845. static ssize_t show_tx_power(struct device *d,
  2846. struct device_attribute *attr, char *buf)
  2847. {
  2848. struct iwl_priv *priv = dev_get_drvdata(d);
  2849. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2850. }
  2851. static ssize_t store_tx_power(struct device *d,
  2852. struct device_attribute *attr,
  2853. const char *buf, size_t count)
  2854. {
  2855. struct iwl_priv *priv = dev_get_drvdata(d);
  2856. char *p = (char *)buf;
  2857. u32 val;
  2858. val = simple_strtoul(p, &p, 10);
  2859. if (p == buf)
  2860. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2861. else
  2862. iwl3945_hw_reg_set_txpower(priv, val);
  2863. return count;
  2864. }
  2865. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2866. static ssize_t show_flags(struct device *d,
  2867. struct device_attribute *attr, char *buf)
  2868. {
  2869. struct iwl_priv *priv = dev_get_drvdata(d);
  2870. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2871. }
  2872. static ssize_t store_flags(struct device *d,
  2873. struct device_attribute *attr,
  2874. const char *buf, size_t count)
  2875. {
  2876. struct iwl_priv *priv = dev_get_drvdata(d);
  2877. u32 flags = simple_strtoul(buf, NULL, 0);
  2878. mutex_lock(&priv->mutex);
  2879. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2880. /* Cancel any currently running scans... */
  2881. if (iwl_scan_cancel_timeout(priv, 100))
  2882. IWL_WARN(priv, "Could not cancel scan.\n");
  2883. else {
  2884. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2885. flags);
  2886. priv->staging_rxon.flags = cpu_to_le32(flags);
  2887. iwlcore_commit_rxon(priv);
  2888. }
  2889. }
  2890. mutex_unlock(&priv->mutex);
  2891. return count;
  2892. }
  2893. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2894. static ssize_t show_filter_flags(struct device *d,
  2895. struct device_attribute *attr, char *buf)
  2896. {
  2897. struct iwl_priv *priv = dev_get_drvdata(d);
  2898. return sprintf(buf, "0x%04X\n",
  2899. le32_to_cpu(priv->active_rxon.filter_flags));
  2900. }
  2901. static ssize_t store_filter_flags(struct device *d,
  2902. struct device_attribute *attr,
  2903. const char *buf, size_t count)
  2904. {
  2905. struct iwl_priv *priv = dev_get_drvdata(d);
  2906. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2907. mutex_lock(&priv->mutex);
  2908. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2909. /* Cancel any currently running scans... */
  2910. if (iwl_scan_cancel_timeout(priv, 100))
  2911. IWL_WARN(priv, "Could not cancel scan.\n");
  2912. else {
  2913. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2914. "0x%04X\n", filter_flags);
  2915. priv->staging_rxon.filter_flags =
  2916. cpu_to_le32(filter_flags);
  2917. iwlcore_commit_rxon(priv);
  2918. }
  2919. }
  2920. mutex_unlock(&priv->mutex);
  2921. return count;
  2922. }
  2923. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2924. store_filter_flags);
  2925. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2926. static ssize_t show_measurement(struct device *d,
  2927. struct device_attribute *attr, char *buf)
  2928. {
  2929. struct iwl_priv *priv = dev_get_drvdata(d);
  2930. struct iwl_spectrum_notification measure_report;
  2931. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2932. u8 *data = (u8 *)&measure_report;
  2933. unsigned long flags;
  2934. spin_lock_irqsave(&priv->lock, flags);
  2935. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2936. spin_unlock_irqrestore(&priv->lock, flags);
  2937. return 0;
  2938. }
  2939. memcpy(&measure_report, &priv->measure_report, size);
  2940. priv->measurement_status = 0;
  2941. spin_unlock_irqrestore(&priv->lock, flags);
  2942. while (size && (PAGE_SIZE - len)) {
  2943. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2944. PAGE_SIZE - len, 1);
  2945. len = strlen(buf);
  2946. if (PAGE_SIZE - len)
  2947. buf[len++] = '\n';
  2948. ofs += 16;
  2949. size -= min(size, 16U);
  2950. }
  2951. return len;
  2952. }
  2953. static ssize_t store_measurement(struct device *d,
  2954. struct device_attribute *attr,
  2955. const char *buf, size_t count)
  2956. {
  2957. struct iwl_priv *priv = dev_get_drvdata(d);
  2958. struct ieee80211_measurement_params params = {
  2959. .channel = le16_to_cpu(priv->active_rxon.channel),
  2960. .start_time = cpu_to_le64(priv->last_tsf),
  2961. .duration = cpu_to_le16(1),
  2962. };
  2963. u8 type = IWL_MEASURE_BASIC;
  2964. u8 buffer[32];
  2965. u8 channel;
  2966. if (count) {
  2967. char *p = buffer;
  2968. strncpy(buffer, buf, min(sizeof(buffer), count));
  2969. channel = simple_strtoul(p, NULL, 0);
  2970. if (channel)
  2971. params.channel = channel;
  2972. p = buffer;
  2973. while (*p && *p != ' ')
  2974. p++;
  2975. if (*p)
  2976. type = simple_strtoul(p + 1, NULL, 0);
  2977. }
  2978. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2979. "channel %d (for '%s')\n", type, params.channel, buf);
  2980. iwl3945_get_measurement(priv, &params, type);
  2981. return count;
  2982. }
  2983. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2984. show_measurement, store_measurement);
  2985. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2986. static ssize_t store_retry_rate(struct device *d,
  2987. struct device_attribute *attr,
  2988. const char *buf, size_t count)
  2989. {
  2990. struct iwl_priv *priv = dev_get_drvdata(d);
  2991. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2992. if (priv->retry_rate <= 0)
  2993. priv->retry_rate = 1;
  2994. return count;
  2995. }
  2996. static ssize_t show_retry_rate(struct device *d,
  2997. struct device_attribute *attr, char *buf)
  2998. {
  2999. struct iwl_priv *priv = dev_get_drvdata(d);
  3000. return sprintf(buf, "%d", priv->retry_rate);
  3001. }
  3002. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3003. store_retry_rate);
  3004. static ssize_t show_channels(struct device *d,
  3005. struct device_attribute *attr, char *buf)
  3006. {
  3007. /* all this shit doesn't belong into sysfs anyway */
  3008. return 0;
  3009. }
  3010. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3011. static ssize_t show_statistics(struct device *d,
  3012. struct device_attribute *attr, char *buf)
  3013. {
  3014. struct iwl_priv *priv = dev_get_drvdata(d);
  3015. u32 size = sizeof(struct iwl3945_notif_statistics);
  3016. u32 len = 0, ofs = 0;
  3017. u8 *data = (u8 *)&priv->statistics_39;
  3018. int rc = 0;
  3019. if (!iwl_is_alive(priv))
  3020. return -EAGAIN;
  3021. mutex_lock(&priv->mutex);
  3022. rc = iwl_send_statistics_request(priv, 0);
  3023. mutex_unlock(&priv->mutex);
  3024. if (rc) {
  3025. len = sprintf(buf,
  3026. "Error sending statistics request: 0x%08X\n", rc);
  3027. return len;
  3028. }
  3029. while (size && (PAGE_SIZE - len)) {
  3030. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3031. PAGE_SIZE - len, 1);
  3032. len = strlen(buf);
  3033. if (PAGE_SIZE - len)
  3034. buf[len++] = '\n';
  3035. ofs += 16;
  3036. size -= min(size, 16U);
  3037. }
  3038. return len;
  3039. }
  3040. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3041. static ssize_t show_antenna(struct device *d,
  3042. struct device_attribute *attr, char *buf)
  3043. {
  3044. struct iwl_priv *priv = dev_get_drvdata(d);
  3045. if (!iwl_is_alive(priv))
  3046. return -EAGAIN;
  3047. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3048. }
  3049. static ssize_t store_antenna(struct device *d,
  3050. struct device_attribute *attr,
  3051. const char *buf, size_t count)
  3052. {
  3053. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3054. int ant;
  3055. if (count == 0)
  3056. return 0;
  3057. if (sscanf(buf, "%1i", &ant) != 1) {
  3058. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3059. return count;
  3060. }
  3061. if ((ant >= 0) && (ant <= 2)) {
  3062. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3063. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3064. } else
  3065. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3066. return count;
  3067. }
  3068. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3069. static ssize_t show_status(struct device *d,
  3070. struct device_attribute *attr, char *buf)
  3071. {
  3072. struct iwl_priv *priv = dev_get_drvdata(d);
  3073. if (!iwl_is_alive(priv))
  3074. return -EAGAIN;
  3075. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3076. }
  3077. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3078. static ssize_t dump_error_log(struct device *d,
  3079. struct device_attribute *attr,
  3080. const char *buf, size_t count)
  3081. {
  3082. struct iwl_priv *priv = dev_get_drvdata(d);
  3083. char *p = (char *)buf;
  3084. if (p[0] == '1')
  3085. iwl3945_dump_nic_error_log(priv);
  3086. return strnlen(buf, count);
  3087. }
  3088. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3089. /*****************************************************************************
  3090. *
  3091. * driver setup and tear down
  3092. *
  3093. *****************************************************************************/
  3094. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3095. {
  3096. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3097. init_waitqueue_head(&priv->wait_command_queue);
  3098. INIT_WORK(&priv->up, iwl3945_bg_up);
  3099. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3100. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3101. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3102. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3103. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3104. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3105. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3106. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3107. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3108. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3109. iwl3945_hw_setup_deferred_work(priv);
  3110. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3111. iwl3945_irq_tasklet, (unsigned long)priv);
  3112. }
  3113. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3114. {
  3115. iwl3945_hw_cancel_deferred_work(priv);
  3116. cancel_delayed_work_sync(&priv->init_alive_start);
  3117. cancel_delayed_work(&priv->scan_check);
  3118. cancel_delayed_work(&priv->alive_start);
  3119. cancel_work_sync(&priv->beacon_update);
  3120. }
  3121. static struct attribute *iwl3945_sysfs_entries[] = {
  3122. &dev_attr_antenna.attr,
  3123. &dev_attr_channels.attr,
  3124. &dev_attr_dump_errors.attr,
  3125. &dev_attr_flags.attr,
  3126. &dev_attr_filter_flags.attr,
  3127. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3128. &dev_attr_measurement.attr,
  3129. #endif
  3130. &dev_attr_retry_rate.attr,
  3131. &dev_attr_statistics.attr,
  3132. &dev_attr_status.attr,
  3133. &dev_attr_temperature.attr,
  3134. &dev_attr_tx_power.attr,
  3135. #ifdef CONFIG_IWLWIFI_DEBUG
  3136. &dev_attr_debug_level.attr,
  3137. #endif
  3138. NULL
  3139. };
  3140. static struct attribute_group iwl3945_attribute_group = {
  3141. .name = NULL, /* put in device directory */
  3142. .attrs = iwl3945_sysfs_entries,
  3143. };
  3144. static struct ieee80211_ops iwl3945_hw_ops = {
  3145. .tx = iwl3945_mac_tx,
  3146. .start = iwl3945_mac_start,
  3147. .stop = iwl3945_mac_stop,
  3148. .add_interface = iwl_mac_add_interface,
  3149. .remove_interface = iwl_mac_remove_interface,
  3150. .config = iwl_mac_config,
  3151. .configure_filter = iwl_configure_filter,
  3152. .set_key = iwl3945_mac_set_key,
  3153. .get_tx_stats = iwl_mac_get_tx_stats,
  3154. .conf_tx = iwl_mac_conf_tx,
  3155. .reset_tsf = iwl_mac_reset_tsf,
  3156. .bss_info_changed = iwl_bss_info_changed,
  3157. .hw_scan = iwl_mac_hw_scan
  3158. };
  3159. static int iwl3945_init_drv(struct iwl_priv *priv)
  3160. {
  3161. int ret;
  3162. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3163. priv->retry_rate = 1;
  3164. priv->ibss_beacon = NULL;
  3165. spin_lock_init(&priv->lock);
  3166. spin_lock_init(&priv->sta_lock);
  3167. spin_lock_init(&priv->hcmd_lock);
  3168. INIT_LIST_HEAD(&priv->free_frames);
  3169. mutex_init(&priv->mutex);
  3170. /* Clear the driver's (not device's) station table */
  3171. iwl_clear_stations_table(priv);
  3172. priv->ieee_channels = NULL;
  3173. priv->ieee_rates = NULL;
  3174. priv->band = IEEE80211_BAND_2GHZ;
  3175. priv->iw_mode = NL80211_IFTYPE_STATION;
  3176. iwl_reset_qos(priv);
  3177. priv->qos_data.qos_active = 0;
  3178. priv->qos_data.qos_cap.val = 0;
  3179. priv->rates_mask = IWL_RATES_MASK;
  3180. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3181. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3182. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3183. eeprom->version);
  3184. ret = -EINVAL;
  3185. goto err;
  3186. }
  3187. ret = iwl_init_channel_map(priv);
  3188. if (ret) {
  3189. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3190. goto err;
  3191. }
  3192. /* Set up txpower settings in driver for all channels */
  3193. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3194. ret = -EIO;
  3195. goto err_free_channel_map;
  3196. }
  3197. ret = iwlcore_init_geos(priv);
  3198. if (ret) {
  3199. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3200. goto err_free_channel_map;
  3201. }
  3202. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3203. return 0;
  3204. err_free_channel_map:
  3205. iwl_free_channel_map(priv);
  3206. err:
  3207. return ret;
  3208. }
  3209. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3210. {
  3211. int ret;
  3212. struct ieee80211_hw *hw = priv->hw;
  3213. hw->rate_control_algorithm = "iwl-3945-rs";
  3214. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3215. /* Tell mac80211 our characteristics */
  3216. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3217. IEEE80211_HW_NOISE_DBM |
  3218. IEEE80211_HW_SPECTRUM_MGMT |
  3219. IEEE80211_HW_SUPPORTS_PS |
  3220. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3221. hw->wiphy->interface_modes =
  3222. BIT(NL80211_IFTYPE_STATION) |
  3223. BIT(NL80211_IFTYPE_ADHOC);
  3224. hw->wiphy->custom_regulatory = true;
  3225. /* Firmware does not support this */
  3226. hw->wiphy->disable_beacon_hints = true;
  3227. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3228. /* we create the 802.11 header and a zero-length SSID element */
  3229. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3230. /* Default value; 4 EDCA QOS priorities */
  3231. hw->queues = 4;
  3232. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3233. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3234. &priv->bands[IEEE80211_BAND_2GHZ];
  3235. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3236. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3237. &priv->bands[IEEE80211_BAND_5GHZ];
  3238. ret = ieee80211_register_hw(priv->hw);
  3239. if (ret) {
  3240. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3241. return ret;
  3242. }
  3243. priv->mac80211_registered = 1;
  3244. return 0;
  3245. }
  3246. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3247. {
  3248. int err = 0;
  3249. struct iwl_priv *priv;
  3250. struct ieee80211_hw *hw;
  3251. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3252. struct iwl3945_eeprom *eeprom;
  3253. unsigned long flags;
  3254. /***********************
  3255. * 1. Allocating HW data
  3256. * ********************/
  3257. /* mac80211 allocates memory for this device instance, including
  3258. * space for this driver's private structure */
  3259. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3260. if (hw == NULL) {
  3261. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3262. err = -ENOMEM;
  3263. goto out;
  3264. }
  3265. priv = hw->priv;
  3266. SET_IEEE80211_DEV(hw, &pdev->dev);
  3267. /*
  3268. * Disabling hardware scan means that mac80211 will perform scans
  3269. * "the hard way", rather than using device's scan.
  3270. */
  3271. if (iwl3945_mod_params.disable_hw_scan) {
  3272. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3273. iwl3945_hw_ops.hw_scan = NULL;
  3274. }
  3275. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3276. priv->cfg = cfg;
  3277. priv->pci_dev = pdev;
  3278. priv->inta_mask = CSR_INI_SET_MASK;
  3279. #ifdef CONFIG_IWLWIFI_DEBUG
  3280. atomic_set(&priv->restrict_refcnt, 0);
  3281. #endif
  3282. if (iwl_alloc_traffic_mem(priv))
  3283. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3284. /***************************
  3285. * 2. Initializing PCI bus
  3286. * *************************/
  3287. if (pci_enable_device(pdev)) {
  3288. err = -ENODEV;
  3289. goto out_ieee80211_free_hw;
  3290. }
  3291. pci_set_master(pdev);
  3292. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3293. if (!err)
  3294. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3295. if (err) {
  3296. IWL_WARN(priv, "No suitable DMA available.\n");
  3297. goto out_pci_disable_device;
  3298. }
  3299. pci_set_drvdata(pdev, priv);
  3300. err = pci_request_regions(pdev, DRV_NAME);
  3301. if (err)
  3302. goto out_pci_disable_device;
  3303. /***********************
  3304. * 3. Read REV Register
  3305. * ********************/
  3306. priv->hw_base = pci_iomap(pdev, 0, 0);
  3307. if (!priv->hw_base) {
  3308. err = -ENODEV;
  3309. goto out_pci_release_regions;
  3310. }
  3311. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3312. (unsigned long long) pci_resource_len(pdev, 0));
  3313. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3314. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3315. * PCI Tx retries from interfering with C3 CPU state */
  3316. pci_write_config_byte(pdev, 0x41, 0x00);
  3317. /* this spin lock will be used in apm_ops.init and EEPROM access
  3318. * we should init now
  3319. */
  3320. spin_lock_init(&priv->reg_lock);
  3321. /***********************
  3322. * 4. Read EEPROM
  3323. * ********************/
  3324. /* Read the EEPROM */
  3325. err = iwl_eeprom_init(priv);
  3326. if (err) {
  3327. IWL_ERR(priv, "Unable to init EEPROM\n");
  3328. goto out_iounmap;
  3329. }
  3330. /* MAC Address location in EEPROM same for 3945/4965 */
  3331. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3332. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3333. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3334. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3335. /***********************
  3336. * 5. Setup HW Constants
  3337. * ********************/
  3338. /* Device-specific setup */
  3339. if (iwl3945_hw_set_hw_params(priv)) {
  3340. IWL_ERR(priv, "failed to set hw settings\n");
  3341. goto out_eeprom_free;
  3342. }
  3343. /***********************
  3344. * 6. Setup priv
  3345. * ********************/
  3346. err = iwl3945_init_drv(priv);
  3347. if (err) {
  3348. IWL_ERR(priv, "initializing driver failed\n");
  3349. goto out_unset_hw_params;
  3350. }
  3351. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3352. priv->cfg->name);
  3353. /***********************
  3354. * 7. Setup Services
  3355. * ********************/
  3356. spin_lock_irqsave(&priv->lock, flags);
  3357. iwl_disable_interrupts(priv);
  3358. spin_unlock_irqrestore(&priv->lock, flags);
  3359. pci_enable_msi(priv->pci_dev);
  3360. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3361. IRQF_SHARED, DRV_NAME, priv);
  3362. if (err) {
  3363. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3364. goto out_disable_msi;
  3365. }
  3366. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3367. if (err) {
  3368. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3369. goto out_release_irq;
  3370. }
  3371. iwl_set_rxon_channel(priv,
  3372. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3373. iwl3945_setup_deferred_work(priv);
  3374. iwl3945_setup_rx_handlers(priv);
  3375. iwl_power_initialize(priv);
  3376. /*********************************
  3377. * 8. Setup and Register mac80211
  3378. * *******************************/
  3379. iwl_enable_interrupts(priv);
  3380. err = iwl3945_setup_mac(priv);
  3381. if (err)
  3382. goto out_remove_sysfs;
  3383. err = iwl_dbgfs_register(priv, DRV_NAME);
  3384. if (err)
  3385. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3386. /* Start monitoring the killswitch */
  3387. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3388. 2 * HZ);
  3389. return 0;
  3390. out_remove_sysfs:
  3391. destroy_workqueue(priv->workqueue);
  3392. priv->workqueue = NULL;
  3393. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3394. out_release_irq:
  3395. free_irq(priv->pci_dev->irq, priv);
  3396. out_disable_msi:
  3397. pci_disable_msi(priv->pci_dev);
  3398. iwlcore_free_geos(priv);
  3399. iwl_free_channel_map(priv);
  3400. out_unset_hw_params:
  3401. iwl3945_unset_hw_params(priv);
  3402. out_eeprom_free:
  3403. iwl_eeprom_free(priv);
  3404. out_iounmap:
  3405. pci_iounmap(pdev, priv->hw_base);
  3406. out_pci_release_regions:
  3407. pci_release_regions(pdev);
  3408. out_pci_disable_device:
  3409. pci_set_drvdata(pdev, NULL);
  3410. pci_disable_device(pdev);
  3411. out_ieee80211_free_hw:
  3412. iwl_free_traffic_mem(priv);
  3413. ieee80211_free_hw(priv->hw);
  3414. out:
  3415. return err;
  3416. }
  3417. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3418. {
  3419. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3420. unsigned long flags;
  3421. if (!priv)
  3422. return;
  3423. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3424. iwl_dbgfs_unregister(priv);
  3425. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3426. if (priv->mac80211_registered) {
  3427. ieee80211_unregister_hw(priv->hw);
  3428. priv->mac80211_registered = 0;
  3429. } else {
  3430. iwl3945_down(priv);
  3431. }
  3432. /*
  3433. * Make sure device is reset to low power before unloading driver.
  3434. * This may be redundant with iwl_down(), but there are paths to
  3435. * run iwl_down() without calling apm_ops.stop(), and there are
  3436. * paths to avoid running iwl_down() at all before leaving driver.
  3437. * This (inexpensive) call *makes sure* device is reset.
  3438. */
  3439. priv->cfg->ops->lib->apm_ops.stop(priv);
  3440. /* make sure we flush any pending irq or
  3441. * tasklet for the driver
  3442. */
  3443. spin_lock_irqsave(&priv->lock, flags);
  3444. iwl_disable_interrupts(priv);
  3445. spin_unlock_irqrestore(&priv->lock, flags);
  3446. iwl_synchronize_irq(priv);
  3447. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3448. cancel_delayed_work_sync(&priv->rfkill_poll);
  3449. iwl3945_dealloc_ucode_pci(priv);
  3450. if (priv->rxq.bd)
  3451. iwl3945_rx_queue_free(priv, &priv->rxq);
  3452. iwl3945_hw_txq_ctx_free(priv);
  3453. iwl3945_unset_hw_params(priv);
  3454. iwl_clear_stations_table(priv);
  3455. /*netif_stop_queue(dev); */
  3456. flush_workqueue(priv->workqueue);
  3457. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3458. * priv->workqueue... so we can't take down the workqueue
  3459. * until now... */
  3460. destroy_workqueue(priv->workqueue);
  3461. priv->workqueue = NULL;
  3462. iwl_free_traffic_mem(priv);
  3463. free_irq(pdev->irq, priv);
  3464. pci_disable_msi(pdev);
  3465. pci_iounmap(pdev, priv->hw_base);
  3466. pci_release_regions(pdev);
  3467. pci_disable_device(pdev);
  3468. pci_set_drvdata(pdev, NULL);
  3469. iwl_free_channel_map(priv);
  3470. iwlcore_free_geos(priv);
  3471. kfree(priv->scan);
  3472. if (priv->ibss_beacon)
  3473. dev_kfree_skb(priv->ibss_beacon);
  3474. ieee80211_free_hw(priv->hw);
  3475. }
  3476. /*****************************************************************************
  3477. *
  3478. * driver and module entry point
  3479. *
  3480. *****************************************************************************/
  3481. static struct pci_driver iwl3945_driver = {
  3482. .name = DRV_NAME,
  3483. .id_table = iwl3945_hw_card_ids,
  3484. .probe = iwl3945_pci_probe,
  3485. .remove = __devexit_p(iwl3945_pci_remove),
  3486. #ifdef CONFIG_PM
  3487. .suspend = iwl_pci_suspend,
  3488. .resume = iwl_pci_resume,
  3489. #endif
  3490. };
  3491. static int __init iwl3945_init(void)
  3492. {
  3493. int ret;
  3494. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3495. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3496. ret = iwl3945_rate_control_register();
  3497. if (ret) {
  3498. printk(KERN_ERR DRV_NAME
  3499. "Unable to register rate control algorithm: %d\n", ret);
  3500. return ret;
  3501. }
  3502. ret = pci_register_driver(&iwl3945_driver);
  3503. if (ret) {
  3504. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3505. goto error_register;
  3506. }
  3507. return ret;
  3508. error_register:
  3509. iwl3945_rate_control_unregister();
  3510. return ret;
  3511. }
  3512. static void __exit iwl3945_exit(void)
  3513. {
  3514. pci_unregister_driver(&iwl3945_driver);
  3515. iwl3945_rate_control_unregister();
  3516. }
  3517. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3518. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3519. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3520. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3521. MODULE_PARM_DESC(swcrypto,
  3522. "using software crypto (default 1 [software])\n");
  3523. #ifdef CONFIG_IWLWIFI_DEBUG
  3524. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3525. MODULE_PARM_DESC(debug, "debug output mask");
  3526. #endif
  3527. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3528. int, S_IRUGO);
  3529. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3530. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3531. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3532. module_exit(iwl3945_exit);
  3533. module_init(iwl3945_init);