board-dt.c 5.0 KB

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  1. /*
  2. * nVidia Tegra device tree board support
  3. *
  4. * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  5. * Copyright (C) 2010 Google, Inc.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/serial_8250.h>
  21. #include <linux/clk.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/irqdomain.h>
  24. #include <linux/of.h>
  25. #include <linux/of_address.h>
  26. #include <linux/of_fdt.h>
  27. #include <linux/of_irq.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/pda_power.h>
  30. #include <linux/io.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-tegra.h>
  33. #include <asm/hardware/gic.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/time.h>
  37. #include <asm/setup.h>
  38. #include <asm/hardware/gic.h>
  39. #include <mach/iomap.h>
  40. #include <mach/irqs.h>
  41. #include "board.h"
  42. #include "board-harmony.h"
  43. #include "clock.h"
  44. #include "devices.h"
  45. void harmony_pinmux_init(void);
  46. void paz00_pinmux_init(void);
  47. void seaboard_pinmux_init(void);
  48. void trimslice_pinmux_init(void);
  49. void ventana_pinmux_init(void);
  50. static const struct of_device_id tegra_dt_irq_match[] __initconst = {
  51. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
  52. { }
  53. };
  54. void __init tegra_dt_init_irq(void)
  55. {
  56. tegra_init_irq();
  57. of_irq_init(tegra_dt_irq_match);
  58. }
  59. struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
  60. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
  61. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
  62. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
  63. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
  64. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
  65. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
  66. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
  67. OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
  68. OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
  69. OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
  70. OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
  71. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
  72. &tegra_ehci1_device.dev.platform_data),
  73. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
  74. &tegra_ehci2_device.dev.platform_data),
  75. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
  76. &tegra_ehci3_device.dev.platform_data),
  77. {}
  78. };
  79. static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
  80. /* name parent rate enabled */
  81. { "uartd", "pll_p", 216000000, true },
  82. { "usbd", "clk_m", 12000000, false },
  83. { "usb2", "clk_m", 12000000, false },
  84. { "usb3", "clk_m", 12000000, false },
  85. { "pll_a", "pll_p_out1", 56448000, true },
  86. { "pll_a_out0", "pll_a", 11289600, true },
  87. { "cdev1", NULL, 0, true },
  88. { "i2s1", "pll_a_out0", 11289600, false},
  89. { "i2s2", "pll_a_out0", 11289600, false},
  90. { NULL, NULL, 0, 0},
  91. };
  92. static struct of_device_id tegra_dt_match_table[] __initdata = {
  93. { .compatible = "simple-bus", },
  94. {}
  95. };
  96. static struct {
  97. char *machine;
  98. void (*init)(void);
  99. } pinmux_configs[] = {
  100. { "compulab,trimslice", trimslice_pinmux_init },
  101. { "nvidia,harmony", harmony_pinmux_init },
  102. { "compal,paz00", paz00_pinmux_init },
  103. { "nvidia,seaboard", seaboard_pinmux_init },
  104. { "nvidia,ventana", ventana_pinmux_init },
  105. };
  106. static void __init tegra_dt_init(void)
  107. {
  108. int i;
  109. tegra_clk_init_from_table(tegra_dt_clk_init_table);
  110. /*
  111. * Finished with the static registrations now; fill in the missing
  112. * devices
  113. */
  114. of_platform_populate(NULL, tegra_dt_match_table,
  115. tegra20_auxdata_lookup, NULL);
  116. for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
  117. if (of_machine_is_compatible(pinmux_configs[i].machine)) {
  118. pinmux_configs[i].init();
  119. break;
  120. }
  121. }
  122. WARN(i == ARRAY_SIZE(pinmux_configs),
  123. "Unknown platform! Pinmuxing not initialized\n");
  124. }
  125. static const char * tegra_dt_board_compat[] = {
  126. "compulab,trimslice",
  127. "nvidia,harmony",
  128. "compal,paz00",
  129. "nvidia,seaboard",
  130. "nvidia,ventana",
  131. NULL
  132. };
  133. DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
  134. .map_io = tegra_map_common_io,
  135. .init_early = tegra_init_early,
  136. .init_irq = tegra_dt_init_irq,
  137. .handle_irq = gic_handle_irq,
  138. .timer = &tegra_timer,
  139. .init_machine = tegra_dt_init,
  140. .restart = tegra_assert_system_reset,
  141. .dt_compat = tegra_dt_board_compat,
  142. MACHINE_END