bnx2x_dcb.c 72 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/netdevice.h>
  21. #include <linux/types.h>
  22. #include <linux/errno.h>
  23. #include <linux/rtnetlink.h>
  24. #include <net/dcbnl.h>
  25. #include "bnx2x.h"
  26. #include "bnx2x_cmn.h"
  27. #include "bnx2x_dcb.h"
  28. /* forward declarations of dcbx related functions */
  29. static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
  30. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  31. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  32. static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
  33. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  34. u32 *set_configuration_ets_pg,
  35. u32 *pri_pg_tbl);
  36. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  37. u32 *pg_pri_orginal_spread,
  38. struct pg_help_data *help_data);
  39. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  40. struct pg_help_data *help_data,
  41. struct dcbx_ets_feature *ets,
  42. u32 *pg_pri_orginal_spread);
  43. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  44. struct cos_help_data *cos_data,
  45. u32 *pg_pri_orginal_spread,
  46. struct dcbx_ets_feature *ets);
  47. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  48. struct bnx2x_func_tx_start_params*);
  49. /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */
  50. static void bnx2x_read_data(struct bnx2x *bp, u32 *buff,
  51. u32 addr, u32 len)
  52. {
  53. int i;
  54. for (i = 0; i < len; i += 4, buff++)
  55. *buff = REG_RD(bp, addr + i);
  56. }
  57. static void bnx2x_write_data(struct bnx2x *bp, u32 *buff,
  58. u32 addr, u32 len)
  59. {
  60. int i;
  61. for (i = 0; i < len; i += 4, buff++)
  62. REG_WR(bp, addr + i, *buff);
  63. }
  64. static void bnx2x_pfc_set(struct bnx2x *bp)
  65. {
  66. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  67. u32 pri_bit, val = 0;
  68. int i;
  69. pfc_params.num_of_rx_cos_priority_mask =
  70. bp->dcbx_port_params.ets.num_of_cos;
  71. /* Tx COS configuration */
  72. for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
  73. /*
  74. * We configure only the pauseable bits (non pauseable aren't
  75. * configured at all) it's done to avoid false pauses from
  76. * network
  77. */
  78. pfc_params.rx_cos_priority_mask[i] =
  79. bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
  80. & DCBX_PFC_PRI_PAUSE_MASK(bp);
  81. /*
  82. * Rx COS configuration
  83. * Changing PFC RX configuration .
  84. * In RX COS0 will always be configured to lossless and COS1 to lossy
  85. */
  86. for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
  87. pri_bit = 1 << i;
  88. if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)))
  89. val |= 1 << (i * 4);
  90. }
  91. pfc_params.pkt_priority_to_cos = val;
  92. /* RX COS0 */
  93. pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  94. /* RX COS1 */
  95. pfc_params.llfc_high_priority_classes = 0;
  96. bnx2x_acquire_phy_lock(bp);
  97. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  98. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  99. bnx2x_release_phy_lock(bp);
  100. }
  101. static void bnx2x_pfc_clear(struct bnx2x *bp)
  102. {
  103. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  104. nig_params.pause_enable = 1;
  105. bnx2x_acquire_phy_lock(bp);
  106. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  107. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  108. bnx2x_release_phy_lock(bp);
  109. }
  110. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  111. struct dcbx_features *features,
  112. u32 error)
  113. {
  114. u8 i = 0;
  115. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  116. /* PG */
  117. DP(NETIF_MSG_LINK,
  118. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  119. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  120. DP(NETIF_MSG_LINK,
  121. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  122. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  123. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  124. DP(NETIF_MSG_LINK,
  125. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  126. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  127. /* pfc */
  128. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n",
  129. features->pfc.pri_en_bitmap);
  130. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n",
  131. features->pfc.pfc_caps);
  132. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n",
  133. features->pfc.enabled);
  134. DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n",
  135. features->app.default_pri);
  136. DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n",
  137. features->app.tc_supported);
  138. DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n",
  139. features->app.enabled);
  140. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  141. DP(BNX2X_MSG_DCB,
  142. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  143. i, features->app.app_pri_tbl[i].app_id);
  144. DP(BNX2X_MSG_DCB,
  145. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  146. i, features->app.app_pri_tbl[i].pri_bitmap);
  147. DP(BNX2X_MSG_DCB,
  148. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  149. i, features->app.app_pri_tbl[i].appBitfield);
  150. }
  151. }
  152. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  153. u8 pri_bitmap,
  154. u8 llfc_traf_type)
  155. {
  156. u32 pri = MAX_PFC_PRIORITIES;
  157. u32 index = MAX_PFC_PRIORITIES - 1;
  158. u32 pri_mask;
  159. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  160. /* Choose the highest priority */
  161. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  162. pri_mask = 1 << index;
  163. if (GET_FLAGS(pri_bitmap, pri_mask))
  164. pri = index ;
  165. index--;
  166. }
  167. if (pri < MAX_PFC_PRIORITIES)
  168. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  169. }
  170. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  171. struct dcbx_app_priority_feature *app,
  172. u32 error) {
  173. u8 index;
  174. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  175. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  176. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n");
  177. if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH))
  178. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n");
  179. if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND))
  180. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n");
  181. if (app->enabled &&
  182. !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH |
  183. DCBX_REMOTE_APP_TLV_NOT_FOUND)) {
  184. bp->dcbx_port_params.app.enabled = true;
  185. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  186. ttp[index] = 0;
  187. if (app->default_pri < MAX_PFC_PRIORITIES)
  188. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  189. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  190. struct dcbx_app_priority_entry *entry =
  191. app->app_pri_tbl;
  192. if (GET_FLAGS(entry[index].appBitfield,
  193. DCBX_APP_SF_ETH_TYPE) &&
  194. ETH_TYPE_FCOE == entry[index].app_id)
  195. bnx2x_dcbx_get_ap_priority(bp,
  196. entry[index].pri_bitmap,
  197. LLFC_TRAFFIC_TYPE_FCOE);
  198. if (GET_FLAGS(entry[index].appBitfield,
  199. DCBX_APP_SF_PORT) &&
  200. TCP_PORT_ISCSI == entry[index].app_id)
  201. bnx2x_dcbx_get_ap_priority(bp,
  202. entry[index].pri_bitmap,
  203. LLFC_TRAFFIC_TYPE_ISCSI);
  204. }
  205. } else {
  206. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n");
  207. bp->dcbx_port_params.app.enabled = false;
  208. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  209. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  210. }
  211. }
  212. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  213. struct dcbx_ets_feature *ets,
  214. u32 error) {
  215. int i = 0;
  216. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  217. struct pg_help_data pg_help_data;
  218. struct bnx2x_dcbx_cos_params *cos_params =
  219. bp->dcbx_port_params.ets.cos_params;
  220. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  221. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  222. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n");
  223. if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND))
  224. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n");
  225. /* Clean up old settings of ets on COS */
  226. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
  227. cos_params[i].pauseable = false;
  228. cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
  229. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  230. cos_params[i].pri_bitmask = 0;
  231. }
  232. if (bp->dcbx_port_params.app.enabled && ets->enabled &&
  233. !GET_FLAGS(error,
  234. DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) {
  235. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n");
  236. bp->dcbx_port_params.ets.enabled = true;
  237. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  238. pg_pri_orginal_spread,
  239. ets->pri_pg_tbl);
  240. bnx2x_dcbx_get_num_pg_traf_type(bp,
  241. pg_pri_orginal_spread,
  242. &pg_help_data);
  243. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  244. ets, pg_pri_orginal_spread);
  245. } else {
  246. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n");
  247. bp->dcbx_port_params.ets.enabled = false;
  248. ets->pri_pg_tbl[0] = 0;
  249. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  250. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  251. }
  252. }
  253. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  254. struct dcbx_pfc_feature *pfc, u32 error)
  255. {
  256. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  257. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n");
  258. if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND))
  259. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n");
  260. if (bp->dcbx_port_params.app.enabled && pfc->enabled &&
  261. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH |
  262. DCBX_REMOTE_PFC_TLV_NOT_FOUND)) {
  263. bp->dcbx_port_params.pfc.enabled = true;
  264. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  265. ~(pfc->pri_en_bitmap);
  266. } else {
  267. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n");
  268. bp->dcbx_port_params.pfc.enabled = false;
  269. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  270. }
  271. }
  272. /* maps unmapped priorities to to the same COS as L2 */
  273. static void bnx2x_dcbx_map_nw(struct bnx2x *bp)
  274. {
  275. int i;
  276. u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */
  277. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  278. u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW];
  279. struct bnx2x_dcbx_cos_params *cos_params =
  280. bp->dcbx_port_params.ets.cos_params;
  281. /* get unmapped priorities by clearing mapped bits */
  282. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  283. unmapped &= ~(1 << ttp[i]);
  284. /* find cos for nw prio and extend it with unmapped */
  285. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) {
  286. if (cos_params[i].pri_bitmask & nw_prio) {
  287. /* extend the bitmask with unmapped */
  288. DP(BNX2X_MSG_DCB,
  289. "cos %d extended with 0x%08x\n", i, unmapped);
  290. cos_params[i].pri_bitmask |= unmapped;
  291. break;
  292. }
  293. }
  294. }
  295. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  296. struct dcbx_features *features,
  297. u32 error)
  298. {
  299. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  300. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  301. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  302. bnx2x_dcbx_map_nw(bp);
  303. }
  304. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  305. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  306. u32 *base_mib_addr,
  307. u32 offset,
  308. int read_mib_type)
  309. {
  310. int max_try_read = 0;
  311. u32 mib_size, prefix_seq_num, suffix_seq_num;
  312. struct lldp_remote_mib *remote_mib ;
  313. struct lldp_local_mib *local_mib;
  314. switch (read_mib_type) {
  315. case DCBX_READ_LOCAL_MIB:
  316. mib_size = sizeof(struct lldp_local_mib);
  317. break;
  318. case DCBX_READ_REMOTE_MIB:
  319. mib_size = sizeof(struct lldp_remote_mib);
  320. break;
  321. default:
  322. return 1; /*error*/
  323. }
  324. offset += BP_PORT(bp) * mib_size;
  325. do {
  326. bnx2x_read_data(bp, base_mib_addr, offset, mib_size);
  327. max_try_read++;
  328. switch (read_mib_type) {
  329. case DCBX_READ_LOCAL_MIB:
  330. local_mib = (struct lldp_local_mib *) base_mib_addr;
  331. prefix_seq_num = local_mib->prefix_seq_num;
  332. suffix_seq_num = local_mib->suffix_seq_num;
  333. break;
  334. case DCBX_READ_REMOTE_MIB:
  335. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  336. prefix_seq_num = remote_mib->prefix_seq_num;
  337. suffix_seq_num = remote_mib->suffix_seq_num;
  338. break;
  339. default:
  340. return 1; /*error*/
  341. }
  342. } while ((prefix_seq_num != suffix_seq_num) &&
  343. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  344. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  345. BNX2X_ERR("MIB could not be read\n");
  346. return 1;
  347. }
  348. return 0;
  349. }
  350. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  351. {
  352. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  353. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  354. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  355. if (bp->dcbx_port_params.pfc.enabled &&
  356. (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured))
  357. /*
  358. * 1. Fills up common PFC structures if required
  359. * 2. Configure NIG, MAC and BRB via the elink
  360. */
  361. bnx2x_pfc_set(bp);
  362. else
  363. bnx2x_pfc_clear(bp);
  364. }
  365. static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  366. {
  367. struct bnx2x_func_state_params func_params = {NULL};
  368. func_params.f_obj = &bp->func_obj;
  369. func_params.cmd = BNX2X_F_CMD_TX_STOP;
  370. DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n");
  371. return bnx2x_func_state_change(bp, &func_params);
  372. }
  373. static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  374. {
  375. struct bnx2x_func_state_params func_params = {NULL};
  376. struct bnx2x_func_tx_start_params *tx_params =
  377. &func_params.params.tx_start;
  378. func_params.f_obj = &bp->func_obj;
  379. func_params.cmd = BNX2X_F_CMD_TX_START;
  380. bnx2x_dcbx_fw_struct(bp, tx_params);
  381. DP(BNX2X_MSG_DCB, "START TRAFFIC\n");
  382. return bnx2x_func_state_change(bp, &func_params);
  383. }
  384. static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
  385. {
  386. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  387. int rc = 0;
  388. if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
  389. BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
  390. return;
  391. }
  392. /* valid COS entries */
  393. if (ets->num_of_cos == 1) /* no ETS */
  394. return;
  395. /* sanity */
  396. if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
  397. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  398. ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
  399. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  400. BNX2X_ERR("all COS should have at least bw_limit or strict"
  401. "ets->cos_params[0].strict= %x"
  402. "ets->cos_params[0].bw_tbl= %x"
  403. "ets->cos_params[1].strict= %x"
  404. "ets->cos_params[1].bw_tbl= %x",
  405. ets->cos_params[0].strict,
  406. ets->cos_params[0].bw_tbl,
  407. ets->cos_params[1].strict,
  408. ets->cos_params[1].bw_tbl);
  409. return;
  410. }
  411. /* If we join a group and there is bw_tbl and strict then bw rules */
  412. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  413. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  414. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  415. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  416. /* Do not allow 0-100 configuration
  417. * since PBF does not support it
  418. * force 1-99 instead
  419. */
  420. if (bw_tbl_0 == 0) {
  421. bw_tbl_0 = 1;
  422. bw_tbl_1 = 99;
  423. } else if (bw_tbl_1 == 0) {
  424. bw_tbl_1 = 1;
  425. bw_tbl_0 = 99;
  426. }
  427. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  428. } else {
  429. if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
  430. rc = bnx2x_ets_strict(&bp->link_params, 0);
  431. else if (ets->cos_params[1].strict
  432. == BNX2X_DCBX_STRICT_COS_HIGHEST)
  433. rc = bnx2x_ets_strict(&bp->link_params, 1);
  434. if (rc)
  435. BNX2X_ERR("update_ets_params failed\n");
  436. }
  437. }
  438. /*
  439. * In E3B0 the configuration may have more than 2 COS.
  440. */
  441. static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
  442. {
  443. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  444. struct bnx2x_ets_params ets_params = { 0 };
  445. u8 i;
  446. ets_params.num_of_cos = ets->num_of_cos;
  447. for (i = 0; i < ets->num_of_cos; i++) {
  448. /* COS is SP */
  449. if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
  450. if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
  451. BNX2X_ERR("COS can't be not BW and not SP\n");
  452. return;
  453. }
  454. ets_params.cos[i].state = bnx2x_cos_state_strict;
  455. ets_params.cos[i].params.sp_params.pri =
  456. ets->cos_params[i].strict;
  457. } else { /* COS is BW */
  458. if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
  459. BNX2X_ERR("COS can't be not BW and not SP\n");
  460. return;
  461. }
  462. ets_params.cos[i].state = bnx2x_cos_state_bw;
  463. ets_params.cos[i].params.bw_params.bw =
  464. (u8)ets->cos_params[i].bw_tbl;
  465. }
  466. }
  467. /* Configure the ETS in HW */
  468. if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
  469. &ets_params)) {
  470. BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
  471. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  472. }
  473. }
  474. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  475. {
  476. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  477. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  478. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  479. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  480. if (!bp->dcbx_port_params.ets.enabled ||
  481. ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured))
  482. return;
  483. if (CHIP_IS_E3B0(bp))
  484. bnx2x_dcbx_update_ets_config(bp);
  485. else
  486. bnx2x_dcbx_2cos_limit_update_ets_config(bp);
  487. }
  488. #ifdef BCM_DCBNL
  489. static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
  490. {
  491. struct lldp_remote_mib remote_mib = {0};
  492. u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
  493. int rc;
  494. DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n",
  495. dcbx_remote_mib_offset);
  496. if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
  497. BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
  498. return -EINVAL;
  499. }
  500. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
  501. DCBX_READ_REMOTE_MIB);
  502. if (rc) {
  503. BNX2X_ERR("Failed to read remote mib from FW\n");
  504. return rc;
  505. }
  506. /* save features and flags */
  507. bp->dcbx_remote_feat = remote_mib.features;
  508. bp->dcbx_remote_flags = remote_mib.flags;
  509. return 0;
  510. }
  511. #endif
  512. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  513. {
  514. struct lldp_local_mib local_mib = {0};
  515. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  516. int rc;
  517. DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  518. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  519. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  520. return -EINVAL;
  521. }
  522. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  523. DCBX_READ_LOCAL_MIB);
  524. if (rc) {
  525. BNX2X_ERR("Failed to read local mib from FW\n");
  526. return rc;
  527. }
  528. /* save features and error */
  529. bp->dcbx_local_feat = local_mib.features;
  530. bp->dcbx_error = local_mib.error;
  531. return 0;
  532. }
  533. #ifdef BCM_DCBNL
  534. static inline
  535. u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
  536. {
  537. u8 pri;
  538. /* Choose the highest priority */
  539. for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
  540. if (ent->pri_bitmap & (1 << pri))
  541. break;
  542. return pri;
  543. }
  544. static inline
  545. u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
  546. {
  547. return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
  548. DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
  549. DCB_APP_IDTYPE_ETHTYPE;
  550. }
  551. int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
  552. {
  553. int i, err = 0;
  554. for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
  555. struct dcbx_app_priority_entry *ent =
  556. &bp->dcbx_local_feat.app.app_pri_tbl[i];
  557. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  558. u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
  559. /* avoid invalid user-priority */
  560. if (up) {
  561. struct dcb_app app;
  562. app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  563. app.protocol = ent->app_id;
  564. app.priority = delall ? 0 : up;
  565. err = dcb_setapp(bp->dev, &app);
  566. }
  567. }
  568. }
  569. return err;
  570. }
  571. #endif
  572. static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
  573. {
  574. u8 prio, cos;
  575. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
  576. for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
  577. if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
  578. & (1 << prio)) {
  579. bp->prio_to_cos[prio] = cos;
  580. DP(BNX2X_MSG_DCB,
  581. "tx_mapping %d --> %d\n", prio, cos);
  582. }
  583. }
  584. }
  585. /* setup tc must be called under rtnl lock, but we can't take it here
  586. * as we are handling an attention on a work queue which must be
  587. * flushed at some rtnl-locked contexts (e.g. if down)
  588. */
  589. if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
  590. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  591. }
  592. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  593. {
  594. switch (state) {
  595. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  596. {
  597. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  598. #ifdef BCM_DCBNL
  599. /**
  600. * Delete app tlvs from dcbnl before reading new
  601. * negotiation results
  602. */
  603. bnx2x_dcbnl_update_applist(bp, true);
  604. /* Read remote mib if dcbx is in the FW */
  605. if (bnx2x_dcbx_read_shmem_remote_mib(bp))
  606. return;
  607. #endif
  608. /* Read neg results if dcbx is in the FW */
  609. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  610. return;
  611. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  612. bp->dcbx_error);
  613. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  614. bp->dcbx_error);
  615. /* mark DCBX result for PMF migration */
  616. bnx2x_update_drv_flags(bp,
  617. 1 << DRV_FLAGS_DCB_CONFIGURED,
  618. 1);
  619. #ifdef BCM_DCBNL
  620. /*
  621. * Add new app tlvs to dcbnl
  622. */
  623. bnx2x_dcbnl_update_applist(bp, false);
  624. #endif
  625. /*
  626. * reconfigure the netdevice with the results of the new
  627. * dcbx negotiation.
  628. */
  629. bnx2x_dcbx_update_tc_mapping(bp);
  630. /*
  631. * allow other functions to update their netdevices
  632. * accordingly
  633. */
  634. if (IS_MF(bp))
  635. bnx2x_link_sync_notify(bp);
  636. bnx2x_dcbx_stop_hw_tx(bp);
  637. return;
  638. }
  639. case BNX2X_DCBX_STATE_TX_PAUSED:
  640. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  641. bnx2x_pfc_set_pfc(bp);
  642. bnx2x_dcbx_update_ets_params(bp);
  643. bnx2x_dcbx_resume_hw_tx(bp);
  644. return;
  645. case BNX2X_DCBX_STATE_TX_RELEASED:
  646. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  647. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  648. #ifdef BCM_DCBNL
  649. /*
  650. * Send a notification for the new negotiated parameters
  651. */
  652. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  653. #endif
  654. return;
  655. default:
  656. BNX2X_ERR("Unknown DCBX_STATE\n");
  657. }
  658. }
  659. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  660. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  661. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  662. u32 dcbx_lldp_params_offset)
  663. {
  664. struct lldp_admin_mib admin_mib;
  665. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  666. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  667. /*shortcuts*/
  668. struct dcbx_features *af = &admin_mib.features;
  669. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  670. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  671. /* Read the data first */
  672. bnx2x_read_data(bp, (u32 *)&admin_mib, offset,
  673. sizeof(struct lldp_admin_mib));
  674. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
  675. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  676. else
  677. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  678. if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) {
  679. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  680. admin_mib.ver_cfg_flags |=
  681. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  682. DCBX_CEE_VERSION_MASK;
  683. af->ets.enabled = (u8)dp->admin_ets_enable;
  684. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  685. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  686. if (dp->admin_ets_configuration_tx_enable)
  687. SET_FLAGS(admin_mib.ver_cfg_flags,
  688. DCBX_ETS_CONFIG_TX_ENABLED);
  689. else
  690. RESET_FLAGS(admin_mib.ver_cfg_flags,
  691. DCBX_ETS_CONFIG_TX_ENABLED);
  692. /* For IEEE admin_ets_recommendation_tx_enable */
  693. if (dp->admin_pfc_tx_enable)
  694. SET_FLAGS(admin_mib.ver_cfg_flags,
  695. DCBX_PFC_CONFIG_TX_ENABLED);
  696. else
  697. RESET_FLAGS(admin_mib.ver_cfg_flags,
  698. DCBX_PFC_CONFIG_TX_ENABLED);
  699. if (dp->admin_application_priority_tx_enable)
  700. SET_FLAGS(admin_mib.ver_cfg_flags,
  701. DCBX_APP_CONFIG_TX_ENABLED);
  702. else
  703. RESET_FLAGS(admin_mib.ver_cfg_flags,
  704. DCBX_APP_CONFIG_TX_ENABLED);
  705. if (dp->admin_ets_willing)
  706. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  707. else
  708. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  709. /* For IEEE admin_ets_reco_valid */
  710. if (dp->admin_pfc_willing)
  711. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  712. else
  713. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  714. if (dp->admin_app_priority_willing)
  715. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  716. else
  717. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  718. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  719. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  720. (u8)dp->admin_configuration_bw_precentage[i]);
  721. DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n",
  722. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  723. }
  724. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  725. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  726. (u8)dp->admin_configuration_ets_pg[i]);
  727. DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n",
  728. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  729. }
  730. /*For IEEE admin_recommendation_bw_percentage
  731. *For IEEE admin_recommendation_ets_pg */
  732. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  733. for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  734. if (dp->admin_priority_app_table[i].valid) {
  735. struct bnx2x_admin_priority_app_table *table =
  736. dp->admin_priority_app_table;
  737. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  738. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  739. traf_type = FCOE_APP_IDX;
  740. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  741. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  742. traf_type = ISCSI_APP_IDX;
  743. else
  744. traf_type = other_traf_type++;
  745. af->app.app_pri_tbl[traf_type].app_id =
  746. table[i].app_id;
  747. af->app.app_pri_tbl[traf_type].pri_bitmap =
  748. (u8)(1 << table[i].priority);
  749. af->app.app_pri_tbl[traf_type].appBitfield =
  750. (DCBX_APP_ENTRY_VALID);
  751. af->app.app_pri_tbl[traf_type].appBitfield |=
  752. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  753. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  754. }
  755. }
  756. af->app.default_pri = (u8)dp->admin_default_priority;
  757. }
  758. /* Write the data. */
  759. bnx2x_write_data(bp, (u32 *)&admin_mib, offset,
  760. sizeof(struct lldp_admin_mib));
  761. }
  762. void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
  763. {
  764. if (!CHIP_IS_E1x(bp)) {
  765. bp->dcb_state = dcb_on;
  766. bp->dcbx_enabled = dcbx_enabled;
  767. } else {
  768. bp->dcb_state = false;
  769. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
  770. }
  771. DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n",
  772. dcb_on ? "ON" : "OFF",
  773. dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
  774. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
  775. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
  776. "on-chip with negotiation" : "invalid");
  777. }
  778. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  779. {
  780. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  781. bp->dcbx_config_params.admin_ets_willing = 1;
  782. bp->dcbx_config_params.admin_pfc_willing = 1;
  783. bp->dcbx_config_params.overwrite_settings = 1;
  784. bp->dcbx_config_params.admin_ets_enable = 1;
  785. bp->dcbx_config_params.admin_pfc_enable = 1;
  786. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  787. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  788. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  789. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  790. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  791. bp->dcbx_config_params.admin_app_priority_willing = 1;
  792. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100;
  793. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0;
  794. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0;
  795. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  796. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  797. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  798. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  799. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  800. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0;
  801. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  802. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  803. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0;
  804. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  805. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  806. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  807. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  808. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100;
  809. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0;
  810. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0;
  811. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  812. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0;
  813. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0;
  814. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0;
  815. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0;
  816. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  817. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  818. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  819. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  820. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  821. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  822. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  823. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  824. bp->dcbx_config_params.admin_pfc_bitmap = 0x0;
  825. bp->dcbx_config_params.admin_priority_app_table[0].valid = 0;
  826. bp->dcbx_config_params.admin_priority_app_table[1].valid = 0;
  827. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  828. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  829. bp->dcbx_config_params.admin_default_priority = 0;
  830. }
  831. void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem)
  832. {
  833. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  834. /* only PMF can send ADMIN msg to MFW in old MFW versions */
  835. if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF)))
  836. return;
  837. if (bp->dcbx_enabled <= 0)
  838. return;
  839. /* validate:
  840. * chip of good for dcbx version,
  841. * dcb is wanted
  842. * shmem2 contains DCBX support fields
  843. */
  844. DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n",
  845. bp->dcb_state, bp->port.pmf);
  846. if (bp->dcb_state == BNX2X_DCB_STATE_ON &&
  847. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  848. dcbx_lldp_params_offset =
  849. SHMEM2_RD(bp, dcbx_lldp_params_offset);
  850. DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n",
  851. dcbx_lldp_params_offset);
  852. bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
  853. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  854. /* need HW lock to avoid scenario of two drivers
  855. * writing in parallel to shmem
  856. */
  857. bnx2x_acquire_hw_lock(bp,
  858. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  859. if (update_shmem)
  860. bnx2x_dcbx_admin_mib_updated_params(bp,
  861. dcbx_lldp_params_offset);
  862. /* Let HW start negotiation */
  863. bnx2x_fw_command(bp,
  864. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  865. /* release HW lock only after MFW acks that it finished
  866. * reading values from shmem
  867. */
  868. bnx2x_release_hw_lock(bp,
  869. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  870. }
  871. }
  872. }
  873. static void
  874. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  875. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  876. {
  877. u8 pri = 0;
  878. u8 cos = 0;
  879. DP(BNX2X_MSG_DCB,
  880. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  881. DP(BNX2X_MSG_DCB,
  882. "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n",
  883. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  884. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  885. DP(BNX2X_MSG_DCB,
  886. "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n",
  887. cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  888. DP(BNX2X_MSG_DCB,
  889. "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n",
  890. cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  891. DP(BNX2X_MSG_DCB,
  892. "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n",
  893. cos, bp->dcbx_port_params.ets.cos_params[cos].strict);
  894. DP(BNX2X_MSG_DCB,
  895. "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n",
  896. cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  897. }
  898. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  899. DP(BNX2X_MSG_DCB,
  900. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n",
  901. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  902. DP(BNX2X_MSG_DCB,
  903. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  904. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  905. }
  906. }
  907. /* fills help_data according to pg_info */
  908. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  909. u32 *pg_pri_orginal_spread,
  910. struct pg_help_data *help_data)
  911. {
  912. bool pg_found = false;
  913. u32 i, traf_type, add_traf_type, add_pg;
  914. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  915. struct pg_entry_help_data *data = help_data->data; /*shortcut*/
  916. /* Set to invalid */
  917. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  918. data[i].pg = DCBX_ILLEGAL_PG;
  919. for (add_traf_type = 0;
  920. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  921. pg_found = false;
  922. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  923. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  924. for (traf_type = 0;
  925. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  926. traf_type++) {
  927. if (data[traf_type].pg == add_pg) {
  928. if (!(data[traf_type].pg_priority &
  929. (1 << ttp[add_traf_type])))
  930. data[traf_type].
  931. num_of_dif_pri++;
  932. data[traf_type].pg_priority |=
  933. (1 << ttp[add_traf_type]);
  934. pg_found = true;
  935. break;
  936. }
  937. }
  938. if (false == pg_found) {
  939. data[help_data->num_of_pg].pg = add_pg;
  940. data[help_data->num_of_pg].pg_priority =
  941. (1 << ttp[add_traf_type]);
  942. data[help_data->num_of_pg].num_of_dif_pri = 1;
  943. help_data->num_of_pg++;
  944. }
  945. }
  946. DP(BNX2X_MSG_DCB,
  947. "add_traf_type %d pg_found %s num_of_pg %d\n",
  948. add_traf_type, (false == pg_found) ? "NO" : "YES",
  949. help_data->num_of_pg);
  950. }
  951. }
  952. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  953. struct cos_help_data *cos_data,
  954. u32 pri_join_mask)
  955. {
  956. /* Only one priority than only one COS */
  957. cos_data->data[0].pausable =
  958. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  959. cos_data->data[0].pri_join_mask = pri_join_mask;
  960. cos_data->data[0].cos_bw = 100;
  961. cos_data->num_of_cos = 1;
  962. }
  963. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  964. struct cos_entry_help_data *data,
  965. u8 pg_bw)
  966. {
  967. if (data->cos_bw == DCBX_INVALID_COS_BW)
  968. data->cos_bw = pg_bw;
  969. else
  970. data->cos_bw += pg_bw;
  971. }
  972. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  973. struct cos_help_data *cos_data,
  974. u32 *pg_pri_orginal_spread,
  975. struct dcbx_ets_feature *ets)
  976. {
  977. u32 pri_tested = 0;
  978. u8 i = 0;
  979. u8 entry = 0;
  980. u8 pg_entry = 0;
  981. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  982. cos_data->data[0].pausable = true;
  983. cos_data->data[1].pausable = false;
  984. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  985. for (i = 0 ; i < num_of_pri ; i++) {
  986. pri_tested = 1 << bp->dcbx_port_params.
  987. app.traffic_type_priority[i];
  988. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  989. cos_data->data[1].pri_join_mask |= pri_tested;
  990. entry = 1;
  991. } else {
  992. cos_data->data[0].pri_join_mask |= pri_tested;
  993. entry = 0;
  994. }
  995. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  996. app.traffic_type_priority[i]];
  997. /* There can be only one strict pg */
  998. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  999. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  1000. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  1001. else
  1002. /* If we join a group and one is strict
  1003. * than the bw rules
  1004. */
  1005. cos_data->data[entry].strict =
  1006. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1007. }
  1008. if ((0 == cos_data->data[0].pri_join_mask) &&
  1009. (0 == cos_data->data[1].pri_join_mask))
  1010. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  1011. }
  1012. #ifndef POWER_OF_2
  1013. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  1014. #endif
  1015. static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
  1016. struct pg_help_data *pg_help_data,
  1017. struct cos_help_data *cos_data,
  1018. u32 pri_join_mask,
  1019. u8 num_of_dif_pri)
  1020. {
  1021. u8 i = 0;
  1022. u32 pri_tested = 0;
  1023. u32 pri_mask_without_pri = 0;
  1024. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1025. /*debug*/
  1026. if (num_of_dif_pri == 1) {
  1027. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  1028. return;
  1029. }
  1030. /* single priority group */
  1031. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1032. /* If there are both pauseable and non-pauseable priorities,
  1033. * the pauseable priorities go to the first queue and
  1034. * the non-pauseable priorities go to the second queue.
  1035. */
  1036. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1037. /* Pauseable */
  1038. cos_data->data[0].pausable = true;
  1039. /* Non pauseable.*/
  1040. cos_data->data[1].pausable = false;
  1041. if (2 == num_of_dif_pri) {
  1042. cos_data->data[0].cos_bw = 50;
  1043. cos_data->data[1].cos_bw = 50;
  1044. }
  1045. if (3 == num_of_dif_pri) {
  1046. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  1047. pri_join_mask))) {
  1048. cos_data->data[0].cos_bw = 33;
  1049. cos_data->data[1].cos_bw = 67;
  1050. } else {
  1051. cos_data->data[0].cos_bw = 67;
  1052. cos_data->data[1].cos_bw = 33;
  1053. }
  1054. }
  1055. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  1056. /* If there are only pauseable priorities,
  1057. * then one/two priorities go to the first queue
  1058. * and one priority goes to the second queue.
  1059. */
  1060. if (2 == num_of_dif_pri) {
  1061. cos_data->data[0].cos_bw = 50;
  1062. cos_data->data[1].cos_bw = 50;
  1063. } else {
  1064. cos_data->data[0].cos_bw = 67;
  1065. cos_data->data[1].cos_bw = 33;
  1066. }
  1067. cos_data->data[1].pausable = true;
  1068. cos_data->data[0].pausable = true;
  1069. /* All priorities except FCOE */
  1070. cos_data->data[0].pri_join_mask = (pri_join_mask &
  1071. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  1072. /* Only FCOE priority.*/
  1073. cos_data->data[1].pri_join_mask =
  1074. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  1075. } else
  1076. /* If there are only non-pauseable priorities,
  1077. * they will all go to the same queue.
  1078. */
  1079. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1080. cos_data, pri_join_mask);
  1081. } else {
  1082. /* priority group which is not BW limited (PG#15):*/
  1083. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1084. /* If there are both pauseable and non-pauseable
  1085. * priorities, the pauseable priorities go to the first
  1086. * queue and the non-pauseable priorities
  1087. * go to the second queue.
  1088. */
  1089. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  1090. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  1091. cos_data->data[0].strict =
  1092. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1093. cos_data->data[1].strict =
  1094. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1095. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1096. } else {
  1097. cos_data->data[0].strict =
  1098. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1099. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1100. cos_data->data[1].strict =
  1101. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1102. }
  1103. /* Pauseable */
  1104. cos_data->data[0].pausable = true;
  1105. /* Non pause-able.*/
  1106. cos_data->data[1].pausable = false;
  1107. } else {
  1108. /* If there are only pauseable priorities or
  1109. * only non-pauseable,* the lower priorities go
  1110. * to the first queue and the higher priorities go
  1111. * to the second queue.
  1112. */
  1113. cos_data->data[0].pausable =
  1114. cos_data->data[1].pausable =
  1115. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1116. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  1117. pri_tested = 1 << bp->dcbx_port_params.
  1118. app.traffic_type_priority[i];
  1119. /* Remove priority tested */
  1120. pri_mask_without_pri =
  1121. (pri_join_mask & ((u8)(~pri_tested)));
  1122. if (pri_mask_without_pri < pri_tested)
  1123. break;
  1124. }
  1125. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1126. BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n");
  1127. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1128. cos_data->data[1].pri_join_mask = pri_tested;
  1129. /* Both queues are strict priority,
  1130. * and that with the highest priority
  1131. * gets the highest strict priority in the arbiter.
  1132. */
  1133. cos_data->data[0].strict =
  1134. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1135. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1136. cos_data->data[1].strict =
  1137. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1138. }
  1139. }
  1140. }
  1141. static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1142. struct bnx2x *bp,
  1143. struct pg_help_data *pg_help_data,
  1144. struct dcbx_ets_feature *ets,
  1145. struct cos_help_data *cos_data,
  1146. u32 *pg_pri_orginal_spread,
  1147. u32 pri_join_mask,
  1148. u8 num_of_dif_pri)
  1149. {
  1150. u8 i = 0;
  1151. u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
  1152. /* If there are both pauseable and non-pauseable priorities,
  1153. * the pauseable priorities go to the first queue and
  1154. * the non-pauseable priorities go to the second queue.
  1155. */
  1156. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1157. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1158. pg_help_data->data[0].pg_priority) ||
  1159. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1160. pg_help_data->data[1].pg_priority)) {
  1161. /* If one PG contains both pauseable and
  1162. * non-pauseable priorities then ETS is disabled.
  1163. */
  1164. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1165. pg_pri_orginal_spread, ets);
  1166. bp->dcbx_port_params.ets.enabled = false;
  1167. return;
  1168. }
  1169. /* Pauseable */
  1170. cos_data->data[0].pausable = true;
  1171. /* Non pauseable. */
  1172. cos_data->data[1].pausable = false;
  1173. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1174. pg_help_data->data[0].pg_priority)) {
  1175. /* 0 is pauseable */
  1176. cos_data->data[0].pri_join_mask =
  1177. pg_help_data->data[0].pg_priority;
  1178. pg[0] = pg_help_data->data[0].pg;
  1179. cos_data->data[1].pri_join_mask =
  1180. pg_help_data->data[1].pg_priority;
  1181. pg[1] = pg_help_data->data[1].pg;
  1182. } else {/* 1 is pauseable */
  1183. cos_data->data[0].pri_join_mask =
  1184. pg_help_data->data[1].pg_priority;
  1185. pg[0] = pg_help_data->data[1].pg;
  1186. cos_data->data[1].pri_join_mask =
  1187. pg_help_data->data[0].pg_priority;
  1188. pg[1] = pg_help_data->data[0].pg;
  1189. }
  1190. } else {
  1191. /* If there are only pauseable priorities or
  1192. * only non-pauseable, each PG goes to a queue.
  1193. */
  1194. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1195. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1196. cos_data->data[0].pri_join_mask =
  1197. pg_help_data->data[0].pg_priority;
  1198. pg[0] = pg_help_data->data[0].pg;
  1199. cos_data->data[1].pri_join_mask =
  1200. pg_help_data->data[1].pg_priority;
  1201. pg[1] = pg_help_data->data[1].pg;
  1202. }
  1203. /* There can be only one strict pg */
  1204. for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
  1205. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1206. cos_data->data[i].cos_bw =
  1207. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1208. else
  1209. cos_data->data[i].strict =
  1210. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1211. }
  1212. }
  1213. static int bnx2x_dcbx_join_pgs(
  1214. struct bnx2x *bp,
  1215. struct dcbx_ets_feature *ets,
  1216. struct pg_help_data *pg_help_data,
  1217. u8 required_num_of_pg)
  1218. {
  1219. u8 entry_joined = pg_help_data->num_of_pg - 1;
  1220. u8 entry_removed = entry_joined + 1;
  1221. u8 pg_joined = 0;
  1222. if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
  1223. <= pg_help_data->num_of_pg) {
  1224. BNX2X_ERR("required_num_of_pg can't be zero\n");
  1225. return -EINVAL;
  1226. }
  1227. while (required_num_of_pg < pg_help_data->num_of_pg) {
  1228. entry_joined = pg_help_data->num_of_pg - 2;
  1229. entry_removed = entry_joined + 1;
  1230. /* protect index */
  1231. entry_removed %= ARRAY_SIZE(pg_help_data->data);
  1232. pg_help_data->data[entry_joined].pg_priority |=
  1233. pg_help_data->data[entry_removed].pg_priority;
  1234. pg_help_data->data[entry_joined].num_of_dif_pri +=
  1235. pg_help_data->data[entry_removed].num_of_dif_pri;
  1236. if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
  1237. pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
  1238. /* Entries joined strict priority rules */
  1239. pg_help_data->data[entry_joined].pg =
  1240. DCBX_STRICT_PRI_PG;
  1241. else {
  1242. /* Entries can be joined join BW */
  1243. pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1244. pg_help_data->data[entry_joined].pg) +
  1245. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1246. pg_help_data->data[entry_removed].pg);
  1247. DCBX_PG_BW_SET(ets->pg_bw_tbl,
  1248. pg_help_data->data[entry_joined].pg, pg_joined);
  1249. }
  1250. /* Joined the entries */
  1251. pg_help_data->num_of_pg--;
  1252. }
  1253. return 0;
  1254. }
  1255. static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1256. struct bnx2x *bp,
  1257. struct pg_help_data *pg_help_data,
  1258. struct dcbx_ets_feature *ets,
  1259. struct cos_help_data *cos_data,
  1260. u32 *pg_pri_orginal_spread,
  1261. u32 pri_join_mask,
  1262. u8 num_of_dif_pri)
  1263. {
  1264. u8 i = 0;
  1265. u32 pri_tested = 0;
  1266. u8 entry = 0;
  1267. u8 pg_entry = 0;
  1268. bool b_found_strict = false;
  1269. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1270. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1271. /* If there are both pauseable and non-pauseable priorities,
  1272. * the pauseable priorities go to the first queue and the
  1273. * non-pauseable priorities go to the second queue.
  1274. */
  1275. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1276. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1277. cos_data, pg_pri_orginal_spread, ets);
  1278. else {
  1279. /* If two BW-limited PG-s were combined to one queue,
  1280. * the BW is their sum.
  1281. *
  1282. * If there are only pauseable priorities or only non-pauseable,
  1283. * and there are both BW-limited and non-BW-limited PG-s,
  1284. * the BW-limited PG/s go to one queue and the non-BW-limited
  1285. * PG/s go to the second queue.
  1286. *
  1287. * If there are only pauseable priorities or only non-pauseable
  1288. * and all are BW limited, then two priorities go to the first
  1289. * queue and one priority goes to the second queue.
  1290. *
  1291. * We will join this two cases:
  1292. * if one is BW limited it will go to the second queue
  1293. * otherwise the last priority will get it
  1294. */
  1295. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1296. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1297. for (i = 0 ; i < num_of_pri; i++) {
  1298. pri_tested = 1 << bp->dcbx_port_params.
  1299. app.traffic_type_priority[i];
  1300. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1301. dcbx_port_params.app.traffic_type_priority[i]];
  1302. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1303. entry = 0;
  1304. if (i == (num_of_pri-1) &&
  1305. false == b_found_strict)
  1306. /* last entry will be handled separately
  1307. * If no priority is strict than last
  1308. * entry goes to last queue.
  1309. */
  1310. entry = 1;
  1311. cos_data->data[entry].pri_join_mask |=
  1312. pri_tested;
  1313. bnx2x_dcbx_add_to_cos_bw(bp,
  1314. &cos_data->data[entry],
  1315. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1316. pg_entry));
  1317. } else {
  1318. b_found_strict = true;
  1319. cos_data->data[1].pri_join_mask |= pri_tested;
  1320. /* If we join a group and one is strict
  1321. * than the bw rules
  1322. */
  1323. cos_data->data[1].strict =
  1324. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1325. }
  1326. }
  1327. }
  1328. }
  1329. static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
  1330. struct pg_help_data *help_data,
  1331. struct dcbx_ets_feature *ets,
  1332. struct cos_help_data *cos_data,
  1333. u32 *pg_pri_orginal_spread,
  1334. u32 pri_join_mask,
  1335. u8 num_of_dif_pri)
  1336. {
  1337. /* default E2 settings */
  1338. cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
  1339. switch (help_data->num_of_pg) {
  1340. case 1:
  1341. bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
  1342. bp,
  1343. help_data,
  1344. cos_data,
  1345. pri_join_mask,
  1346. num_of_dif_pri);
  1347. break;
  1348. case 2:
  1349. bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1350. bp,
  1351. help_data,
  1352. ets,
  1353. cos_data,
  1354. pg_pri_orginal_spread,
  1355. pri_join_mask,
  1356. num_of_dif_pri);
  1357. break;
  1358. case 3:
  1359. bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1360. bp,
  1361. help_data,
  1362. ets,
  1363. cos_data,
  1364. pg_pri_orginal_spread,
  1365. pri_join_mask,
  1366. num_of_dif_pri);
  1367. break;
  1368. default:
  1369. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1370. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1371. cos_data, pri_join_mask);
  1372. }
  1373. }
  1374. static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
  1375. struct cos_help_data *cos_data,
  1376. u8 entry,
  1377. u8 num_spread_of_entries,
  1378. u8 strict_app_pris)
  1379. {
  1380. u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1381. u8 num_of_app_pri = MAX_PFC_PRIORITIES;
  1382. u8 app_pri_bit = 0;
  1383. while (num_spread_of_entries && num_of_app_pri > 0) {
  1384. app_pri_bit = 1 << (num_of_app_pri - 1);
  1385. if (app_pri_bit & strict_app_pris) {
  1386. struct cos_entry_help_data *data = &cos_data->
  1387. data[entry];
  1388. num_spread_of_entries--;
  1389. if (num_spread_of_entries == 0) {
  1390. /* last entry needed put all the entries left */
  1391. data->cos_bw = DCBX_INVALID_COS_BW;
  1392. data->strict = strict_pri;
  1393. data->pri_join_mask = strict_app_pris;
  1394. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1395. data->pri_join_mask);
  1396. } else {
  1397. strict_app_pris &= ~app_pri_bit;
  1398. data->cos_bw = DCBX_INVALID_COS_BW;
  1399. data->strict = strict_pri;
  1400. data->pri_join_mask = app_pri_bit;
  1401. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1402. data->pri_join_mask);
  1403. }
  1404. strict_pri =
  1405. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
  1406. entry++;
  1407. }
  1408. num_of_app_pri--;
  1409. }
  1410. if (num_spread_of_entries) {
  1411. BNX2X_ERR("Didn't succeed to spread strict priorities\n");
  1412. return -EINVAL;
  1413. }
  1414. return 0;
  1415. }
  1416. static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
  1417. struct cos_help_data *cos_data,
  1418. u8 entry,
  1419. u8 num_spread_of_entries,
  1420. u8 strict_app_pris)
  1421. {
  1422. if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
  1423. num_spread_of_entries,
  1424. strict_app_pris)) {
  1425. struct cos_entry_help_data *data = &cos_data->
  1426. data[entry];
  1427. /* Fill BW entry */
  1428. data->cos_bw = DCBX_INVALID_COS_BW;
  1429. data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1430. data->pri_join_mask = strict_app_pris;
  1431. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1432. data->pri_join_mask);
  1433. return 1;
  1434. }
  1435. return num_spread_of_entries;
  1436. }
  1437. static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
  1438. struct pg_help_data *help_data,
  1439. struct dcbx_ets_feature *ets,
  1440. struct cos_help_data *cos_data,
  1441. u32 pri_join_mask)
  1442. {
  1443. u8 need_num_of_entries = 0;
  1444. u8 i = 0;
  1445. u8 entry = 0;
  1446. /*
  1447. * if the number of requested PG-s in CEE is greater than 3
  1448. * then the results are not determined since this is a violation
  1449. * of the standard.
  1450. */
  1451. if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
  1452. if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
  1453. DCBX_COS_MAX_NUM_E3B0)) {
  1454. BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n");
  1455. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
  1456. pri_join_mask);
  1457. return;
  1458. }
  1459. }
  1460. for (i = 0 ; i < help_data->num_of_pg; i++) {
  1461. struct pg_entry_help_data *pg = &help_data->data[i];
  1462. if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1463. struct cos_entry_help_data *data = &cos_data->
  1464. data[entry];
  1465. /* Fill BW entry */
  1466. data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
  1467. data->strict = BNX2X_DCBX_STRICT_INVALID;
  1468. data->pri_join_mask = pg->pg_priority;
  1469. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1470. data->pri_join_mask);
  1471. entry++;
  1472. } else {
  1473. need_num_of_entries = min_t(u8,
  1474. (u8)pg->num_of_dif_pri,
  1475. (u8)DCBX_COS_MAX_NUM_E3B0 -
  1476. help_data->num_of_pg + 1);
  1477. /*
  1478. * If there are still VOQ-s which have no associated PG,
  1479. * then associate these VOQ-s to PG15. These PG-s will
  1480. * be used for SP between priorities on PG15.
  1481. */
  1482. entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
  1483. entry, need_num_of_entries, pg->pg_priority);
  1484. }
  1485. }
  1486. /* the entry will represent the number of COSes used */
  1487. cos_data->num_of_cos = entry;
  1488. }
  1489. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1490. struct pg_help_data *help_data,
  1491. struct dcbx_ets_feature *ets,
  1492. u32 *pg_pri_orginal_spread)
  1493. {
  1494. struct cos_help_data cos_data;
  1495. u8 i = 0;
  1496. u32 pri_join_mask = 0;
  1497. u8 num_of_dif_pri = 0;
  1498. memset(&cos_data, 0, sizeof(cos_data));
  1499. /* Validate the pg value */
  1500. for (i = 0; i < help_data->num_of_pg ; i++) {
  1501. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1502. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1503. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1504. help_data->data[i].pg);
  1505. pri_join_mask |= help_data->data[i].pg_priority;
  1506. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1507. }
  1508. /* defaults */
  1509. cos_data.num_of_cos = 1;
  1510. for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
  1511. cos_data.data[i].pri_join_mask = 0;
  1512. cos_data.data[i].pausable = false;
  1513. cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
  1514. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1515. }
  1516. if (CHIP_IS_E3B0(bp))
  1517. bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
  1518. &cos_data, pri_join_mask);
  1519. else /* E2 + E3A0 */
  1520. bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
  1521. help_data, ets,
  1522. &cos_data,
  1523. pg_pri_orginal_spread,
  1524. pri_join_mask,
  1525. num_of_dif_pri);
  1526. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1527. struct bnx2x_dcbx_cos_params *p =
  1528. &bp->dcbx_port_params.ets.cos_params[i];
  1529. p->strict = cos_data.data[i].strict;
  1530. p->bw_tbl = cos_data.data[i].cos_bw;
  1531. p->pri_bitmask = cos_data.data[i].pri_join_mask;
  1532. p->pauseable = cos_data.data[i].pausable;
  1533. /* sanity */
  1534. if (p->bw_tbl != DCBX_INVALID_COS_BW ||
  1535. p->strict != BNX2X_DCBX_STRICT_INVALID) {
  1536. if (p->pri_bitmask == 0)
  1537. BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
  1538. if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
  1539. if (p->pauseable &&
  1540. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1541. p->pri_bitmask) != 0)
  1542. BNX2X_ERR("Inconsistent config for pausable COS %d\n",
  1543. i);
  1544. if (!p->pauseable &&
  1545. DCBX_PFC_PRI_GET_PAUSE(bp,
  1546. p->pri_bitmask) != 0)
  1547. BNX2X_ERR("Inconsistent config for nonpausable COS %d\n",
  1548. i);
  1549. }
  1550. }
  1551. if (p->pauseable)
  1552. DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1553. i, cos_data.data[i].pri_join_mask);
  1554. else
  1555. DP(BNX2X_MSG_DCB,
  1556. "COS %d NONPAUSABLE prijoinmask 0x%x\n",
  1557. i, cos_data.data[i].pri_join_mask);
  1558. }
  1559. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1560. }
  1561. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1562. u32 *set_configuration_ets_pg,
  1563. u32 *pri_pg_tbl)
  1564. {
  1565. int i;
  1566. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1567. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1568. DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n",
  1569. i, set_configuration_ets_pg[i]);
  1570. }
  1571. }
  1572. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  1573. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  1574. {
  1575. u16 pri_bit = 0;
  1576. u8 cos = 0, pri = 0;
  1577. struct priority_cos *tt2cos;
  1578. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1579. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  1580. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  1581. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  1582. memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg));
  1583. /* to disable DCB - the structure must be zeroed */
  1584. if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)
  1585. return;
  1586. /*shortcut*/
  1587. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1588. /* Fw version should be incremented each update */
  1589. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1590. pfc_fw_cfg->dcb_enabled = 1;
  1591. /* Fill priority parameters */
  1592. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1593. tt2cos[pri].priority = ttp[pri];
  1594. pri_bit = 1 << tt2cos[pri].priority;
  1595. /* Fill COS parameters based on COS calculated to
  1596. * make it more general for future use */
  1597. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1598. if (bp->dcbx_port_params.ets.cos_params[cos].
  1599. pri_bitmask & pri_bit)
  1600. tt2cos[pri].cos = cos;
  1601. }
  1602. /* we never want the FW to add a 0 vlan tag */
  1603. pfc_fw_cfg->dont_add_pri_0_en = 1;
  1604. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1605. }
  1606. void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
  1607. {
  1608. /* if we need to synchronize DCBX result from prev PMF
  1609. * read it from shmem and update bp and netdev accordingly
  1610. */
  1611. if (SHMEM2_HAS(bp, drv_flags) &&
  1612. GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) {
  1613. /* Read neg results if dcbx is in the FW */
  1614. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  1615. return;
  1616. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1617. bp->dcbx_error);
  1618. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1619. bp->dcbx_error);
  1620. #ifdef BCM_DCBNL
  1621. /*
  1622. * Add new app tlvs to dcbnl
  1623. */
  1624. bnx2x_dcbnl_update_applist(bp, false);
  1625. /*
  1626. * Send a notification for the new negotiated parameters
  1627. */
  1628. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  1629. #endif
  1630. /*
  1631. * reconfigure the netdevice with the results of the new
  1632. * dcbx negotiation.
  1633. */
  1634. bnx2x_dcbx_update_tc_mapping(bp);
  1635. }
  1636. }
  1637. /* DCB netlink */
  1638. #ifdef BCM_DCBNL
  1639. #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
  1640. DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
  1641. static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
  1642. {
  1643. /* validate dcbnl call that may change HW state:
  1644. * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
  1645. */
  1646. return bp->dcb_state && bp->dcbx_mode_uset;
  1647. }
  1648. static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
  1649. {
  1650. struct bnx2x *bp = netdev_priv(netdev);
  1651. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state);
  1652. return bp->dcb_state;
  1653. }
  1654. static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
  1655. {
  1656. struct bnx2x *bp = netdev_priv(netdev);
  1657. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1658. /* Fail to set state to "enabled" if dcbx is disabled in nvram */
  1659. if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) ||
  1660. (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) {
  1661. DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n");
  1662. return 1;
  1663. }
  1664. bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
  1665. return 0;
  1666. }
  1667. static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  1668. u8 *perm_addr)
  1669. {
  1670. struct bnx2x *bp = netdev_priv(netdev);
  1671. DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n");
  1672. /* first the HW mac address */
  1673. memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
  1674. if (CNIC_LOADED(bp))
  1675. /* second SAN address */
  1676. memcpy(perm_addr+netdev->addr_len, bp->fip_mac,
  1677. netdev->addr_len);
  1678. }
  1679. static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
  1680. u8 prio_type, u8 pgid, u8 bw_pct,
  1681. u8 up_map)
  1682. {
  1683. struct bnx2x *bp = netdev_priv(netdev);
  1684. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid);
  1685. if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1686. return;
  1687. /**
  1688. * bw_pct ignored - band-width percentage devision between user
  1689. * priorities within the same group is not
  1690. * standard and hence not supported
  1691. *
  1692. * prio_type ignored - priority levels within the same group are not
  1693. * standard and hence are not supported. According
  1694. * to the standard pgid 15 is dedicated to strict
  1695. * priority traffic (on the port level).
  1696. *
  1697. * up_map ignored
  1698. */
  1699. bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
  1700. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1701. }
  1702. static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
  1703. int pgid, u8 bw_pct)
  1704. {
  1705. struct bnx2x *bp = netdev_priv(netdev);
  1706. DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct);
  1707. if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1708. return;
  1709. bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
  1710. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1711. }
  1712. static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
  1713. u8 prio_type, u8 pgid, u8 bw_pct,
  1714. u8 up_map)
  1715. {
  1716. struct bnx2x *bp = netdev_priv(netdev);
  1717. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1718. }
  1719. static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
  1720. int pgid, u8 bw_pct)
  1721. {
  1722. struct bnx2x *bp = netdev_priv(netdev);
  1723. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1724. }
  1725. static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
  1726. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1727. u8 *up_map)
  1728. {
  1729. struct bnx2x *bp = netdev_priv(netdev);
  1730. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1731. /**
  1732. * bw_pct ignored - band-width percentage devision between user
  1733. * priorities within the same group is not
  1734. * standard and hence not supported
  1735. *
  1736. * prio_type ignored - priority levels within the same group are not
  1737. * standard and hence are not supported. According
  1738. * to the standard pgid 15 is dedicated to strict
  1739. * priority traffic (on the port level).
  1740. *
  1741. * up_map ignored
  1742. */
  1743. *up_map = *bw_pct = *prio_type = *pgid = 0;
  1744. if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1745. return;
  1746. *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
  1747. }
  1748. static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
  1749. int pgid, u8 *bw_pct)
  1750. {
  1751. struct bnx2x *bp = netdev_priv(netdev);
  1752. DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid);
  1753. *bw_pct = 0;
  1754. if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1755. return;
  1756. *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
  1757. }
  1758. static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
  1759. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1760. u8 *up_map)
  1761. {
  1762. struct bnx2x *bp = netdev_priv(netdev);
  1763. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1764. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1765. }
  1766. static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
  1767. int pgid, u8 *bw_pct)
  1768. {
  1769. struct bnx2x *bp = netdev_priv(netdev);
  1770. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1771. *bw_pct = 0;
  1772. }
  1773. static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
  1774. u8 setting)
  1775. {
  1776. struct bnx2x *bp = netdev_priv(netdev);
  1777. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting);
  1778. if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
  1779. return;
  1780. if (setting) {
  1781. bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio);
  1782. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  1783. } else {
  1784. bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio);
  1785. }
  1786. }
  1787. static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
  1788. u8 *setting)
  1789. {
  1790. struct bnx2x *bp = netdev_priv(netdev);
  1791. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1792. *setting = 0;
  1793. if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
  1794. return;
  1795. *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
  1796. }
  1797. static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
  1798. {
  1799. struct bnx2x *bp = netdev_priv(netdev);
  1800. int rc = 0;
  1801. DP(BNX2X_MSG_DCB, "SET-ALL\n");
  1802. if (!bnx2x_dcbnl_set_valid(bp))
  1803. return 1;
  1804. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  1805. netdev_err(bp->dev,
  1806. "Handling parity error recovery. Try again later\n");
  1807. return 1;
  1808. }
  1809. if (netif_running(bp->dev)) {
  1810. bnx2x_update_drv_flags(bp,
  1811. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED,
  1812. 1);
  1813. bnx2x_dcbx_init(bp, true);
  1814. }
  1815. DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc);
  1816. if (rc)
  1817. return 1;
  1818. return 0;
  1819. }
  1820. static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
  1821. {
  1822. struct bnx2x *bp = netdev_priv(netdev);
  1823. u8 rval = 0;
  1824. if (bp->dcb_state) {
  1825. switch (capid) {
  1826. case DCB_CAP_ATTR_PG:
  1827. *cap = true;
  1828. break;
  1829. case DCB_CAP_ATTR_PFC:
  1830. *cap = true;
  1831. break;
  1832. case DCB_CAP_ATTR_UP2TC:
  1833. *cap = false;
  1834. break;
  1835. case DCB_CAP_ATTR_PG_TCS:
  1836. *cap = 0x80; /* 8 priorities for PGs */
  1837. break;
  1838. case DCB_CAP_ATTR_PFC_TCS:
  1839. *cap = 0x80; /* 8 priorities for PFC */
  1840. break;
  1841. case DCB_CAP_ATTR_GSP:
  1842. *cap = true;
  1843. break;
  1844. case DCB_CAP_ATTR_BCN:
  1845. *cap = false;
  1846. break;
  1847. case DCB_CAP_ATTR_DCBX:
  1848. *cap = BNX2X_DCBX_CAPS;
  1849. break;
  1850. default:
  1851. BNX2X_ERR("Non valid capability ID\n");
  1852. rval = 1;
  1853. break;
  1854. }
  1855. } else {
  1856. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1857. rval = 1;
  1858. }
  1859. DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap);
  1860. return rval;
  1861. }
  1862. static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
  1863. {
  1864. struct bnx2x *bp = netdev_priv(netdev);
  1865. u8 rval = 0;
  1866. DP(BNX2X_MSG_DCB, "tcid %d\n", tcid);
  1867. if (bp->dcb_state) {
  1868. switch (tcid) {
  1869. case DCB_NUMTCS_ATTR_PG:
  1870. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1871. DCBX_COS_MAX_NUM_E2;
  1872. break;
  1873. case DCB_NUMTCS_ATTR_PFC:
  1874. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1875. DCBX_COS_MAX_NUM_E2;
  1876. break;
  1877. default:
  1878. BNX2X_ERR("Non valid TC-ID\n");
  1879. rval = 1;
  1880. break;
  1881. }
  1882. } else {
  1883. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1884. rval = 1;
  1885. }
  1886. return rval;
  1887. }
  1888. static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
  1889. {
  1890. struct bnx2x *bp = netdev_priv(netdev);
  1891. DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num);
  1892. return -EINVAL;
  1893. }
  1894. static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
  1895. {
  1896. struct bnx2x *bp = netdev_priv(netdev);
  1897. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
  1898. if (!bp->dcb_state)
  1899. return 0;
  1900. return bp->dcbx_local_feat.pfc.enabled;
  1901. }
  1902. static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
  1903. {
  1904. struct bnx2x *bp = netdev_priv(netdev);
  1905. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1906. if (!bnx2x_dcbnl_set_valid(bp))
  1907. return;
  1908. bp->dcbx_config_params.admin_pfc_tx_enable =
  1909. bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
  1910. }
  1911. static void bnx2x_admin_app_set_ent(
  1912. struct bnx2x_admin_priority_app_table *app_ent,
  1913. u8 idtype, u16 idval, u8 up)
  1914. {
  1915. app_ent->valid = 1;
  1916. switch (idtype) {
  1917. case DCB_APP_IDTYPE_ETHTYPE:
  1918. app_ent->traffic_type = TRAFFIC_TYPE_ETH;
  1919. break;
  1920. case DCB_APP_IDTYPE_PORTNUM:
  1921. app_ent->traffic_type = TRAFFIC_TYPE_PORT;
  1922. break;
  1923. default:
  1924. break; /* never gets here */
  1925. }
  1926. app_ent->app_id = idval;
  1927. app_ent->priority = up;
  1928. }
  1929. static bool bnx2x_admin_app_is_equal(
  1930. struct bnx2x_admin_priority_app_table *app_ent,
  1931. u8 idtype, u16 idval)
  1932. {
  1933. if (!app_ent->valid)
  1934. return false;
  1935. switch (idtype) {
  1936. case DCB_APP_IDTYPE_ETHTYPE:
  1937. if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
  1938. return false;
  1939. break;
  1940. case DCB_APP_IDTYPE_PORTNUM:
  1941. if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
  1942. return false;
  1943. break;
  1944. default:
  1945. return false;
  1946. }
  1947. if (app_ent->app_id != idval)
  1948. return false;
  1949. return true;
  1950. }
  1951. static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
  1952. {
  1953. int i, ff;
  1954. /* iterate over the app entries looking for idtype and idval */
  1955. for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  1956. struct bnx2x_admin_priority_app_table *app_ent =
  1957. &bp->dcbx_config_params.admin_priority_app_table[i];
  1958. if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
  1959. break;
  1960. if (ff < 0 && !app_ent->valid)
  1961. ff = i;
  1962. }
  1963. if (i < DCBX_CONFIG_MAX_APP_PROTOCOL)
  1964. /* if found overwrite up */
  1965. bp->dcbx_config_params.
  1966. admin_priority_app_table[i].priority = up;
  1967. else if (ff >= 0)
  1968. /* not found use first-free */
  1969. bnx2x_admin_app_set_ent(
  1970. &bp->dcbx_config_params.admin_priority_app_table[ff],
  1971. idtype, idval, up);
  1972. else {
  1973. /* app table is full */
  1974. BNX2X_ERR("Application table is too large\n");
  1975. return -EBUSY;
  1976. }
  1977. /* up configured, if not 0 make sure feature is enabled */
  1978. if (up)
  1979. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  1980. return 0;
  1981. }
  1982. static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
  1983. u16 idval, u8 up)
  1984. {
  1985. struct bnx2x *bp = netdev_priv(netdev);
  1986. DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n",
  1987. idtype, idval, up);
  1988. if (!bnx2x_dcbnl_set_valid(bp)) {
  1989. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  1990. return -EINVAL;
  1991. }
  1992. /* verify idtype */
  1993. switch (idtype) {
  1994. case DCB_APP_IDTYPE_ETHTYPE:
  1995. case DCB_APP_IDTYPE_PORTNUM:
  1996. break;
  1997. default:
  1998. DP(BNX2X_MSG_DCB, "Wrong ID type\n");
  1999. return -EINVAL;
  2000. }
  2001. return bnx2x_set_admin_app_up(bp, idtype, idval, up);
  2002. }
  2003. static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
  2004. {
  2005. struct bnx2x *bp = netdev_priv(netdev);
  2006. u8 state;
  2007. state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
  2008. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
  2009. state |= DCB_CAP_DCBX_STATIC;
  2010. return state;
  2011. }
  2012. static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
  2013. {
  2014. struct bnx2x *bp = netdev_priv(netdev);
  2015. DP(BNX2X_MSG_DCB, "state = %02x\n", state);
  2016. /* set dcbx mode */
  2017. if ((state & BNX2X_DCBX_CAPS) != state) {
  2018. BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n",
  2019. state);
  2020. return 1;
  2021. }
  2022. if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
  2023. BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
  2024. return 1;
  2025. }
  2026. if (state & DCB_CAP_DCBX_STATIC)
  2027. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
  2028. else
  2029. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
  2030. bp->dcbx_mode_uset = true;
  2031. return 0;
  2032. }
  2033. static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
  2034. u8 *flags)
  2035. {
  2036. struct bnx2x *bp = netdev_priv(netdev);
  2037. u8 rval = 0;
  2038. DP(BNX2X_MSG_DCB, "featid %d\n", featid);
  2039. if (bp->dcb_state) {
  2040. *flags = 0;
  2041. switch (featid) {
  2042. case DCB_FEATCFG_ATTR_PG:
  2043. if (bp->dcbx_local_feat.ets.enabled)
  2044. *flags |= DCB_FEATCFG_ENABLE;
  2045. if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
  2046. *flags |= DCB_FEATCFG_ERROR;
  2047. break;
  2048. case DCB_FEATCFG_ATTR_PFC:
  2049. if (bp->dcbx_local_feat.pfc.enabled)
  2050. *flags |= DCB_FEATCFG_ENABLE;
  2051. if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
  2052. DCBX_LOCAL_PFC_MISMATCH))
  2053. *flags |= DCB_FEATCFG_ERROR;
  2054. break;
  2055. case DCB_FEATCFG_ATTR_APP:
  2056. if (bp->dcbx_local_feat.app.enabled)
  2057. *flags |= DCB_FEATCFG_ENABLE;
  2058. if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
  2059. DCBX_LOCAL_APP_MISMATCH))
  2060. *flags |= DCB_FEATCFG_ERROR;
  2061. break;
  2062. default:
  2063. BNX2X_ERR("Non valid feature-ID\n");
  2064. rval = 1;
  2065. break;
  2066. }
  2067. } else {
  2068. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  2069. rval = 1;
  2070. }
  2071. return rval;
  2072. }
  2073. static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
  2074. u8 flags)
  2075. {
  2076. struct bnx2x *bp = netdev_priv(netdev);
  2077. u8 rval = 0;
  2078. DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags);
  2079. /* ignore the 'advertise' flag */
  2080. if (bnx2x_dcbnl_set_valid(bp)) {
  2081. switch (featid) {
  2082. case DCB_FEATCFG_ATTR_PG:
  2083. bp->dcbx_config_params.admin_ets_enable =
  2084. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2085. bp->dcbx_config_params.admin_ets_willing =
  2086. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2087. break;
  2088. case DCB_FEATCFG_ATTR_PFC:
  2089. bp->dcbx_config_params.admin_pfc_enable =
  2090. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2091. bp->dcbx_config_params.admin_pfc_willing =
  2092. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2093. break;
  2094. case DCB_FEATCFG_ATTR_APP:
  2095. /* ignore enable, always enabled */
  2096. bp->dcbx_config_params.admin_app_priority_willing =
  2097. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2098. break;
  2099. default:
  2100. BNX2X_ERR("Non valid feature-ID\n");
  2101. rval = 1;
  2102. break;
  2103. }
  2104. } else {
  2105. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  2106. rval = 1;
  2107. }
  2108. return rval;
  2109. }
  2110. static int bnx2x_peer_appinfo(struct net_device *netdev,
  2111. struct dcb_peer_app_info *info, u16* app_count)
  2112. {
  2113. int i;
  2114. struct bnx2x *bp = netdev_priv(netdev);
  2115. DP(BNX2X_MSG_DCB, "APP-INFO\n");
  2116. info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
  2117. info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
  2118. *app_count = 0;
  2119. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
  2120. if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
  2121. DCBX_APP_ENTRY_VALID)
  2122. (*app_count)++;
  2123. return 0;
  2124. }
  2125. static int bnx2x_peer_apptable(struct net_device *netdev,
  2126. struct dcb_app *table)
  2127. {
  2128. int i, j;
  2129. struct bnx2x *bp = netdev_priv(netdev);
  2130. DP(BNX2X_MSG_DCB, "APP-TABLE\n");
  2131. for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  2132. struct dcbx_app_priority_entry *ent =
  2133. &bp->dcbx_remote_feat.app.app_pri_tbl[i];
  2134. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  2135. table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  2136. table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
  2137. table[j++].protocol = ent->app_id;
  2138. }
  2139. }
  2140. return 0;
  2141. }
  2142. static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
  2143. {
  2144. int i;
  2145. struct bnx2x *bp = netdev_priv(netdev);
  2146. pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
  2147. for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
  2148. pg->pg_bw[i] =
  2149. DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
  2150. pg->prio_pg[i] =
  2151. DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
  2152. }
  2153. return 0;
  2154. }
  2155. static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
  2156. struct cee_pfc *pfc)
  2157. {
  2158. struct bnx2x *bp = netdev_priv(netdev);
  2159. pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
  2160. pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
  2161. return 0;
  2162. }
  2163. const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
  2164. .getstate = bnx2x_dcbnl_get_state,
  2165. .setstate = bnx2x_dcbnl_set_state,
  2166. .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
  2167. .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
  2168. .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
  2169. .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
  2170. .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
  2171. .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
  2172. .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
  2173. .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
  2174. .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
  2175. .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
  2176. .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
  2177. .setall = bnx2x_dcbnl_set_all,
  2178. .getcap = bnx2x_dcbnl_get_cap,
  2179. .getnumtcs = bnx2x_dcbnl_get_numtcs,
  2180. .setnumtcs = bnx2x_dcbnl_set_numtcs,
  2181. .getpfcstate = bnx2x_dcbnl_get_pfc_state,
  2182. .setpfcstate = bnx2x_dcbnl_set_pfc_state,
  2183. .setapp = bnx2x_dcbnl_set_app_up,
  2184. .getdcbx = bnx2x_dcbnl_get_dcbx,
  2185. .setdcbx = bnx2x_dcbnl_set_dcbx,
  2186. .getfeatcfg = bnx2x_dcbnl_get_featcfg,
  2187. .setfeatcfg = bnx2x_dcbnl_set_featcfg,
  2188. .peer_getappinfo = bnx2x_peer_appinfo,
  2189. .peer_getapptable = bnx2x_peer_apptable,
  2190. .cee_peer_getpg = bnx2x_cee_peer_getpg,
  2191. .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
  2192. };
  2193. #endif /* BCM_DCBNL */